/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/locks/test_locks_14-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 20:29:41,228 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 20:29:41,230 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 20:29:41,276 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 20:29:41,276 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 20:29:41,277 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 20:29:41,278 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 20:29:41,280 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 20:29:41,282 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 20:29:41,282 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 20:29:41,283 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 20:29:41,284 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 20:29:41,284 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 20:29:41,285 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 20:29:41,286 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 20:29:41,295 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 20:29:41,296 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 20:29:41,297 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 20:29:41,298 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 20:29:41,300 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 20:29:41,301 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 20:29:41,304 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 20:29:41,305 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 20:29:41,306 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 20:29:41,306 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 20:29:41,309 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 20:29:41,324 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 20:29:41,325 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 20:29:41,327 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 20:29:41,328 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 20:29:41,342 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 20:29:41,342 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 20:29:41,343 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 20:29:41,343 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 20:29:41,343 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 20:29:41,344 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 20:29:41,344 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 20:29:41,344 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 20:29:41,344 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 20:29:41,345 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 20:29:41,345 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 20:29:41,346 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 20:29:41,346 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 20:29:41,346 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 20:29:41,346 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 20:29:41,347 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 20:29:41,347 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 20:29:41,578 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 20:29:41,598 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 20:29:41,600 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 20:29:41,601 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 20:29:41,601 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 20:29:41,602 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-27 20:29:41,652 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e6a61e9e6/8986adb335fc46afb3364532b02bc205/FLAGc3a93ebc6 [2022-04-27 20:29:42,053 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 20:29:42,053 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c [2022-04-27 20:29:42,059 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e6a61e9e6/8986adb335fc46afb3364532b02bc205/FLAGc3a93ebc6 [2022-04-27 20:29:42,450 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e6a61e9e6/8986adb335fc46afb3364532b02bc205 [2022-04-27 20:29:42,452 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 20:29:42,453 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 20:29:42,458 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 20:29:42,459 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 20:29:42,461 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 20:29:42,462 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,463 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@464dced9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42, skipping insertion in model container [2022-04-27 20:29:42,463 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,469 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 20:29:42,498 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 20:29:42,653 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-27 20:29:42,656 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 20:29:42,665 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 20:29:42,688 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_14-1.c[5283,5296] [2022-04-27 20:29:42,690 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 20:29:42,700 INFO L208 MainTranslator]: Completed translation [2022-04-27 20:29:42,701 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42 WrapperNode [2022-04-27 20:29:42,701 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 20:29:42,702 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 20:29:42,702 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 20:29:42,702 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 20:29:42,708 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,708 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,713 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,713 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,721 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,729 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,730 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,732 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 20:29:42,733 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 20:29:42,733 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 20:29:42,733 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 20:29:42,734 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (1/1) ... [2022-04-27 20:29:42,741 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 20:29:42,751 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 20:29:42,762 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 20:29:42,788 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 20:29:42,805 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 20:29:42,805 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 20:29:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 20:29:42,806 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 20:29:42,807 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 20:29:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 20:29:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 20:29:42,808 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 20:29:42,809 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 20:29:42,810 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 20:29:42,899 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 20:29:42,900 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 20:29:43,186 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 20:29:43,192 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 20:29:43,193 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 20:29:43,199 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:29:43 BoogieIcfgContainer [2022-04-27 20:29:43,199 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 20:29:43,200 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 20:29:43,200 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 20:29:43,201 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 20:29:43,207 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:29:43" (1/1) ... [2022-04-27 20:29:43,209 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 20:29:43,258 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 08:29:43 BasicIcfg [2022-04-27 20:29:43,258 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 20:29:43,259 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 20:29:43,260 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 20:29:43,267 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 20:29:43,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 08:29:42" (1/4) ... [2022-04-27 20:29:43,268 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69deca62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 08:29:43, skipping insertion in model container [2022-04-27 20:29:43,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:29:42" (2/4) ... [2022-04-27 20:29:43,269 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69deca62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 08:29:43, skipping insertion in model container [2022-04-27 20:29:43,269 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:29:43" (3/4) ... [2022-04-27 20:29:43,269 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@69deca62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 08:29:43, skipping insertion in model container [2022-04-27 20:29:43,269 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 08:29:43" (4/4) ... [2022-04-27 20:29:43,270 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_14-1.cJordan [2022-04-27 20:29:43,281 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 20:29:43,282 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 20:29:43,317 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 20:29:43,322 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@66cd472, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4b5948ea [2022-04-27 20:29:43,322 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 20:29:43,330 INFO L276 IsEmpty]: Start isEmpty. Operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 20:29:43,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 20:29:43,335 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:43,336 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:43,336 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:43,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:43,340 INFO L85 PathProgramCache]: Analyzing trace with hash 267710119, now seen corresponding path program 1 times [2022-04-27 20:29:43,348 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:43,349 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767167498] [2022-04-27 20:29:43,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:43,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:43,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:43,578 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:43,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:43,605 INFO L290 TraceCheckUtils]: 0: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-27 20:29:43,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-27 20:29:43,606 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-27 20:29:43,608 INFO L272 TraceCheckUtils]: 0: Hoare triple {60#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:43,609 INFO L290 TraceCheckUtils]: 1: Hoare triple {66#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {60#true} is VALID [2022-04-27 20:29:43,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {60#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-27 20:29:43,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {60#true} {60#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-27 20:29:43,609 INFO L272 TraceCheckUtils]: 4: Hoare triple {60#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {60#true} is VALID [2022-04-27 20:29:43,611 INFO L290 TraceCheckUtils]: 5: Hoare triple {60#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {60#true} is VALID [2022-04-27 20:29:43,611 INFO L290 TraceCheckUtils]: 6: Hoare triple {60#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {60#true} is VALID [2022-04-27 20:29:43,612 INFO L290 TraceCheckUtils]: 7: Hoare triple {60#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {60#true} is VALID [2022-04-27 20:29:43,614 INFO L290 TraceCheckUtils]: 8: Hoare triple {60#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,614 INFO L290 TraceCheckUtils]: 9: Hoare triple {65#(= main_~lk1~0 1)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,615 INFO L290 TraceCheckUtils]: 10: Hoare triple {65#(= main_~lk1~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,617 INFO L290 TraceCheckUtils]: 11: Hoare triple {65#(= main_~lk1~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,617 INFO L290 TraceCheckUtils]: 12: Hoare triple {65#(= main_~lk1~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,618 INFO L290 TraceCheckUtils]: 13: Hoare triple {65#(= main_~lk1~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,618 INFO L290 TraceCheckUtils]: 14: Hoare triple {65#(= main_~lk1~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,619 INFO L290 TraceCheckUtils]: 15: Hoare triple {65#(= main_~lk1~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,621 INFO L290 TraceCheckUtils]: 16: Hoare triple {65#(= main_~lk1~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,622 INFO L290 TraceCheckUtils]: 17: Hoare triple {65#(= main_~lk1~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,622 INFO L290 TraceCheckUtils]: 18: Hoare triple {65#(= main_~lk1~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,623 INFO L290 TraceCheckUtils]: 19: Hoare triple {65#(= main_~lk1~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,624 INFO L290 TraceCheckUtils]: 20: Hoare triple {65#(= main_~lk1~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,624 INFO L290 TraceCheckUtils]: 21: Hoare triple {65#(= main_~lk1~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,625 INFO L290 TraceCheckUtils]: 22: Hoare triple {65#(= main_~lk1~0 1)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {65#(= main_~lk1~0 1)} is VALID [2022-04-27 20:29:43,625 INFO L290 TraceCheckUtils]: 23: Hoare triple {65#(= main_~lk1~0 1)} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-27 20:29:43,626 INFO L290 TraceCheckUtils]: 24: Hoare triple {61#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {61#false} is VALID [2022-04-27 20:29:43,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:43,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:43,627 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767167498] [2022-04-27 20:29:43,628 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1767167498] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:43,628 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:43,628 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:43,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706922819] [2022-04-27 20:29:43,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:43,634 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:43,635 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:43,638 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:43,672 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:43,672 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:43,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:43,695 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:43,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:43,701 INFO L87 Difference]: Start difference. First operand has 57 states, 51 states have (on average 1.9019607843137254) internal successors, (97), 52 states have internal predecessors, (97), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,125 INFO L93 Difference]: Finished difference Result 105 states and 186 transitions. [2022-04-27 20:29:44,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:44,126 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:44,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:44,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 193 transitions. [2022-04-27 20:29:44,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 193 transitions. [2022-04-27 20:29:44,142 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 193 transitions. [2022-04-27 20:29:44,320 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 193 edges. 193 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,337 INFO L225 Difference]: With dead ends: 105 [2022-04-27 20:29:44,337 INFO L226 Difference]: Without dead ends: 97 [2022-04-27 20:29:44,340 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:44,342 INFO L413 NwaCegarLoop]: 104 mSDtfsCounter, 242 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 97 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 242 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 99 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 97 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:44,343 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [242 Valid, 113 Invalid, 99 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 97 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:44,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-27 20:29:44,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 67. [2022-04-27 20:29:44,368 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:44,369 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,370 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,371 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,381 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-27 20:29:44,381 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-27 20:29:44,382 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,382 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-27 20:29:44,383 INFO L87 Difference]: Start difference. First operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-27 20:29:44,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,397 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2022-04-27 20:29:44,397 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 177 transitions. [2022-04-27 20:29:44,399 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:44,399 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:44,399 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:44,399 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:44,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 63 states have (on average 1.8888888888888888) internal successors, (119), 63 states have internal predecessors, (119), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 122 transitions. [2022-04-27 20:29:44,405 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 122 transitions. Word has length 25 [2022-04-27 20:29:44,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:44,405 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 122 transitions. [2022-04-27 20:29:44,406 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,406 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 122 transitions. [2022-04-27 20:29:44,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 20:29:44,407 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:44,407 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:44,407 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 20:29:44,407 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:44,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:44,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1621019816, now seen corresponding path program 1 times [2022-04-27 20:29:44,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:44,408 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999791678] [2022-04-27 20:29:44,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:44,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:44,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,487 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:44,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:44,499 INFO L290 TraceCheckUtils]: 0: Hoare triple {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {438#true} is VALID [2022-04-27 20:29:44,500 INFO L290 TraceCheckUtils]: 1: Hoare triple {438#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-27 20:29:44,500 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {438#true} {438#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-27 20:29:44,501 INFO L272 TraceCheckUtils]: 0: Hoare triple {438#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:44,501 INFO L290 TraceCheckUtils]: 1: Hoare triple {444#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {438#true} is VALID [2022-04-27 20:29:44,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {438#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-27 20:29:44,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {438#true} {438#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-27 20:29:44,502 INFO L272 TraceCheckUtils]: 4: Hoare triple {438#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {438#true} is VALID [2022-04-27 20:29:44,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {438#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {438#true} is VALID [2022-04-27 20:29:44,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {438#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {438#true} is VALID [2022-04-27 20:29:44,503 INFO L290 TraceCheckUtils]: 7: Hoare triple {438#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {438#true} is VALID [2022-04-27 20:29:44,503 INFO L290 TraceCheckUtils]: 8: Hoare triple {438#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,504 INFO L290 TraceCheckUtils]: 9: Hoare triple {443#(= main_~p1~0 0)} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,504 INFO L290 TraceCheckUtils]: 10: Hoare triple {443#(= main_~p1~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,505 INFO L290 TraceCheckUtils]: 11: Hoare triple {443#(= main_~p1~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,505 INFO L290 TraceCheckUtils]: 12: Hoare triple {443#(= main_~p1~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,506 INFO L290 TraceCheckUtils]: 13: Hoare triple {443#(= main_~p1~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,506 INFO L290 TraceCheckUtils]: 14: Hoare triple {443#(= main_~p1~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,507 INFO L290 TraceCheckUtils]: 15: Hoare triple {443#(= main_~p1~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,507 INFO L290 TraceCheckUtils]: 16: Hoare triple {443#(= main_~p1~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,507 INFO L290 TraceCheckUtils]: 17: Hoare triple {443#(= main_~p1~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,508 INFO L290 TraceCheckUtils]: 18: Hoare triple {443#(= main_~p1~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,512 INFO L290 TraceCheckUtils]: 19: Hoare triple {443#(= main_~p1~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,512 INFO L290 TraceCheckUtils]: 20: Hoare triple {443#(= main_~p1~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,513 INFO L290 TraceCheckUtils]: 21: Hoare triple {443#(= main_~p1~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {443#(= main_~p1~0 0)} is VALID [2022-04-27 20:29:44,513 INFO L290 TraceCheckUtils]: 22: Hoare triple {443#(= main_~p1~0 0)} [312] L140-1-->L147: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-27 20:29:44,513 INFO L290 TraceCheckUtils]: 23: Hoare triple {439#false} [314] L147-->L212-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-27 20:29:44,514 INFO L290 TraceCheckUtils]: 24: Hoare triple {439#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {439#false} is VALID [2022-04-27 20:29:44,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:44,514 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:44,514 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999791678] [2022-04-27 20:29:44,514 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [999791678] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:44,515 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:44,515 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:44,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247697881] [2022-04-27 20:29:44,515 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:44,516 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:44,517 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:44,517 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,537 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:44,538 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:44,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:44,538 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:44,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:44,539 INFO L87 Difference]: Start difference. First operand 67 states and 122 transitions. Second operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:44,839 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-27 20:29:44,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:44,840 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 20:29:44,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:44,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-27 20:29:44,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:44,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-27 20:29:44,845 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 177 transitions. [2022-04-27 20:29:44,997 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 177 edges. 177 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,000 INFO L225 Difference]: With dead ends: 97 [2022-04-27 20:29:45,001 INFO L226 Difference]: Without dead ends: 97 [2022-04-27 20:29:45,001 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:45,002 INFO L413 NwaCegarLoop]: 120 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:45,003 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 127 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:45,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-27 20:29:45,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 95. [2022-04-27 20:29:45,017 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:45,017 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,018 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,018 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,022 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-27 20:29:45,023 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-27 20:29:45,023 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,023 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,024 INFO L74 IsIncluded]: Start isIncluded. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-27 20:29:45,024 INFO L87 Difference]: Start difference. First operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-27 20:29:45,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,028 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2022-04-27 20:29:45,028 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2022-04-27 20:29:45,029 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,029 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,029 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:45,029 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:45,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 91 states have (on average 1.879120879120879) internal successors, (171), 91 states have internal predecessors, (171), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 174 transitions. [2022-04-27 20:29:45,033 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 174 transitions. Word has length 25 [2022-04-27 20:29:45,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:45,033 INFO L495 AbstractCegarLoop]: Abstraction has 95 states and 174 transitions. [2022-04-27 20:29:45,033 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.5) internal successors, (22), 3 states have internal predecessors, (22), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,033 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 174 transitions. [2022-04-27 20:29:45,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:29:45,034 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:45,034 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:45,034 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 20:29:45,035 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:45,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:45,035 INFO L85 PathProgramCache]: Analyzing trace with hash -290888810, now seen corresponding path program 1 times [2022-04-27 20:29:45,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:45,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463022859] [2022-04-27 20:29:45,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:45,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:45,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,106 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:45,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,117 INFO L290 TraceCheckUtils]: 0: Hoare triple {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {836#true} is VALID [2022-04-27 20:29:45,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-27 20:29:45,117 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {836#true} {836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-27 20:29:45,119 INFO L272 TraceCheckUtils]: 0: Hoare triple {836#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:45,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {842#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {836#true} is VALID [2022-04-27 20:29:45,120 INFO L290 TraceCheckUtils]: 2: Hoare triple {836#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-27 20:29:45,120 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {836#true} {836#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-27 20:29:45,121 INFO L272 TraceCheckUtils]: 4: Hoare triple {836#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {836#true} is VALID [2022-04-27 20:29:45,121 INFO L290 TraceCheckUtils]: 5: Hoare triple {836#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {836#true} is VALID [2022-04-27 20:29:45,121 INFO L290 TraceCheckUtils]: 6: Hoare triple {836#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {836#true} is VALID [2022-04-27 20:29:45,121 INFO L290 TraceCheckUtils]: 7: Hoare triple {836#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {836#true} is VALID [2022-04-27 20:29:45,124 INFO L290 TraceCheckUtils]: 8: Hoare triple {836#true} [284] L88-->L88-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {841#(not (= main_~p1~0 0))} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,125 INFO L290 TraceCheckUtils]: 10: Hoare triple {841#(not (= main_~p1~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,125 INFO L290 TraceCheckUtils]: 11: Hoare triple {841#(not (= main_~p1~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,126 INFO L290 TraceCheckUtils]: 12: Hoare triple {841#(not (= main_~p1~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,126 INFO L290 TraceCheckUtils]: 13: Hoare triple {841#(not (= main_~p1~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,127 INFO L290 TraceCheckUtils]: 14: Hoare triple {841#(not (= main_~p1~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,127 INFO L290 TraceCheckUtils]: 15: Hoare triple {841#(not (= main_~p1~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,127 INFO L290 TraceCheckUtils]: 16: Hoare triple {841#(not (= main_~p1~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,128 INFO L290 TraceCheckUtils]: 17: Hoare triple {841#(not (= main_~p1~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,128 INFO L290 TraceCheckUtils]: 18: Hoare triple {841#(not (= main_~p1~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,129 INFO L290 TraceCheckUtils]: 19: Hoare triple {841#(not (= main_~p1~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,129 INFO L290 TraceCheckUtils]: 20: Hoare triple {841#(not (= main_~p1~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,129 INFO L290 TraceCheckUtils]: 21: Hoare triple {841#(not (= main_~p1~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {841#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:29:45,130 INFO L290 TraceCheckUtils]: 22: Hoare triple {841#(not (= main_~p1~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-27 20:29:45,130 INFO L290 TraceCheckUtils]: 23: Hoare triple {837#false} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-27 20:29:45,130 INFO L290 TraceCheckUtils]: 24: Hoare triple {837#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-27 20:29:45,130 INFO L290 TraceCheckUtils]: 25: Hoare triple {837#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {837#false} is VALID [2022-04-27 20:29:45,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:45,131 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:45,131 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463022859] [2022-04-27 20:29:45,132 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1463022859] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:45,132 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:45,133 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:45,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1411282924] [2022-04-27 20:29:45,133 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:45,133 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,134 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:45,134 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,151 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,151 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:45,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:45,152 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:45,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:45,152 INFO L87 Difference]: Start difference. First operand 95 states and 174 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,400 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-27 20:29:45,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:45,400 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:45,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-27 20:29:45,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-27 20:29:45,405 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-27 20:29:45,560 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,562 INFO L225 Difference]: With dead ends: 100 [2022-04-27 20:29:45,562 INFO L226 Difference]: Without dead ends: 100 [2022-04-27 20:29:45,562 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:45,563 INFO L413 NwaCegarLoop]: 146 mSDtfsCounter, 183 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 153 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:45,564 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 153 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:45,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-27 20:29:45,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2022-04-27 20:29:45,569 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:45,570 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,570 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,570 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,574 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-27 20:29:45,574 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-27 20:29:45,574 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,575 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,575 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-27 20:29:45,575 INFO L87 Difference]: Start difference. First operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-27 20:29:45,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,579 INFO L93 Difference]: Finished difference Result 100 states and 177 transitions. [2022-04-27 20:29:45,579 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 177 transitions. [2022-04-27 20:29:45,580 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:45,580 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:45,580 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:45,580 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:45,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 94 states have (on average 1.8404255319148937) internal successors, (173), 94 states have internal predecessors, (173), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 176 transitions. [2022-04-27 20:29:45,584 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 176 transitions. Word has length 26 [2022-04-27 20:29:45,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:45,584 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 176 transitions. [2022-04-27 20:29:45,584 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,584 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 176 transitions. [2022-04-27 20:29:45,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:29:45,585 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:45,585 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:45,585 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 20:29:45,586 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:45,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:45,586 INFO L85 PathProgramCache]: Analyzing trace with hash -1287961163, now seen corresponding path program 1 times [2022-04-27 20:29:45,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:45,587 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101313949] [2022-04-27 20:29:45,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:45,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:45,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,685 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:45,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:45,693 INFO L290 TraceCheckUtils]: 0: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1246#true} is VALID [2022-04-27 20:29:45,693 INFO L290 TraceCheckUtils]: 1: Hoare triple {1246#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-27 20:29:45,693 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1246#true} {1246#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-27 20:29:45,698 INFO L272 TraceCheckUtils]: 0: Hoare triple {1246#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:45,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {1252#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1246#true} is VALID [2022-04-27 20:29:45,698 INFO L290 TraceCheckUtils]: 2: Hoare triple {1246#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-27 20:29:45,699 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1246#true} {1246#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-27 20:29:45,699 INFO L272 TraceCheckUtils]: 4: Hoare triple {1246#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-27 20:29:45,699 INFO L290 TraceCheckUtils]: 5: Hoare triple {1246#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1246#true} is VALID [2022-04-27 20:29:45,699 INFO L290 TraceCheckUtils]: 6: Hoare triple {1246#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1246#true} is VALID [2022-04-27 20:29:45,699 INFO L290 TraceCheckUtils]: 7: Hoare triple {1246#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1246#true} is VALID [2022-04-27 20:29:45,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {1246#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1246#true} is VALID [2022-04-27 20:29:45,700 INFO L290 TraceCheckUtils]: 9: Hoare triple {1246#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,701 INFO L290 TraceCheckUtils]: 10: Hoare triple {1251#(= main_~lk2~0 1)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,701 INFO L290 TraceCheckUtils]: 11: Hoare triple {1251#(= main_~lk2~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,701 INFO L290 TraceCheckUtils]: 12: Hoare triple {1251#(= main_~lk2~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,702 INFO L290 TraceCheckUtils]: 13: Hoare triple {1251#(= main_~lk2~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,703 INFO L290 TraceCheckUtils]: 14: Hoare triple {1251#(= main_~lk2~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,703 INFO L290 TraceCheckUtils]: 15: Hoare triple {1251#(= main_~lk2~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,705 INFO L290 TraceCheckUtils]: 16: Hoare triple {1251#(= main_~lk2~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,706 INFO L290 TraceCheckUtils]: 17: Hoare triple {1251#(= main_~lk2~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,706 INFO L290 TraceCheckUtils]: 18: Hoare triple {1251#(= main_~lk2~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,706 INFO L290 TraceCheckUtils]: 19: Hoare triple {1251#(= main_~lk2~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,707 INFO L290 TraceCheckUtils]: 20: Hoare triple {1251#(= main_~lk2~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,707 INFO L290 TraceCheckUtils]: 21: Hoare triple {1251#(= main_~lk2~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,708 INFO L290 TraceCheckUtils]: 22: Hoare triple {1251#(= main_~lk2~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,708 INFO L290 TraceCheckUtils]: 23: Hoare triple {1251#(= main_~lk2~0 1)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1251#(= main_~lk2~0 1)} is VALID [2022-04-27 20:29:45,709 INFO L290 TraceCheckUtils]: 24: Hoare triple {1251#(= main_~lk2~0 1)} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1247#false} is VALID [2022-04-27 20:29:45,709 INFO L290 TraceCheckUtils]: 25: Hoare triple {1247#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1247#false} is VALID [2022-04-27 20:29:45,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:45,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:45,710 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101313949] [2022-04-27 20:29:45,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2101313949] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:45,710 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:45,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:45,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631842191] [2022-04-27 20:29:45,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:45,711 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,711 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:45,711 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,732 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:45,732 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:45,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:45,733 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:45,734 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:45,734 INFO L87 Difference]: Start difference. First operand 98 states and 176 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:45,982 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-27 20:29:45,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:45,982 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:45,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:45,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:29:45,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:45,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:29:45,990 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-27 20:29:46,133 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,136 INFO L225 Difference]: With dead ends: 183 [2022-04-27 20:29:46,136 INFO L226 Difference]: Without dead ends: 183 [2022-04-27 20:29:46,137 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:46,138 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 229 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 229 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:46,138 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [229 Valid, 101 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:46,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2022-04-27 20:29:46,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 129. [2022-04-27 20:29:46,144 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:46,145 INFO L82 GeneralOperation]: Start isEquivalent. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,145 INFO L74 IsIncluded]: Start isIncluded. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,145 INFO L87 Difference]: Start difference. First operand 183 states. Second operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,151 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-27 20:29:46,151 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-27 20:29:46,152 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,152 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,152 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-27 20:29:46,153 INFO L87 Difference]: Start difference. First operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 183 states. [2022-04-27 20:29:46,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,159 INFO L93 Difference]: Finished difference Result 183 states and 334 transitions. [2022-04-27 20:29:46,159 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 334 transitions. [2022-04-27 20:29:46,160 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,160 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,160 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:46,160 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:46,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 125 states have (on average 1.84) internal successors, (230), 125 states have internal predecessors, (230), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 233 transitions. [2022-04-27 20:29:46,164 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 233 transitions. Word has length 26 [2022-04-27 20:29:46,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:46,164 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 233 transitions. [2022-04-27 20:29:46,165 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,165 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 233 transitions. [2022-04-27 20:29:46,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:29:46,165 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:46,165 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:46,165 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 20:29:46,166 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:46,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:46,166 INFO L85 PathProgramCache]: Analyzing trace with hash 65348534, now seen corresponding path program 1 times [2022-04-27 20:29:46,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:46,166 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526350582] [2022-04-27 20:29:46,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:46,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:46,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,208 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:46,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,213 INFO L290 TraceCheckUtils]: 0: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1936#true} is VALID [2022-04-27 20:29:46,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {1936#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-27 20:29:46,213 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1936#true} {1936#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-27 20:29:46,214 INFO L272 TraceCheckUtils]: 0: Hoare triple {1936#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:46,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {1942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1936#true} is VALID [2022-04-27 20:29:46,214 INFO L290 TraceCheckUtils]: 2: Hoare triple {1936#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-27 20:29:46,214 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1936#true} {1936#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-27 20:29:46,215 INFO L272 TraceCheckUtils]: 4: Hoare triple {1936#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-27 20:29:46,215 INFO L290 TraceCheckUtils]: 5: Hoare triple {1936#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1936#true} is VALID [2022-04-27 20:29:46,215 INFO L290 TraceCheckUtils]: 6: Hoare triple {1936#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {1936#true} is VALID [2022-04-27 20:29:46,215 INFO L290 TraceCheckUtils]: 7: Hoare triple {1936#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1936#true} is VALID [2022-04-27 20:29:46,216 INFO L290 TraceCheckUtils]: 8: Hoare triple {1936#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1936#true} is VALID [2022-04-27 20:29:46,216 INFO L290 TraceCheckUtils]: 9: Hoare triple {1936#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,216 INFO L290 TraceCheckUtils]: 10: Hoare triple {1941#(= main_~p2~0 0)} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,217 INFO L290 TraceCheckUtils]: 11: Hoare triple {1941#(= main_~p2~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,217 INFO L290 TraceCheckUtils]: 12: Hoare triple {1941#(= main_~p2~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,217 INFO L290 TraceCheckUtils]: 13: Hoare triple {1941#(= main_~p2~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,218 INFO L290 TraceCheckUtils]: 14: Hoare triple {1941#(= main_~p2~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,218 INFO L290 TraceCheckUtils]: 15: Hoare triple {1941#(= main_~p2~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,218 INFO L290 TraceCheckUtils]: 16: Hoare triple {1941#(= main_~p2~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,219 INFO L290 TraceCheckUtils]: 17: Hoare triple {1941#(= main_~p2~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,219 INFO L290 TraceCheckUtils]: 18: Hoare triple {1941#(= main_~p2~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,219 INFO L290 TraceCheckUtils]: 19: Hoare triple {1941#(= main_~p2~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,220 INFO L290 TraceCheckUtils]: 20: Hoare triple {1941#(= main_~p2~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,220 INFO L290 TraceCheckUtils]: 21: Hoare triple {1941#(= main_~p2~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,221 INFO L290 TraceCheckUtils]: 22: Hoare triple {1941#(= main_~p2~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1941#(= main_~p2~0 0)} is VALID [2022-04-27 20:29:46,221 INFO L290 TraceCheckUtils]: 23: Hoare triple {1941#(= main_~p2~0 0)} [316] L146-1-->L152: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-27 20:29:46,221 INFO L290 TraceCheckUtils]: 24: Hoare triple {1937#false} [320] L152-->L212-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-27 20:29:46,221 INFO L290 TraceCheckUtils]: 25: Hoare triple {1937#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1937#false} is VALID [2022-04-27 20:29:46,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:46,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:46,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526350582] [2022-04-27 20:29:46,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [526350582] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:46,222 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:46,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:46,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1602869667] [2022-04-27 20:29:46,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:46,223 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:46,223 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:46,223 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,239 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,240 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:46,240 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:46,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:46,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:46,240 INFO L87 Difference]: Start difference. First operand 129 states and 233 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,470 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-27 20:29:46,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:46,471 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:29:46,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:46,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-27 20:29:46,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-27 20:29:46,475 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 175 transitions. [2022-04-27 20:29:46,624 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,627 INFO L225 Difference]: With dead ends: 185 [2022-04-27 20:29:46,627 INFO L226 Difference]: Without dead ends: 185 [2022-04-27 20:29:46,627 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:46,628 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 202 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:46,628 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 129 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:46,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2022-04-27 20:29:46,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 183. [2022-04-27 20:29:46,635 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:46,636 INFO L82 GeneralOperation]: Start isEquivalent. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,637 INFO L74 IsIncluded]: Start isIncluded. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,637 INFO L87 Difference]: Start difference. First operand 185 states. Second operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,642 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-27 20:29:46,643 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-27 20:29:46,643 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,643 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,644 INFO L74 IsIncluded]: Start isIncluded. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-27 20:29:46,644 INFO L87 Difference]: Start difference. First operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 185 states. [2022-04-27 20:29:46,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,650 INFO L93 Difference]: Finished difference Result 185 states and 332 transitions. [2022-04-27 20:29:46,650 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 332 transitions. [2022-04-27 20:29:46,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:46,650 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:46,651 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:46,651 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:46,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 183 states, 179 states have (on average 1.8324022346368716) internal successors, (328), 179 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 331 transitions. [2022-04-27 20:29:46,656 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 331 transitions. Word has length 26 [2022-04-27 20:29:46,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:46,656 INFO L495 AbstractCegarLoop]: Abstraction has 183 states and 331 transitions. [2022-04-27 20:29:46,657 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,657 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 331 transitions. [2022-04-27 20:29:46,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:29:46,657 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:46,657 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:46,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-27 20:29:46,658 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:46,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:46,658 INFO L85 PathProgramCache]: Analyzing trace with hash -1272058172, now seen corresponding path program 1 times [2022-04-27 20:29:46,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:46,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504506305] [2022-04-27 20:29:46,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:46,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:46,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,700 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:46,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:46,705 INFO L290 TraceCheckUtils]: 0: Hoare triple {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2686#true} is VALID [2022-04-27 20:29:46,705 INFO L290 TraceCheckUtils]: 1: Hoare triple {2686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-27 20:29:46,705 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2686#true} {2686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-27 20:29:46,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {2686#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:46,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {2692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2686#true} is VALID [2022-04-27 20:29:46,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {2686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-27 20:29:46,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2686#true} {2686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-27 20:29:46,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {2686#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-27 20:29:46,707 INFO L290 TraceCheckUtils]: 5: Hoare triple {2686#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2686#true} is VALID [2022-04-27 20:29:46,707 INFO L290 TraceCheckUtils]: 6: Hoare triple {2686#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {2686#true} is VALID [2022-04-27 20:29:46,707 INFO L290 TraceCheckUtils]: 7: Hoare triple {2686#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {2686#true} is VALID [2022-04-27 20:29:46,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {2686#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2686#true} is VALID [2022-04-27 20:29:46,708 INFO L290 TraceCheckUtils]: 9: Hoare triple {2686#true} [286] L88-2-->L92-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,708 INFO L290 TraceCheckUtils]: 10: Hoare triple {2691#(not (= main_~p2~0 0))} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,708 INFO L290 TraceCheckUtils]: 11: Hoare triple {2691#(not (= main_~p2~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,709 INFO L290 TraceCheckUtils]: 12: Hoare triple {2691#(not (= main_~p2~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,709 INFO L290 TraceCheckUtils]: 13: Hoare triple {2691#(not (= main_~p2~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,709 INFO L290 TraceCheckUtils]: 14: Hoare triple {2691#(not (= main_~p2~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {2691#(not (= main_~p2~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {2691#(not (= main_~p2~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,710 INFO L290 TraceCheckUtils]: 17: Hoare triple {2691#(not (= main_~p2~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,711 INFO L290 TraceCheckUtils]: 18: Hoare triple {2691#(not (= main_~p2~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,711 INFO L290 TraceCheckUtils]: 19: Hoare triple {2691#(not (= main_~p2~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,711 INFO L290 TraceCheckUtils]: 20: Hoare triple {2691#(not (= main_~p2~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,712 INFO L290 TraceCheckUtils]: 21: Hoare triple {2691#(not (= main_~p2~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,712 INFO L290 TraceCheckUtils]: 22: Hoare triple {2691#(not (= main_~p2~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2691#(not (= main_~p2~0 0))} is VALID [2022-04-27 20:29:46,712 INFO L290 TraceCheckUtils]: 23: Hoare triple {2691#(not (= main_~p2~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-27 20:29:46,712 INFO L290 TraceCheckUtils]: 24: Hoare triple {2687#false} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-27 20:29:46,713 INFO L290 TraceCheckUtils]: 25: Hoare triple {2687#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-27 20:29:46,713 INFO L290 TraceCheckUtils]: 26: Hoare triple {2687#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2687#false} is VALID [2022-04-27 20:29:46,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:46,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:46,713 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504506305] [2022-04-27 20:29:46,713 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [504506305] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:46,713 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:46,714 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:46,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458965576] [2022-04-27 20:29:46,714 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:46,714 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:46,714 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:46,715 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,731 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:46,731 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:46,732 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:46,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:46,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:46,732 INFO L87 Difference]: Start difference. First operand 183 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:46,958 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-27 20:29:46,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:46,958 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:46,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:46,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:29:46,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:46,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:29:46,963 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-27 20:29:47,117 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,120 INFO L225 Difference]: With dead ends: 187 [2022-04-27 20:29:47,120 INFO L226 Difference]: Without dead ends: 187 [2022-04-27 20:29:47,121 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:47,122 INFO L413 NwaCegarLoop]: 143 mSDtfsCounter, 182 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:47,122 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 150 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:47,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-04-27 20:29:47,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 185. [2022-04-27 20:29:47,127 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:47,127 INFO L82 GeneralOperation]: Start isEquivalent. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,128 INFO L74 IsIncluded]: Start isIncluded. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,128 INFO L87 Difference]: Start difference. First operand 187 states. Second operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,133 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-27 20:29:47,134 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-27 20:29:47,134 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,134 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,134 INFO L74 IsIncluded]: Start isIncluded. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-27 20:29:47,135 INFO L87 Difference]: Start difference. First operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-27 20:29:47,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,140 INFO L93 Difference]: Finished difference Result 187 states and 332 transitions. [2022-04-27 20:29:47,140 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 332 transitions. [2022-04-27 20:29:47,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,141 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,141 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:47,141 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:47,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 181 states have (on average 1.8121546961325967) internal successors, (328), 181 states have internal predecessors, (328), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 331 transitions. [2022-04-27 20:29:47,146 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 331 transitions. Word has length 27 [2022-04-27 20:29:47,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:47,146 INFO L495 AbstractCegarLoop]: Abstraction has 185 states and 331 transitions. [2022-04-27 20:29:47,146 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,146 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 331 transitions. [2022-04-27 20:29:47,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:29:47,147 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:47,147 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:47,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-27 20:29:47,147 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:47,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:47,148 INFO L85 PathProgramCache]: Analyzing trace with hash 2025836771, now seen corresponding path program 1 times [2022-04-27 20:29:47,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:47,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109041874] [2022-04-27 20:29:47,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:47,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:47,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,212 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:47,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,218 INFO L290 TraceCheckUtils]: 0: Hoare triple {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3444#true} is VALID [2022-04-27 20:29:47,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {3444#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,218 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3444#true} {3444#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,219 INFO L272 TraceCheckUtils]: 0: Hoare triple {3444#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:47,219 INFO L290 TraceCheckUtils]: 1: Hoare triple {3450#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3444#true} is VALID [2022-04-27 20:29:47,220 INFO L290 TraceCheckUtils]: 2: Hoare triple {3444#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,220 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3444#true} {3444#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,220 INFO L272 TraceCheckUtils]: 4: Hoare triple {3444#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,220 INFO L290 TraceCheckUtils]: 5: Hoare triple {3444#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3444#true} is VALID [2022-04-27 20:29:47,220 INFO L290 TraceCheckUtils]: 6: Hoare triple {3444#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {3444#true} is VALID [2022-04-27 20:29:47,220 INFO L290 TraceCheckUtils]: 7: Hoare triple {3444#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3444#true} is VALID [2022-04-27 20:29:47,221 INFO L290 TraceCheckUtils]: 8: Hoare triple {3444#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,221 INFO L290 TraceCheckUtils]: 9: Hoare triple {3444#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3444#true} is VALID [2022-04-27 20:29:47,223 INFO L290 TraceCheckUtils]: 10: Hoare triple {3444#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,223 INFO L290 TraceCheckUtils]: 11: Hoare triple {3449#(= main_~lk3~0 1)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,224 INFO L290 TraceCheckUtils]: 12: Hoare triple {3449#(= main_~lk3~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,224 INFO L290 TraceCheckUtils]: 13: Hoare triple {3449#(= main_~lk3~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,224 INFO L290 TraceCheckUtils]: 14: Hoare triple {3449#(= main_~lk3~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,225 INFO L290 TraceCheckUtils]: 15: Hoare triple {3449#(= main_~lk3~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,225 INFO L290 TraceCheckUtils]: 16: Hoare triple {3449#(= main_~lk3~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,225 INFO L290 TraceCheckUtils]: 17: Hoare triple {3449#(= main_~lk3~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,226 INFO L290 TraceCheckUtils]: 18: Hoare triple {3449#(= main_~lk3~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,226 INFO L290 TraceCheckUtils]: 19: Hoare triple {3449#(= main_~lk3~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,227 INFO L290 TraceCheckUtils]: 20: Hoare triple {3449#(= main_~lk3~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,227 INFO L290 TraceCheckUtils]: 21: Hoare triple {3449#(= main_~lk3~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,227 INFO L290 TraceCheckUtils]: 22: Hoare triple {3449#(= main_~lk3~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,228 INFO L290 TraceCheckUtils]: 23: Hoare triple {3449#(= main_~lk3~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,228 INFO L290 TraceCheckUtils]: 24: Hoare triple {3449#(= main_~lk3~0 1)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {3449#(= main_~lk3~0 1)} is VALID [2022-04-27 20:29:47,231 INFO L290 TraceCheckUtils]: 25: Hoare triple {3449#(= main_~lk3~0 1)} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {3445#false} is VALID [2022-04-27 20:29:47,231 INFO L290 TraceCheckUtils]: 26: Hoare triple {3445#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3445#false} is VALID [2022-04-27 20:29:47,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:47,232 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:47,232 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [109041874] [2022-04-27 20:29:47,232 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [109041874] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:47,232 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:47,232 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:47,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850080443] [2022-04-27 20:29:47,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:47,233 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:47,233 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:47,233 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,252 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,252 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:47,252 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:47,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:47,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:47,253 INFO L87 Difference]: Start difference. First operand 185 states and 331 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,489 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-27 20:29:47,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:47,489 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:47,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:47,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-27 20:29:47,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-27 20:29:47,499 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-27 20:29:47,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,661 INFO L225 Difference]: With dead ends: 347 [2022-04-27 20:29:47,661 INFO L226 Difference]: Without dead ends: 347 [2022-04-27 20:29:47,661 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:47,662 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 222 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 222 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:47,662 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [222 Valid, 100 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:47,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2022-04-27 20:29:47,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 249. [2022-04-27 20:29:47,668 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:47,669 INFO L82 GeneralOperation]: Start isEquivalent. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,670 INFO L74 IsIncluded]: Start isIncluded. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,670 INFO L87 Difference]: Start difference. First operand 347 states. Second operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,678 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-27 20:29:47,679 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-27 20:29:47,679 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,679 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,680 INFO L74 IsIncluded]: Start isIncluded. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-27 20:29:47,680 INFO L87 Difference]: Start difference. First operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 347 states. [2022-04-27 20:29:47,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:47,689 INFO L93 Difference]: Finished difference Result 347 states and 628 transitions. [2022-04-27 20:29:47,689 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 628 transitions. [2022-04-27 20:29:47,690 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:47,690 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:47,690 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:47,690 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:47,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 249 states, 245 states have (on average 1.7959183673469388) internal successors, (440), 245 states have internal predecessors, (440), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 443 transitions. [2022-04-27 20:29:47,696 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 443 transitions. Word has length 27 [2022-04-27 20:29:47,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:47,696 INFO L495 AbstractCegarLoop]: Abstraction has 249 states and 443 transitions. [2022-04-27 20:29:47,696 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,696 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 443 transitions. [2022-04-27 20:29:47,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:29:47,697 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:47,697 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:47,697 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-27 20:29:47,697 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:47,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:47,697 INFO L85 PathProgramCache]: Analyzing trace with hash -915820828, now seen corresponding path program 1 times [2022-04-27 20:29:47,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:47,698 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144786056] [2022-04-27 20:29:47,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:47,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:47,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,737 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:47,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:47,742 INFO L290 TraceCheckUtils]: 0: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4746#true} is VALID [2022-04-27 20:29:47,742 INFO L290 TraceCheckUtils]: 1: Hoare triple {4746#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,742 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4746#true} {4746#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,743 INFO L272 TraceCheckUtils]: 0: Hoare triple {4746#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:47,743 INFO L290 TraceCheckUtils]: 1: Hoare triple {4752#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4746#true} is VALID [2022-04-27 20:29:47,743 INFO L290 TraceCheckUtils]: 2: Hoare triple {4746#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,743 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4746#true} {4746#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,744 INFO L272 TraceCheckUtils]: 4: Hoare triple {4746#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,744 INFO L290 TraceCheckUtils]: 5: Hoare triple {4746#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4746#true} is VALID [2022-04-27 20:29:47,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {4746#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {4746#true} is VALID [2022-04-27 20:29:47,744 INFO L290 TraceCheckUtils]: 7: Hoare triple {4746#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {4746#true} is VALID [2022-04-27 20:29:47,744 INFO L290 TraceCheckUtils]: 8: Hoare triple {4746#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,744 INFO L290 TraceCheckUtils]: 9: Hoare triple {4746#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4746#true} is VALID [2022-04-27 20:29:47,745 INFO L290 TraceCheckUtils]: 10: Hoare triple {4746#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,745 INFO L290 TraceCheckUtils]: 11: Hoare triple {4751#(= main_~p3~0 0)} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {4751#(= main_~p3~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,746 INFO L290 TraceCheckUtils]: 13: Hoare triple {4751#(= main_~p3~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {4751#(= main_~p3~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {4751#(= main_~p3~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,747 INFO L290 TraceCheckUtils]: 16: Hoare triple {4751#(= main_~p3~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,747 INFO L290 TraceCheckUtils]: 17: Hoare triple {4751#(= main_~p3~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,748 INFO L290 TraceCheckUtils]: 18: Hoare triple {4751#(= main_~p3~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,748 INFO L290 TraceCheckUtils]: 19: Hoare triple {4751#(= main_~p3~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,748 INFO L290 TraceCheckUtils]: 20: Hoare triple {4751#(= main_~p3~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,749 INFO L290 TraceCheckUtils]: 21: Hoare triple {4751#(= main_~p3~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,749 INFO L290 TraceCheckUtils]: 22: Hoare triple {4751#(= main_~p3~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,749 INFO L290 TraceCheckUtils]: 23: Hoare triple {4751#(= main_~p3~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4751#(= main_~p3~0 0)} is VALID [2022-04-27 20:29:47,750 INFO L290 TraceCheckUtils]: 24: Hoare triple {4751#(= main_~p3~0 0)} [322] L151-1-->L157: Formula: (not (= v_main_~p3~0_1 0)) InVars {main_~p3~0=v_main_~p3~0_1} OutVars{main_~p3~0=v_main_~p3~0_1} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-27 20:29:47,750 INFO L290 TraceCheckUtils]: 25: Hoare triple {4747#false} [324] L157-->L212-1: Formula: (not (= v_main_~lk3~0_1 1)) InVars {main_~lk3~0=v_main_~lk3~0_1} OutVars{main_~lk3~0=v_main_~lk3~0_1} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-27 20:29:47,750 INFO L290 TraceCheckUtils]: 26: Hoare triple {4747#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4747#false} is VALID [2022-04-27 20:29:47,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:47,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:47,750 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144786056] [2022-04-27 20:29:47,750 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1144786056] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:47,750 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:47,751 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:47,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1773419316] [2022-04-27 20:29:47,751 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:47,751 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:47,751 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:47,751 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:47,770 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:47,770 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:47,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:47,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:47,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:47,771 INFO L87 Difference]: Start difference. First operand 249 states and 443 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,010 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-27 20:29:48,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:48,010 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:29:48,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:48,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-27 20:29:48,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-27 20:29:48,014 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 173 transitions. [2022-04-27 20:29:48,139 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:48,146 INFO L225 Difference]: With dead ends: 355 [2022-04-27 20:29:48,146 INFO L226 Difference]: Without dead ends: 355 [2022-04-27 20:29:48,147 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:48,147 INFO L413 NwaCegarLoop]: 124 mSDtfsCounter, 196 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:48,148 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 131 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:48,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2022-04-27 20:29:48,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 353. [2022-04-27 20:29:48,154 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:48,154 INFO L82 GeneralOperation]: Start isEquivalent. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,155 INFO L74 IsIncluded]: Start isIncluded. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,156 INFO L87 Difference]: Start difference. First operand 355 states. Second operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,164 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-27 20:29:48,164 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-27 20:29:48,165 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:48,165 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:48,166 INFO L74 IsIncluded]: Start isIncluded. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-27 20:29:48,167 INFO L87 Difference]: Start difference. First operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 355 states. [2022-04-27 20:29:48,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,175 INFO L93 Difference]: Finished difference Result 355 states and 628 transitions. [2022-04-27 20:29:48,175 INFO L276 IsEmpty]: Start isEmpty. Operand 355 states and 628 transitions. [2022-04-27 20:29:48,176 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:48,176 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:48,176 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:48,176 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:48,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 353 states, 349 states have (on average 1.7879656160458453) internal successors, (624), 349 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 353 states to 353 states and 627 transitions. [2022-04-27 20:29:48,185 INFO L78 Accepts]: Start accepts. Automaton has 353 states and 627 transitions. Word has length 27 [2022-04-27 20:29:48,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:48,185 INFO L495 AbstractCegarLoop]: Abstraction has 353 states and 627 transitions. [2022-04-27 20:29:48,185 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,185 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 627 transitions. [2022-04-27 20:29:48,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:29:48,186 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:48,186 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:48,186 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-27 20:29:48,186 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:48,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:48,186 INFO L85 PathProgramCache]: Analyzing trace with hash -1623537198, now seen corresponding path program 1 times [2022-04-27 20:29:48,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:48,187 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786656084] [2022-04-27 20:29:48,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:48,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:48,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:48,230 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:48,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:48,235 INFO L290 TraceCheckUtils]: 0: Hoare triple {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6176#true} is VALID [2022-04-27 20:29:48,235 INFO L290 TraceCheckUtils]: 1: Hoare triple {6176#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,235 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6176#true} {6176#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,235 INFO L272 TraceCheckUtils]: 0: Hoare triple {6176#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:48,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {6182#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6176#true} is VALID [2022-04-27 20:29:48,236 INFO L290 TraceCheckUtils]: 2: Hoare triple {6176#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,236 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6176#true} {6176#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,236 INFO L272 TraceCheckUtils]: 4: Hoare triple {6176#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,236 INFO L290 TraceCheckUtils]: 5: Hoare triple {6176#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {6176#true} is VALID [2022-04-27 20:29:48,236 INFO L290 TraceCheckUtils]: 6: Hoare triple {6176#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {6176#true} is VALID [2022-04-27 20:29:48,237 INFO L290 TraceCheckUtils]: 7: Hoare triple {6176#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {6176#true} is VALID [2022-04-27 20:29:48,237 INFO L290 TraceCheckUtils]: 8: Hoare triple {6176#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,237 INFO L290 TraceCheckUtils]: 9: Hoare triple {6176#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {6176#true} is VALID [2022-04-27 20:29:48,237 INFO L290 TraceCheckUtils]: 10: Hoare triple {6176#true} [288] L92-1-->L96-1: Formula: (and (= v_main_~lk3~0_6 1) (not (= v_main_~p3~0_4 0))) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4, main_~lk3~0=v_main_~lk3~0_6} AuxVars[] AssignedVars[main_~lk3~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {6181#(not (= main_~p3~0 0))} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,238 INFO L290 TraceCheckUtils]: 12: Hoare triple {6181#(not (= main_~p3~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {6181#(not (= main_~p3~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,239 INFO L290 TraceCheckUtils]: 14: Hoare triple {6181#(not (= main_~p3~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,239 INFO L290 TraceCheckUtils]: 15: Hoare triple {6181#(not (= main_~p3~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,239 INFO L290 TraceCheckUtils]: 16: Hoare triple {6181#(not (= main_~p3~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,240 INFO L290 TraceCheckUtils]: 17: Hoare triple {6181#(not (= main_~p3~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,240 INFO L290 TraceCheckUtils]: 18: Hoare triple {6181#(not (= main_~p3~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,240 INFO L290 TraceCheckUtils]: 19: Hoare triple {6181#(not (= main_~p3~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,241 INFO L290 TraceCheckUtils]: 20: Hoare triple {6181#(not (= main_~p3~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,241 INFO L290 TraceCheckUtils]: 21: Hoare triple {6181#(not (= main_~p3~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,241 INFO L290 TraceCheckUtils]: 22: Hoare triple {6181#(not (= main_~p3~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,241 INFO L290 TraceCheckUtils]: 23: Hoare triple {6181#(not (= main_~p3~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {6181#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:29:48,242 INFO L290 TraceCheckUtils]: 24: Hoare triple {6181#(not (= main_~p3~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-27 20:29:48,242 INFO L290 TraceCheckUtils]: 25: Hoare triple {6177#false} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-27 20:29:48,242 INFO L290 TraceCheckUtils]: 26: Hoare triple {6177#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-27 20:29:48,242 INFO L290 TraceCheckUtils]: 27: Hoare triple {6177#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6177#false} is VALID [2022-04-27 20:29:48,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:48,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:48,243 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786656084] [2022-04-27 20:29:48,243 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [786656084] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:48,243 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:48,243 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:48,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305655830] [2022-04-27 20:29:48,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:48,243 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:48,244 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:48,244 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,261 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:48,261 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:48,261 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:48,261 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:48,261 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:48,262 INFO L87 Difference]: Start difference. First operand 353 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,484 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-27 20:29:48,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:48,485 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:48,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:48,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-27 20:29:48,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-27 20:29:48,488 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 172 transitions. [2022-04-27 20:29:48,618 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:48,624 INFO L225 Difference]: With dead ends: 359 [2022-04-27 20:29:48,625 INFO L226 Difference]: Without dead ends: 359 [2022-04-27 20:29:48,625 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:48,625 INFO L413 NwaCegarLoop]: 140 mSDtfsCounter, 181 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:48,626 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [181 Valid, 147 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:48,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states. [2022-04-27 20:29:48,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 357. [2022-04-27 20:29:48,631 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:48,632 INFO L82 GeneralOperation]: Start isEquivalent. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,633 INFO L74 IsIncluded]: Start isIncluded. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,633 INFO L87 Difference]: Start difference. First operand 359 states. Second operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,642 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-27 20:29:48,642 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-27 20:29:48,642 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:48,642 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:48,643 INFO L74 IsIncluded]: Start isIncluded. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-27 20:29:48,644 INFO L87 Difference]: Start difference. First operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 359 states. [2022-04-27 20:29:48,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,652 INFO L93 Difference]: Finished difference Result 359 states and 628 transitions. [2022-04-27 20:29:48,652 INFO L276 IsEmpty]: Start isEmpty. Operand 359 states and 628 transitions. [2022-04-27 20:29:48,653 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:48,653 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:48,653 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:48,653 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:48,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 357 states, 353 states have (on average 1.7677053824362605) internal successors, (624), 353 states have internal predecessors, (624), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 627 transitions. [2022-04-27 20:29:48,661 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 627 transitions. Word has length 28 [2022-04-27 20:29:48,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:48,661 INFO L495 AbstractCegarLoop]: Abstraction has 357 states and 627 transitions. [2022-04-27 20:29:48,661 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,661 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 627 transitions. [2022-04-27 20:29:48,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:29:48,662 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:48,662 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:48,662 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-27 20:29:48,662 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:48,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:48,662 INFO L85 PathProgramCache]: Analyzing trace with hash 1674357745, now seen corresponding path program 1 times [2022-04-27 20:29:48,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:48,663 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385022060] [2022-04-27 20:29:48,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:48,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:48,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:48,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:48,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:48,700 INFO L290 TraceCheckUtils]: 0: Hoare triple {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7622#true} is VALID [2022-04-27 20:29:48,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {7622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,701 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7622#true} {7622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,701 INFO L272 TraceCheckUtils]: 0: Hoare triple {7622#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:48,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {7628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7622#true} is VALID [2022-04-27 20:29:48,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {7622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,702 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7622#true} {7622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,702 INFO L272 TraceCheckUtils]: 4: Hoare triple {7622#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,702 INFO L290 TraceCheckUtils]: 5: Hoare triple {7622#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {7622#true} is VALID [2022-04-27 20:29:48,702 INFO L290 TraceCheckUtils]: 6: Hoare triple {7622#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {7622#true} is VALID [2022-04-27 20:29:48,702 INFO L290 TraceCheckUtils]: 7: Hoare triple {7622#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {7622#true} is VALID [2022-04-27 20:29:48,702 INFO L290 TraceCheckUtils]: 8: Hoare triple {7622#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,703 INFO L290 TraceCheckUtils]: 9: Hoare triple {7622#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,703 INFO L290 TraceCheckUtils]: 10: Hoare triple {7622#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {7622#true} is VALID [2022-04-27 20:29:48,703 INFO L290 TraceCheckUtils]: 11: Hoare triple {7622#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,703 INFO L290 TraceCheckUtils]: 12: Hoare triple {7627#(= main_~lk4~0 1)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,704 INFO L290 TraceCheckUtils]: 13: Hoare triple {7627#(= main_~lk4~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,704 INFO L290 TraceCheckUtils]: 14: Hoare triple {7627#(= main_~lk4~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,704 INFO L290 TraceCheckUtils]: 15: Hoare triple {7627#(= main_~lk4~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,705 INFO L290 TraceCheckUtils]: 16: Hoare triple {7627#(= main_~lk4~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,705 INFO L290 TraceCheckUtils]: 17: Hoare triple {7627#(= main_~lk4~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,705 INFO L290 TraceCheckUtils]: 18: Hoare triple {7627#(= main_~lk4~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,706 INFO L290 TraceCheckUtils]: 19: Hoare triple {7627#(= main_~lk4~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,706 INFO L290 TraceCheckUtils]: 20: Hoare triple {7627#(= main_~lk4~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,706 INFO L290 TraceCheckUtils]: 21: Hoare triple {7627#(= main_~lk4~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,707 INFO L290 TraceCheckUtils]: 22: Hoare triple {7627#(= main_~lk4~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,707 INFO L290 TraceCheckUtils]: 23: Hoare triple {7627#(= main_~lk4~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,707 INFO L290 TraceCheckUtils]: 24: Hoare triple {7627#(= main_~lk4~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,708 INFO L290 TraceCheckUtils]: 25: Hoare triple {7627#(= main_~lk4~0 1)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {7627#(= main_~lk4~0 1)} is VALID [2022-04-27 20:29:48,708 INFO L290 TraceCheckUtils]: 26: Hoare triple {7627#(= main_~lk4~0 1)} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {7623#false} is VALID [2022-04-27 20:29:48,708 INFO L290 TraceCheckUtils]: 27: Hoare triple {7623#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7623#false} is VALID [2022-04-27 20:29:48,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:48,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:48,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385022060] [2022-04-27 20:29:48,709 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [385022060] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:48,709 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:48,709 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:48,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607515679] [2022-04-27 20:29:48,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:48,709 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:48,709 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:48,710 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:48,726 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:48,727 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:48,727 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:48,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:48,727 INFO L87 Difference]: Start difference. First operand 357 states and 627 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:48,964 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-27 20:29:48,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:48,964 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:48,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:48,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-27 20:29:48,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:48,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-27 20:29:48,967 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-27 20:29:49,084 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:49,103 INFO L225 Difference]: With dead ends: 667 [2022-04-27 20:29:49,103 INFO L226 Difference]: Without dead ends: 667 [2022-04-27 20:29:49,104 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:49,104 INFO L413 NwaCegarLoop]: 92 mSDtfsCounter, 215 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:49,105 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [215 Valid, 99 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:49,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 667 states. [2022-04-27 20:29:49,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 667 to 489. [2022-04-27 20:29:49,113 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:49,114 INFO L82 GeneralOperation]: Start isEquivalent. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,115 INFO L74 IsIncluded]: Start isIncluded. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,116 INFO L87 Difference]: Start difference. First operand 667 states. Second operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,137 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-27 20:29:49,137 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-27 20:29:49,138 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:49,138 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:49,139 INFO L74 IsIncluded]: Start isIncluded. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-27 20:29:49,140 INFO L87 Difference]: Start difference. First operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 667 states. [2022-04-27 20:29:49,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,161 INFO L93 Difference]: Finished difference Result 667 states and 1184 transitions. [2022-04-27 20:29:49,161 INFO L276 IsEmpty]: Start isEmpty. Operand 667 states and 1184 transitions. [2022-04-27 20:29:49,162 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:49,162 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:49,162 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:49,162 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:49,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 489 states, 485 states have (on average 1.7402061855670103) internal successors, (844), 485 states have internal predecessors, (844), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 489 states and 847 transitions. [2022-04-27 20:29:49,176 INFO L78 Accepts]: Start accepts. Automaton has 489 states and 847 transitions. Word has length 28 [2022-04-27 20:29:49,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:49,176 INFO L495 AbstractCegarLoop]: Abstraction has 489 states and 847 transitions. [2022-04-27 20:29:49,177 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,177 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 847 transitions. [2022-04-27 20:29:49,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:29:49,177 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:49,178 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:49,178 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-27 20:29:49,178 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:49,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:49,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1267299854, now seen corresponding path program 1 times [2022-04-27 20:29:49,178 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:49,178 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471293517] [2022-04-27 20:29:49,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:49,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:49,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:49,209 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:49,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:49,214 INFO L290 TraceCheckUtils]: 0: Hoare triple {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10124#true} is VALID [2022-04-27 20:29:49,214 INFO L290 TraceCheckUtils]: 1: Hoare triple {10124#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,214 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10124#true} {10124#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,215 INFO L272 TraceCheckUtils]: 0: Hoare triple {10124#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:49,215 INFO L290 TraceCheckUtils]: 1: Hoare triple {10130#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10124#true} is VALID [2022-04-27 20:29:49,215 INFO L290 TraceCheckUtils]: 2: Hoare triple {10124#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,215 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10124#true} {10124#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,215 INFO L272 TraceCheckUtils]: 4: Hoare triple {10124#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,215 INFO L290 TraceCheckUtils]: 5: Hoare triple {10124#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {10124#true} is VALID [2022-04-27 20:29:49,216 INFO L290 TraceCheckUtils]: 6: Hoare triple {10124#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {10124#true} is VALID [2022-04-27 20:29:49,216 INFO L290 TraceCheckUtils]: 7: Hoare triple {10124#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {10124#true} is VALID [2022-04-27 20:29:49,216 INFO L290 TraceCheckUtils]: 8: Hoare triple {10124#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,216 INFO L290 TraceCheckUtils]: 9: Hoare triple {10124#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,216 INFO L290 TraceCheckUtils]: 10: Hoare triple {10124#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {10124#true} is VALID [2022-04-27 20:29:49,217 INFO L290 TraceCheckUtils]: 11: Hoare triple {10124#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,217 INFO L290 TraceCheckUtils]: 12: Hoare triple {10129#(= main_~p4~0 0)} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,217 INFO L290 TraceCheckUtils]: 13: Hoare triple {10129#(= main_~p4~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,218 INFO L290 TraceCheckUtils]: 14: Hoare triple {10129#(= main_~p4~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,218 INFO L290 TraceCheckUtils]: 15: Hoare triple {10129#(= main_~p4~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,218 INFO L290 TraceCheckUtils]: 16: Hoare triple {10129#(= main_~p4~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,219 INFO L290 TraceCheckUtils]: 17: Hoare triple {10129#(= main_~p4~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,219 INFO L290 TraceCheckUtils]: 18: Hoare triple {10129#(= main_~p4~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,219 INFO L290 TraceCheckUtils]: 19: Hoare triple {10129#(= main_~p4~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,220 INFO L290 TraceCheckUtils]: 20: Hoare triple {10129#(= main_~p4~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,220 INFO L290 TraceCheckUtils]: 21: Hoare triple {10129#(= main_~p4~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,220 INFO L290 TraceCheckUtils]: 22: Hoare triple {10129#(= main_~p4~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,221 INFO L290 TraceCheckUtils]: 23: Hoare triple {10129#(= main_~p4~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,221 INFO L290 TraceCheckUtils]: 24: Hoare triple {10129#(= main_~p4~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {10129#(= main_~p4~0 0)} is VALID [2022-04-27 20:29:49,221 INFO L290 TraceCheckUtils]: 25: Hoare triple {10129#(= main_~p4~0 0)} [326] L156-1-->L162: Formula: (not (= v_main_~p4~0_2 0)) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-27 20:29:49,221 INFO L290 TraceCheckUtils]: 26: Hoare triple {10125#false} [328] L162-->L212-1: Formula: (not (= v_main_~lk4~0_2 1)) InVars {main_~lk4~0=v_main_~lk4~0_2} OutVars{main_~lk4~0=v_main_~lk4~0_2} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-27 20:29:49,221 INFO L290 TraceCheckUtils]: 27: Hoare triple {10125#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10125#false} is VALID [2022-04-27 20:29:49,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:49,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:49,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471293517] [2022-04-27 20:29:49,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1471293517] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:49,222 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:49,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:49,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699843215] [2022-04-27 20:29:49,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:49,223 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:49,223 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:49,223 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,240 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:49,240 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:49,240 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:49,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:49,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:49,241 INFO L87 Difference]: Start difference. First operand 489 states and 847 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,484 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-27 20:29:49,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:49,484 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:29:49,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:49,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-27 20:29:49,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 171 transitions. [2022-04-27 20:29:49,487 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 171 transitions. [2022-04-27 20:29:49,623 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 171 edges. 171 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:49,645 INFO L225 Difference]: With dead ends: 691 [2022-04-27 20:29:49,645 INFO L226 Difference]: Without dead ends: 691 [2022-04-27 20:29:49,645 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:49,646 INFO L413 NwaCegarLoop]: 126 mSDtfsCounter, 190 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:49,646 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [190 Valid, 133 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:49,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 691 states. [2022-04-27 20:29:49,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 691 to 689. [2022-04-27 20:29:49,657 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:49,658 INFO L82 GeneralOperation]: Start isEquivalent. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,659 INFO L74 IsIncluded]: Start isIncluded. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,660 INFO L87 Difference]: Start difference. First operand 691 states. Second operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,683 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-27 20:29:49,684 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-27 20:29:49,685 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:49,685 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:49,686 INFO L74 IsIncluded]: Start isIncluded. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-27 20:29:49,687 INFO L87 Difference]: Start difference. First operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 691 states. [2022-04-27 20:29:49,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:49,712 INFO L93 Difference]: Finished difference Result 691 states and 1192 transitions. [2022-04-27 20:29:49,712 INFO L276 IsEmpty]: Start isEmpty. Operand 691 states and 1192 transitions. [2022-04-27 20:29:49,713 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:49,713 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:49,713 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:49,713 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:49,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 689 states, 685 states have (on average 1.7343065693430657) internal successors, (1188), 685 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 689 states to 689 states and 1191 transitions. [2022-04-27 20:29:49,737 INFO L78 Accepts]: Start accepts. Automaton has 689 states and 1191 transitions. Word has length 28 [2022-04-27 20:29:49,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:49,737 INFO L495 AbstractCegarLoop]: Abstraction has 689 states and 1191 transitions. [2022-04-27 20:29:49,738 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,738 INFO L276 IsEmpty]: Start isEmpty. Operand 689 states and 1191 transitions. [2022-04-27 20:29:49,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:29:49,738 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:49,739 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:49,739 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-27 20:29:49,739 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:49,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:49,739 INFO L85 PathProgramCache]: Analyzing trace with hash 365515008, now seen corresponding path program 1 times [2022-04-27 20:29:49,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:49,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114628453] [2022-04-27 20:29:49,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:49,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:49,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:49,774 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:49,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:49,778 INFO L290 TraceCheckUtils]: 0: Hoare triple {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12898#true} is VALID [2022-04-27 20:29:49,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {12898#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,778 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12898#true} {12898#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,779 INFO L272 TraceCheckUtils]: 0: Hoare triple {12898#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:49,779 INFO L290 TraceCheckUtils]: 1: Hoare triple {12904#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12898#true} is VALID [2022-04-27 20:29:49,779 INFO L290 TraceCheckUtils]: 2: Hoare triple {12898#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,779 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12898#true} {12898#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,779 INFO L272 TraceCheckUtils]: 4: Hoare triple {12898#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,779 INFO L290 TraceCheckUtils]: 5: Hoare triple {12898#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {12898#true} is VALID [2022-04-27 20:29:49,779 INFO L290 TraceCheckUtils]: 6: Hoare triple {12898#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {12898#true} is VALID [2022-04-27 20:29:49,780 INFO L290 TraceCheckUtils]: 7: Hoare triple {12898#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {12898#true} is VALID [2022-04-27 20:29:49,780 INFO L290 TraceCheckUtils]: 8: Hoare triple {12898#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,780 INFO L290 TraceCheckUtils]: 9: Hoare triple {12898#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,780 INFO L290 TraceCheckUtils]: 10: Hoare triple {12898#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {12898#true} is VALID [2022-04-27 20:29:49,782 INFO L290 TraceCheckUtils]: 11: Hoare triple {12898#true} [290] L96-1-->L100-1: Formula: (and (not (= v_main_~p4~0_4 0)) (= v_main_~lk4~0_6 1)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4, main_~lk4~0=v_main_~lk4~0_6} AuxVars[] AssignedVars[main_~lk4~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,782 INFO L290 TraceCheckUtils]: 12: Hoare triple {12903#(not (= main_~p4~0 0))} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,783 INFO L290 TraceCheckUtils]: 13: Hoare triple {12903#(not (= main_~p4~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,783 INFO L290 TraceCheckUtils]: 14: Hoare triple {12903#(not (= main_~p4~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,783 INFO L290 TraceCheckUtils]: 15: Hoare triple {12903#(not (= main_~p4~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,783 INFO L290 TraceCheckUtils]: 16: Hoare triple {12903#(not (= main_~p4~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,784 INFO L290 TraceCheckUtils]: 17: Hoare triple {12903#(not (= main_~p4~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,784 INFO L290 TraceCheckUtils]: 18: Hoare triple {12903#(not (= main_~p4~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,784 INFO L290 TraceCheckUtils]: 19: Hoare triple {12903#(not (= main_~p4~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,785 INFO L290 TraceCheckUtils]: 20: Hoare triple {12903#(not (= main_~p4~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,785 INFO L290 TraceCheckUtils]: 21: Hoare triple {12903#(not (= main_~p4~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,786 INFO L290 TraceCheckUtils]: 22: Hoare triple {12903#(not (= main_~p4~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,786 INFO L290 TraceCheckUtils]: 23: Hoare triple {12903#(not (= main_~p4~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,786 INFO L290 TraceCheckUtils]: 24: Hoare triple {12903#(not (= main_~p4~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {12903#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:29:49,787 INFO L290 TraceCheckUtils]: 25: Hoare triple {12903#(not (= main_~p4~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-27 20:29:49,787 INFO L290 TraceCheckUtils]: 26: Hoare triple {12899#false} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-27 20:29:49,787 INFO L290 TraceCheckUtils]: 27: Hoare triple {12899#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-27 20:29:49,787 INFO L290 TraceCheckUtils]: 28: Hoare triple {12899#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12899#false} is VALID [2022-04-27 20:29:49,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:49,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:49,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114628453] [2022-04-27 20:29:49,788 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1114628453] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:49,788 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:49,788 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:49,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736745832] [2022-04-27 20:29:49,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:49,788 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:49,788 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:49,789 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:49,806 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:49,806 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:49,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:49,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:49,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:49,807 INFO L87 Difference]: Start difference. First operand 689 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,051 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-27 20:29:50,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:50,052 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:50,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:50,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-27 20:29:50,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-27 20:29:50,055 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-27 20:29:50,186 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:50,208 INFO L225 Difference]: With dead ends: 699 [2022-04-27 20:29:50,209 INFO L226 Difference]: Without dead ends: 699 [2022-04-27 20:29:50,209 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:50,209 INFO L413 NwaCegarLoop]: 137 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:50,210 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [180 Valid, 144 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:50,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2022-04-27 20:29:50,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 697. [2022-04-27 20:29:50,219 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:50,220 INFO L82 GeneralOperation]: Start isEquivalent. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,229 INFO L74 IsIncluded]: Start isIncluded. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,231 INFO L87 Difference]: Start difference. First operand 699 states. Second operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,255 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-27 20:29:50,255 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-27 20:29:50,256 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:50,256 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:50,258 INFO L74 IsIncluded]: Start isIncluded. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-27 20:29:50,259 INFO L87 Difference]: Start difference. First operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 699 states. [2022-04-27 20:29:50,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,282 INFO L93 Difference]: Finished difference Result 699 states and 1192 transitions. [2022-04-27 20:29:50,282 INFO L276 IsEmpty]: Start isEmpty. Operand 699 states and 1192 transitions. [2022-04-27 20:29:50,283 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:50,283 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:50,283 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:50,284 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:50,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 693 states have (on average 1.7142857142857142) internal successors, (1188), 693 states have internal predecessors, (1188), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1191 transitions. [2022-04-27 20:29:50,307 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1191 transitions. Word has length 29 [2022-04-27 20:29:50,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:50,307 INFO L495 AbstractCegarLoop]: Abstraction has 697 states and 1191 transitions. [2022-04-27 20:29:50,308 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,308 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1191 transitions. [2022-04-27 20:29:50,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:29:50,308 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:50,309 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:50,309 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-27 20:29:50,309 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:50,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:50,309 INFO L85 PathProgramCache]: Analyzing trace with hash -631557345, now seen corresponding path program 1 times [2022-04-27 20:29:50,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:50,309 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003457122] [2022-04-27 20:29:50,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:50,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:50,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:50,350 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:50,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:50,357 INFO L290 TraceCheckUtils]: 0: Hoare triple {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15704#true} is VALID [2022-04-27 20:29:50,358 INFO L290 TraceCheckUtils]: 1: Hoare triple {15704#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,358 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15704#true} {15704#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,358 INFO L272 TraceCheckUtils]: 0: Hoare triple {15704#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:50,359 INFO L290 TraceCheckUtils]: 1: Hoare triple {15710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15704#true} is VALID [2022-04-27 20:29:50,359 INFO L290 TraceCheckUtils]: 2: Hoare triple {15704#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,359 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15704#true} {15704#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,359 INFO L272 TraceCheckUtils]: 4: Hoare triple {15704#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,359 INFO L290 TraceCheckUtils]: 5: Hoare triple {15704#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {15704#true} is VALID [2022-04-27 20:29:50,364 INFO L290 TraceCheckUtils]: 6: Hoare triple {15704#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {15704#true} is VALID [2022-04-27 20:29:50,364 INFO L290 TraceCheckUtils]: 7: Hoare triple {15704#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {15704#true} is VALID [2022-04-27 20:29:50,365 INFO L290 TraceCheckUtils]: 8: Hoare triple {15704#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,365 INFO L290 TraceCheckUtils]: 9: Hoare triple {15704#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,367 INFO L290 TraceCheckUtils]: 10: Hoare triple {15704#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,368 INFO L290 TraceCheckUtils]: 11: Hoare triple {15704#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {15704#true} is VALID [2022-04-27 20:29:50,368 INFO L290 TraceCheckUtils]: 12: Hoare triple {15704#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,369 INFO L290 TraceCheckUtils]: 13: Hoare triple {15709#(= main_~lk5~0 1)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,369 INFO L290 TraceCheckUtils]: 14: Hoare triple {15709#(= main_~lk5~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,369 INFO L290 TraceCheckUtils]: 15: Hoare triple {15709#(= main_~lk5~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,371 INFO L290 TraceCheckUtils]: 16: Hoare triple {15709#(= main_~lk5~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,371 INFO L290 TraceCheckUtils]: 17: Hoare triple {15709#(= main_~lk5~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,371 INFO L290 TraceCheckUtils]: 18: Hoare triple {15709#(= main_~lk5~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,372 INFO L290 TraceCheckUtils]: 19: Hoare triple {15709#(= main_~lk5~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,372 INFO L290 TraceCheckUtils]: 20: Hoare triple {15709#(= main_~lk5~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,373 INFO L290 TraceCheckUtils]: 21: Hoare triple {15709#(= main_~lk5~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,376 INFO L290 TraceCheckUtils]: 22: Hoare triple {15709#(= main_~lk5~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,376 INFO L290 TraceCheckUtils]: 23: Hoare triple {15709#(= main_~lk5~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,377 INFO L290 TraceCheckUtils]: 24: Hoare triple {15709#(= main_~lk5~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,377 INFO L290 TraceCheckUtils]: 25: Hoare triple {15709#(= main_~lk5~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,377 INFO L290 TraceCheckUtils]: 26: Hoare triple {15709#(= main_~lk5~0 1)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {15709#(= main_~lk5~0 1)} is VALID [2022-04-27 20:29:50,378 INFO L290 TraceCheckUtils]: 27: Hoare triple {15709#(= main_~lk5~0 1)} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {15705#false} is VALID [2022-04-27 20:29:50,378 INFO L290 TraceCheckUtils]: 28: Hoare triple {15705#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15705#false} is VALID [2022-04-27 20:29:50,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:50,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:50,379 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003457122] [2022-04-27 20:29:50,379 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2003457122] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:50,379 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:50,379 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:50,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480712589] [2022-04-27 20:29:50,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:50,380 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:50,380 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:50,380 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,397 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:50,397 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:50,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:50,398 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:50,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:50,399 INFO L87 Difference]: Start difference. First operand 697 states and 1191 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,676 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-27 20:29:50,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:50,676 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:50,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:50,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:50,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:29:50,679 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-27 20:29:50,810 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:50,880 INFO L225 Difference]: With dead ends: 1291 [2022-04-27 20:29:50,880 INFO L226 Difference]: Without dead ends: 1291 [2022-04-27 20:29:50,881 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:50,881 INFO L413 NwaCegarLoop]: 91 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:50,882 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 98 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:50,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1291 states. [2022-04-27 20:29:50,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1291 to 969. [2022-04-27 20:29:50,908 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:50,909 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,911 INFO L74 IsIncluded]: Start isIncluded. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,912 INFO L87 Difference]: Start difference. First operand 1291 states. Second operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:50,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:50,980 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-27 20:29:50,981 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-27 20:29:50,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:50,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:50,986 INFO L74 IsIncluded]: Start isIncluded. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-27 20:29:50,987 INFO L87 Difference]: Start difference. First operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1291 states. [2022-04-27 20:29:51,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,055 INFO L93 Difference]: Finished difference Result 1291 states and 2232 transitions. [2022-04-27 20:29:51,055 INFO L276 IsEmpty]: Start isEmpty. Operand 1291 states and 2232 transitions. [2022-04-27 20:29:51,057 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:51,057 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:51,057 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:51,057 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:51,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 965 states have (on average 1.6787564766839378) internal successors, (1620), 965 states have internal predecessors, (1620), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1623 transitions. [2022-04-27 20:29:51,101 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1623 transitions. Word has length 29 [2022-04-27 20:29:51,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:51,101 INFO L495 AbstractCegarLoop]: Abstraction has 969 states and 1623 transitions. [2022-04-27 20:29:51,104 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,104 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1623 transitions. [2022-04-27 20:29:51,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:29:51,106 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:51,106 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:51,106 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-27 20:29:51,106 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:51,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:51,106 INFO L85 PathProgramCache]: Analyzing trace with hash 721752352, now seen corresponding path program 1 times [2022-04-27 20:29:51,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:51,107 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484298695] [2022-04-27 20:29:51,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:51,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:51,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:51,158 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:51,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:51,163 INFO L290 TraceCheckUtils]: 0: Hoare triple {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20558#true} is VALID [2022-04-27 20:29:51,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {20558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,163 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {20558#true} {20558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,164 INFO L272 TraceCheckUtils]: 0: Hoare triple {20558#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:51,164 INFO L290 TraceCheckUtils]: 1: Hoare triple {20564#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {20558#true} is VALID [2022-04-27 20:29:51,164 INFO L290 TraceCheckUtils]: 2: Hoare triple {20558#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {20558#true} {20558#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L272 TraceCheckUtils]: 4: Hoare triple {20558#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L290 TraceCheckUtils]: 5: Hoare triple {20558#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L290 TraceCheckUtils]: 6: Hoare triple {20558#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L290 TraceCheckUtils]: 7: Hoare triple {20558#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {20558#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,165 INFO L290 TraceCheckUtils]: 9: Hoare triple {20558#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,166 INFO L290 TraceCheckUtils]: 10: Hoare triple {20558#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,166 INFO L290 TraceCheckUtils]: 11: Hoare triple {20558#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {20558#true} is VALID [2022-04-27 20:29:51,166 INFO L290 TraceCheckUtils]: 12: Hoare triple {20558#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,166 INFO L290 TraceCheckUtils]: 13: Hoare triple {20563#(= main_~p5~0 0)} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,167 INFO L290 TraceCheckUtils]: 14: Hoare triple {20563#(= main_~p5~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,167 INFO L290 TraceCheckUtils]: 15: Hoare triple {20563#(= main_~p5~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,167 INFO L290 TraceCheckUtils]: 16: Hoare triple {20563#(= main_~p5~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,168 INFO L290 TraceCheckUtils]: 17: Hoare triple {20563#(= main_~p5~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,168 INFO L290 TraceCheckUtils]: 18: Hoare triple {20563#(= main_~p5~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,168 INFO L290 TraceCheckUtils]: 19: Hoare triple {20563#(= main_~p5~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,169 INFO L290 TraceCheckUtils]: 20: Hoare triple {20563#(= main_~p5~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,169 INFO L290 TraceCheckUtils]: 21: Hoare triple {20563#(= main_~p5~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,169 INFO L290 TraceCheckUtils]: 22: Hoare triple {20563#(= main_~p5~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,169 INFO L290 TraceCheckUtils]: 23: Hoare triple {20563#(= main_~p5~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,170 INFO L290 TraceCheckUtils]: 24: Hoare triple {20563#(= main_~p5~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,170 INFO L290 TraceCheckUtils]: 25: Hoare triple {20563#(= main_~p5~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {20563#(= main_~p5~0 0)} is VALID [2022-04-27 20:29:51,170 INFO L290 TraceCheckUtils]: 26: Hoare triple {20563#(= main_~p5~0 0)} [330] L161-1-->L167: Formula: (not (= v_main_~p5~0_2 0)) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-27 20:29:51,170 INFO L290 TraceCheckUtils]: 27: Hoare triple {20559#false} [332] L167-->L212-1: Formula: (not (= v_main_~lk5~0_3 1)) InVars {main_~lk5~0=v_main_~lk5~0_3} OutVars{main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-27 20:29:51,171 INFO L290 TraceCheckUtils]: 28: Hoare triple {20559#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {20559#false} is VALID [2022-04-27 20:29:51,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:51,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:51,171 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484298695] [2022-04-27 20:29:51,171 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484298695] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:51,171 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:51,172 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:51,172 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643026998] [2022-04-27 20:29:51,172 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:51,172 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:51,172 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:51,172 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,190 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:51,191 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:51,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:51,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:51,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:51,191 INFO L87 Difference]: Start difference. First operand 969 states and 1623 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,452 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-27 20:29:51,452 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:51,452 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:29:51,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:51,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 169 transitions. [2022-04-27 20:29:51,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 169 transitions. [2022-04-27 20:29:51,455 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 169 transitions. [2022-04-27 20:29:51,595 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 169 edges. 169 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:51,664 INFO L225 Difference]: With dead ends: 1355 [2022-04-27 20:29:51,664 INFO L226 Difference]: Without dead ends: 1355 [2022-04-27 20:29:51,664 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:51,664 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 184 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:51,665 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 135 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:51,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1355 states. [2022-04-27 20:29:51,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1355 to 1353. [2022-04-27 20:29:51,684 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:51,686 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,688 INFO L74 IsIncluded]: Start isIncluded. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,689 INFO L87 Difference]: Start difference. First operand 1355 states. Second operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,762 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-27 20:29:51,762 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-27 20:29:51,764 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:51,764 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:51,767 INFO L74 IsIncluded]: Start isIncluded. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-27 20:29:51,768 INFO L87 Difference]: Start difference. First operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1355 states. [2022-04-27 20:29:51,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:51,842 INFO L93 Difference]: Finished difference Result 1355 states and 2264 transitions. [2022-04-27 20:29:51,843 INFO L276 IsEmpty]: Start isEmpty. Operand 1355 states and 2264 transitions. [2022-04-27 20:29:51,845 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:51,845 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:51,845 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:51,845 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:51,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1349 states have (on average 1.67531504818384) internal successors, (2260), 1349 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 2263 transitions. [2022-04-27 20:29:51,931 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 2263 transitions. Word has length 29 [2022-04-27 20:29:51,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:51,931 INFO L495 AbstractCegarLoop]: Abstraction has 1353 states and 2263 transitions. [2022-04-27 20:29:51,931 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:51,931 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 2263 transitions. [2022-04-27 20:29:51,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:29:51,932 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:51,932 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:51,933 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-27 20:29:51,933 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:51,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:51,933 INFO L85 PathProgramCache]: Analyzing trace with hash 1896591374, now seen corresponding path program 1 times [2022-04-27 20:29:51,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:51,933 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255959352] [2022-04-27 20:29:51,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:51,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:51,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:51,969 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:51,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:51,973 INFO L290 TraceCheckUtils]: 0: Hoare triple {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25988#true} is VALID [2022-04-27 20:29:51,973 INFO L290 TraceCheckUtils]: 1: Hoare triple {25988#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,973 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25988#true} {25988#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L272 TraceCheckUtils]: 0: Hoare triple {25988#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:51,974 INFO L290 TraceCheckUtils]: 1: Hoare triple {25994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L290 TraceCheckUtils]: 2: Hoare triple {25988#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25988#true} {25988#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L272 TraceCheckUtils]: 4: Hoare triple {25988#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L290 TraceCheckUtils]: 5: Hoare triple {25988#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L290 TraceCheckUtils]: 6: Hoare triple {25988#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {25988#true} is VALID [2022-04-27 20:29:51,974 INFO L290 TraceCheckUtils]: 7: Hoare triple {25988#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {25988#true} is VALID [2022-04-27 20:29:51,975 INFO L290 TraceCheckUtils]: 8: Hoare triple {25988#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,975 INFO L290 TraceCheckUtils]: 9: Hoare triple {25988#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,975 INFO L290 TraceCheckUtils]: 10: Hoare triple {25988#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,975 INFO L290 TraceCheckUtils]: 11: Hoare triple {25988#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {25988#true} is VALID [2022-04-27 20:29:51,976 INFO L290 TraceCheckUtils]: 12: Hoare triple {25988#true} [292] L100-1-->L104-1: Formula: (and (= v_main_~lk5~0_6 1) (not (= v_main_~p5~0_4 0))) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4, main_~lk5~0=v_main_~lk5~0_6} AuxVars[] AssignedVars[main_~lk5~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,976 INFO L290 TraceCheckUtils]: 13: Hoare triple {25993#(not (= main_~p5~0 0))} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,976 INFO L290 TraceCheckUtils]: 14: Hoare triple {25993#(not (= main_~p5~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,976 INFO L290 TraceCheckUtils]: 15: Hoare triple {25993#(not (= main_~p5~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,977 INFO L290 TraceCheckUtils]: 16: Hoare triple {25993#(not (= main_~p5~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,977 INFO L290 TraceCheckUtils]: 17: Hoare triple {25993#(not (= main_~p5~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,978 INFO L290 TraceCheckUtils]: 18: Hoare triple {25993#(not (= main_~p5~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,978 INFO L290 TraceCheckUtils]: 19: Hoare triple {25993#(not (= main_~p5~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,978 INFO L290 TraceCheckUtils]: 20: Hoare triple {25993#(not (= main_~p5~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,979 INFO L290 TraceCheckUtils]: 21: Hoare triple {25993#(not (= main_~p5~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,979 INFO L290 TraceCheckUtils]: 22: Hoare triple {25993#(not (= main_~p5~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,979 INFO L290 TraceCheckUtils]: 23: Hoare triple {25993#(not (= main_~p5~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,980 INFO L290 TraceCheckUtils]: 24: Hoare triple {25993#(not (= main_~p5~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,980 INFO L290 TraceCheckUtils]: 25: Hoare triple {25993#(not (= main_~p5~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {25993#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:29:51,980 INFO L290 TraceCheckUtils]: 26: Hoare triple {25993#(not (= main_~p5~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-27 20:29:51,980 INFO L290 TraceCheckUtils]: 27: Hoare triple {25989#false} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-27 20:29:51,980 INFO L290 TraceCheckUtils]: 28: Hoare triple {25989#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-27 20:29:51,981 INFO L290 TraceCheckUtils]: 29: Hoare triple {25989#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25989#false} is VALID [2022-04-27 20:29:51,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:51,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:51,981 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255959352] [2022-04-27 20:29:51,981 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255959352] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:51,981 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:51,981 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:51,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463969735] [2022-04-27 20:29:51,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:51,982 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:51,983 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:51,983 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:52,004 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:52,004 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:52,004 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:52,004 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:52,004 INFO L87 Difference]: Start difference. First operand 1353 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:52,290 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-27 20:29:52,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:52,291 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:52,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:52,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 168 transitions. [2022-04-27 20:29:52,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 168 transitions. [2022-04-27 20:29:52,293 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 168 transitions. [2022-04-27 20:29:52,422 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:52,478 INFO L225 Difference]: With dead ends: 1371 [2022-04-27 20:29:52,478 INFO L226 Difference]: Without dead ends: 1371 [2022-04-27 20:29:52,478 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:52,479 INFO L413 NwaCegarLoop]: 134 mSDtfsCounter, 179 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:52,479 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 141 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:52,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1371 states. [2022-04-27 20:29:52,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1371 to 1369. [2022-04-27 20:29:52,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:52,513 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,516 INFO L74 IsIncluded]: Start isIncluded. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,518 INFO L87 Difference]: Start difference. First operand 1371 states. Second operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:52,593 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-27 20:29:52,593 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-27 20:29:52,597 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:52,597 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:52,599 INFO L74 IsIncluded]: Start isIncluded. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-27 20:29:52,600 INFO L87 Difference]: Start difference. First operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1371 states. [2022-04-27 20:29:52,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:52,675 INFO L93 Difference]: Finished difference Result 1371 states and 2264 transitions. [2022-04-27 20:29:52,675 INFO L276 IsEmpty]: Start isEmpty. Operand 1371 states and 2264 transitions. [2022-04-27 20:29:52,677 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:52,677 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:52,677 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:52,677 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:52,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1369 states, 1365 states have (on average 1.6556776556776556) internal successors, (2260), 1365 states have internal predecessors, (2260), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 2263 transitions. [2022-04-27 20:29:52,763 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 2263 transitions. Word has length 30 [2022-04-27 20:29:52,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:52,764 INFO L495 AbstractCegarLoop]: Abstraction has 1369 states and 2263 transitions. [2022-04-27 20:29:52,764 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,764 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 2263 transitions. [2022-04-27 20:29:52,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:29:52,766 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:52,766 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:52,766 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-27 20:29:52,766 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:52,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:52,766 INFO L85 PathProgramCache]: Analyzing trace with hash 899519021, now seen corresponding path program 1 times [2022-04-27 20:29:52,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:52,767 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887408272] [2022-04-27 20:29:52,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:52,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:52,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:52,816 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:52,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:52,822 INFO L290 TraceCheckUtils]: 0: Hoare triple {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31482#true} is VALID [2022-04-27 20:29:52,823 INFO L290 TraceCheckUtils]: 1: Hoare triple {31482#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,823 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31482#true} {31482#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,824 INFO L272 TraceCheckUtils]: 0: Hoare triple {31482#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:52,824 INFO L290 TraceCheckUtils]: 1: Hoare triple {31488#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L290 TraceCheckUtils]: 2: Hoare triple {31482#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31482#true} {31482#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L272 TraceCheckUtils]: 4: Hoare triple {31482#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L290 TraceCheckUtils]: 5: Hoare triple {31482#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L290 TraceCheckUtils]: 6: Hoare triple {31482#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L290 TraceCheckUtils]: 7: Hoare triple {31482#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L290 TraceCheckUtils]: 8: Hoare triple {31482#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,825 INFO L290 TraceCheckUtils]: 9: Hoare triple {31482#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,826 INFO L290 TraceCheckUtils]: 10: Hoare triple {31482#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,826 INFO L290 TraceCheckUtils]: 11: Hoare triple {31482#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,826 INFO L290 TraceCheckUtils]: 12: Hoare triple {31482#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {31482#true} is VALID [2022-04-27 20:29:52,826 INFO L290 TraceCheckUtils]: 13: Hoare triple {31482#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,826 INFO L290 TraceCheckUtils]: 14: Hoare triple {31487#(= main_~lk6~0 1)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,827 INFO L290 TraceCheckUtils]: 15: Hoare triple {31487#(= main_~lk6~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,827 INFO L290 TraceCheckUtils]: 16: Hoare triple {31487#(= main_~lk6~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,827 INFO L290 TraceCheckUtils]: 17: Hoare triple {31487#(= main_~lk6~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,828 INFO L290 TraceCheckUtils]: 18: Hoare triple {31487#(= main_~lk6~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,828 INFO L290 TraceCheckUtils]: 19: Hoare triple {31487#(= main_~lk6~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,829 INFO L290 TraceCheckUtils]: 20: Hoare triple {31487#(= main_~lk6~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,829 INFO L290 TraceCheckUtils]: 21: Hoare triple {31487#(= main_~lk6~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,830 INFO L290 TraceCheckUtils]: 22: Hoare triple {31487#(= main_~lk6~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,830 INFO L290 TraceCheckUtils]: 23: Hoare triple {31487#(= main_~lk6~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,830 INFO L290 TraceCheckUtils]: 24: Hoare triple {31487#(= main_~lk6~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,831 INFO L290 TraceCheckUtils]: 25: Hoare triple {31487#(= main_~lk6~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,831 INFO L290 TraceCheckUtils]: 26: Hoare triple {31487#(= main_~lk6~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,831 INFO L290 TraceCheckUtils]: 27: Hoare triple {31487#(= main_~lk6~0 1)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {31487#(= main_~lk6~0 1)} is VALID [2022-04-27 20:29:52,832 INFO L290 TraceCheckUtils]: 28: Hoare triple {31487#(= main_~lk6~0 1)} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {31483#false} is VALID [2022-04-27 20:29:52,832 INFO L290 TraceCheckUtils]: 29: Hoare triple {31483#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31483#false} is VALID [2022-04-27 20:29:52,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:52,832 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:52,832 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1887408272] [2022-04-27 20:29:52,834 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1887408272] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:52,834 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:52,834 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:52,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766421905] [2022-04-27 20:29:52,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:52,834 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:52,835 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:52,835 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:52,856 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:52,856 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:52,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:52,857 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:52,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:52,857 INFO L87 Difference]: Start difference. First operand 1369 states and 2263 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:53,256 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-27 20:29:53,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:53,256 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:53,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:53,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:29:53,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:29:53,260 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 158 transitions. [2022-04-27 20:29:53,370 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:53,529 INFO L225 Difference]: With dead ends: 2507 [2022-04-27 20:29:53,529 INFO L226 Difference]: Without dead ends: 2507 [2022-04-27 20:29:53,530 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:53,530 INFO L413 NwaCegarLoop]: 90 mSDtfsCounter, 201 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:53,530 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 97 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:53,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2507 states. [2022-04-27 20:29:53,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2507 to 1929. [2022-04-27 20:29:53,556 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:53,559 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,561 INFO L74 IsIncluded]: Start isIncluded. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,562 INFO L87 Difference]: Start difference. First operand 2507 states. Second operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:53,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:53,793 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-27 20:29:53,793 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-27 20:29:53,797 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:53,797 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:53,800 INFO L74 IsIncluded]: Start isIncluded. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-27 20:29:53,802 INFO L87 Difference]: Start difference. First operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2507 states. [2022-04-27 20:29:53,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:53,977 INFO L93 Difference]: Finished difference Result 2507 states and 4200 transitions. [2022-04-27 20:29:53,977 INFO L276 IsEmpty]: Start isEmpty. Operand 2507 states and 4200 transitions. [2022-04-27 20:29:53,981 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:53,981 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:53,981 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:53,981 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:53,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1929 states, 1925 states have (on average 1.6145454545454545) internal successors, (3108), 1925 states have internal predecessors, (3108), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1929 states to 1929 states and 3111 transitions. [2022-04-27 20:29:54,110 INFO L78 Accepts]: Start accepts. Automaton has 1929 states and 3111 transitions. Word has length 30 [2022-04-27 20:29:54,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:54,111 INFO L495 AbstractCegarLoop]: Abstraction has 1929 states and 3111 transitions. [2022-04-27 20:29:54,111 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,111 INFO L276 IsEmpty]: Start isEmpty. Operand 1929 states and 3111 transitions. [2022-04-27 20:29:54,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:29:54,113 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:54,113 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:54,113 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-27 20:29:54,113 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:54,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:54,114 INFO L85 PathProgramCache]: Analyzing trace with hash -2042138578, now seen corresponding path program 1 times [2022-04-27 20:29:54,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:54,114 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995706722] [2022-04-27 20:29:54,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:54,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:54,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:54,143 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:54,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:54,146 INFO L290 TraceCheckUtils]: 0: Hoare triple {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40944#true} is VALID [2022-04-27 20:29:54,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {40944#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,147 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40944#true} {40944#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,147 INFO L272 TraceCheckUtils]: 0: Hoare triple {40944#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:54,147 INFO L290 TraceCheckUtils]: 1: Hoare triple {40950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40944#true} is VALID [2022-04-27 20:29:54,147 INFO L290 TraceCheckUtils]: 2: Hoare triple {40944#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,147 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40944#true} {40944#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L272 TraceCheckUtils]: 4: Hoare triple {40944#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 5: Hoare triple {40944#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 6: Hoare triple {40944#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 7: Hoare triple {40944#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 8: Hoare triple {40944#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 9: Hoare triple {40944#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 10: Hoare triple {40944#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,148 INFO L290 TraceCheckUtils]: 11: Hoare triple {40944#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,149 INFO L290 TraceCheckUtils]: 12: Hoare triple {40944#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {40944#true} is VALID [2022-04-27 20:29:54,151 INFO L290 TraceCheckUtils]: 13: Hoare triple {40944#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,152 INFO L290 TraceCheckUtils]: 14: Hoare triple {40949#(= main_~p6~0 0)} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,152 INFO L290 TraceCheckUtils]: 15: Hoare triple {40949#(= main_~p6~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,152 INFO L290 TraceCheckUtils]: 16: Hoare triple {40949#(= main_~p6~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,153 INFO L290 TraceCheckUtils]: 17: Hoare triple {40949#(= main_~p6~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,153 INFO L290 TraceCheckUtils]: 18: Hoare triple {40949#(= main_~p6~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {40949#(= main_~p6~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {40949#(= main_~p6~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,154 INFO L290 TraceCheckUtils]: 21: Hoare triple {40949#(= main_~p6~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,154 INFO L290 TraceCheckUtils]: 22: Hoare triple {40949#(= main_~p6~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,154 INFO L290 TraceCheckUtils]: 23: Hoare triple {40949#(= main_~p6~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,155 INFO L290 TraceCheckUtils]: 24: Hoare triple {40949#(= main_~p6~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,155 INFO L290 TraceCheckUtils]: 25: Hoare triple {40949#(= main_~p6~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,155 INFO L290 TraceCheckUtils]: 26: Hoare triple {40949#(= main_~p6~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {40949#(= main_~p6~0 0)} is VALID [2022-04-27 20:29:54,155 INFO L290 TraceCheckUtils]: 27: Hoare triple {40949#(= main_~p6~0 0)} [334] L166-1-->L172: Formula: (not (= v_main_~p6~0_2 0)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-27 20:29:54,156 INFO L290 TraceCheckUtils]: 28: Hoare triple {40945#false} [336] L172-->L212-1: Formula: (not (= v_main_~lk6~0_3 1)) InVars {main_~lk6~0=v_main_~lk6~0_3} OutVars{main_~lk6~0=v_main_~lk6~0_3} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-27 20:29:54,156 INFO L290 TraceCheckUtils]: 29: Hoare triple {40945#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40945#false} is VALID [2022-04-27 20:29:54,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:54,156 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:54,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995706722] [2022-04-27 20:29:54,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995706722] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:54,156 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:54,156 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:54,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768460561] [2022-04-27 20:29:54,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:54,157 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:54,157 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:54,157 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,177 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:54,177 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:54,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:54,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:54,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:54,178 INFO L87 Difference]: Start difference. First operand 1929 states and 3111 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:54,591 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-27 20:29:54,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:54,591 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:29:54,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:54,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-27 20:29:54,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 167 transitions. [2022-04-27 20:29:54,594 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 167 transitions. [2022-04-27 20:29:54,705 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 167 edges. 167 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:54,879 INFO L225 Difference]: With dead ends: 2667 [2022-04-27 20:29:54,879 INFO L226 Difference]: Without dead ends: 2667 [2022-04-27 20:29:54,879 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:54,880 INFO L413 NwaCegarLoop]: 130 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 137 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:54,880 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [178 Valid, 137 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:54,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2667 states. [2022-04-27 20:29:54,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2667 to 2665. [2022-04-27 20:29:54,911 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:54,914 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,917 INFO L74 IsIncluded]: Start isIncluded. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:54,920 INFO L87 Difference]: Start difference. First operand 2667 states. Second operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:55,178 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-27 20:29:55,178 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-27 20:29:55,182 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:55,182 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:55,186 INFO L74 IsIncluded]: Start isIncluded. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-27 20:29:55,188 INFO L87 Difference]: Start difference. First operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2667 states. [2022-04-27 20:29:55,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:55,383 INFO L93 Difference]: Finished difference Result 2667 states and 4296 transitions. [2022-04-27 20:29:55,383 INFO L276 IsEmpty]: Start isEmpty. Operand 2667 states and 4296 transitions. [2022-04-27 20:29:55,386 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:55,386 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:55,386 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:55,386 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:55,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2665 states, 2661 states have (on average 1.6129274708756107) internal successors, (4292), 2661 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2665 states to 2665 states and 4295 transitions. [2022-04-27 20:29:55,576 INFO L78 Accepts]: Start accepts. Automaton has 2665 states and 4295 transitions. Word has length 30 [2022-04-27 20:29:55,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:55,576 INFO L495 AbstractCegarLoop]: Abstraction has 2665 states and 4295 transitions. [2022-04-27 20:29:55,577 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,577 INFO L276 IsEmpty]: Start isEmpty. Operand 2665 states and 4295 transitions. [2022-04-27 20:29:55,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:29:55,578 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:55,578 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:55,578 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-27 20:29:55,579 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:55,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:55,579 INFO L85 PathProgramCache]: Analyzing trace with hash 2115318588, now seen corresponding path program 1 times [2022-04-27 20:29:55,579 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:55,579 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555737966] [2022-04-27 20:29:55,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:55,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:55,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:55,616 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:55,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:55,622 INFO L290 TraceCheckUtils]: 0: Hoare triple {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51622#true} is VALID [2022-04-27 20:29:55,622 INFO L290 TraceCheckUtils]: 1: Hoare triple {51622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,623 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {51622#true} {51622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,623 INFO L272 TraceCheckUtils]: 0: Hoare triple {51622#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:55,623 INFO L290 TraceCheckUtils]: 1: Hoare triple {51628#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {51622#true} is VALID [2022-04-27 20:29:55,623 INFO L290 TraceCheckUtils]: 2: Hoare triple {51622#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,623 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {51622#true} {51622#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,623 INFO L272 TraceCheckUtils]: 4: Hoare triple {51622#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {51622#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {51622#true} is VALID [2022-04-27 20:29:55,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {51622#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {51622#true} is VALID [2022-04-27 20:29:55,624 INFO L290 TraceCheckUtils]: 7: Hoare triple {51622#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {51622#true} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {51622#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {51622#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 10: Hoare triple {51622#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 11: Hoare triple {51622#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 12: Hoare triple {51622#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {51622#true} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 13: Hoare triple {51622#true} [294] L104-1-->L108-1: Formula: (and (not (= v_main_~p6~0_4 0)) (= v_main_~lk6~0_6 1)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_6, main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[main_~lk6~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,625 INFO L290 TraceCheckUtils]: 14: Hoare triple {51627#(not (= main_~p6~0 0))} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,626 INFO L290 TraceCheckUtils]: 15: Hoare triple {51627#(not (= main_~p6~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,626 INFO L290 TraceCheckUtils]: 16: Hoare triple {51627#(not (= main_~p6~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,626 INFO L290 TraceCheckUtils]: 17: Hoare triple {51627#(not (= main_~p6~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,627 INFO L290 TraceCheckUtils]: 18: Hoare triple {51627#(not (= main_~p6~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,627 INFO L290 TraceCheckUtils]: 19: Hoare triple {51627#(not (= main_~p6~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,627 INFO L290 TraceCheckUtils]: 20: Hoare triple {51627#(not (= main_~p6~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,628 INFO L290 TraceCheckUtils]: 21: Hoare triple {51627#(not (= main_~p6~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,628 INFO L290 TraceCheckUtils]: 22: Hoare triple {51627#(not (= main_~p6~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,628 INFO L290 TraceCheckUtils]: 23: Hoare triple {51627#(not (= main_~p6~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,629 INFO L290 TraceCheckUtils]: 24: Hoare triple {51627#(not (= main_~p6~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,629 INFO L290 TraceCheckUtils]: 25: Hoare triple {51627#(not (= main_~p6~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,629 INFO L290 TraceCheckUtils]: 26: Hoare triple {51627#(not (= main_~p6~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {51627#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:29:55,629 INFO L290 TraceCheckUtils]: 27: Hoare triple {51627#(not (= main_~p6~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-27 20:29:55,630 INFO L290 TraceCheckUtils]: 28: Hoare triple {51623#false} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-27 20:29:55,630 INFO L290 TraceCheckUtils]: 29: Hoare triple {51623#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-27 20:29:55,630 INFO L290 TraceCheckUtils]: 30: Hoare triple {51623#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {51623#false} is VALID [2022-04-27 20:29:55,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:55,630 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:55,630 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555737966] [2022-04-27 20:29:55,630 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1555737966] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:55,630 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:55,630 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:55,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [153063382] [2022-04-27 20:29:55,631 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:55,631 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:29:55,631 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:55,631 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:55,651 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:55,651 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:55,651 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:55,651 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:55,651 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:55,652 INFO L87 Difference]: Start difference. First operand 2665 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:56,090 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-27 20:29:56,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:56,090 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:29:56,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:56,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-27 20:29:56,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-27 20:29:56,092 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-27 20:29:56,205 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:56,383 INFO L225 Difference]: With dead ends: 2699 [2022-04-27 20:29:56,383 INFO L226 Difference]: Without dead ends: 2699 [2022-04-27 20:29:56,384 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:56,384 INFO L413 NwaCegarLoop]: 131 mSDtfsCounter, 178 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 178 SdHoareTripleChecker+Valid, 138 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:56,384 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [178 Valid, 138 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:56,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2699 states. [2022-04-27 20:29:56,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2699 to 2697. [2022-04-27 20:29:56,428 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:56,432 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,434 INFO L74 IsIncluded]: Start isIncluded. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,437 INFO L87 Difference]: Start difference. First operand 2699 states. Second operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:56,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:56,624 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-27 20:29:56,624 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-27 20:29:56,626 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:56,626 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:56,630 INFO L74 IsIncluded]: Start isIncluded. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-27 20:29:56,632 INFO L87 Difference]: Start difference. First operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-27 20:29:56,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:56,892 INFO L93 Difference]: Finished difference Result 2699 states and 4296 transitions. [2022-04-27 20:29:56,892 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4296 transitions. [2022-04-27 20:29:56,895 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:56,895 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:56,895 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:29:56,895 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:29:56,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2697 states, 2693 states have (on average 1.5937616041589306) internal successors, (4292), 2693 states have internal predecessors, (4292), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:57,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2697 states to 2697 states and 4295 transitions. [2022-04-27 20:29:57,187 INFO L78 Accepts]: Start accepts. Automaton has 2697 states and 4295 transitions. Word has length 31 [2022-04-27 20:29:57,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:29:57,188 INFO L495 AbstractCegarLoop]: Abstraction has 2697 states and 4295 transitions. [2022-04-27 20:29:57,188 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:57,188 INFO L276 IsEmpty]: Start isEmpty. Operand 2697 states and 4295 transitions. [2022-04-27 20:29:57,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:29:57,192 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:29:57,192 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:29:57,192 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-27 20:29:57,192 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:29:57,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:29:57,193 INFO L85 PathProgramCache]: Analyzing trace with hash 1118246235, now seen corresponding path program 1 times [2022-04-27 20:29:57,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:29:57,193 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250763055] [2022-04-27 20:29:57,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:29:57,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:29:57,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:57,227 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:29:57,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:29:57,236 INFO L290 TraceCheckUtils]: 0: Hoare triple {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {62428#true} is VALID [2022-04-27 20:29:57,236 INFO L290 TraceCheckUtils]: 1: Hoare triple {62428#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,236 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {62428#true} {62428#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L272 TraceCheckUtils]: 0: Hoare triple {62428#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:29:57,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {62434#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {62428#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {62428#true} {62428#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L272 TraceCheckUtils]: 4: Hoare triple {62428#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L290 TraceCheckUtils]: 5: Hoare triple {62428#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L290 TraceCheckUtils]: 6: Hoare triple {62428#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {62428#true} is VALID [2022-04-27 20:29:57,237 INFO L290 TraceCheckUtils]: 7: Hoare triple {62428#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 8: Hoare triple {62428#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 9: Hoare triple {62428#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 10: Hoare triple {62428#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {62428#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 12: Hoare triple {62428#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {62428#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {62428#true} is VALID [2022-04-27 20:29:57,238 INFO L290 TraceCheckUtils]: 14: Hoare triple {62428#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,239 INFO L290 TraceCheckUtils]: 15: Hoare triple {62433#(= main_~lk7~0 1)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,239 INFO L290 TraceCheckUtils]: 16: Hoare triple {62433#(= main_~lk7~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,239 INFO L290 TraceCheckUtils]: 17: Hoare triple {62433#(= main_~lk7~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,240 INFO L290 TraceCheckUtils]: 18: Hoare triple {62433#(= main_~lk7~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,240 INFO L290 TraceCheckUtils]: 19: Hoare triple {62433#(= main_~lk7~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,240 INFO L290 TraceCheckUtils]: 20: Hoare triple {62433#(= main_~lk7~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,241 INFO L290 TraceCheckUtils]: 21: Hoare triple {62433#(= main_~lk7~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,241 INFO L290 TraceCheckUtils]: 22: Hoare triple {62433#(= main_~lk7~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,241 INFO L290 TraceCheckUtils]: 23: Hoare triple {62433#(= main_~lk7~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,241 INFO L290 TraceCheckUtils]: 24: Hoare triple {62433#(= main_~lk7~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,242 INFO L290 TraceCheckUtils]: 25: Hoare triple {62433#(= main_~lk7~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,242 INFO L290 TraceCheckUtils]: 26: Hoare triple {62433#(= main_~lk7~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,242 INFO L290 TraceCheckUtils]: 27: Hoare triple {62433#(= main_~lk7~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,243 INFO L290 TraceCheckUtils]: 28: Hoare triple {62433#(= main_~lk7~0 1)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {62433#(= main_~lk7~0 1)} is VALID [2022-04-27 20:29:57,243 INFO L290 TraceCheckUtils]: 29: Hoare triple {62433#(= main_~lk7~0 1)} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {62429#false} is VALID [2022-04-27 20:29:57,243 INFO L290 TraceCheckUtils]: 30: Hoare triple {62429#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {62429#false} is VALID [2022-04-27 20:29:57,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:29:57,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:29:57,244 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250763055] [2022-04-27 20:29:57,244 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1250763055] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:29:57,244 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:29:57,244 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:29:57,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [146262612] [2022-04-27 20:29:57,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:29:57,245 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:29:57,245 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:29:57,245 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:57,265 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:57,265 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:29:57,266 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:29:57,266 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:29:57,266 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:29:57,266 INFO L87 Difference]: Start difference. First operand 2697 states and 4295 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:58,072 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-27 20:29:58,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:29:58,072 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:29:58,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:29:58,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-27 20:29:58,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 154 transitions. [2022-04-27 20:29:58,074 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 154 transitions. [2022-04-27 20:29:58,187 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 154 edges. 154 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:29:58,844 INFO L225 Difference]: With dead ends: 4875 [2022-04-27 20:29:58,844 INFO L226 Difference]: Without dead ends: 4875 [2022-04-27 20:29:58,844 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:29:58,844 INFO L413 NwaCegarLoop]: 89 mSDtfsCounter, 194 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:29:58,845 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [194 Valid, 96 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:29:58,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2022-04-27 20:29:58,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 3849. [2022-04-27 20:29:58,891 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:29:58,896 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,900 INFO L74 IsIncluded]: Start isIncluded. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:58,904 INFO L87 Difference]: Start difference. First operand 4875 states. Second operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:29:59,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:29:59,628 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-27 20:29:59,628 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-27 20:29:59,633 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:29:59,633 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:29:59,637 INFO L74 IsIncluded]: Start isIncluded. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-27 20:29:59,639 INFO L87 Difference]: Start difference. First operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 4875 states. [2022-04-27 20:30:00,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:00,254 INFO L93 Difference]: Finished difference Result 4875 states and 7880 transitions. [2022-04-27 20:30:00,254 INFO L276 IsEmpty]: Start isEmpty. Operand 4875 states and 7880 transitions. [2022-04-27 20:30:00,258 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:00,258 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:00,258 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:00,259 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:00,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3849 states, 3845 states have (on average 1.5490247074122236) internal successors, (5956), 3845 states have internal predecessors, (5956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:00,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3849 states to 3849 states and 5959 transitions. [2022-04-27 20:30:00,654 INFO L78 Accepts]: Start accepts. Automaton has 3849 states and 5959 transitions. Word has length 31 [2022-04-27 20:30:00,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:00,654 INFO L495 AbstractCegarLoop]: Abstraction has 3849 states and 5959 transitions. [2022-04-27 20:30:00,654 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:00,654 INFO L276 IsEmpty]: Start isEmpty. Operand 3849 states and 5959 transitions. [2022-04-27 20:30:00,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:30:00,657 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:00,657 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:00,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-27 20:30:00,657 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:00,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:00,657 INFO L85 PathProgramCache]: Analyzing trace with hash -1823411364, now seen corresponding path program 1 times [2022-04-27 20:30:00,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:00,658 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6255268] [2022-04-27 20:30:00,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:00,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:00,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:00,692 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:00,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:00,695 INFO L290 TraceCheckUtils]: 0: Hoare triple {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {80914#true} is VALID [2022-04-27 20:30:00,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {80914#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,696 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {80914#true} {80914#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,696 INFO L272 TraceCheckUtils]: 0: Hoare triple {80914#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:00,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {80920#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {80914#true} is VALID [2022-04-27 20:30:00,696 INFO L290 TraceCheckUtils]: 2: Hoare triple {80914#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {80914#true} {80914#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L272 TraceCheckUtils]: 4: Hoare triple {80914#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 5: Hoare triple {80914#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 6: Hoare triple {80914#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 7: Hoare triple {80914#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 8: Hoare triple {80914#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 9: Hoare triple {80914#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 10: Hoare triple {80914#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 11: Hoare triple {80914#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,697 INFO L290 TraceCheckUtils]: 12: Hoare triple {80914#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,698 INFO L290 TraceCheckUtils]: 13: Hoare triple {80914#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {80914#true} is VALID [2022-04-27 20:30:00,698 INFO L290 TraceCheckUtils]: 14: Hoare triple {80914#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,698 INFO L290 TraceCheckUtils]: 15: Hoare triple {80919#(= main_~p7~0 0)} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,699 INFO L290 TraceCheckUtils]: 16: Hoare triple {80919#(= main_~p7~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,699 INFO L290 TraceCheckUtils]: 17: Hoare triple {80919#(= main_~p7~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,699 INFO L290 TraceCheckUtils]: 18: Hoare triple {80919#(= main_~p7~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,700 INFO L290 TraceCheckUtils]: 19: Hoare triple {80919#(= main_~p7~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,700 INFO L290 TraceCheckUtils]: 20: Hoare triple {80919#(= main_~p7~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,700 INFO L290 TraceCheckUtils]: 21: Hoare triple {80919#(= main_~p7~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,701 INFO L290 TraceCheckUtils]: 22: Hoare triple {80919#(= main_~p7~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,701 INFO L290 TraceCheckUtils]: 23: Hoare triple {80919#(= main_~p7~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,701 INFO L290 TraceCheckUtils]: 24: Hoare triple {80919#(= main_~p7~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,701 INFO L290 TraceCheckUtils]: 25: Hoare triple {80919#(= main_~p7~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,702 INFO L290 TraceCheckUtils]: 26: Hoare triple {80919#(= main_~p7~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,702 INFO L290 TraceCheckUtils]: 27: Hoare triple {80919#(= main_~p7~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {80919#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:00,702 INFO L290 TraceCheckUtils]: 28: Hoare triple {80919#(= main_~p7~0 0)} [338] L171-1-->L177: Formula: (not (= v_main_~p7~0_2 0)) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-27 20:30:00,702 INFO L290 TraceCheckUtils]: 29: Hoare triple {80915#false} [340] L177-->L212-1: Formula: (not (= v_main_~lk7~0_3 1)) InVars {main_~lk7~0=v_main_~lk7~0_3} OutVars{main_~lk7~0=v_main_~lk7~0_3} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-27 20:30:00,703 INFO L290 TraceCheckUtils]: 30: Hoare triple {80915#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {80915#false} is VALID [2022-04-27 20:30:00,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:00,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:00,703 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6255268] [2022-04-27 20:30:00,703 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [6255268] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:00,703 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:00,703 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:00,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666757877] [2022-04-27 20:30:00,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:00,704 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:00,704 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:00,704 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:00,726 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:00,726 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:00,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:00,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:00,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:00,726 INFO L87 Difference]: Start difference. First operand 3849 states and 5959 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:01,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:01,717 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-27 20:30:01,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:01,717 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:01,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:01,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:01,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-27 20:30:01,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:01,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 165 transitions. [2022-04-27 20:30:01,720 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 165 transitions. [2022-04-27 20:30:01,829 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 165 edges. 165 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:02,646 INFO L225 Difference]: With dead ends: 5259 [2022-04-27 20:30:02,646 INFO L226 Difference]: Without dead ends: 5259 [2022-04-27 20:30:02,646 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:02,647 INFO L413 NwaCegarLoop]: 132 mSDtfsCounter, 172 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 172 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:02,647 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [172 Valid, 139 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:02,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5259 states. [2022-04-27 20:30:02,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5259 to 5257. [2022-04-27 20:30:02,719 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:02,725 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:02,730 INFO L74 IsIncluded]: Start isIncluded. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:02,735 INFO L87 Difference]: Start difference. First operand 5259 states. Second operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:03,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:03,495 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-27 20:30:03,495 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-27 20:30:03,500 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:03,500 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:03,505 INFO L74 IsIncluded]: Start isIncluded. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-27 20:30:03,509 INFO L87 Difference]: Start difference. First operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-27 20:30:04,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:04,225 INFO L93 Difference]: Finished difference Result 5259 states and 8136 transitions. [2022-04-27 20:30:04,225 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8136 transitions. [2022-04-27 20:30:04,230 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:04,230 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:04,230 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:04,230 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:04,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5257 states, 5253 states have (on average 1.5480677707976394) internal successors, (8132), 5253 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:05,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5257 states to 5257 states and 8135 transitions. [2022-04-27 20:30:05,002 INFO L78 Accepts]: Start accepts. Automaton has 5257 states and 8135 transitions. Word has length 31 [2022-04-27 20:30:05,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:05,002 INFO L495 AbstractCegarLoop]: Abstraction has 5257 states and 8135 transitions. [2022-04-27 20:30:05,003 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:05,003 INFO L276 IsEmpty]: Start isEmpty. Operand 5257 states and 8135 transitions. [2022-04-27 20:30:05,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:05,006 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:05,006 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:05,007 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-27 20:30:05,007 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:05,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:05,007 INFO L85 PathProgramCache]: Analyzing trace with hash 305927754, now seen corresponding path program 1 times [2022-04-27 20:30:05,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:05,007 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841130255] [2022-04-27 20:30:05,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:05,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:05,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:05,038 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:05,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:05,041 INFO L290 TraceCheckUtils]: 0: Hoare triple {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {101960#true} is VALID [2022-04-27 20:30:05,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {101960#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,041 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {101960#true} {101960#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,041 INFO L272 TraceCheckUtils]: 0: Hoare triple {101960#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 1: Hoare triple {101966#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 2: Hoare triple {101960#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {101960#true} {101960#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L272 TraceCheckUtils]: 4: Hoare triple {101960#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 5: Hoare triple {101960#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 6: Hoare triple {101960#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 7: Hoare triple {101960#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 8: Hoare triple {101960#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 9: Hoare triple {101960#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,042 INFO L290 TraceCheckUtils]: 10: Hoare triple {101960#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,043 INFO L290 TraceCheckUtils]: 11: Hoare triple {101960#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,043 INFO L290 TraceCheckUtils]: 12: Hoare triple {101960#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,043 INFO L290 TraceCheckUtils]: 13: Hoare triple {101960#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {101960#true} is VALID [2022-04-27 20:30:05,043 INFO L290 TraceCheckUtils]: 14: Hoare triple {101960#true} [296] L108-1-->L112-1: Formula: (and (not (= v_main_~p7~0_4 0)) (= v_main_~lk7~0_6 1)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_6, main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[main_~lk7~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,043 INFO L290 TraceCheckUtils]: 15: Hoare triple {101965#(not (= main_~p7~0 0))} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,044 INFO L290 TraceCheckUtils]: 16: Hoare triple {101965#(not (= main_~p7~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,044 INFO L290 TraceCheckUtils]: 17: Hoare triple {101965#(not (= main_~p7~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,044 INFO L290 TraceCheckUtils]: 18: Hoare triple {101965#(not (= main_~p7~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,045 INFO L290 TraceCheckUtils]: 19: Hoare triple {101965#(not (= main_~p7~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,045 INFO L290 TraceCheckUtils]: 20: Hoare triple {101965#(not (= main_~p7~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,045 INFO L290 TraceCheckUtils]: 21: Hoare triple {101965#(not (= main_~p7~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,045 INFO L290 TraceCheckUtils]: 22: Hoare triple {101965#(not (= main_~p7~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,046 INFO L290 TraceCheckUtils]: 23: Hoare triple {101965#(not (= main_~p7~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,046 INFO L290 TraceCheckUtils]: 24: Hoare triple {101965#(not (= main_~p7~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,046 INFO L290 TraceCheckUtils]: 25: Hoare triple {101965#(not (= main_~p7~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,047 INFO L290 TraceCheckUtils]: 26: Hoare triple {101965#(not (= main_~p7~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,047 INFO L290 TraceCheckUtils]: 27: Hoare triple {101965#(not (= main_~p7~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {101965#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:05,047 INFO L290 TraceCheckUtils]: 28: Hoare triple {101965#(not (= main_~p7~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-27 20:30:05,047 INFO L290 TraceCheckUtils]: 29: Hoare triple {101961#false} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-27 20:30:05,047 INFO L290 TraceCheckUtils]: 30: Hoare triple {101961#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-27 20:30:05,048 INFO L290 TraceCheckUtils]: 31: Hoare triple {101961#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {101961#false} is VALID [2022-04-27 20:30:05,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:05,048 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:05,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [841130255] [2022-04-27 20:30:05,048 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [841130255] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:05,048 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:05,048 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:05,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478399661] [2022-04-27 20:30:05,048 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:05,049 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:05,049 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:05,049 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:05,071 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:05,072 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:05,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:05,073 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:05,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:05,073 INFO L87 Difference]: Start difference. First operand 5257 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:05,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:05,973 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-27 20:30:05,973 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:05,973 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:05,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:05,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:05,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-27 20:30:05,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:05,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 164 transitions. [2022-04-27 20:30:05,975 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 164 transitions. [2022-04-27 20:30:06,083 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 164 edges. 164 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:06,869 INFO L225 Difference]: With dead ends: 5323 [2022-04-27 20:30:06,869 INFO L226 Difference]: Without dead ends: 5323 [2022-04-27 20:30:06,870 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:06,870 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 177 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:06,870 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [177 Valid, 135 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:06,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5323 states. [2022-04-27 20:30:06,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5323 to 5321. [2022-04-27 20:30:06,924 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:06,931 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:06,935 INFO L74 IsIncluded]: Start isIncluded. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:06,941 INFO L87 Difference]: Start difference. First operand 5323 states. Second operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:07,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:07,678 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-27 20:30:07,678 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-27 20:30:07,681 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:07,681 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:07,686 INFO L74 IsIncluded]: Start isIncluded. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-27 20:30:07,688 INFO L87 Difference]: Start difference. First operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5323 states. [2022-04-27 20:30:08,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:08,387 INFO L93 Difference]: Finished difference Result 5323 states and 8136 transitions. [2022-04-27 20:30:08,387 INFO L276 IsEmpty]: Start isEmpty. Operand 5323 states and 8136 transitions. [2022-04-27 20:30:08,390 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:08,390 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:08,390 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:08,390 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:08,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5321 states, 5317 states have (on average 1.529433891292082) internal successors, (8132), 5317 states have internal predecessors, (8132), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:09,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5321 states to 5321 states and 8135 transitions. [2022-04-27 20:30:09,216 INFO L78 Accepts]: Start accepts. Automaton has 5321 states and 8135 transitions. Word has length 32 [2022-04-27 20:30:09,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:09,216 INFO L495 AbstractCegarLoop]: Abstraction has 5321 states and 8135 transitions. [2022-04-27 20:30:09,217 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:09,217 INFO L276 IsEmpty]: Start isEmpty. Operand 5321 states and 8135 transitions. [2022-04-27 20:30:09,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:09,218 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:09,218 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:09,219 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-27 20:30:09,219 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:09,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:09,219 INFO L85 PathProgramCache]: Analyzing trace with hash -691144599, now seen corresponding path program 1 times [2022-04-27 20:30:09,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:09,219 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967053049] [2022-04-27 20:30:09,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:09,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:09,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:09,254 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:09,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:09,260 INFO L290 TraceCheckUtils]: 0: Hoare triple {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {123262#true} is VALID [2022-04-27 20:30:09,261 INFO L290 TraceCheckUtils]: 1: Hoare triple {123262#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,261 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {123262#true} {123262#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,261 INFO L272 TraceCheckUtils]: 0: Hoare triple {123262#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:09,261 INFO L290 TraceCheckUtils]: 1: Hoare triple {123268#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {123262#true} is VALID [2022-04-27 20:30:09,261 INFO L290 TraceCheckUtils]: 2: Hoare triple {123262#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,261 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {123262#true} {123262#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,262 INFO L272 TraceCheckUtils]: 4: Hoare triple {123262#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,262 INFO L290 TraceCheckUtils]: 5: Hoare triple {123262#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {123262#true} is VALID [2022-04-27 20:30:09,262 INFO L290 TraceCheckUtils]: 6: Hoare triple {123262#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {123262#true} is VALID [2022-04-27 20:30:09,262 INFO L290 TraceCheckUtils]: 7: Hoare triple {123262#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 8: Hoare triple {123262#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 9: Hoare triple {123262#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 10: Hoare triple {123262#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 11: Hoare triple {123262#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 12: Hoare triple {123262#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 13: Hoare triple {123262#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,265 INFO L290 TraceCheckUtils]: 14: Hoare triple {123262#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {123262#true} is VALID [2022-04-27 20:30:09,266 INFO L290 TraceCheckUtils]: 15: Hoare triple {123262#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,266 INFO L290 TraceCheckUtils]: 16: Hoare triple {123267#(= main_~lk8~0 1)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,266 INFO L290 TraceCheckUtils]: 17: Hoare triple {123267#(= main_~lk8~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,267 INFO L290 TraceCheckUtils]: 18: Hoare triple {123267#(= main_~lk8~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,267 INFO L290 TraceCheckUtils]: 19: Hoare triple {123267#(= main_~lk8~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,267 INFO L290 TraceCheckUtils]: 20: Hoare triple {123267#(= main_~lk8~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,268 INFO L290 TraceCheckUtils]: 21: Hoare triple {123267#(= main_~lk8~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,268 INFO L290 TraceCheckUtils]: 22: Hoare triple {123267#(= main_~lk8~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,268 INFO L290 TraceCheckUtils]: 23: Hoare triple {123267#(= main_~lk8~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,268 INFO L290 TraceCheckUtils]: 24: Hoare triple {123267#(= main_~lk8~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,269 INFO L290 TraceCheckUtils]: 25: Hoare triple {123267#(= main_~lk8~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,269 INFO L290 TraceCheckUtils]: 26: Hoare triple {123267#(= main_~lk8~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,269 INFO L290 TraceCheckUtils]: 27: Hoare triple {123267#(= main_~lk8~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,270 INFO L290 TraceCheckUtils]: 28: Hoare triple {123267#(= main_~lk8~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,270 INFO L290 TraceCheckUtils]: 29: Hoare triple {123267#(= main_~lk8~0 1)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {123267#(= main_~lk8~0 1)} is VALID [2022-04-27 20:30:09,270 INFO L290 TraceCheckUtils]: 30: Hoare triple {123267#(= main_~lk8~0 1)} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {123263#false} is VALID [2022-04-27 20:30:09,270 INFO L290 TraceCheckUtils]: 31: Hoare triple {123263#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {123263#false} is VALID [2022-04-27 20:30:09,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:09,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:09,271 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [967053049] [2022-04-27 20:30:09,271 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [967053049] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:09,271 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:09,271 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:09,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180802713] [2022-04-27 20:30:09,271 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:09,272 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:09,272 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:09,272 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:09,294 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:09,294 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:09,294 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:09,295 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:09,295 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:09,295 INFO L87 Difference]: Start difference. First operand 5321 states and 8135 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:11,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:11,887 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-27 20:30:11,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:11,887 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:11,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:11,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:11,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-27 20:30:11,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:11,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 150 transitions. [2022-04-27 20:30:11,890 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 150 transitions. [2022-04-27 20:30:12,036 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 150 edges. 150 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:14,382 INFO L225 Difference]: With dead ends: 9483 [2022-04-27 20:30:14,382 INFO L226 Difference]: Without dead ends: 9483 [2022-04-27 20:30:14,382 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:14,383 INFO L413 NwaCegarLoop]: 88 mSDtfsCounter, 187 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 83 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 85 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 83 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:14,384 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 95 Invalid, 85 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 83 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:14,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9483 states. [2022-04-27 20:30:14,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9483 to 7689. [2022-04-27 20:30:14,462 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:14,476 INFO L82 GeneralOperation]: Start isEquivalent. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:14,487 INFO L74 IsIncluded]: Start isIncluded. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:14,497 INFO L87 Difference]: Start difference. First operand 9483 states. Second operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:16,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:16,811 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-27 20:30:16,811 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-27 20:30:16,817 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:16,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:16,824 INFO L74 IsIncluded]: Start isIncluded. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-27 20:30:16,828 INFO L87 Difference]: Start difference. First operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 9483 states. [2022-04-27 20:30:19,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:19,180 INFO L93 Difference]: Finished difference Result 9483 states and 14728 transitions. [2022-04-27 20:30:19,181 INFO L276 IsEmpty]: Start isEmpty. Operand 9483 states and 14728 transitions. [2022-04-27 20:30:19,187 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:19,187 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:19,187 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:19,187 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:19,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7689 states, 7685 states have (on average 1.4828887443070917) internal successors, (11396), 7685 states have internal predecessors, (11396), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:20,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7689 states to 7689 states and 11399 transitions. [2022-04-27 20:30:20,649 INFO L78 Accepts]: Start accepts. Automaton has 7689 states and 11399 transitions. Word has length 32 [2022-04-27 20:30:20,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:20,649 INFO L495 AbstractCegarLoop]: Abstraction has 7689 states and 11399 transitions. [2022-04-27 20:30:20,649 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:20,649 INFO L276 IsEmpty]: Start isEmpty. Operand 7689 states and 11399 transitions. [2022-04-27 20:30:20,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:20,655 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:20,655 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:20,656 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-27 20:30:20,656 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:20,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:20,656 INFO L85 PathProgramCache]: Analyzing trace with hash 662165098, now seen corresponding path program 1 times [2022-04-27 20:30:20,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:20,657 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046035214] [2022-04-27 20:30:20,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:20,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:20,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:20,690 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:20,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:20,696 INFO L290 TraceCheckUtils]: 0: Hoare triple {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159412#true} is VALID [2022-04-27 20:30:20,696 INFO L290 TraceCheckUtils]: 1: Hoare triple {159412#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,696 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {159412#true} {159412#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,697 INFO L272 TraceCheckUtils]: 0: Hoare triple {159412#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:20,697 INFO L290 TraceCheckUtils]: 1: Hoare triple {159418#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {159412#true} is VALID [2022-04-27 20:30:20,697 INFO L290 TraceCheckUtils]: 2: Hoare triple {159412#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,697 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {159412#true} {159412#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,697 INFO L272 TraceCheckUtils]: 4: Hoare triple {159412#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 5: Hoare triple {159412#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 6: Hoare triple {159412#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 7: Hoare triple {159412#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 8: Hoare triple {159412#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 9: Hoare triple {159412#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 10: Hoare triple {159412#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 11: Hoare triple {159412#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 12: Hoare triple {159412#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 13: Hoare triple {159412#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,698 INFO L290 TraceCheckUtils]: 14: Hoare triple {159412#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {159412#true} is VALID [2022-04-27 20:30:20,699 INFO L290 TraceCheckUtils]: 15: Hoare triple {159412#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,699 INFO L290 TraceCheckUtils]: 16: Hoare triple {159417#(= main_~p8~0 0)} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,699 INFO L290 TraceCheckUtils]: 17: Hoare triple {159417#(= main_~p8~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,699 INFO L290 TraceCheckUtils]: 18: Hoare triple {159417#(= main_~p8~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,700 INFO L290 TraceCheckUtils]: 19: Hoare triple {159417#(= main_~p8~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,700 INFO L290 TraceCheckUtils]: 20: Hoare triple {159417#(= main_~p8~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,700 INFO L290 TraceCheckUtils]: 21: Hoare triple {159417#(= main_~p8~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,701 INFO L290 TraceCheckUtils]: 22: Hoare triple {159417#(= main_~p8~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,701 INFO L290 TraceCheckUtils]: 23: Hoare triple {159417#(= main_~p8~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,701 INFO L290 TraceCheckUtils]: 24: Hoare triple {159417#(= main_~p8~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,703 INFO L290 TraceCheckUtils]: 25: Hoare triple {159417#(= main_~p8~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,716 INFO L290 TraceCheckUtils]: 26: Hoare triple {159417#(= main_~p8~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,717 INFO L290 TraceCheckUtils]: 27: Hoare triple {159417#(= main_~p8~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,717 INFO L290 TraceCheckUtils]: 28: Hoare triple {159417#(= main_~p8~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {159417#(= main_~p8~0 0)} is VALID [2022-04-27 20:30:20,717 INFO L290 TraceCheckUtils]: 29: Hoare triple {159417#(= main_~p8~0 0)} [342] L176-1-->L182: Formula: (not (= v_main_~p8~0_2 0)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-27 20:30:20,717 INFO L290 TraceCheckUtils]: 30: Hoare triple {159413#false} [344] L182-->L212-1: Formula: (not (= v_main_~lk8~0_3 1)) InVars {main_~lk8~0=v_main_~lk8~0_3} OutVars{main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-27 20:30:20,717 INFO L290 TraceCheckUtils]: 31: Hoare triple {159413#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {159413#false} is VALID [2022-04-27 20:30:20,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:20,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:20,718 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046035214] [2022-04-27 20:30:20,718 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1046035214] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:20,718 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:20,718 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:20,718 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [296979625] [2022-04-27 20:30:20,718 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:20,719 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:20,719 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:20,719 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:20,740 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:20,741 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:20,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:20,741 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:20,741 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:20,741 INFO L87 Difference]: Start difference. First operand 7689 states and 11399 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:23,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:23,592 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-27 20:30:23,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:23,593 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:23,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:23,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:23,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-27 20:30:23,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:23,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 163 transitions. [2022-04-27 20:30:23,595 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 163 transitions. [2022-04-27 20:30:23,733 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:26,780 INFO L225 Difference]: With dead ends: 10379 [2022-04-27 20:30:26,780 INFO L226 Difference]: Without dead ends: 10379 [2022-04-27 20:30:26,780 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:26,781 INFO L413 NwaCegarLoop]: 134 mSDtfsCounter, 166 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 166 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:26,781 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [166 Valid, 141 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:26,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10379 states. [2022-04-27 20:30:26,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10379 to 10377. [2022-04-27 20:30:26,873 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:26,888 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:26,903 INFO L74 IsIncluded]: Start isIncluded. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:26,918 INFO L87 Difference]: Start difference. First operand 10379 states. Second operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:29,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:29,476 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-27 20:30:29,476 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-27 20:30:29,485 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:29,485 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:29,496 INFO L74 IsIncluded]: Start isIncluded. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-27 20:30:29,504 INFO L87 Difference]: Start difference. First operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10379 states. [2022-04-27 20:30:32,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:32,148 INFO L93 Difference]: Finished difference Result 10379 states and 15368 transitions. [2022-04-27 20:30:32,148 INFO L276 IsEmpty]: Start isEmpty. Operand 10379 states and 15368 transitions. [2022-04-27 20:30:32,156 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:32,156 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:32,156 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:32,157 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:32,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10377 states, 10373 states have (on average 1.4811529933481153) internal successors, (15364), 10373 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10377 states to 10377 states and 15367 transitions. [2022-04-27 20:30:35,094 INFO L78 Accepts]: Start accepts. Automaton has 10377 states and 15367 transitions. Word has length 32 [2022-04-27 20:30:35,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:35,094 INFO L495 AbstractCegarLoop]: Abstraction has 10377 states and 15367 transitions. [2022-04-27 20:30:35,095 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,095 INFO L276 IsEmpty]: Start isEmpty. Operand 10377 states and 15367 transitions. [2022-04-27 20:30:35,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:30:35,098 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:35,098 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:35,098 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-27 20:30:35,098 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:35,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:35,099 INFO L85 PathProgramCache]: Analyzing trace with hash 49386872, now seen corresponding path program 1 times [2022-04-27 20:30:35,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:35,099 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86092646] [2022-04-27 20:30:35,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:35,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:35,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:35,131 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:35,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:35,136 INFO L290 TraceCheckUtils]: 0: Hoare triple {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {200938#true} is VALID [2022-04-27 20:30:35,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {200938#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,137 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {200938#true} {200938#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,137 INFO L272 TraceCheckUtils]: 0: Hoare triple {200938#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:35,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {200944#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {200938#true} is VALID [2022-04-27 20:30:35,137 INFO L290 TraceCheckUtils]: 2: Hoare triple {200938#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,137 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {200938#true} {200938#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L272 TraceCheckUtils]: 4: Hoare triple {200938#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {200938#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 6: Hoare triple {200938#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 7: Hoare triple {200938#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 8: Hoare triple {200938#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 9: Hoare triple {200938#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 10: Hoare triple {200938#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 11: Hoare triple {200938#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,138 INFO L290 TraceCheckUtils]: 12: Hoare triple {200938#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,139 INFO L290 TraceCheckUtils]: 13: Hoare triple {200938#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,139 INFO L290 TraceCheckUtils]: 14: Hoare triple {200938#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {200938#true} is VALID [2022-04-27 20:30:35,139 INFO L290 TraceCheckUtils]: 15: Hoare triple {200938#true} [298] L112-1-->L116-1: Formula: (and (= v_main_~lk8~0_6 1) (not (= v_main_~p8~0_4 0))) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4, main_~lk8~0=v_main_~lk8~0_6} AuxVars[] AssignedVars[main_~lk8~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,139 INFO L290 TraceCheckUtils]: 16: Hoare triple {200943#(not (= main_~p8~0 0))} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,139 INFO L290 TraceCheckUtils]: 17: Hoare triple {200943#(not (= main_~p8~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,140 INFO L290 TraceCheckUtils]: 18: Hoare triple {200943#(not (= main_~p8~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,140 INFO L290 TraceCheckUtils]: 19: Hoare triple {200943#(not (= main_~p8~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,140 INFO L290 TraceCheckUtils]: 20: Hoare triple {200943#(not (= main_~p8~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,141 INFO L290 TraceCheckUtils]: 21: Hoare triple {200943#(not (= main_~p8~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,141 INFO L290 TraceCheckUtils]: 22: Hoare triple {200943#(not (= main_~p8~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,141 INFO L290 TraceCheckUtils]: 23: Hoare triple {200943#(not (= main_~p8~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,141 INFO L290 TraceCheckUtils]: 24: Hoare triple {200943#(not (= main_~p8~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,142 INFO L290 TraceCheckUtils]: 25: Hoare triple {200943#(not (= main_~p8~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,142 INFO L290 TraceCheckUtils]: 26: Hoare triple {200943#(not (= main_~p8~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,142 INFO L290 TraceCheckUtils]: 27: Hoare triple {200943#(not (= main_~p8~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,142 INFO L290 TraceCheckUtils]: 28: Hoare triple {200943#(not (= main_~p8~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {200943#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:30:35,143 INFO L290 TraceCheckUtils]: 29: Hoare triple {200943#(not (= main_~p8~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-27 20:30:35,143 INFO L290 TraceCheckUtils]: 30: Hoare triple {200939#false} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-27 20:30:35,143 INFO L290 TraceCheckUtils]: 31: Hoare triple {200939#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-27 20:30:35,143 INFO L290 TraceCheckUtils]: 32: Hoare triple {200939#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {200939#false} is VALID [2022-04-27 20:30:35,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:35,143 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:35,143 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [86092646] [2022-04-27 20:30:35,144 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [86092646] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:35,144 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:35,144 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:35,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266096167] [2022-04-27 20:30:35,144 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:35,144 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:30:35,144 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:35,144 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,165 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:35,165 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:35,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:35,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:35,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:35,165 INFO L87 Difference]: Start difference. First operand 10377 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:37,968 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-27 20:30:37,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:37,968 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:30:37,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:37,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:30:37,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:30:37,970 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-27 20:30:38,076 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:41,068 INFO L225 Difference]: With dead ends: 10507 [2022-04-27 20:30:41,068 INFO L226 Difference]: Without dead ends: 10507 [2022-04-27 20:30:41,068 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:41,069 INFO L413 NwaCegarLoop]: 125 mSDtfsCounter, 176 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 176 SdHoareTripleChecker+Valid, 132 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:41,069 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [176 Valid, 132 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:41,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10507 states. [2022-04-27 20:30:41,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10507 to 10505. [2022-04-27 20:30:41,171 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:41,186 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,200 INFO L74 IsIncluded]: Start isIncluded. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,214 INFO L87 Difference]: Start difference. First operand 10507 states. Second operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:43,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:43,772 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-27 20:30:43,772 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-27 20:30:43,778 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:43,779 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:43,787 INFO L74 IsIncluded]: Start isIncluded. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-27 20:30:43,794 INFO L87 Difference]: Start difference. First operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10507 states. [2022-04-27 20:30:46,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:46,644 INFO L93 Difference]: Finished difference Result 10507 states and 15368 transitions. [2022-04-27 20:30:46,644 INFO L276 IsEmpty]: Start isEmpty. Operand 10507 states and 15368 transitions. [2022-04-27 20:30:46,653 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:46,654 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:46,654 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:46,654 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:46,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10505 states, 10501 states have (on average 1.4630987524997618) internal successors, (15364), 10501 states have internal predecessors, (15364), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10505 states to 10505 states and 15367 transitions. [2022-04-27 20:30:49,552 INFO L78 Accepts]: Start accepts. Automaton has 10505 states and 15367 transitions. Word has length 33 [2022-04-27 20:30:49,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:49,552 INFO L495 AbstractCegarLoop]: Abstraction has 10505 states and 15367 transitions. [2022-04-27 20:30:49,553 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,553 INFO L276 IsEmpty]: Start isEmpty. Operand 10505 states and 15367 transitions. [2022-04-27 20:30:49,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:30:49,556 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:49,556 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:49,556 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-27 20:30:49,556 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:49,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:49,556 INFO L85 PathProgramCache]: Analyzing trace with hash -947685481, now seen corresponding path program 1 times [2022-04-27 20:30:49,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:49,556 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935463740] [2022-04-27 20:30:49,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:49,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:49,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:49,582 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:49,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:49,592 INFO L290 TraceCheckUtils]: 0: Hoare triple {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {242976#true} is VALID [2022-04-27 20:30:49,592 INFO L290 TraceCheckUtils]: 1: Hoare triple {242976#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,592 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {242976#true} {242976#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,593 INFO L272 TraceCheckUtils]: 0: Hoare triple {242976#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:49,593 INFO L290 TraceCheckUtils]: 1: Hoare triple {242982#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {242976#true} is VALID [2022-04-27 20:30:49,593 INFO L290 TraceCheckUtils]: 2: Hoare triple {242976#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,593 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {242976#true} {242976#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,593 INFO L272 TraceCheckUtils]: 4: Hoare triple {242976#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,593 INFO L290 TraceCheckUtils]: 5: Hoare triple {242976#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 6: Hoare triple {242976#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 7: Hoare triple {242976#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 8: Hoare triple {242976#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 9: Hoare triple {242976#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 10: Hoare triple {242976#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 11: Hoare triple {242976#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 12: Hoare triple {242976#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 13: Hoare triple {242976#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 14: Hoare triple {242976#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,594 INFO L290 TraceCheckUtils]: 15: Hoare triple {242976#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {242976#true} is VALID [2022-04-27 20:30:49,595 INFO L290 TraceCheckUtils]: 16: Hoare triple {242976#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,595 INFO L290 TraceCheckUtils]: 17: Hoare triple {242981#(= main_~lk9~0 1)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,595 INFO L290 TraceCheckUtils]: 18: Hoare triple {242981#(= main_~lk9~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,596 INFO L290 TraceCheckUtils]: 19: Hoare triple {242981#(= main_~lk9~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,596 INFO L290 TraceCheckUtils]: 20: Hoare triple {242981#(= main_~lk9~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,596 INFO L290 TraceCheckUtils]: 21: Hoare triple {242981#(= main_~lk9~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,596 INFO L290 TraceCheckUtils]: 22: Hoare triple {242981#(= main_~lk9~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,597 INFO L290 TraceCheckUtils]: 23: Hoare triple {242981#(= main_~lk9~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,597 INFO L290 TraceCheckUtils]: 24: Hoare triple {242981#(= main_~lk9~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,597 INFO L290 TraceCheckUtils]: 25: Hoare triple {242981#(= main_~lk9~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,598 INFO L290 TraceCheckUtils]: 26: Hoare triple {242981#(= main_~lk9~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,598 INFO L290 TraceCheckUtils]: 27: Hoare triple {242981#(= main_~lk9~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,598 INFO L290 TraceCheckUtils]: 28: Hoare triple {242981#(= main_~lk9~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,599 INFO L290 TraceCheckUtils]: 29: Hoare triple {242981#(= main_~lk9~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,599 INFO L290 TraceCheckUtils]: 30: Hoare triple {242981#(= main_~lk9~0 1)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {242981#(= main_~lk9~0 1)} is VALID [2022-04-27 20:30:49,599 INFO L290 TraceCheckUtils]: 31: Hoare triple {242981#(= main_~lk9~0 1)} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {242977#false} is VALID [2022-04-27 20:30:49,599 INFO L290 TraceCheckUtils]: 32: Hoare triple {242977#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {242977#false} is VALID [2022-04-27 20:30:49,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:49,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:49,600 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935463740] [2022-04-27 20:30:49,600 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1935463740] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:49,600 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:49,600 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:49,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653940491] [2022-04-27 20:30:49,600 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:49,600 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:30:49,601 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:49,601 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,621 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:49,622 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:49,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:49,622 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:49,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:49,622 INFO L87 Difference]: Start difference. First operand 10505 states and 15367 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:57,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:57,920 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-27 20:30:57,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:57,920 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:30:57,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:57,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:57,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-27 20:30:57,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:57,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 146 transitions. [2022-04-27 20:30:57,922 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 146 transitions. [2022-04-27 20:30:58,018 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 146 edges. 146 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:07,234 INFO L225 Difference]: With dead ends: 18443 [2022-04-27 20:31:07,234 INFO L226 Difference]: Without dead ends: 18443 [2022-04-27 20:31:07,234 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:31:07,234 INFO L413 NwaCegarLoop]: 87 mSDtfsCounter, 180 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:31:07,235 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [180 Valid, 94 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:31:07,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18443 states. [2022-04-27 20:31:07,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18443 to 15369. [2022-04-27 20:31:07,398 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:31:07,413 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:07,426 INFO L74 IsIncluded]: Start isIncluded. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:07,439 INFO L87 Difference]: Start difference. First operand 18443 states. Second operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:15,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:15,946 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-27 20:31:15,946 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-27 20:31:15,958 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:15,959 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:15,975 INFO L74 IsIncluded]: Start isIncluded. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-27 20:31:15,991 INFO L87 Difference]: Start difference. First operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18443 states. [2022-04-27 20:31:24,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:24,372 INFO L93 Difference]: Finished difference Result 18443 states and 27400 transitions. [2022-04-27 20:31:24,372 INFO L276 IsEmpty]: Start isEmpty. Operand 18443 states and 27400 transitions. [2022-04-27 20:31:24,388 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:24,389 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:24,389 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:24,389 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:24,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15369 states, 15365 states have (on average 1.4164659941425317) internal successors, (21764), 15365 states have internal predecessors, (21764), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:30,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15369 states to 15369 states and 21767 transitions. [2022-04-27 20:31:30,129 INFO L78 Accepts]: Start accepts. Automaton has 15369 states and 21767 transitions. Word has length 33 [2022-04-27 20:31:30,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:30,129 INFO L495 AbstractCegarLoop]: Abstraction has 15369 states and 21767 transitions. [2022-04-27 20:31:30,129 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:30,130 INFO L276 IsEmpty]: Start isEmpty. Operand 15369 states and 21767 transitions. [2022-04-27 20:31:30,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:31:30,135 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:30,135 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:30,135 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-27 20:31:30,135 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:30,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:30,136 INFO L85 PathProgramCache]: Analyzing trace with hash 405624216, now seen corresponding path program 1 times [2022-04-27 20:31:30,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:30,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030083380] [2022-04-27 20:31:30,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:30,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:30,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:30,171 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:30,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:30,178 INFO L290 TraceCheckUtils]: 0: Hoare triple {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {313686#true} is VALID [2022-04-27 20:31:30,178 INFO L290 TraceCheckUtils]: 1: Hoare triple {313686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,179 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {313686#true} {313686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,179 INFO L272 TraceCheckUtils]: 0: Hoare triple {313686#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:30,179 INFO L290 TraceCheckUtils]: 1: Hoare triple {313692#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {313686#true} is VALID [2022-04-27 20:31:30,179 INFO L290 TraceCheckUtils]: 2: Hoare triple {313686#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,179 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {313686#true} {313686#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,179 INFO L272 TraceCheckUtils]: 4: Hoare triple {313686#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 5: Hoare triple {313686#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 6: Hoare triple {313686#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 7: Hoare triple {313686#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 8: Hoare triple {313686#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 9: Hoare triple {313686#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 10: Hoare triple {313686#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 11: Hoare triple {313686#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 12: Hoare triple {313686#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,180 INFO L290 TraceCheckUtils]: 13: Hoare triple {313686#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,181 INFO L290 TraceCheckUtils]: 14: Hoare triple {313686#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,181 INFO L290 TraceCheckUtils]: 15: Hoare triple {313686#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {313686#true} is VALID [2022-04-27 20:31:30,182 INFO L290 TraceCheckUtils]: 16: Hoare triple {313686#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,182 INFO L290 TraceCheckUtils]: 17: Hoare triple {313691#(= main_~p9~0 0)} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,183 INFO L290 TraceCheckUtils]: 18: Hoare triple {313691#(= main_~p9~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,183 INFO L290 TraceCheckUtils]: 19: Hoare triple {313691#(= main_~p9~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,183 INFO L290 TraceCheckUtils]: 20: Hoare triple {313691#(= main_~p9~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,185 INFO L290 TraceCheckUtils]: 21: Hoare triple {313691#(= main_~p9~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,185 INFO L290 TraceCheckUtils]: 22: Hoare triple {313691#(= main_~p9~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,185 INFO L290 TraceCheckUtils]: 23: Hoare triple {313691#(= main_~p9~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,186 INFO L290 TraceCheckUtils]: 24: Hoare triple {313691#(= main_~p9~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,186 INFO L290 TraceCheckUtils]: 25: Hoare triple {313691#(= main_~p9~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,186 INFO L290 TraceCheckUtils]: 26: Hoare triple {313691#(= main_~p9~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,186 INFO L290 TraceCheckUtils]: 27: Hoare triple {313691#(= main_~p9~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,187 INFO L290 TraceCheckUtils]: 28: Hoare triple {313691#(= main_~p9~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,187 INFO L290 TraceCheckUtils]: 29: Hoare triple {313691#(= main_~p9~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {313691#(= main_~p9~0 0)} is VALID [2022-04-27 20:31:30,187 INFO L290 TraceCheckUtils]: 30: Hoare triple {313691#(= main_~p9~0 0)} [346] L181-1-->L187: Formula: (not (= v_main_~p9~0_2 0)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-27 20:31:30,187 INFO L290 TraceCheckUtils]: 31: Hoare triple {313687#false} [348] L187-->L212-1: Formula: (not (= v_main_~lk9~0_3 1)) InVars {main_~lk9~0=v_main_~lk9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_3} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-27 20:31:30,187 INFO L290 TraceCheckUtils]: 32: Hoare triple {313687#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {313687#false} is VALID [2022-04-27 20:31:30,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:30,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:30,188 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030083380] [2022-04-27 20:31:30,188 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030083380] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:30,188 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:30,188 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:30,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1405556290] [2022-04-27 20:31:30,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:30,188 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:30,188 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:30,188 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:30,207 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:30,207 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:30,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:30,207 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:30,207 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:30,207 INFO L87 Difference]: Start difference. First operand 15369 states and 21767 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:40,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:40,672 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-27 20:31:40,672 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:31:40,672 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:40,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:31:40,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:40,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 161 transitions. [2022-04-27 20:31:40,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:40,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 161 transitions. [2022-04-27 20:31:40,674 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 161 transitions. [2022-04-27 20:31:40,810 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:52,091 INFO L225 Difference]: With dead ends: 20491 [2022-04-27 20:31:52,091 INFO L226 Difference]: Without dead ends: 20491 [2022-04-27 20:31:52,091 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:31:52,092 INFO L413 NwaCegarLoop]: 136 mSDtfsCounter, 160 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:31:52,092 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [160 Valid, 143 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:31:52,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20491 states. [2022-04-27 20:31:52,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20491 to 20489. [2022-04-27 20:31:52,266 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:31:52,288 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:52,310 INFO L74 IsIncluded]: Start isIncluded. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:52,332 INFO L87 Difference]: Start difference. First operand 20491 states. Second operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:01,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:01,899 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-27 20:32:01,899 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-27 20:32:01,911 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:01,911 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:01,927 INFO L74 IsIncluded]: Start isIncluded. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-27 20:32:01,944 INFO L87 Difference]: Start difference. First operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20491 states. [2022-04-27 20:32:11,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:11,864 INFO L93 Difference]: Finished difference Result 20491 states and 28936 transitions. [2022-04-27 20:32:11,864 INFO L276 IsEmpty]: Start isEmpty. Operand 20491 states and 28936 transitions. [2022-04-27 20:32:11,878 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:11,878 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:11,878 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:32:11,878 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:32:11,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20489 states, 20485 states have (on average 1.4123505003661216) internal successors, (28932), 20485 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:22,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20489 states to 20489 states and 28935 transitions. [2022-04-27 20:32:22,549 INFO L78 Accepts]: Start accepts. Automaton has 20489 states and 28935 transitions. Word has length 33 [2022-04-27 20:32:22,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:32:22,549 INFO L495 AbstractCegarLoop]: Abstraction has 20489 states and 28935 transitions. [2022-04-27 20:32:22,550 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:22,550 INFO L276 IsEmpty]: Start isEmpty. Operand 20489 states and 28935 transitions. [2022-04-27 20:32:22,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:32:22,556 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:32:22,556 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:32:22,556 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-27 20:32:22,557 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:32:22,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:32:22,557 INFO L85 PathProgramCache]: Analyzing trace with hash 686554246, now seen corresponding path program 1 times [2022-04-27 20:32:22,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:32:22,557 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044455336] [2022-04-27 20:32:22,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:32:22,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:32:22,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:32:22,611 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:32:22,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:32:22,614 INFO L290 TraceCheckUtils]: 0: Hoare triple {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {395660#true} is VALID [2022-04-27 20:32:22,614 INFO L290 TraceCheckUtils]: 1: Hoare triple {395660#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,615 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {395660#true} {395660#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,615 INFO L272 TraceCheckUtils]: 0: Hoare triple {395660#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:32:22,615 INFO L290 TraceCheckUtils]: 1: Hoare triple {395666#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {395660#true} is VALID [2022-04-27 20:32:22,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {395660#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {395660#true} {395660#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,615 INFO L272 TraceCheckUtils]: 4: Hoare triple {395660#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 5: Hoare triple {395660#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 6: Hoare triple {395660#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 7: Hoare triple {395660#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 8: Hoare triple {395660#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 9: Hoare triple {395660#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 10: Hoare triple {395660#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 11: Hoare triple {395660#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 12: Hoare triple {395660#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 13: Hoare triple {395660#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,616 INFO L290 TraceCheckUtils]: 14: Hoare triple {395660#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {395660#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {395660#true} is VALID [2022-04-27 20:32:22,617 INFO L290 TraceCheckUtils]: 16: Hoare triple {395660#true} [300] L116-1-->L120-1: Formula: (and (not (= v_main_~p9~0_3 0)) (= v_main_~lk9~0_4 1)) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~lk9~0=v_main_~lk9~0_4, main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[main_~lk9~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,617 INFO L290 TraceCheckUtils]: 17: Hoare triple {395665#(not (= main_~p9~0 0))} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,617 INFO L290 TraceCheckUtils]: 18: Hoare triple {395665#(not (= main_~p9~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,618 INFO L290 TraceCheckUtils]: 19: Hoare triple {395665#(not (= main_~p9~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,618 INFO L290 TraceCheckUtils]: 20: Hoare triple {395665#(not (= main_~p9~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,618 INFO L290 TraceCheckUtils]: 21: Hoare triple {395665#(not (= main_~p9~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,619 INFO L290 TraceCheckUtils]: 22: Hoare triple {395665#(not (= main_~p9~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,619 INFO L290 TraceCheckUtils]: 23: Hoare triple {395665#(not (= main_~p9~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,619 INFO L290 TraceCheckUtils]: 24: Hoare triple {395665#(not (= main_~p9~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,619 INFO L290 TraceCheckUtils]: 25: Hoare triple {395665#(not (= main_~p9~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,620 INFO L290 TraceCheckUtils]: 26: Hoare triple {395665#(not (= main_~p9~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,620 INFO L290 TraceCheckUtils]: 27: Hoare triple {395665#(not (= main_~p9~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,620 INFO L290 TraceCheckUtils]: 28: Hoare triple {395665#(not (= main_~p9~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,621 INFO L290 TraceCheckUtils]: 29: Hoare triple {395665#(not (= main_~p9~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {395665#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:32:22,621 INFO L290 TraceCheckUtils]: 30: Hoare triple {395665#(not (= main_~p9~0 0))} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-27 20:32:22,621 INFO L290 TraceCheckUtils]: 31: Hoare triple {395661#false} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-27 20:32:22,621 INFO L290 TraceCheckUtils]: 32: Hoare triple {395661#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-27 20:32:22,621 INFO L290 TraceCheckUtils]: 33: Hoare triple {395661#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {395661#false} is VALID [2022-04-27 20:32:22,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:32:22,622 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:32:22,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1044455336] [2022-04-27 20:32:22,622 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1044455336] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:32:22,622 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:32:22,622 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:32:22,622 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1189502214] [2022-04-27 20:32:22,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:32:22,622 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:32:22,623 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:32:22,623 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:22,642 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:32:22,642 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:32:22,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:32:22,642 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:32:22,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:32:22,642 INFO L87 Difference]: Start difference. First operand 20489 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:33,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:33,951 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-27 20:32:33,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:32:33,951 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:32:33,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:32:33,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:33,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 160 transitions. [2022-04-27 20:32:33,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:33,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 160 transitions. [2022-04-27 20:32:33,953 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 160 transitions. [2022-04-27 20:32:34,055 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 160 edges. 160 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:32:46,726 INFO L225 Difference]: With dead ends: 20747 [2022-04-27 20:32:46,727 INFO L226 Difference]: Without dead ends: 20747 [2022-04-27 20:32:46,727 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:32:46,727 INFO L413 NwaCegarLoop]: 122 mSDtfsCounter, 175 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:32:46,727 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 129 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:32:46,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20747 states. [2022-04-27 20:32:46,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20747 to 20745. [2022-04-27 20:32:46,896 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:32:46,925 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:46,953 INFO L74 IsIncluded]: Start isIncluded. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:46,975 INFO L87 Difference]: Start difference. First operand 20747 states. Second operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:57,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:57,782 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-27 20:32:57,782 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-27 20:32:57,795 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:57,795 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:57,813 INFO L74 IsIncluded]: Start isIncluded. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-27 20:32:57,832 INFO L87 Difference]: Start difference. First operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20747 states. [2022-04-27 20:33:08,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:33:08,876 INFO L93 Difference]: Finished difference Result 20747 states and 28936 transitions. [2022-04-27 20:33:08,876 INFO L276 IsEmpty]: Start isEmpty. Operand 20747 states and 28936 transitions. [2022-04-27 20:33:08,890 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:33:08,890 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:33:08,890 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:33:08,890 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:33:08,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20745 states, 20741 states have (on average 1.3949182778072418) internal successors, (28932), 20741 states have internal predecessors, (28932), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:20,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20745 states to 20745 states and 28935 transitions. [2022-04-27 20:33:20,186 INFO L78 Accepts]: Start accepts. Automaton has 20745 states and 28935 transitions. Word has length 34 [2022-04-27 20:33:20,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:33:20,186 INFO L495 AbstractCegarLoop]: Abstraction has 20745 states and 28935 transitions. [2022-04-27 20:33:20,187 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:20,187 INFO L276 IsEmpty]: Start isEmpty. Operand 20745 states and 28935 transitions. [2022-04-27 20:33:20,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:33:20,193 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:33:20,193 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:33:20,194 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-27 20:33:20,194 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:33:20,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:33:20,194 INFO L85 PathProgramCache]: Analyzing trace with hash -310518107, now seen corresponding path program 1 times [2022-04-27 20:33:20,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:33:20,194 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548179761] [2022-04-27 20:33:20,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:33:20,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:33:20,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:33:20,225 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:33:20,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:33:20,228 INFO L290 TraceCheckUtils]: 0: Hoare triple {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {478658#true} is VALID [2022-04-27 20:33:20,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {478658#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,228 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {478658#true} {478658#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L272 TraceCheckUtils]: 0: Hoare triple {478658#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:33:20,229 INFO L290 TraceCheckUtils]: 1: Hoare triple {478664#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {478658#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {478658#true} {478658#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {478658#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {478658#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {478658#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L290 TraceCheckUtils]: 7: Hoare triple {478658#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {478658#true} is VALID [2022-04-27 20:33:20,229 INFO L290 TraceCheckUtils]: 8: Hoare triple {478658#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 9: Hoare triple {478658#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 10: Hoare triple {478658#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 11: Hoare triple {478658#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 12: Hoare triple {478658#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 13: Hoare triple {478658#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 14: Hoare triple {478658#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 15: Hoare triple {478658#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 16: Hoare triple {478658#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {478658#true} is VALID [2022-04-27 20:33:20,230 INFO L290 TraceCheckUtils]: 17: Hoare triple {478658#true} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,231 INFO L290 TraceCheckUtils]: 18: Hoare triple {478663#(= main_~lk10~0 1)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,231 INFO L290 TraceCheckUtils]: 19: Hoare triple {478663#(= main_~lk10~0 1)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,231 INFO L290 TraceCheckUtils]: 20: Hoare triple {478663#(= main_~lk10~0 1)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,232 INFO L290 TraceCheckUtils]: 21: Hoare triple {478663#(= main_~lk10~0 1)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,232 INFO L290 TraceCheckUtils]: 22: Hoare triple {478663#(= main_~lk10~0 1)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,232 INFO L290 TraceCheckUtils]: 23: Hoare triple {478663#(= main_~lk10~0 1)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,232 INFO L290 TraceCheckUtils]: 24: Hoare triple {478663#(= main_~lk10~0 1)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,233 INFO L290 TraceCheckUtils]: 25: Hoare triple {478663#(= main_~lk10~0 1)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,233 INFO L290 TraceCheckUtils]: 26: Hoare triple {478663#(= main_~lk10~0 1)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,233 INFO L290 TraceCheckUtils]: 27: Hoare triple {478663#(= main_~lk10~0 1)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,233 INFO L290 TraceCheckUtils]: 28: Hoare triple {478663#(= main_~lk10~0 1)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,234 INFO L290 TraceCheckUtils]: 29: Hoare triple {478663#(= main_~lk10~0 1)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,234 INFO L290 TraceCheckUtils]: 30: Hoare triple {478663#(= main_~lk10~0 1)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,234 INFO L290 TraceCheckUtils]: 31: Hoare triple {478663#(= main_~lk10~0 1)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {478663#(= main_~lk10~0 1)} is VALID [2022-04-27 20:33:20,235 INFO L290 TraceCheckUtils]: 32: Hoare triple {478663#(= main_~lk10~0 1)} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {478659#false} is VALID [2022-04-27 20:33:20,235 INFO L290 TraceCheckUtils]: 33: Hoare triple {478659#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {478659#false} is VALID [2022-04-27 20:33:20,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:33:20,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:33:20,235 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548179761] [2022-04-27 20:33:20,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1548179761] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:33:20,235 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:33:20,235 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:33:20,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914408721] [2022-04-27 20:33:20,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:33:20,236 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:33:20,236 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:33:20,236 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:20,256 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:33:20,256 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:33:20,256 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:33:20,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:33:20,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:33:20,257 INFO L87 Difference]: Start difference. First operand 20745 states and 28935 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:14,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:34:14,129 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-27 20:34:14,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:34:14,129 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:34:14,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:34:14,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:14,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-27 20:34:14,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:14,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 142 transitions. [2022-04-27 20:34:14,131 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 142 transitions. [2022-04-27 20:34:14,223 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:34:58,775 INFO L225 Difference]: With dead ends: 35851 [2022-04-27 20:34:58,775 INFO L226 Difference]: Without dead ends: 35851 [2022-04-27 20:34:58,776 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:34:58,776 INFO L413 NwaCegarLoop]: 86 mSDtfsCounter, 173 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 81 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 173 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 81 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:34:58,776 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [173 Valid, 93 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 81 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:34:58,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35851 states. [2022-04-27 20:34:59,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35851 to 30729. [2022-04-27 20:34:59,040 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:34:59,072 INFO L82 GeneralOperation]: Start isEquivalent. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:59,100 INFO L74 IsIncluded]: Start isIncluded. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:59,128 INFO L87 Difference]: Start difference. First operand 35851 states. Second operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:35:33,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:35:33,188 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-27 20:35:33,189 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-27 20:35:33,210 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:35:33,210 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:35:33,232 INFO L74 IsIncluded]: Start isIncluded. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-27 20:35:33,255 INFO L87 Difference]: Start difference. First operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 35851 states. [2022-04-27 20:36:12,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:36:12,366 INFO L93 Difference]: Finished difference Result 35851 states and 50696 transitions. [2022-04-27 20:36:12,366 INFO L276 IsEmpty]: Start isEmpty. Operand 35851 states and 50696 transitions. [2022-04-27 20:36:12,449 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:36:12,449 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:36:12,449 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:36:12,450 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:36:12,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30729 states, 30725 states have (on average 1.3499104963384865) internal successors, (41476), 30725 states have internal predecessors, (41476), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:35,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30729 states to 30729 states and 41479 transitions. [2022-04-27 20:36:35,661 INFO L78 Accepts]: Start accepts. Automaton has 30729 states and 41479 transitions. Word has length 34 [2022-04-27 20:36:35,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:36:35,662 INFO L495 AbstractCegarLoop]: Abstraction has 30729 states and 41479 transitions. [2022-04-27 20:36:35,662 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:35,662 INFO L276 IsEmpty]: Start isEmpty. Operand 30729 states and 41479 transitions. [2022-04-27 20:36:35,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:36:35,674 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:36:35,674 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:36:35,675 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-04-27 20:36:35,675 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:36:35,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:36:35,675 INFO L85 PathProgramCache]: Analyzing trace with hash 1042791590, now seen corresponding path program 1 times [2022-04-27 20:36:35,675 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:36:35,675 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34782159] [2022-04-27 20:36:35,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:36:35,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:36:35,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:36:35,704 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:36:35,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:36:35,707 INFO L290 TraceCheckUtils]: 0: Hoare triple {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {616952#true} is VALID [2022-04-27 20:36:35,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {616952#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,708 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {616952#true} {616952#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,708 INFO L272 TraceCheckUtils]: 0: Hoare triple {616952#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:36:35,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {616958#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {616952#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {616952#true} {616952#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {616952#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {616952#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {616952#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {616952#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 8: Hoare triple {616952#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 9: Hoare triple {616952#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 10: Hoare triple {616952#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,709 INFO L290 TraceCheckUtils]: 11: Hoare triple {616952#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,710 INFO L290 TraceCheckUtils]: 12: Hoare triple {616952#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,710 INFO L290 TraceCheckUtils]: 13: Hoare triple {616952#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,710 INFO L290 TraceCheckUtils]: 14: Hoare triple {616952#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,710 INFO L290 TraceCheckUtils]: 15: Hoare triple {616952#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {616952#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {616952#true} is VALID [2022-04-27 20:36:35,710 INFO L290 TraceCheckUtils]: 17: Hoare triple {616952#true} [303] L120-1-->L124-1: Formula: (= v_main_~p10~0_4 0) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,711 INFO L290 TraceCheckUtils]: 18: Hoare triple {616957#(= main_~p10~0 0)} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,711 INFO L290 TraceCheckUtils]: 19: Hoare triple {616957#(= main_~p10~0 0)} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,711 INFO L290 TraceCheckUtils]: 20: Hoare triple {616957#(= main_~p10~0 0)} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,712 INFO L290 TraceCheckUtils]: 21: Hoare triple {616957#(= main_~p10~0 0)} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,712 INFO L290 TraceCheckUtils]: 22: Hoare triple {616957#(= main_~p10~0 0)} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,712 INFO L290 TraceCheckUtils]: 23: Hoare triple {616957#(= main_~p10~0 0)} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,713 INFO L290 TraceCheckUtils]: 24: Hoare triple {616957#(= main_~p10~0 0)} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,713 INFO L290 TraceCheckUtils]: 25: Hoare triple {616957#(= main_~p10~0 0)} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,713 INFO L290 TraceCheckUtils]: 26: Hoare triple {616957#(= main_~p10~0 0)} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,714 INFO L290 TraceCheckUtils]: 27: Hoare triple {616957#(= main_~p10~0 0)} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,714 INFO L290 TraceCheckUtils]: 28: Hoare triple {616957#(= main_~p10~0 0)} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,714 INFO L290 TraceCheckUtils]: 29: Hoare triple {616957#(= main_~p10~0 0)} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,715 INFO L290 TraceCheckUtils]: 30: Hoare triple {616957#(= main_~p10~0 0)} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {616957#(= main_~p10~0 0)} is VALID [2022-04-27 20:36:35,715 INFO L290 TraceCheckUtils]: 31: Hoare triple {616957#(= main_~p10~0 0)} [350] L186-1-->L192: Formula: (not (= v_main_~p10~0_3 0)) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-27 20:36:35,715 INFO L290 TraceCheckUtils]: 32: Hoare triple {616953#false} [352] L192-->L212-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-27 20:36:35,715 INFO L290 TraceCheckUtils]: 33: Hoare triple {616953#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {616953#false} is VALID [2022-04-27 20:36:35,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:36:35,715 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:36:35,716 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34782159] [2022-04-27 20:36:35,716 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34782159] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:36:35,716 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:36:35,716 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:36:35,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37941019] [2022-04-27 20:36:35,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:36:35,716 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:36:35,716 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:36:35,717 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:35,740 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:36:35,740 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:36:35,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:36:35,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:36:35,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:36:35,741 INFO L87 Difference]: Start difference. First operand 30729 states and 41479 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:37:21,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:37:21,025 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-27 20:37:21,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:37:21,025 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:37:21,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:37:21,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:37:21,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-27 20:37:21,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:37:21,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 159 transitions. [2022-04-27 20:37:21,037 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 159 transitions. [2022-04-27 20:37:21,140 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 159 edges. 159 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:38:04,349 INFO L225 Difference]: With dead ends: 40459 [2022-04-27 20:38:04,349 INFO L226 Difference]: Without dead ends: 40459 [2022-04-27 20:38:04,349 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:38:04,349 INFO L413 NwaCegarLoop]: 138 mSDtfsCounter, 154 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:38:04,350 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [154 Valid, 145 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:38:04,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40459 states. [2022-04-27 20:38:04,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40459 to 40457. [2022-04-27 20:38:04,915 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:38:04,967 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:38:05,012 INFO L74 IsIncluded]: Start isIncluded. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:38:05,055 INFO L87 Difference]: Start difference. First operand 40459 states. Second operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:39:04,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:39:04,241 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-27 20:39:04,241 INFO L276 IsEmpty]: Start isEmpty. Operand 40459 states and 54280 transitions. [2022-04-27 20:39:04,308 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:39:04,309 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:39:04,339 INFO L74 IsIncluded]: Start isIncluded. First operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40459 states. [2022-04-27 20:39:04,369 INFO L87 Difference]: Start difference. First operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40459 states. [2022-04-27 20:39:48,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:39:48,943 INFO L93 Difference]: Finished difference Result 40459 states and 54280 transitions. [2022-04-27 20:39:48,943 INFO L276 IsEmpty]: Start isEmpty. Operand 40459 states and 54280 transitions. [2022-04-27 20:39:48,986 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:39:48,986 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:39:48,986 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:39:48,986 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:39:49,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40457 states, 40453 states have (on average 1.3417051887375473) internal successors, (54276), 40453 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:40:58,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40457 states to 40457 states and 54279 transitions. [2022-04-27 20:40:58,915 INFO L78 Accepts]: Start accepts. Automaton has 40457 states and 54279 transitions. Word has length 34 [2022-04-27 20:40:58,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:40:58,915 INFO L495 AbstractCegarLoop]: Abstraction has 40457 states and 54279 transitions. [2022-04-27 20:40:58,915 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:40:58,915 INFO L276 IsEmpty]: Start isEmpty. Operand 40457 states and 54279 transitions. [2022-04-27 20:40:58,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 20:40:58,937 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:40:58,937 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:40:58,938 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-04-27 20:40:58,938 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:40:58,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:40:58,938 INFO L85 PathProgramCache]: Analyzing trace with hash -1036093516, now seen corresponding path program 1 times [2022-04-27 20:40:58,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:40:58,938 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098060792] [2022-04-27 20:40:58,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:40:58,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:40:58,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:40:59,017 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:40:59,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:40:59,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {778804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {778798#true} is VALID [2022-04-27 20:40:59,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {778798#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,021 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {778798#true} {778798#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,022 INFO L272 TraceCheckUtils]: 0: Hoare triple {778798#true} [271] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:40:59,022 INFO L290 TraceCheckUtils]: 1: Hoare triple {778804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [273] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {778798#true} is VALID [2022-04-27 20:40:59,022 INFO L290 TraceCheckUtils]: 2: Hoare triple {778798#true} [276] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,022 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {778798#true} {778798#true} [370] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,022 INFO L272 TraceCheckUtils]: 4: Hoare triple {778798#true} [272] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,022 INFO L290 TraceCheckUtils]: 5: Hoare triple {778798#true} [275] mainENTRY-->L211-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (= v_main_~p3~0_2 |v_main_#t~nondet6_2|) (<= |v_main_#t~nondet9_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_3, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_2, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 6: Hoare triple {778798#true} [279] L211-1-->L55: Formula: (and (= |v_main_#t~nondet18_2| v_main_~cond~0_2) (<= |v_main_#t~nondet18_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648))) InVars {main_#t~nondet18=|v_main_#t~nondet18_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet18, main_~cond~0] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 7: Hoare triple {778798#true} [282] L55-->L88: Formula: (and (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk14~0_4 0) (= v_main_~lk7~0_2 0) (= v_main_~lk3~0_5 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (= v_main_~lk4~0_5 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_5, main_~lk14~0=v_main_~lk14~0_4, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_5, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 8: Hoare triple {778798#true} [285] L88-->L88-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 9: Hoare triple {778798#true} [287] L88-2-->L92-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 10: Hoare triple {778798#true} [289] L92-1-->L96-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 11: Hoare triple {778798#true} [291] L96-1-->L100-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 12: Hoare triple {778798#true} [293] L100-1-->L104-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 13: Hoare triple {778798#true} [295] L104-1-->L108-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 14: Hoare triple {778798#true} [297] L108-1-->L112-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 15: Hoare triple {778798#true} [299] L112-1-->L116-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,023 INFO L290 TraceCheckUtils]: 16: Hoare triple {778798#true} [301] L116-1-->L120-1: Formula: (= v_main_~p9~0_4 0) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {778798#true} is VALID [2022-04-27 20:40:59,024 INFO L290 TraceCheckUtils]: 17: Hoare triple {778798#true} [302] L120-1-->L124-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,024 INFO L290 TraceCheckUtils]: 18: Hoare triple {778803#(not (= main_~p10~0 0))} [304] L124-1-->L128-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,024 INFO L290 TraceCheckUtils]: 19: Hoare triple {778803#(not (= main_~p10~0 0))} [306] L128-1-->L132-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,025 INFO L290 TraceCheckUtils]: 20: Hoare triple {778803#(not (= main_~p10~0 0))} [308] L132-1-->L136-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,025 INFO L290 TraceCheckUtils]: 21: Hoare triple {778803#(not (= main_~p10~0 0))} [310] L136-1-->L140-1: Formula: (and (not (= v_main_~p14~0_3 0)) (= v_main_~lk14~0_5 1)) InVars {main_~p14~0=v_main_~p14~0_3} OutVars{main_~p14~0=v_main_~p14~0_3, main_~lk14~0=v_main_~lk14~0_5} AuxVars[] AssignedVars[main_~lk14~0] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,026 INFO L290 TraceCheckUtils]: 22: Hoare triple {778803#(not (= main_~p10~0 0))} [313] L140-1-->L146-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,026 INFO L290 TraceCheckUtils]: 23: Hoare triple {778803#(not (= main_~p10~0 0))} [317] L146-1-->L151-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,026 INFO L290 TraceCheckUtils]: 24: Hoare triple {778803#(not (= main_~p10~0 0))} [323] L151-1-->L156-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,026 INFO L290 TraceCheckUtils]: 25: Hoare triple {778803#(not (= main_~p10~0 0))} [327] L156-1-->L161-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,027 INFO L290 TraceCheckUtils]: 26: Hoare triple {778803#(not (= main_~p10~0 0))} [331] L161-1-->L166-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,027 INFO L290 TraceCheckUtils]: 27: Hoare triple {778803#(not (= main_~p10~0 0))} [335] L166-1-->L171-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,028 INFO L290 TraceCheckUtils]: 28: Hoare triple {778803#(not (= main_~p10~0 0))} [339] L171-1-->L176-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,028 INFO L290 TraceCheckUtils]: 29: Hoare triple {778803#(not (= main_~p10~0 0))} [343] L176-1-->L181-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,028 INFO L290 TraceCheckUtils]: 30: Hoare triple {778803#(not (= main_~p10~0 0))} [347] L181-1-->L186-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {778803#(not (= main_~p10~0 0))} is VALID [2022-04-27 20:40:59,028 INFO L290 TraceCheckUtils]: 31: Hoare triple {778803#(not (= main_~p10~0 0))} [351] L186-1-->L191-1: Formula: (= v_main_~p10~0_5 0) InVars {main_~p10~0=v_main_~p10~0_5} OutVars{main_~p10~0=v_main_~p10~0_5} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-27 20:40:59,029 INFO L290 TraceCheckUtils]: 32: Hoare triple {778799#false} [354] L191-1-->L197: Formula: (not (= v_main_~p11~0_4 0)) InVars {main_~p11~0=v_main_~p11~0_4} OutVars{main_~p11~0=v_main_~p11~0_4} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-27 20:40:59,029 INFO L290 TraceCheckUtils]: 33: Hoare triple {778799#false} [356] L197-->L212-1: Formula: (not (= v_main_~lk11~0_4 1)) InVars {main_~lk11~0=v_main_~lk11~0_4} OutVars{main_~lk11~0=v_main_~lk11~0_4} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-27 20:40:59,029 INFO L290 TraceCheckUtils]: 34: Hoare triple {778799#false} [318] L212-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {778799#false} is VALID [2022-04-27 20:40:59,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:40:59,029 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:40:59,029 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1098060792] [2022-04-27 20:40:59,029 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1098060792] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:40:59,029 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:40:59,029 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:40:59,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650980504] [2022-04-27 20:40:59,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:40:59,030 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:40:59,030 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:40:59,030 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:40:59,050 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:40:59,051 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:40:59,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:40:59,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:40:59,051 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:40:59,052 INFO L87 Difference]: Start difference. First operand 40457 states and 54279 transitions. Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:41:47,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:41:47,528 INFO L93 Difference]: Finished difference Result 40971 states and 54280 transitions. [2022-04-27 20:41:47,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:41:47,529 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:41:47,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:41:47,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:41:47,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:41:47,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:41:47,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:41:47,531 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 158 transitions. [2022-04-27 20:41:47,647 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:42:40,828 INFO L225 Difference]: With dead ends: 40971 [2022-04-27 20:42:40,829 INFO L226 Difference]: Without dead ends: 40971 [2022-04-27 20:42:40,829 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:42:40,829 INFO L413 NwaCegarLoop]: 119 mSDtfsCounter, 174 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 174 SdHoareTripleChecker+Valid, 126 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 20:42:40,830 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [174 Valid, 126 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 20:42:40,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40971 states. [2022-04-27 20:42:41,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40971 to 40969. [2022-04-27 20:42:41,216 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:42:41,260 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40971 states. Second operand has 40969 states, 40965 states have (on average 1.3249359209080922) internal successors, (54276), 40965 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:41,303 INFO L74 IsIncluded]: Start isIncluded. First operand 40971 states. Second operand has 40969 states, 40965 states have (on average 1.3249359209080922) internal successors, (54276), 40965 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:41,450 INFO L87 Difference]: Start difference. First operand 40971 states. Second operand has 40969 states, 40965 states have (on average 1.3249359209080922) internal successors, (54276), 40965 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:43:29,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:43:29,763 INFO L93 Difference]: Finished difference Result 40971 states and 54280 transitions. [2022-04-27 20:43:29,763 INFO L276 IsEmpty]: Start isEmpty. Operand 40971 states and 54280 transitions. [2022-04-27 20:43:29,789 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:43:29,789 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:43:29,821 INFO L74 IsIncluded]: Start isIncluded. First operand has 40969 states, 40965 states have (on average 1.3249359209080922) internal successors, (54276), 40965 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40971 states. [2022-04-27 20:43:29,872 INFO L87 Difference]: Start difference. First operand has 40969 states, 40965 states have (on average 1.3249359209080922) internal successors, (54276), 40965 states have internal predecessors, (54276), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40971 states.