/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/locks/test_locks_15-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 20:30:31,490 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 20:30:31,492 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 20:30:31,544 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 20:30:31,545 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 20:30:31,546 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 20:30:31,547 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 20:30:31,548 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 20:30:31,549 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 20:30:31,550 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 20:30:31,559 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 20:30:31,561 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 20:30:31,561 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 20:30:31,562 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 20:30:31,563 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 20:30:31,563 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 20:30:31,564 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 20:30:31,565 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 20:30:31,566 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 20:30:31,567 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 20:30:31,569 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 20:30:31,573 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 20:30:31,574 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 20:30:31,575 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 20:30:31,576 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 20:30:31,579 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 20:30:31,584 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 20:30:31,585 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 20:30:31,586 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 20:30:31,587 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-04-27 20:30:31,593 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 20:30:31,594 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 20:30:31,594 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 20:30:31,595 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 20:30:31,596 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 20:30:31,596 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 20:30:31,597 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 20:30:31,597 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 20:30:31,597 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 20:30:31,597 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 20:30:31,809 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 20:30:31,827 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 20:30:31,829 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 20:30:31,830 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 20:30:31,830 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 20:30:31,831 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/locks/test_locks_15-2.c [2022-04-27 20:30:31,889 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0454716dd/0eb1f2f8f4f949eeaa8e7ceed7cfc052/FLAG5a9d3a332 [2022-04-27 20:30:32,311 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 20:30:32,312 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_15-2.c [2022-04-27 20:30:32,320 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0454716dd/0eb1f2f8f4f949eeaa8e7ceed7cfc052/FLAG5a9d3a332 [2022-04-27 20:30:32,329 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/0454716dd/0eb1f2f8f4f949eeaa8e7ceed7cfc052 [2022-04-27 20:30:32,331 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 20:30:32,332 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 20:30:32,335 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 20:30:32,335 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 20:30:32,338 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 20:30:32,339 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,339 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@37e9e11b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32, skipping insertion in model container [2022-04-27 20:30:32,340 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,345 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 20:30:32,364 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 20:30:32,505 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_15-2.c[5628,5641] [2022-04-27 20:30:32,509 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 20:30:32,516 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 20:30:32,567 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/locks/test_locks_15-2.c[5628,5641] [2022-04-27 20:30:32,568 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 20:30:32,579 INFO L208 MainTranslator]: Completed translation [2022-04-27 20:30:32,579 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32 WrapperNode [2022-04-27 20:30:32,579 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 20:30:32,580 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 20:30:32,580 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 20:30:32,580 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 20:30:32,589 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,589 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,595 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,595 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,604 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,612 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,613 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,615 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 20:30:32,616 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 20:30:32,616 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 20:30:32,616 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 20:30:32,617 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (1/1) ... [2022-04-27 20:30:32,635 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 20:30:32,642 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 20:30:32,651 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 20:30:32,655 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 20:30:32,678 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 20:30:32,678 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 20:30:32,678 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 20:30:32,678 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 20:30:32,679 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 20:30:32,680 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 20:30:32,680 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 20:30:32,680 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 20:30:32,680 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 20:30:32,731 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 20:30:32,732 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 20:30:33,012 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 20:30:33,019 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 20:30:33,019 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 20:30:33,021 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:30:33 BoogieIcfgContainer [2022-04-27 20:30:33,021 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 20:30:33,021 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 20:30:33,022 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 20:30:33,022 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 20:30:33,025 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:30:33" (1/1) ... [2022-04-27 20:30:33,031 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_JORDAN [2022-04-27 20:30:33,069 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 08:30:33 BasicIcfg [2022-04-27 20:30:33,070 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 20:30:33,071 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 20:30:33,071 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 20:30:33,074 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 20:30:33,074 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 08:30:32" (1/4) ... [2022-04-27 20:30:33,074 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a218338 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 08:30:33, skipping insertion in model container [2022-04-27 20:30:33,074 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 08:30:32" (2/4) ... [2022-04-27 20:30:33,075 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a218338 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 08:30:33, skipping insertion in model container [2022-04-27 20:30:33,075 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 08:30:33" (3/4) ... [2022-04-27 20:30:33,075 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a218338 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 08:30:33, skipping insertion in model container [2022-04-27 20:30:33,075 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 08:30:33" (4/4) ... [2022-04-27 20:30:33,076 INFO L111 eAbstractionObserver]: Analyzing ICFG test_locks_15-2.cJordan [2022-04-27 20:30:33,088 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-04-27 20:30:33,088 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 20:30:33,128 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 20:30:33,133 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@17e68aaa, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@724ef382 [2022-04-27 20:30:33,134 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 20:30:33,141 INFO L276 IsEmpty]: Start isEmpty. Operand has 60 states, 54 states have (on average 1.9074074074074074) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-27 20:30:33,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:30:33,147 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:33,148 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:33,148 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:33,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:33,153 INFO L85 PathProgramCache]: Analyzing trace with hash 539653987, now seen corresponding path program 1 times [2022-04-27 20:30:33,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:33,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751595420] [2022-04-27 20:30:33,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:33,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:33,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:33,385 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:33,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:33,404 INFO L290 TraceCheckUtils]: 0: Hoare triple {69#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {63#true} is VALID [2022-04-27 20:30:33,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {63#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {63#true} is VALID [2022-04-27 20:30:33,405 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {63#true} {63#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {63#true} is VALID [2022-04-27 20:30:33,406 INFO L272 TraceCheckUtils]: 0: Hoare triple {63#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {69#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:33,407 INFO L290 TraceCheckUtils]: 1: Hoare triple {69#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {63#true} is VALID [2022-04-27 20:30:33,407 INFO L290 TraceCheckUtils]: 2: Hoare triple {63#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {63#true} is VALID [2022-04-27 20:30:33,407 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {63#true} {63#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {63#true} is VALID [2022-04-27 20:30:33,407 INFO L272 TraceCheckUtils]: 4: Hoare triple {63#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {63#true} is VALID [2022-04-27 20:30:33,408 INFO L290 TraceCheckUtils]: 5: Hoare triple {63#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {63#true} is VALID [2022-04-27 20:30:33,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {63#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {63#true} is VALID [2022-04-27 20:30:33,409 INFO L290 TraceCheckUtils]: 7: Hoare triple {63#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {63#true} is VALID [2022-04-27 20:30:33,410 INFO L290 TraceCheckUtils]: 8: Hoare triple {63#true} [301] L93-->L93-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,410 INFO L290 TraceCheckUtils]: 9: Hoare triple {68#(= main_~lk1~0 1)} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,411 INFO L290 TraceCheckUtils]: 10: Hoare triple {68#(= main_~lk1~0 1)} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,411 INFO L290 TraceCheckUtils]: 11: Hoare triple {68#(= main_~lk1~0 1)} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,412 INFO L290 TraceCheckUtils]: 12: Hoare triple {68#(= main_~lk1~0 1)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,413 INFO L290 TraceCheckUtils]: 13: Hoare triple {68#(= main_~lk1~0 1)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,413 INFO L290 TraceCheckUtils]: 14: Hoare triple {68#(= main_~lk1~0 1)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,414 INFO L290 TraceCheckUtils]: 15: Hoare triple {68#(= main_~lk1~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,414 INFO L290 TraceCheckUtils]: 16: Hoare triple {68#(= main_~lk1~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,415 INFO L290 TraceCheckUtils]: 17: Hoare triple {68#(= main_~lk1~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,416 INFO L290 TraceCheckUtils]: 18: Hoare triple {68#(= main_~lk1~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,416 INFO L290 TraceCheckUtils]: 19: Hoare triple {68#(= main_~lk1~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,417 INFO L290 TraceCheckUtils]: 20: Hoare triple {68#(= main_~lk1~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,417 INFO L290 TraceCheckUtils]: 21: Hoare triple {68#(= main_~lk1~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,418 INFO L290 TraceCheckUtils]: 22: Hoare triple {68#(= main_~lk1~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,419 INFO L290 TraceCheckUtils]: 23: Hoare triple {68#(= main_~lk1~0 1)} [331] L149-1-->L156: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {68#(= main_~lk1~0 1)} is VALID [2022-04-27 20:30:33,419 INFO L290 TraceCheckUtils]: 24: Hoare triple {68#(= main_~lk1~0 1)} [333] L156-->L226-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {64#false} is VALID [2022-04-27 20:30:33,420 INFO L290 TraceCheckUtils]: 25: Hoare triple {64#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {64#false} is VALID [2022-04-27 20:30:33,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:33,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:33,421 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751595420] [2022-04-27 20:30:33,421 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1751595420] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:33,422 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:33,422 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:33,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [603913061] [2022-04-27 20:30:33,424 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:33,428 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:30:33,430 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:33,432 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:33,470 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:33,471 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:33,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:33,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:33,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:33,502 INFO L87 Difference]: Start difference. First operand has 60 states, 54 states have (on average 1.9074074074074074) internal successors, (103), 55 states have internal predecessors, (103), 2 states have call successors, (2), 2 states have call predecessors, (2), 2 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:33,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:33,960 INFO L93 Difference]: Finished difference Result 111 states and 198 transitions. [2022-04-27 20:30:33,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:33,960 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:30:33,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:33,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:33,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 205 transitions. [2022-04-27 20:30:33,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:33,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 205 transitions. [2022-04-27 20:30:33,976 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 205 transitions. [2022-04-27 20:30:34,177 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 205 edges. 205 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:34,187 INFO L225 Difference]: With dead ends: 111 [2022-04-27 20:30:34,187 INFO L226 Difference]: Without dead ends: 103 [2022-04-27 20:30:34,189 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:34,192 INFO L413 NwaCegarLoop]: 110 mSDtfsCounter, 259 mSDsluCounter, 9 mSDsCounter, 0 mSdLazyCounter, 103 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 259 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 103 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:34,192 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [259 Valid, 119 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 103 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:34,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-27 20:30:34,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 71. [2022-04-27 20:30:34,220 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:34,221 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 71 states, 67 states have (on average 1.8955223880597014) internal successors, (127), 67 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,222 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 71 states, 67 states have (on average 1.8955223880597014) internal successors, (127), 67 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,222 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 71 states, 67 states have (on average 1.8955223880597014) internal successors, (127), 67 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:34,230 INFO L93 Difference]: Finished difference Result 103 states and 189 transitions. [2022-04-27 20:30:34,230 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 189 transitions. [2022-04-27 20:30:34,231 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:34,231 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:34,232 INFO L74 IsIncluded]: Start isIncluded. First operand has 71 states, 67 states have (on average 1.8955223880597014) internal successors, (127), 67 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 103 states. [2022-04-27 20:30:34,232 INFO L87 Difference]: Start difference. First operand has 71 states, 67 states have (on average 1.8955223880597014) internal successors, (127), 67 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 103 states. [2022-04-27 20:30:34,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:34,239 INFO L93 Difference]: Finished difference Result 103 states and 189 transitions. [2022-04-27 20:30:34,239 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 189 transitions. [2022-04-27 20:30:34,240 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:34,240 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:34,240 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:34,240 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:34,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 67 states have (on average 1.8955223880597014) internal successors, (127), 67 states have internal predecessors, (127), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 130 transitions. [2022-04-27 20:30:34,252 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 130 transitions. Word has length 26 [2022-04-27 20:30:34,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:34,252 INFO L495 AbstractCegarLoop]: Abstraction has 71 states and 130 transitions. [2022-04-27 20:30:34,253 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,253 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 130 transitions. [2022-04-27 20:30:34,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 20:30:34,260 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:34,260 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:34,260 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 20:30:34,260 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:34,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:34,263 INFO L85 PathProgramCache]: Analyzing trace with hash -457418366, now seen corresponding path program 1 times [2022-04-27 20:30:34,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:34,263 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [301296967] [2022-04-27 20:30:34,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:34,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:34,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:34,380 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:34,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:34,397 INFO L290 TraceCheckUtils]: 0: Hoare triple {469#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {463#true} is VALID [2022-04-27 20:30:34,397 INFO L290 TraceCheckUtils]: 1: Hoare triple {463#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-27 20:30:34,397 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {463#true} {463#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-27 20:30:34,398 INFO L272 TraceCheckUtils]: 0: Hoare triple {463#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {469#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:34,399 INFO L290 TraceCheckUtils]: 1: Hoare triple {469#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {463#true} is VALID [2022-04-27 20:30:34,399 INFO L290 TraceCheckUtils]: 2: Hoare triple {463#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-27 20:30:34,399 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {463#true} {463#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-27 20:30:34,399 INFO L272 TraceCheckUtils]: 4: Hoare triple {463#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {463#true} is VALID [2022-04-27 20:30:34,400 INFO L290 TraceCheckUtils]: 5: Hoare triple {463#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {463#true} is VALID [2022-04-27 20:30:34,400 INFO L290 TraceCheckUtils]: 6: Hoare triple {463#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {463#true} is VALID [2022-04-27 20:30:34,400 INFO L290 TraceCheckUtils]: 7: Hoare triple {463#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {463#true} is VALID [2022-04-27 20:30:34,403 INFO L290 TraceCheckUtils]: 8: Hoare triple {463#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,404 INFO L290 TraceCheckUtils]: 9: Hoare triple {468#(= main_~p1~0 0)} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {468#(= main_~p1~0 0)} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,405 INFO L290 TraceCheckUtils]: 11: Hoare triple {468#(= main_~p1~0 0)} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,405 INFO L290 TraceCheckUtils]: 12: Hoare triple {468#(= main_~p1~0 0)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,406 INFO L290 TraceCheckUtils]: 13: Hoare triple {468#(= main_~p1~0 0)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,406 INFO L290 TraceCheckUtils]: 14: Hoare triple {468#(= main_~p1~0 0)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,409 INFO L290 TraceCheckUtils]: 15: Hoare triple {468#(= main_~p1~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,409 INFO L290 TraceCheckUtils]: 16: Hoare triple {468#(= main_~p1~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,409 INFO L290 TraceCheckUtils]: 17: Hoare triple {468#(= main_~p1~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,410 INFO L290 TraceCheckUtils]: 18: Hoare triple {468#(= main_~p1~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,410 INFO L290 TraceCheckUtils]: 19: Hoare triple {468#(= main_~p1~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,411 INFO L290 TraceCheckUtils]: 20: Hoare triple {468#(= main_~p1~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,411 INFO L290 TraceCheckUtils]: 21: Hoare triple {468#(= main_~p1~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,412 INFO L290 TraceCheckUtils]: 22: Hoare triple {468#(= main_~p1~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {468#(= main_~p1~0 0)} is VALID [2022-04-27 20:30:34,412 INFO L290 TraceCheckUtils]: 23: Hoare triple {468#(= main_~p1~0 0)} [331] L149-1-->L156: Formula: (not (= v_main_~p1~0_4 0)) InVars {main_~p1~0=v_main_~p1~0_4} OutVars{main_~p1~0=v_main_~p1~0_4} AuxVars[] AssignedVars[] {464#false} is VALID [2022-04-27 20:30:34,413 INFO L290 TraceCheckUtils]: 24: Hoare triple {464#false} [333] L156-->L226-1: Formula: (not (= v_main_~lk1~0_4 1)) InVars {main_~lk1~0=v_main_~lk1~0_4} OutVars{main_~lk1~0=v_main_~lk1~0_4} AuxVars[] AssignedVars[] {464#false} is VALID [2022-04-27 20:30:34,413 INFO L290 TraceCheckUtils]: 25: Hoare triple {464#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {464#false} is VALID [2022-04-27 20:30:34,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:34,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:34,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [301296967] [2022-04-27 20:30:34,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [301296967] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:34,415 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:34,415 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:34,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992209269] [2022-04-27 20:30:34,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:34,416 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:30:34,416 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:34,417 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,440 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:34,440 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:34,440 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:34,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:34,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:34,446 INFO L87 Difference]: Start difference. First operand 71 states and 130 transitions. Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:34,713 INFO L93 Difference]: Finished difference Result 103 states and 187 transitions. [2022-04-27 20:30:34,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:34,714 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 20:30:34,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:34,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 189 transitions. [2022-04-27 20:30:34,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 189 transitions. [2022-04-27 20:30:34,720 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 189 transitions. [2022-04-27 20:30:34,894 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 189 edges. 189 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:34,897 INFO L225 Difference]: With dead ends: 103 [2022-04-27 20:30:34,897 INFO L226 Difference]: Without dead ends: 103 [2022-04-27 20:30:34,898 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:34,899 INFO L413 NwaCegarLoop]: 128 mSDtfsCounter, 223 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 223 SdHoareTripleChecker+Valid, 135 SdHoareTripleChecker+Invalid, 97 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:34,899 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [223 Valid, 135 Invalid, 97 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:34,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2022-04-27 20:30:34,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 101. [2022-04-27 20:30:34,905 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:34,906 INFO L82 GeneralOperation]: Start isEquivalent. First operand 103 states. Second operand has 101 states, 97 states have (on average 1.8865979381443299) internal successors, (183), 97 states have internal predecessors, (183), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,906 INFO L74 IsIncluded]: Start isIncluded. First operand 103 states. Second operand has 101 states, 97 states have (on average 1.8865979381443299) internal successors, (183), 97 states have internal predecessors, (183), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,907 INFO L87 Difference]: Start difference. First operand 103 states. Second operand has 101 states, 97 states have (on average 1.8865979381443299) internal successors, (183), 97 states have internal predecessors, (183), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:34,911 INFO L93 Difference]: Finished difference Result 103 states and 187 transitions. [2022-04-27 20:30:34,911 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 187 transitions. [2022-04-27 20:30:34,912 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:34,912 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:34,912 INFO L74 IsIncluded]: Start isIncluded. First operand has 101 states, 97 states have (on average 1.8865979381443299) internal successors, (183), 97 states have internal predecessors, (183), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 103 states. [2022-04-27 20:30:34,913 INFO L87 Difference]: Start difference. First operand has 101 states, 97 states have (on average 1.8865979381443299) internal successors, (183), 97 states have internal predecessors, (183), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 103 states. [2022-04-27 20:30:34,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:34,917 INFO L93 Difference]: Finished difference Result 103 states and 187 transitions. [2022-04-27 20:30:34,917 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 187 transitions. [2022-04-27 20:30:34,918 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:34,918 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:34,918 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:34,918 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:34,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 97 states have (on average 1.8865979381443299) internal successors, (183), 97 states have internal predecessors, (183), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 186 transitions. [2022-04-27 20:30:34,922 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 186 transitions. Word has length 26 [2022-04-27 20:30:34,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:34,922 INFO L495 AbstractCegarLoop]: Abstraction has 101 states and 186 transitions. [2022-04-27 20:30:34,922 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:34,923 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 186 transitions. [2022-04-27 20:30:34,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:30:34,923 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:34,923 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:34,923 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 20:30:34,924 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:34,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:34,924 INFO L85 PathProgramCache]: Analyzing trace with hash -450563475, now seen corresponding path program 1 times [2022-04-27 20:30:34,924 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:34,925 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477204163] [2022-04-27 20:30:34,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:34,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:34,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:34,988 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:34,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:34,995 INFO L290 TraceCheckUtils]: 0: Hoare triple {891#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {885#true} is VALID [2022-04-27 20:30:34,995 INFO L290 TraceCheckUtils]: 1: Hoare triple {885#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {885#true} is VALID [2022-04-27 20:30:34,995 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {885#true} {885#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {885#true} is VALID [2022-04-27 20:30:34,996 INFO L272 TraceCheckUtils]: 0: Hoare triple {885#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {891#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:34,996 INFO L290 TraceCheckUtils]: 1: Hoare triple {891#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {885#true} is VALID [2022-04-27 20:30:34,996 INFO L290 TraceCheckUtils]: 2: Hoare triple {885#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {885#true} is VALID [2022-04-27 20:30:34,996 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {885#true} {885#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {885#true} is VALID [2022-04-27 20:30:34,997 INFO L272 TraceCheckUtils]: 4: Hoare triple {885#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {885#true} is VALID [2022-04-27 20:30:34,997 INFO L290 TraceCheckUtils]: 5: Hoare triple {885#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {885#true} is VALID [2022-04-27 20:30:34,997 INFO L290 TraceCheckUtils]: 6: Hoare triple {885#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {885#true} is VALID [2022-04-27 20:30:34,997 INFO L290 TraceCheckUtils]: 7: Hoare triple {885#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {885#true} is VALID [2022-04-27 20:30:34,998 INFO L290 TraceCheckUtils]: 8: Hoare triple {885#true} [301] L93-->L93-2: Formula: (and (= v_main_~lk1~0_3 1) (not (= v_main_~p1~0_2 0))) InVars {main_~p1~0=v_main_~p1~0_2} OutVars{main_~p1~0=v_main_~p1~0_2, main_~lk1~0=v_main_~lk1~0_3} AuxVars[] AssignedVars[main_~lk1~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:34,998 INFO L290 TraceCheckUtils]: 9: Hoare triple {890#(not (= main_~p1~0 0))} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:34,999 INFO L290 TraceCheckUtils]: 10: Hoare triple {890#(not (= main_~p1~0 0))} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:34,999 INFO L290 TraceCheckUtils]: 11: Hoare triple {890#(not (= main_~p1~0 0))} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:34,999 INFO L290 TraceCheckUtils]: 12: Hoare triple {890#(not (= main_~p1~0 0))} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,000 INFO L290 TraceCheckUtils]: 13: Hoare triple {890#(not (= main_~p1~0 0))} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,000 INFO L290 TraceCheckUtils]: 14: Hoare triple {890#(not (= main_~p1~0 0))} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,001 INFO L290 TraceCheckUtils]: 15: Hoare triple {890#(not (= main_~p1~0 0))} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,001 INFO L290 TraceCheckUtils]: 16: Hoare triple {890#(not (= main_~p1~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,001 INFO L290 TraceCheckUtils]: 17: Hoare triple {890#(not (= main_~p1~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,002 INFO L290 TraceCheckUtils]: 18: Hoare triple {890#(not (= main_~p1~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,002 INFO L290 TraceCheckUtils]: 19: Hoare triple {890#(not (= main_~p1~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,003 INFO L290 TraceCheckUtils]: 20: Hoare triple {890#(not (= main_~p1~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,003 INFO L290 TraceCheckUtils]: 21: Hoare triple {890#(not (= main_~p1~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,003 INFO L290 TraceCheckUtils]: 22: Hoare triple {890#(not (= main_~p1~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {890#(not (= main_~p1~0 0))} is VALID [2022-04-27 20:30:35,004 INFO L290 TraceCheckUtils]: 23: Hoare triple {890#(not (= main_~p1~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {886#false} is VALID [2022-04-27 20:30:35,004 INFO L290 TraceCheckUtils]: 24: Hoare triple {886#false} [335] L155-1-->L161: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {886#false} is VALID [2022-04-27 20:30:35,004 INFO L290 TraceCheckUtils]: 25: Hoare triple {886#false} [339] L161-->L226-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {886#false} is VALID [2022-04-27 20:30:35,004 INFO L290 TraceCheckUtils]: 26: Hoare triple {886#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {886#false} is VALID [2022-04-27 20:30:35,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:35,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:35,005 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477204163] [2022-04-27 20:30:35,005 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [477204163] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:35,005 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:35,005 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:35,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254494483] [2022-04-27 20:30:35,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:35,006 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:30:35,006 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:35,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,024 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:35,025 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:35,025 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:35,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:35,025 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:35,026 INFO L87 Difference]: Start difference. First operand 101 states and 186 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:35,283 INFO L93 Difference]: Finished difference Result 106 states and 189 transitions. [2022-04-27 20:30:35,283 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:35,283 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:30:35,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:35,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 188 transitions. [2022-04-27 20:30:35,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 188 transitions. [2022-04-27 20:30:35,290 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 188 transitions. [2022-04-27 20:30:35,444 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:35,446 INFO L225 Difference]: With dead ends: 106 [2022-04-27 20:30:35,446 INFO L226 Difference]: Without dead ends: 106 [2022-04-27 20:30:35,446 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:35,447 INFO L413 NwaCegarLoop]: 156 mSDtfsCounter, 196 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 163 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:35,448 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 163 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 93 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:35,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2022-04-27 20:30:35,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 104. [2022-04-27 20:30:35,453 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:35,453 INFO L82 GeneralOperation]: Start isEquivalent. First operand 106 states. Second operand has 104 states, 100 states have (on average 1.85) internal successors, (185), 100 states have internal predecessors, (185), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,454 INFO L74 IsIncluded]: Start isIncluded. First operand 106 states. Second operand has 104 states, 100 states have (on average 1.85) internal successors, (185), 100 states have internal predecessors, (185), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,454 INFO L87 Difference]: Start difference. First operand 106 states. Second operand has 104 states, 100 states have (on average 1.85) internal successors, (185), 100 states have internal predecessors, (185), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:35,462 INFO L93 Difference]: Finished difference Result 106 states and 189 transitions. [2022-04-27 20:30:35,462 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 189 transitions. [2022-04-27 20:30:35,463 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:35,463 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:35,464 INFO L74 IsIncluded]: Start isIncluded. First operand has 104 states, 100 states have (on average 1.85) internal successors, (185), 100 states have internal predecessors, (185), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-27 20:30:35,464 INFO L87 Difference]: Start difference. First operand has 104 states, 100 states have (on average 1.85) internal successors, (185), 100 states have internal predecessors, (185), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 106 states. [2022-04-27 20:30:35,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:35,469 INFO L93 Difference]: Finished difference Result 106 states and 189 transitions. [2022-04-27 20:30:35,469 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 189 transitions. [2022-04-27 20:30:35,469 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:35,469 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:35,469 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:35,469 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:35,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 100 states have (on average 1.85) internal successors, (185), 100 states have internal predecessors, (185), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 188 transitions. [2022-04-27 20:30:35,474 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 188 transitions. Word has length 27 [2022-04-27 20:30:35,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:35,474 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 188 transitions. [2022-04-27 20:30:35,475 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,475 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 188 transitions. [2022-04-27 20:30:35,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:30:35,476 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:35,476 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:35,476 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 20:30:35,476 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:35,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:35,477 INFO L85 PathProgramCache]: Analyzing trace with hash -1295035346, now seen corresponding path program 1 times [2022-04-27 20:30:35,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:35,477 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575450629] [2022-04-27 20:30:35,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:35,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:35,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:35,558 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:35,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:35,563 INFO L290 TraceCheckUtils]: 0: Hoare triple {1325#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1319#true} is VALID [2022-04-27 20:30:35,563 INFO L290 TraceCheckUtils]: 1: Hoare triple {1319#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1319#true} is VALID [2022-04-27 20:30:35,564 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1319#true} {1319#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1319#true} is VALID [2022-04-27 20:30:35,564 INFO L272 TraceCheckUtils]: 0: Hoare triple {1319#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1325#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:35,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {1325#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1319#true} is VALID [2022-04-27 20:30:35,565 INFO L290 TraceCheckUtils]: 2: Hoare triple {1319#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1319#true} is VALID [2022-04-27 20:30:35,565 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1319#true} {1319#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1319#true} is VALID [2022-04-27 20:30:35,565 INFO L272 TraceCheckUtils]: 4: Hoare triple {1319#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1319#true} is VALID [2022-04-27 20:30:35,565 INFO L290 TraceCheckUtils]: 5: Hoare triple {1319#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {1319#true} is VALID [2022-04-27 20:30:35,566 INFO L290 TraceCheckUtils]: 6: Hoare triple {1319#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {1319#true} is VALID [2022-04-27 20:30:35,566 INFO L290 TraceCheckUtils]: 7: Hoare triple {1319#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {1319#true} is VALID [2022-04-27 20:30:35,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {1319#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {1319#true} is VALID [2022-04-27 20:30:35,566 INFO L290 TraceCheckUtils]: 9: Hoare triple {1319#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,567 INFO L290 TraceCheckUtils]: 10: Hoare triple {1324#(= main_~p2~0 0)} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,567 INFO L290 TraceCheckUtils]: 11: Hoare triple {1324#(= main_~p2~0 0)} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,568 INFO L290 TraceCheckUtils]: 12: Hoare triple {1324#(= main_~p2~0 0)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,568 INFO L290 TraceCheckUtils]: 13: Hoare triple {1324#(= main_~p2~0 0)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,571 INFO L290 TraceCheckUtils]: 14: Hoare triple {1324#(= main_~p2~0 0)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,572 INFO L290 TraceCheckUtils]: 15: Hoare triple {1324#(= main_~p2~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,572 INFO L290 TraceCheckUtils]: 16: Hoare triple {1324#(= main_~p2~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,572 INFO L290 TraceCheckUtils]: 17: Hoare triple {1324#(= main_~p2~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,573 INFO L290 TraceCheckUtils]: 18: Hoare triple {1324#(= main_~p2~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,573 INFO L290 TraceCheckUtils]: 19: Hoare triple {1324#(= main_~p2~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,574 INFO L290 TraceCheckUtils]: 20: Hoare triple {1324#(= main_~p2~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,574 INFO L290 TraceCheckUtils]: 21: Hoare triple {1324#(= main_~p2~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,574 INFO L290 TraceCheckUtils]: 22: Hoare triple {1324#(= main_~p2~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,575 INFO L290 TraceCheckUtils]: 23: Hoare triple {1324#(= main_~p2~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {1324#(= main_~p2~0 0)} is VALID [2022-04-27 20:30:35,578 INFO L290 TraceCheckUtils]: 24: Hoare triple {1324#(= main_~p2~0 0)} [335] L155-1-->L161: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {1320#false} is VALID [2022-04-27 20:30:35,579 INFO L290 TraceCheckUtils]: 25: Hoare triple {1320#false} [339] L161-->L226-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {1320#false} is VALID [2022-04-27 20:30:35,579 INFO L290 TraceCheckUtils]: 26: Hoare triple {1320#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1320#false} is VALID [2022-04-27 20:30:35,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:35,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:35,579 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1575450629] [2022-04-27 20:30:35,579 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1575450629] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:35,580 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:35,580 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:35,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640828397] [2022-04-27 20:30:35,580 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:35,580 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:30:35,581 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:35,581 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,600 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:35,600 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:35,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:35,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:35,601 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:35,601 INFO L87 Difference]: Start difference. First operand 104 states and 188 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:35,856 INFO L93 Difference]: Finished difference Result 197 states and 358 transitions. [2022-04-27 20:30:35,856 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:35,857 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:30:35,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:35,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 188 transitions. [2022-04-27 20:30:35,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:35,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 188 transitions. [2022-04-27 20:30:35,861 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 188 transitions. [2022-04-27 20:30:36,020 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:36,025 INFO L225 Difference]: With dead ends: 197 [2022-04-27 20:30:36,025 INFO L226 Difference]: Without dead ends: 197 [2022-04-27 20:30:36,025 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:36,026 INFO L413 NwaCegarLoop]: 102 mSDtfsCounter, 248 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 248 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 97 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:36,026 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [248 Valid, 109 Invalid, 97 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:36,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2022-04-27 20:30:36,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 195. [2022-04-27 20:30:36,034 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:36,034 INFO L82 GeneralOperation]: Start isEquivalent. First operand 197 states. Second operand has 195 states, 191 states have (on average 1.8534031413612566) internal successors, (354), 191 states have internal predecessors, (354), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,035 INFO L74 IsIncluded]: Start isIncluded. First operand 197 states. Second operand has 195 states, 191 states have (on average 1.8534031413612566) internal successors, (354), 191 states have internal predecessors, (354), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,036 INFO L87 Difference]: Start difference. First operand 197 states. Second operand has 195 states, 191 states have (on average 1.8534031413612566) internal successors, (354), 191 states have internal predecessors, (354), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:36,043 INFO L93 Difference]: Finished difference Result 197 states and 358 transitions. [2022-04-27 20:30:36,043 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 358 transitions. [2022-04-27 20:30:36,043 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:36,043 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:36,044 INFO L74 IsIncluded]: Start isIncluded. First operand has 195 states, 191 states have (on average 1.8534031413612566) internal successors, (354), 191 states have internal predecessors, (354), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 197 states. [2022-04-27 20:30:36,045 INFO L87 Difference]: Start difference. First operand has 195 states, 191 states have (on average 1.8534031413612566) internal successors, (354), 191 states have internal predecessors, (354), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 197 states. [2022-04-27 20:30:36,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:36,051 INFO L93 Difference]: Finished difference Result 197 states and 358 transitions. [2022-04-27 20:30:36,052 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 358 transitions. [2022-04-27 20:30:36,052 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:36,052 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:36,052 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:36,052 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:36,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 191 states have (on average 1.8534031413612566) internal successors, (354), 191 states have internal predecessors, (354), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 357 transitions. [2022-04-27 20:30:36,061 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 357 transitions. Word has length 27 [2022-04-27 20:30:36,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:36,062 INFO L495 AbstractCegarLoop]: Abstraction has 195 states and 357 transitions. [2022-04-27 20:30:36,062 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,062 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 357 transitions. [2022-04-27 20:30:36,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 20:30:36,063 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:36,064 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:36,064 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 20:30:36,064 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:36,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:36,064 INFO L85 PathProgramCache]: Analyzing trace with hash -297962993, now seen corresponding path program 1 times [2022-04-27 20:30:36,064 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:36,064 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533299468] [2022-04-27 20:30:36,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:36,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:36,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:36,148 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:36,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:36,159 INFO L290 TraceCheckUtils]: 0: Hoare triple {2123#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2117#true} is VALID [2022-04-27 20:30:36,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {2117#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2117#true} is VALID [2022-04-27 20:30:36,159 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2117#true} {2117#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2117#true} is VALID [2022-04-27 20:30:36,160 INFO L272 TraceCheckUtils]: 0: Hoare triple {2117#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2123#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:36,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {2123#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2117#true} is VALID [2022-04-27 20:30:36,162 INFO L290 TraceCheckUtils]: 2: Hoare triple {2117#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2117#true} is VALID [2022-04-27 20:30:36,164 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2117#true} {2117#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2117#true} is VALID [2022-04-27 20:30:36,164 INFO L272 TraceCheckUtils]: 4: Hoare triple {2117#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2117#true} is VALID [2022-04-27 20:30:36,165 INFO L290 TraceCheckUtils]: 5: Hoare triple {2117#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {2117#true} is VALID [2022-04-27 20:30:36,165 INFO L290 TraceCheckUtils]: 6: Hoare triple {2117#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {2117#true} is VALID [2022-04-27 20:30:36,165 INFO L290 TraceCheckUtils]: 7: Hoare triple {2117#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {2117#true} is VALID [2022-04-27 20:30:36,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {2117#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {2117#true} is VALID [2022-04-27 20:30:36,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {2117#true} [303] L93-2-->L97-1: Formula: (and (= v_main_~lk2~0_3 1) (not (= v_main_~p2~0_2 0))) InVars {main_~p2~0=v_main_~p2~0_2} OutVars{main_~lk2~0=v_main_~lk2~0_3, main_~p2~0=v_main_~p2~0_2} AuxVars[] AssignedVars[main_~lk2~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,166 INFO L290 TraceCheckUtils]: 10: Hoare triple {2122#(= main_~lk2~0 1)} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,167 INFO L290 TraceCheckUtils]: 11: Hoare triple {2122#(= main_~lk2~0 1)} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,167 INFO L290 TraceCheckUtils]: 12: Hoare triple {2122#(= main_~lk2~0 1)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,167 INFO L290 TraceCheckUtils]: 13: Hoare triple {2122#(= main_~lk2~0 1)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,168 INFO L290 TraceCheckUtils]: 14: Hoare triple {2122#(= main_~lk2~0 1)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,168 INFO L290 TraceCheckUtils]: 15: Hoare triple {2122#(= main_~lk2~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,168 INFO L290 TraceCheckUtils]: 16: Hoare triple {2122#(= main_~lk2~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,169 INFO L290 TraceCheckUtils]: 17: Hoare triple {2122#(= main_~lk2~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,169 INFO L290 TraceCheckUtils]: 18: Hoare triple {2122#(= main_~lk2~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,170 INFO L290 TraceCheckUtils]: 19: Hoare triple {2122#(= main_~lk2~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,170 INFO L290 TraceCheckUtils]: 20: Hoare triple {2122#(= main_~lk2~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,170 INFO L290 TraceCheckUtils]: 21: Hoare triple {2122#(= main_~lk2~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,171 INFO L290 TraceCheckUtils]: 22: Hoare triple {2122#(= main_~lk2~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,171 INFO L290 TraceCheckUtils]: 23: Hoare triple {2122#(= main_~lk2~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,172 INFO L290 TraceCheckUtils]: 24: Hoare triple {2122#(= main_~lk2~0 1)} [335] L155-1-->L161: Formula: (not (= v_main_~p2~0_4 0)) InVars {main_~p2~0=v_main_~p2~0_4} OutVars{main_~p2~0=v_main_~p2~0_4} AuxVars[] AssignedVars[] {2122#(= main_~lk2~0 1)} is VALID [2022-04-27 20:30:36,172 INFO L290 TraceCheckUtils]: 25: Hoare triple {2122#(= main_~lk2~0 1)} [339] L161-->L226-1: Formula: (not (= v_main_~lk2~0_4 1)) InVars {main_~lk2~0=v_main_~lk2~0_4} OutVars{main_~lk2~0=v_main_~lk2~0_4} AuxVars[] AssignedVars[] {2118#false} is VALID [2022-04-27 20:30:36,172 INFO L290 TraceCheckUtils]: 26: Hoare triple {2118#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2118#false} is VALID [2022-04-27 20:30:36,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:36,173 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:36,173 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533299468] [2022-04-27 20:30:36,174 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [533299468] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:36,174 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:36,175 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:36,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341730789] [2022-04-27 20:30:36,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:36,183 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:30:36,183 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:36,183 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,202 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:36,202 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:36,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:36,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:36,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:36,203 INFO L87 Difference]: Start difference. First operand 195 states and 357 transitions. Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:36,441 INFO L93 Difference]: Finished difference Result 253 states and 464 transitions. [2022-04-27 20:30:36,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:36,441 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 20:30:36,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:36,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 183 transitions. [2022-04-27 20:30:36,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 183 transitions. [2022-04-27 20:30:36,449 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 183 transitions. [2022-04-27 20:30:36,594 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:36,604 INFO L225 Difference]: With dead ends: 253 [2022-04-27 20:30:36,604 INFO L226 Difference]: Without dead ends: 253 [2022-04-27 20:30:36,604 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:36,605 INFO L413 NwaCegarLoop]: 181 mSDtfsCounter, 161 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 161 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:36,605 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [161 Valid, 188 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 93 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:36,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2022-04-27 20:30:36,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 195. [2022-04-27 20:30:36,612 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:36,613 INFO L82 GeneralOperation]: Start isEquivalent. First operand 253 states. Second operand has 195 states, 191 states have (on average 1.8429319371727748) internal successors, (352), 191 states have internal predecessors, (352), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,613 INFO L74 IsIncluded]: Start isIncluded. First operand 253 states. Second operand has 195 states, 191 states have (on average 1.8429319371727748) internal successors, (352), 191 states have internal predecessors, (352), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,614 INFO L87 Difference]: Start difference. First operand 253 states. Second operand has 195 states, 191 states have (on average 1.8429319371727748) internal successors, (352), 191 states have internal predecessors, (352), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:36,628 INFO L93 Difference]: Finished difference Result 253 states and 464 transitions. [2022-04-27 20:30:36,628 INFO L276 IsEmpty]: Start isEmpty. Operand 253 states and 464 transitions. [2022-04-27 20:30:36,629 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:36,629 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:36,629 INFO L74 IsIncluded]: Start isIncluded. First operand has 195 states, 191 states have (on average 1.8429319371727748) internal successors, (352), 191 states have internal predecessors, (352), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 253 states. [2022-04-27 20:30:36,630 INFO L87 Difference]: Start difference. First operand has 195 states, 191 states have (on average 1.8429319371727748) internal successors, (352), 191 states have internal predecessors, (352), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 253 states. [2022-04-27 20:30:36,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:36,644 INFO L93 Difference]: Finished difference Result 253 states and 464 transitions. [2022-04-27 20:30:36,644 INFO L276 IsEmpty]: Start isEmpty. Operand 253 states and 464 transitions. [2022-04-27 20:30:36,644 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:36,644 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:36,645 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:36,645 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:36,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 191 states have (on average 1.8429319371727748) internal successors, (352), 191 states have internal predecessors, (352), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 355 transitions. [2022-04-27 20:30:36,654 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 355 transitions. Word has length 27 [2022-04-27 20:30:36,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:36,655 INFO L495 AbstractCegarLoop]: Abstraction has 195 states and 355 transitions. [2022-04-27 20:30:36,655 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,655 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 355 transitions. [2022-04-27 20:30:36,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:30:36,655 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:36,656 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:36,656 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-27 20:30:36,656 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:36,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:36,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1491357826, now seen corresponding path program 1 times [2022-04-27 20:30:36,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:36,656 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647649549] [2022-04-27 20:30:36,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:36,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:36,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:36,696 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:36,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:36,700 INFO L290 TraceCheckUtils]: 0: Hoare triple {3089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3083#true} is VALID [2022-04-27 20:30:36,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {3083#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,701 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3083#true} {3083#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,701 INFO L272 TraceCheckUtils]: 0: Hoare triple {3083#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:36,701 INFO L290 TraceCheckUtils]: 1: Hoare triple {3089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3083#true} is VALID [2022-04-27 20:30:36,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {3083#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,702 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3083#true} {3083#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,702 INFO L272 TraceCheckUtils]: 4: Hoare triple {3083#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,702 INFO L290 TraceCheckUtils]: 5: Hoare triple {3083#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {3083#true} is VALID [2022-04-27 20:30:36,702 INFO L290 TraceCheckUtils]: 6: Hoare triple {3083#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {3083#true} is VALID [2022-04-27 20:30:36,702 INFO L290 TraceCheckUtils]: 7: Hoare triple {3083#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {3083#true} is VALID [2022-04-27 20:30:36,702 INFO L290 TraceCheckUtils]: 8: Hoare triple {3083#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,703 INFO L290 TraceCheckUtils]: 9: Hoare triple {3083#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {3083#true} is VALID [2022-04-27 20:30:36,703 INFO L290 TraceCheckUtils]: 10: Hoare triple {3083#true} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,703 INFO L290 TraceCheckUtils]: 11: Hoare triple {3088#(= main_~lk3~0 1)} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,704 INFO L290 TraceCheckUtils]: 12: Hoare triple {3088#(= main_~lk3~0 1)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,704 INFO L290 TraceCheckUtils]: 13: Hoare triple {3088#(= main_~lk3~0 1)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,704 INFO L290 TraceCheckUtils]: 14: Hoare triple {3088#(= main_~lk3~0 1)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,705 INFO L290 TraceCheckUtils]: 15: Hoare triple {3088#(= main_~lk3~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,705 INFO L290 TraceCheckUtils]: 16: Hoare triple {3088#(= main_~lk3~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,705 INFO L290 TraceCheckUtils]: 17: Hoare triple {3088#(= main_~lk3~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,706 INFO L290 TraceCheckUtils]: 18: Hoare triple {3088#(= main_~lk3~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,706 INFO L290 TraceCheckUtils]: 19: Hoare triple {3088#(= main_~lk3~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,706 INFO L290 TraceCheckUtils]: 20: Hoare triple {3088#(= main_~lk3~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,707 INFO L290 TraceCheckUtils]: 21: Hoare triple {3088#(= main_~lk3~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,707 INFO L290 TraceCheckUtils]: 22: Hoare triple {3088#(= main_~lk3~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,708 INFO L290 TraceCheckUtils]: 23: Hoare triple {3088#(= main_~lk3~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,708 INFO L290 TraceCheckUtils]: 24: Hoare triple {3088#(= main_~lk3~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,708 INFO L290 TraceCheckUtils]: 25: Hoare triple {3088#(= main_~lk3~0 1)} [341] L160-1-->L166: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {3088#(= main_~lk3~0 1)} is VALID [2022-04-27 20:30:36,709 INFO L290 TraceCheckUtils]: 26: Hoare triple {3088#(= main_~lk3~0 1)} [343] L166-->L226-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {3084#false} is VALID [2022-04-27 20:30:36,709 INFO L290 TraceCheckUtils]: 27: Hoare triple {3084#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3084#false} is VALID [2022-04-27 20:30:36,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:36,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:36,709 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647649549] [2022-04-27 20:30:36,709 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [647649549] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:36,710 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:36,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:36,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077112672] [2022-04-27 20:30:36,710 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:36,710 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:30:36,710 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:36,711 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,729 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:36,730 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:36,730 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:36,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:36,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:36,730 INFO L87 Difference]: Start difference. First operand 195 states and 355 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:36,981 INFO L93 Difference]: Finished difference Result 369 states and 678 transitions. [2022-04-27 20:30:36,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:36,982 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:30:36,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:36,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 182 transitions. [2022-04-27 20:30:36,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:36,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 182 transitions. [2022-04-27 20:30:36,985 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 182 transitions. [2022-04-27 20:30:37,128 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 182 edges. 182 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:37,136 INFO L225 Difference]: With dead ends: 369 [2022-04-27 20:30:37,136 INFO L226 Difference]: Without dead ends: 369 [2022-04-27 20:30:37,136 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:37,137 INFO L413 NwaCegarLoop]: 99 mSDtfsCounter, 239 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 239 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:37,137 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [239 Valid, 106 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:37,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states. [2022-04-27 20:30:37,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 263. [2022-04-27 20:30:37,145 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:37,145 INFO L82 GeneralOperation]: Start isEquivalent. First operand 369 states. Second operand has 263 states, 259 states have (on average 1.83011583011583) internal successors, (474), 259 states have internal predecessors, (474), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,146 INFO L74 IsIncluded]: Start isIncluded. First operand 369 states. Second operand has 263 states, 259 states have (on average 1.83011583011583) internal successors, (474), 259 states have internal predecessors, (474), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,147 INFO L87 Difference]: Start difference. First operand 369 states. Second operand has 263 states, 259 states have (on average 1.83011583011583) internal successors, (474), 259 states have internal predecessors, (474), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:37,156 INFO L93 Difference]: Finished difference Result 369 states and 678 transitions. [2022-04-27 20:30:37,157 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 678 transitions. [2022-04-27 20:30:37,157 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:37,157 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:37,158 INFO L74 IsIncluded]: Start isIncluded. First operand has 263 states, 259 states have (on average 1.83011583011583) internal successors, (474), 259 states have internal predecessors, (474), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 369 states. [2022-04-27 20:30:37,159 INFO L87 Difference]: Start difference. First operand has 263 states, 259 states have (on average 1.83011583011583) internal successors, (474), 259 states have internal predecessors, (474), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 369 states. [2022-04-27 20:30:37,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:37,168 INFO L93 Difference]: Finished difference Result 369 states and 678 transitions. [2022-04-27 20:30:37,168 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 678 transitions. [2022-04-27 20:30:37,169 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:37,169 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:37,169 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:37,169 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:37,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 263 states, 259 states have (on average 1.83011583011583) internal successors, (474), 259 states have internal predecessors, (474), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 477 transitions. [2022-04-27 20:30:37,175 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 477 transitions. Word has length 28 [2022-04-27 20:30:37,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:37,176 INFO L495 AbstractCegarLoop]: Abstraction has 263 states and 477 transitions. [2022-04-27 20:30:37,176 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,176 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 477 transitions. [2022-04-27 20:30:37,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 20:30:37,176 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:37,176 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:37,177 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-04-27 20:30:37,177 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:37,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:37,177 INFO L85 PathProgramCache]: Analyzing trace with hash 1806537117, now seen corresponding path program 1 times [2022-04-27 20:30:37,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:37,177 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5634305] [2022-04-27 20:30:37,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:37,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:37,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:37,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:37,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:37,219 INFO L290 TraceCheckUtils]: 0: Hoare triple {4471#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4465#true} is VALID [2022-04-27 20:30:37,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {4465#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,220 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4465#true} {4465#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,220 INFO L272 TraceCheckUtils]: 0: Hoare triple {4465#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4471#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:37,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {4471#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4465#true} is VALID [2022-04-27 20:30:37,220 INFO L290 TraceCheckUtils]: 2: Hoare triple {4465#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4465#true} {4465#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,221 INFO L272 TraceCheckUtils]: 4: Hoare triple {4465#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,221 INFO L290 TraceCheckUtils]: 5: Hoare triple {4465#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {4465#true} is VALID [2022-04-27 20:30:37,221 INFO L290 TraceCheckUtils]: 6: Hoare triple {4465#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {4465#true} is VALID [2022-04-27 20:30:37,221 INFO L290 TraceCheckUtils]: 7: Hoare triple {4465#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {4465#true} is VALID [2022-04-27 20:30:37,221 INFO L290 TraceCheckUtils]: 8: Hoare triple {4465#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,222 INFO L290 TraceCheckUtils]: 9: Hoare triple {4465#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {4465#true} is VALID [2022-04-27 20:30:37,222 INFO L290 TraceCheckUtils]: 10: Hoare triple {4465#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,222 INFO L290 TraceCheckUtils]: 11: Hoare triple {4470#(= main_~p3~0 0)} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,223 INFO L290 TraceCheckUtils]: 12: Hoare triple {4470#(= main_~p3~0 0)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,223 INFO L290 TraceCheckUtils]: 13: Hoare triple {4470#(= main_~p3~0 0)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,223 INFO L290 TraceCheckUtils]: 14: Hoare triple {4470#(= main_~p3~0 0)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,224 INFO L290 TraceCheckUtils]: 15: Hoare triple {4470#(= main_~p3~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,224 INFO L290 TraceCheckUtils]: 16: Hoare triple {4470#(= main_~p3~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,224 INFO L290 TraceCheckUtils]: 17: Hoare triple {4470#(= main_~p3~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,225 INFO L290 TraceCheckUtils]: 18: Hoare triple {4470#(= main_~p3~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,225 INFO L290 TraceCheckUtils]: 19: Hoare triple {4470#(= main_~p3~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,225 INFO L290 TraceCheckUtils]: 20: Hoare triple {4470#(= main_~p3~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,226 INFO L290 TraceCheckUtils]: 21: Hoare triple {4470#(= main_~p3~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,226 INFO L290 TraceCheckUtils]: 22: Hoare triple {4470#(= main_~p3~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,226 INFO L290 TraceCheckUtils]: 23: Hoare triple {4470#(= main_~p3~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,227 INFO L290 TraceCheckUtils]: 24: Hoare triple {4470#(= main_~p3~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {4470#(= main_~p3~0 0)} is VALID [2022-04-27 20:30:37,227 INFO L290 TraceCheckUtils]: 25: Hoare triple {4470#(= main_~p3~0 0)} [341] L160-1-->L166: Formula: (not (= v_main_~p3~0_4 0)) InVars {main_~p3~0=v_main_~p3~0_4} OutVars{main_~p3~0=v_main_~p3~0_4} AuxVars[] AssignedVars[] {4466#false} is VALID [2022-04-27 20:30:37,227 INFO L290 TraceCheckUtils]: 26: Hoare triple {4466#false} [343] L166-->L226-1: Formula: (not (= v_main_~lk3~0_4 1)) InVars {main_~lk3~0=v_main_~lk3~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_4} AuxVars[] AssignedVars[] {4466#false} is VALID [2022-04-27 20:30:37,227 INFO L290 TraceCheckUtils]: 27: Hoare triple {4466#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4466#false} is VALID [2022-04-27 20:30:37,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:37,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:37,228 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5634305] [2022-04-27 20:30:37,228 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [5634305] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:37,228 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:37,228 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:37,228 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [640122905] [2022-04-27 20:30:37,228 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:37,229 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:30:37,229 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:37,229 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,247 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:37,247 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:37,247 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:37,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:37,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:37,248 INFO L87 Difference]: Start difference. First operand 263 states and 477 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:37,497 INFO L93 Difference]: Finished difference Result 377 states and 680 transitions. [2022-04-27 20:30:37,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:37,497 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 20:30:37,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:37,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 185 transitions. [2022-04-27 20:30:37,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 185 transitions. [2022-04-27 20:30:37,501 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 185 transitions. [2022-04-27 20:30:37,654 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:37,661 INFO L225 Difference]: With dead ends: 377 [2022-04-27 20:30:37,661 INFO L226 Difference]: Without dead ends: 377 [2022-04-27 20:30:37,662 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:37,662 INFO L413 NwaCegarLoop]: 132 mSDtfsCounter, 211 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:37,663 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 139 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:37,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2022-04-27 20:30:37,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 375. [2022-04-27 20:30:37,668 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:37,669 INFO L82 GeneralOperation]: Start isEquivalent. First operand 377 states. Second operand has 375 states, 371 states have (on average 1.8221024258760108) internal successors, (676), 371 states have internal predecessors, (676), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,670 INFO L74 IsIncluded]: Start isIncluded. First operand 377 states. Second operand has 375 states, 371 states have (on average 1.8221024258760108) internal successors, (676), 371 states have internal predecessors, (676), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,671 INFO L87 Difference]: Start difference. First operand 377 states. Second operand has 375 states, 371 states have (on average 1.8221024258760108) internal successors, (676), 371 states have internal predecessors, (676), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:37,681 INFO L93 Difference]: Finished difference Result 377 states and 680 transitions. [2022-04-27 20:30:37,681 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 680 transitions. [2022-04-27 20:30:37,682 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:37,682 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:37,683 INFO L74 IsIncluded]: Start isIncluded. First operand has 375 states, 371 states have (on average 1.8221024258760108) internal successors, (676), 371 states have internal predecessors, (676), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 377 states. [2022-04-27 20:30:37,683 INFO L87 Difference]: Start difference. First operand has 375 states, 371 states have (on average 1.8221024258760108) internal successors, (676), 371 states have internal predecessors, (676), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 377 states. [2022-04-27 20:30:37,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:37,693 INFO L93 Difference]: Finished difference Result 377 states and 680 transitions. [2022-04-27 20:30:37,693 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 680 transitions. [2022-04-27 20:30:37,694 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:37,694 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:37,694 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:37,694 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:37,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 375 states, 371 states have (on average 1.8221024258760108) internal successors, (676), 371 states have internal predecessors, (676), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 679 transitions. [2022-04-27 20:30:37,704 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 679 transitions. Word has length 28 [2022-04-27 20:30:37,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:37,704 INFO L495 AbstractCegarLoop]: Abstraction has 375 states and 679 transitions. [2022-04-27 20:30:37,704 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,704 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 679 transitions. [2022-04-27 20:30:37,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:30:37,705 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:37,705 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:37,705 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-04-27 20:30:37,705 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:37,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:37,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1012580010, now seen corresponding path program 1 times [2022-04-27 20:30:37,706 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:37,706 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349057075] [2022-04-27 20:30:37,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:37,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:37,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:37,747 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:37,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:37,751 INFO L290 TraceCheckUtils]: 0: Hoare triple {5989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5983#true} is VALID [2022-04-27 20:30:37,751 INFO L290 TraceCheckUtils]: 1: Hoare triple {5983#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,751 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5983#true} {5983#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,752 INFO L272 TraceCheckUtils]: 0: Hoare triple {5983#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:37,752 INFO L290 TraceCheckUtils]: 1: Hoare triple {5989#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5983#true} is VALID [2022-04-27 20:30:37,752 INFO L290 TraceCheckUtils]: 2: Hoare triple {5983#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,752 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5983#true} {5983#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,752 INFO L272 TraceCheckUtils]: 4: Hoare triple {5983#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,752 INFO L290 TraceCheckUtils]: 5: Hoare triple {5983#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {5983#true} is VALID [2022-04-27 20:30:37,752 INFO L290 TraceCheckUtils]: 6: Hoare triple {5983#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {5983#true} is VALID [2022-04-27 20:30:37,753 INFO L290 TraceCheckUtils]: 7: Hoare triple {5983#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {5983#true} is VALID [2022-04-27 20:30:37,753 INFO L290 TraceCheckUtils]: 8: Hoare triple {5983#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,753 INFO L290 TraceCheckUtils]: 9: Hoare triple {5983#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {5983#true} is VALID [2022-04-27 20:30:37,753 INFO L290 TraceCheckUtils]: 10: Hoare triple {5983#true} [305] L97-1-->L101-1: Formula: (and (not (= v_main_~p3~0_2 0)) (= v_main_~lk3~0_3 1)) InVars {main_~p3~0=v_main_~p3~0_2} OutVars{main_~p3~0=v_main_~p3~0_2, main_~lk3~0=v_main_~lk3~0_3} AuxVars[] AssignedVars[main_~lk3~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,754 INFO L290 TraceCheckUtils]: 11: Hoare triple {5988#(not (= main_~p3~0 0))} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,754 INFO L290 TraceCheckUtils]: 12: Hoare triple {5988#(not (= main_~p3~0 0))} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {5988#(not (= main_~p3~0 0))} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,755 INFO L290 TraceCheckUtils]: 14: Hoare triple {5988#(not (= main_~p3~0 0))} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,755 INFO L290 TraceCheckUtils]: 15: Hoare triple {5988#(not (= main_~p3~0 0))} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,756 INFO L290 TraceCheckUtils]: 16: Hoare triple {5988#(not (= main_~p3~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,756 INFO L290 TraceCheckUtils]: 17: Hoare triple {5988#(not (= main_~p3~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,756 INFO L290 TraceCheckUtils]: 18: Hoare triple {5988#(not (= main_~p3~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,757 INFO L290 TraceCheckUtils]: 19: Hoare triple {5988#(not (= main_~p3~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,757 INFO L290 TraceCheckUtils]: 20: Hoare triple {5988#(not (= main_~p3~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,757 INFO L290 TraceCheckUtils]: 21: Hoare triple {5988#(not (= main_~p3~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,758 INFO L290 TraceCheckUtils]: 22: Hoare triple {5988#(not (= main_~p3~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,758 INFO L290 TraceCheckUtils]: 23: Hoare triple {5988#(not (= main_~p3~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,758 INFO L290 TraceCheckUtils]: 24: Hoare triple {5988#(not (= main_~p3~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {5988#(not (= main_~p3~0 0))} is VALID [2022-04-27 20:30:37,759 INFO L290 TraceCheckUtils]: 25: Hoare triple {5988#(not (= main_~p3~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {5984#false} is VALID [2022-04-27 20:30:37,759 INFO L290 TraceCheckUtils]: 26: Hoare triple {5984#false} [345] L165-1-->L171: Formula: (not (= v_main_~p4~0_4 0)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {5984#false} is VALID [2022-04-27 20:30:37,759 INFO L290 TraceCheckUtils]: 27: Hoare triple {5984#false} [347] L171-->L226-1: Formula: (not (= v_main_~lk4~0_4 1)) InVars {main_~lk4~0=v_main_~lk4~0_4} OutVars{main_~lk4~0=v_main_~lk4~0_4} AuxVars[] AssignedVars[] {5984#false} is VALID [2022-04-27 20:30:37,759 INFO L290 TraceCheckUtils]: 28: Hoare triple {5984#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5984#false} is VALID [2022-04-27 20:30:37,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:37,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:37,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349057075] [2022-04-27 20:30:37,760 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349057075] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:37,760 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:37,760 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:37,760 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698461127] [2022-04-27 20:30:37,760 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:37,760 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:30:37,761 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:37,761 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:37,785 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:37,785 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:37,785 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:37,785 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:37,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:37,786 INFO L87 Difference]: Start difference. First operand 375 states and 679 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:38,018 INFO L93 Difference]: Finished difference Result 383 states and 684 transitions. [2022-04-27 20:30:38,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:38,018 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:30:38,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:38,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 184 transitions. [2022-04-27 20:30:38,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 184 transitions. [2022-04-27 20:30:38,022 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 184 transitions. [2022-04-27 20:30:38,162 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 184 edges. 184 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:38,170 INFO L225 Difference]: With dead ends: 383 [2022-04-27 20:30:38,170 INFO L226 Difference]: Without dead ends: 383 [2022-04-27 20:30:38,170 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:38,171 INFO L413 NwaCegarLoop]: 150 mSDtfsCounter, 194 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 157 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:38,171 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [194 Valid, 157 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:38,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2022-04-27 20:30:38,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 381. [2022-04-27 20:30:38,177 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:38,178 INFO L82 GeneralOperation]: Start isEquivalent. First operand 383 states. Second operand has 381 states, 377 states have (on average 1.8037135278514589) internal successors, (680), 377 states have internal predecessors, (680), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,179 INFO L74 IsIncluded]: Start isIncluded. First operand 383 states. Second operand has 381 states, 377 states have (on average 1.8037135278514589) internal successors, (680), 377 states have internal predecessors, (680), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,180 INFO L87 Difference]: Start difference. First operand 383 states. Second operand has 381 states, 377 states have (on average 1.8037135278514589) internal successors, (680), 377 states have internal predecessors, (680), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:38,189 INFO L93 Difference]: Finished difference Result 383 states and 684 transitions. [2022-04-27 20:30:38,190 INFO L276 IsEmpty]: Start isEmpty. Operand 383 states and 684 transitions. [2022-04-27 20:30:38,190 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:38,190 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:38,192 INFO L74 IsIncluded]: Start isIncluded. First operand has 381 states, 377 states have (on average 1.8037135278514589) internal successors, (680), 377 states have internal predecessors, (680), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 383 states. [2022-04-27 20:30:38,192 INFO L87 Difference]: Start difference. First operand has 381 states, 377 states have (on average 1.8037135278514589) internal successors, (680), 377 states have internal predecessors, (680), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 383 states. [2022-04-27 20:30:38,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:38,202 INFO L93 Difference]: Finished difference Result 383 states and 684 transitions. [2022-04-27 20:30:38,202 INFO L276 IsEmpty]: Start isEmpty. Operand 383 states and 684 transitions. [2022-04-27 20:30:38,203 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:38,203 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:38,203 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:38,203 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:38,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 377 states have (on average 1.8037135278514589) internal successors, (680), 377 states have internal predecessors, (680), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 683 transitions. [2022-04-27 20:30:38,213 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 683 transitions. Word has length 29 [2022-04-27 20:30:38,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:38,213 INFO L495 AbstractCegarLoop]: Abstraction has 381 states and 683 transitions. [2022-04-27 20:30:38,214 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,214 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 683 transitions. [2022-04-27 20:30:38,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:30:38,214 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:38,214 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:38,215 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-04-27 20:30:38,215 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:38,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:38,215 INFO L85 PathProgramCache]: Analyzing trace with hash 168108139, now seen corresponding path program 1 times [2022-04-27 20:30:38,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:38,215 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009933418] [2022-04-27 20:30:38,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:38,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:38,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:38,257 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:38,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:38,268 INFO L290 TraceCheckUtils]: 0: Hoare triple {7531#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7525#true} is VALID [2022-04-27 20:30:38,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {7525#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,269 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7525#true} {7525#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,269 INFO L272 TraceCheckUtils]: 0: Hoare triple {7525#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7531#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:38,270 INFO L290 TraceCheckUtils]: 1: Hoare triple {7531#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7525#true} is VALID [2022-04-27 20:30:38,270 INFO L290 TraceCheckUtils]: 2: Hoare triple {7525#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,270 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7525#true} {7525#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,270 INFO L272 TraceCheckUtils]: 4: Hoare triple {7525#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,270 INFO L290 TraceCheckUtils]: 5: Hoare triple {7525#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {7525#true} is VALID [2022-04-27 20:30:38,270 INFO L290 TraceCheckUtils]: 6: Hoare triple {7525#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {7525#true} is VALID [2022-04-27 20:30:38,270 INFO L290 TraceCheckUtils]: 7: Hoare triple {7525#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {7525#true} is VALID [2022-04-27 20:30:38,271 INFO L290 TraceCheckUtils]: 8: Hoare triple {7525#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,271 INFO L290 TraceCheckUtils]: 9: Hoare triple {7525#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,271 INFO L290 TraceCheckUtils]: 10: Hoare triple {7525#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {7525#true} is VALID [2022-04-27 20:30:38,272 INFO L290 TraceCheckUtils]: 11: Hoare triple {7525#true} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,273 INFO L290 TraceCheckUtils]: 12: Hoare triple {7530#(= main_~lk4~0 1)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,273 INFO L290 TraceCheckUtils]: 13: Hoare triple {7530#(= main_~lk4~0 1)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,274 INFO L290 TraceCheckUtils]: 14: Hoare triple {7530#(= main_~lk4~0 1)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,274 INFO L290 TraceCheckUtils]: 15: Hoare triple {7530#(= main_~lk4~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,274 INFO L290 TraceCheckUtils]: 16: Hoare triple {7530#(= main_~lk4~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,275 INFO L290 TraceCheckUtils]: 17: Hoare triple {7530#(= main_~lk4~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,275 INFO L290 TraceCheckUtils]: 18: Hoare triple {7530#(= main_~lk4~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,275 INFO L290 TraceCheckUtils]: 19: Hoare triple {7530#(= main_~lk4~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,276 INFO L290 TraceCheckUtils]: 20: Hoare triple {7530#(= main_~lk4~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,276 INFO L290 TraceCheckUtils]: 21: Hoare triple {7530#(= main_~lk4~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,276 INFO L290 TraceCheckUtils]: 22: Hoare triple {7530#(= main_~lk4~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,277 INFO L290 TraceCheckUtils]: 23: Hoare triple {7530#(= main_~lk4~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,277 INFO L290 TraceCheckUtils]: 24: Hoare triple {7530#(= main_~lk4~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,277 INFO L290 TraceCheckUtils]: 25: Hoare triple {7530#(= main_~lk4~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,278 INFO L290 TraceCheckUtils]: 26: Hoare triple {7530#(= main_~lk4~0 1)} [345] L165-1-->L171: Formula: (not (= v_main_~p4~0_4 0)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {7530#(= main_~lk4~0 1)} is VALID [2022-04-27 20:30:38,278 INFO L290 TraceCheckUtils]: 27: Hoare triple {7530#(= main_~lk4~0 1)} [347] L171-->L226-1: Formula: (not (= v_main_~lk4~0_4 1)) InVars {main_~lk4~0=v_main_~lk4~0_4} OutVars{main_~lk4~0=v_main_~lk4~0_4} AuxVars[] AssignedVars[] {7526#false} is VALID [2022-04-27 20:30:38,278 INFO L290 TraceCheckUtils]: 28: Hoare triple {7526#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7526#false} is VALID [2022-04-27 20:30:38,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:38,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:38,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1009933418] [2022-04-27 20:30:38,279 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1009933418] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:38,279 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:38,279 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:38,279 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724939854] [2022-04-27 20:30:38,279 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:38,279 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:30:38,279 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:38,280 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,298 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:38,299 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:38,299 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:38,299 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:38,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:38,300 INFO L87 Difference]: Start difference. First operand 381 states and 683 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:38,546 INFO L93 Difference]: Finished difference Result 715 states and 1292 transitions. [2022-04-27 20:30:38,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:38,546 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:30:38,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:38,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 178 transitions. [2022-04-27 20:30:38,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 178 transitions. [2022-04-27 20:30:38,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 178 transitions. [2022-04-27 20:30:38,688 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 178 edges. 178 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:38,734 INFO L225 Difference]: With dead ends: 715 [2022-04-27 20:30:38,735 INFO L226 Difference]: Without dead ends: 715 [2022-04-27 20:30:38,735 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:38,736 INFO L413 NwaCegarLoop]: 98 mSDtfsCounter, 232 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 232 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 95 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:38,736 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [232 Valid, 105 Invalid, 95 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 93 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:38,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2022-04-27 20:30:38,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 521. [2022-04-27 20:30:38,745 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:38,746 INFO L82 GeneralOperation]: Start isEquivalent. First operand 715 states. Second operand has 521 states, 517 states have (on average 1.7794970986460348) internal successors, (920), 517 states have internal predecessors, (920), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,747 INFO L74 IsIncluded]: Start isIncluded. First operand 715 states. Second operand has 521 states, 517 states have (on average 1.7794970986460348) internal successors, (920), 517 states have internal predecessors, (920), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,747 INFO L87 Difference]: Start difference. First operand 715 states. Second operand has 521 states, 517 states have (on average 1.7794970986460348) internal successors, (920), 517 states have internal predecessors, (920), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:38,773 INFO L93 Difference]: Finished difference Result 715 states and 1292 transitions. [2022-04-27 20:30:38,773 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 1292 transitions. [2022-04-27 20:30:38,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:38,774 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:38,776 INFO L74 IsIncluded]: Start isIncluded. First operand has 521 states, 517 states have (on average 1.7794970986460348) internal successors, (920), 517 states have internal predecessors, (920), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 715 states. [2022-04-27 20:30:38,776 INFO L87 Difference]: Start difference. First operand has 521 states, 517 states have (on average 1.7794970986460348) internal successors, (920), 517 states have internal predecessors, (920), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 715 states. [2022-04-27 20:30:38,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:38,802 INFO L93 Difference]: Finished difference Result 715 states and 1292 transitions. [2022-04-27 20:30:38,802 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 1292 transitions. [2022-04-27 20:30:38,803 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:38,803 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:38,803 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:38,803 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:38,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 521 states, 517 states have (on average 1.7794970986460348) internal successors, (920), 517 states have internal predecessors, (920), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 923 transitions. [2022-04-27 20:30:38,820 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 923 transitions. Word has length 29 [2022-04-27 20:30:38,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:38,820 INFO L495 AbstractCegarLoop]: Abstraction has 521 states and 923 transitions. [2022-04-27 20:30:38,820 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,821 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 923 transitions. [2022-04-27 20:30:38,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 20:30:38,821 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:38,821 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:38,822 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-04-27 20:30:38,822 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:38,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:38,822 INFO L85 PathProgramCache]: Analyzing trace with hash -828964214, now seen corresponding path program 1 times [2022-04-27 20:30:38,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:38,823 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284001524] [2022-04-27 20:30:38,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:38,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:38,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:38,859 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:38,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:38,865 INFO L290 TraceCheckUtils]: 0: Hoare triple {10209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10203#true} is VALID [2022-04-27 20:30:38,865 INFO L290 TraceCheckUtils]: 1: Hoare triple {10203#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,865 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10203#true} {10203#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,865 INFO L272 TraceCheckUtils]: 0: Hoare triple {10203#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:38,866 INFO L290 TraceCheckUtils]: 1: Hoare triple {10209#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10203#true} is VALID [2022-04-27 20:30:38,866 INFO L290 TraceCheckUtils]: 2: Hoare triple {10203#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,866 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10203#true} {10203#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,866 INFO L272 TraceCheckUtils]: 4: Hoare triple {10203#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,866 INFO L290 TraceCheckUtils]: 5: Hoare triple {10203#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {10203#true} is VALID [2022-04-27 20:30:38,866 INFO L290 TraceCheckUtils]: 6: Hoare triple {10203#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {10203#true} is VALID [2022-04-27 20:30:38,866 INFO L290 TraceCheckUtils]: 7: Hoare triple {10203#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {10203#true} is VALID [2022-04-27 20:30:38,867 INFO L290 TraceCheckUtils]: 8: Hoare triple {10203#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,867 INFO L290 TraceCheckUtils]: 9: Hoare triple {10203#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,867 INFO L290 TraceCheckUtils]: 10: Hoare triple {10203#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {10203#true} is VALID [2022-04-27 20:30:38,867 INFO L290 TraceCheckUtils]: 11: Hoare triple {10203#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,867 INFO L290 TraceCheckUtils]: 12: Hoare triple {10208#(= main_~p4~0 0)} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,868 INFO L290 TraceCheckUtils]: 13: Hoare triple {10208#(= main_~p4~0 0)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,868 INFO L290 TraceCheckUtils]: 14: Hoare triple {10208#(= main_~p4~0 0)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,868 INFO L290 TraceCheckUtils]: 15: Hoare triple {10208#(= main_~p4~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,869 INFO L290 TraceCheckUtils]: 16: Hoare triple {10208#(= main_~p4~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,869 INFO L290 TraceCheckUtils]: 17: Hoare triple {10208#(= main_~p4~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,870 INFO L290 TraceCheckUtils]: 18: Hoare triple {10208#(= main_~p4~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,870 INFO L290 TraceCheckUtils]: 19: Hoare triple {10208#(= main_~p4~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,870 INFO L290 TraceCheckUtils]: 20: Hoare triple {10208#(= main_~p4~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,871 INFO L290 TraceCheckUtils]: 21: Hoare triple {10208#(= main_~p4~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,871 INFO L290 TraceCheckUtils]: 22: Hoare triple {10208#(= main_~p4~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,871 INFO L290 TraceCheckUtils]: 23: Hoare triple {10208#(= main_~p4~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,872 INFO L290 TraceCheckUtils]: 24: Hoare triple {10208#(= main_~p4~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,872 INFO L290 TraceCheckUtils]: 25: Hoare triple {10208#(= main_~p4~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {10208#(= main_~p4~0 0)} is VALID [2022-04-27 20:30:38,872 INFO L290 TraceCheckUtils]: 26: Hoare triple {10208#(= main_~p4~0 0)} [345] L165-1-->L171: Formula: (not (= v_main_~p4~0_4 0)) InVars {main_~p4~0=v_main_~p4~0_4} OutVars{main_~p4~0=v_main_~p4~0_4} AuxVars[] AssignedVars[] {10204#false} is VALID [2022-04-27 20:30:38,872 INFO L290 TraceCheckUtils]: 27: Hoare triple {10204#false} [347] L171-->L226-1: Formula: (not (= v_main_~lk4~0_4 1)) InVars {main_~lk4~0=v_main_~lk4~0_4} OutVars{main_~lk4~0=v_main_~lk4~0_4} AuxVars[] AssignedVars[] {10204#false} is VALID [2022-04-27 20:30:38,875 INFO L290 TraceCheckUtils]: 28: Hoare triple {10204#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10204#false} is VALID [2022-04-27 20:30:38,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:38,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:38,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284001524] [2022-04-27 20:30:38,875 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [284001524] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:38,875 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:38,876 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:38,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896144908] [2022-04-27 20:30:38,876 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:38,877 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:30:38,877 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:38,877 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:38,904 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:38,904 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:38,905 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:38,905 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:38,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:38,905 INFO L87 Difference]: Start difference. First operand 521 states and 923 transitions. Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:39,131 INFO L93 Difference]: Finished difference Result 739 states and 1304 transitions. [2022-04-27 20:30:39,132 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:39,132 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 20:30:39,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:39,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 183 transitions. [2022-04-27 20:30:39,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 183 transitions. [2022-04-27 20:30:39,135 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 183 transitions. [2022-04-27 20:30:39,283 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 183 edges. 183 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:39,308 INFO L225 Difference]: With dead ends: 739 [2022-04-27 20:30:39,308 INFO L226 Difference]: Without dead ends: 739 [2022-04-27 20:30:39,308 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:39,309 INFO L413 NwaCegarLoop]: 134 mSDtfsCounter, 205 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 205 SdHoareTripleChecker+Valid, 141 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:39,309 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [205 Valid, 141 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:39,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 739 states. [2022-04-27 20:30:39,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 739 to 737. [2022-04-27 20:30:39,319 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:39,320 INFO L82 GeneralOperation]: Start isEquivalent. First operand 739 states. Second operand has 737 states, 733 states have (on average 1.7735334242837653) internal successors, (1300), 733 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,321 INFO L74 IsIncluded]: Start isIncluded. First operand 739 states. Second operand has 737 states, 733 states have (on average 1.7735334242837653) internal successors, (1300), 733 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,322 INFO L87 Difference]: Start difference. First operand 739 states. Second operand has 737 states, 733 states have (on average 1.7735334242837653) internal successors, (1300), 733 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:39,350 INFO L93 Difference]: Finished difference Result 739 states and 1304 transitions. [2022-04-27 20:30:39,350 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 1304 transitions. [2022-04-27 20:30:39,351 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:39,351 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:39,352 INFO L74 IsIncluded]: Start isIncluded. First operand has 737 states, 733 states have (on average 1.7735334242837653) internal successors, (1300), 733 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 739 states. [2022-04-27 20:30:39,353 INFO L87 Difference]: Start difference. First operand has 737 states, 733 states have (on average 1.7735334242837653) internal successors, (1300), 733 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 739 states. [2022-04-27 20:30:39,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:39,381 INFO L93 Difference]: Finished difference Result 739 states and 1304 transitions. [2022-04-27 20:30:39,381 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 1304 transitions. [2022-04-27 20:30:39,382 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:39,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:39,383 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:39,383 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:39,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 737 states, 733 states have (on average 1.7735334242837653) internal successors, (1300), 733 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 1303 transitions. [2022-04-27 20:30:39,414 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 1303 transitions. Word has length 29 [2022-04-27 20:30:39,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:39,414 INFO L495 AbstractCegarLoop]: Abstraction has 737 states and 1303 transitions. [2022-04-27 20:30:39,414 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.5) internal successors, (26), 3 states have internal predecessors, (26), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,414 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 1303 transitions. [2022-04-27 20:30:39,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:30:39,415 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:39,415 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:39,415 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-04-27 20:30:39,415 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:39,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:39,416 INFO L85 PathProgramCache]: Analyzing trace with hash 916417497, now seen corresponding path program 1 times [2022-04-27 20:30:39,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:39,416 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1093334000] [2022-04-27 20:30:39,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:39,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:39,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:39,450 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:39,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:39,457 INFO L290 TraceCheckUtils]: 0: Hoare triple {13175#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13169#true} is VALID [2022-04-27 20:30:39,458 INFO L290 TraceCheckUtils]: 1: Hoare triple {13169#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,458 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13169#true} {13169#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,458 INFO L272 TraceCheckUtils]: 0: Hoare triple {13169#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13175#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:39,459 INFO L290 TraceCheckUtils]: 1: Hoare triple {13175#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L290 TraceCheckUtils]: 2: Hoare triple {13169#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13169#true} {13169#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L272 TraceCheckUtils]: 4: Hoare triple {13169#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L290 TraceCheckUtils]: 5: Hoare triple {13169#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L290 TraceCheckUtils]: 6: Hoare triple {13169#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L290 TraceCheckUtils]: 7: Hoare triple {13169#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {13169#true} is VALID [2022-04-27 20:30:39,459 INFO L290 TraceCheckUtils]: 8: Hoare triple {13169#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,460 INFO L290 TraceCheckUtils]: 9: Hoare triple {13169#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,460 INFO L290 TraceCheckUtils]: 10: Hoare triple {13169#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {13169#true} is VALID [2022-04-27 20:30:39,460 INFO L290 TraceCheckUtils]: 11: Hoare triple {13169#true} [307] L101-1-->L105-1: Formula: (and (= v_main_~lk4~0_3 1) (not (= v_main_~p4~0_2 0))) InVars {main_~p4~0=v_main_~p4~0_2} OutVars{main_~p4~0=v_main_~p4~0_2, main_~lk4~0=v_main_~lk4~0_3} AuxVars[] AssignedVars[main_~lk4~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,460 INFO L290 TraceCheckUtils]: 12: Hoare triple {13174#(not (= main_~p4~0 0))} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,461 INFO L290 TraceCheckUtils]: 13: Hoare triple {13174#(not (= main_~p4~0 0))} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,461 INFO L290 TraceCheckUtils]: 14: Hoare triple {13174#(not (= main_~p4~0 0))} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,461 INFO L290 TraceCheckUtils]: 15: Hoare triple {13174#(not (= main_~p4~0 0))} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,461 INFO L290 TraceCheckUtils]: 16: Hoare triple {13174#(not (= main_~p4~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,462 INFO L290 TraceCheckUtils]: 17: Hoare triple {13174#(not (= main_~p4~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,462 INFO L290 TraceCheckUtils]: 18: Hoare triple {13174#(not (= main_~p4~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,462 INFO L290 TraceCheckUtils]: 19: Hoare triple {13174#(not (= main_~p4~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,463 INFO L290 TraceCheckUtils]: 20: Hoare triple {13174#(not (= main_~p4~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,463 INFO L290 TraceCheckUtils]: 21: Hoare triple {13174#(not (= main_~p4~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,463 INFO L290 TraceCheckUtils]: 22: Hoare triple {13174#(not (= main_~p4~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,464 INFO L290 TraceCheckUtils]: 23: Hoare triple {13174#(not (= main_~p4~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,464 INFO L290 TraceCheckUtils]: 24: Hoare triple {13174#(not (= main_~p4~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,464 INFO L290 TraceCheckUtils]: 25: Hoare triple {13174#(not (= main_~p4~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {13174#(not (= main_~p4~0 0))} is VALID [2022-04-27 20:30:39,465 INFO L290 TraceCheckUtils]: 26: Hoare triple {13174#(not (= main_~p4~0 0))} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {13170#false} is VALID [2022-04-27 20:30:39,465 INFO L290 TraceCheckUtils]: 27: Hoare triple {13170#false} [349] L170-1-->L176: Formula: (not (= v_main_~p5~0_4 0)) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4} AuxVars[] AssignedVars[] {13170#false} is VALID [2022-04-27 20:30:39,465 INFO L290 TraceCheckUtils]: 28: Hoare triple {13170#false} [351] L176-->L226-1: Formula: (not (= v_main_~lk5~0_4 1)) InVars {main_~lk5~0=v_main_~lk5~0_4} OutVars{main_~lk5~0=v_main_~lk5~0_4} AuxVars[] AssignedVars[] {13170#false} is VALID [2022-04-27 20:30:39,465 INFO L290 TraceCheckUtils]: 29: Hoare triple {13170#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13170#false} is VALID [2022-04-27 20:30:39,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:39,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:39,466 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1093334000] [2022-04-27 20:30:39,466 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1093334000] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:39,466 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:39,466 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:39,466 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103071834] [2022-04-27 20:30:39,466 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:39,467 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:30:39,467 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:39,467 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,485 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:39,485 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:39,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:39,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:39,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:39,486 INFO L87 Difference]: Start difference. First operand 737 states and 1303 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:39,743 INFO L93 Difference]: Finished difference Result 747 states and 1304 transitions. [2022-04-27 20:30:39,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:39,743 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:30:39,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:39,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 182 transitions. [2022-04-27 20:30:39,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 182 transitions. [2022-04-27 20:30:39,746 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 182 transitions. [2022-04-27 20:30:39,901 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 182 edges. 182 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:39,926 INFO L225 Difference]: With dead ends: 747 [2022-04-27 20:30:39,926 INFO L226 Difference]: Without dead ends: 747 [2022-04-27 20:30:39,927 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:39,927 INFO L413 NwaCegarLoop]: 147 mSDtfsCounter, 193 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 193 SdHoareTripleChecker+Valid, 154 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:39,927 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [193 Valid, 154 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 90 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:39,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 747 states. [2022-04-27 20:30:39,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 747 to 745. [2022-04-27 20:30:39,938 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:39,939 INFO L82 GeneralOperation]: Start isEquivalent. First operand 747 states. Second operand has 745 states, 741 states have (on average 1.7543859649122806) internal successors, (1300), 741 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,940 INFO L74 IsIncluded]: Start isIncluded. First operand 747 states. Second operand has 745 states, 741 states have (on average 1.7543859649122806) internal successors, (1300), 741 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,941 INFO L87 Difference]: Start difference. First operand 747 states. Second operand has 745 states, 741 states have (on average 1.7543859649122806) internal successors, (1300), 741 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:39,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:39,971 INFO L93 Difference]: Finished difference Result 747 states and 1304 transitions. [2022-04-27 20:30:39,971 INFO L276 IsEmpty]: Start isEmpty. Operand 747 states and 1304 transitions. [2022-04-27 20:30:39,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:39,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:39,973 INFO L74 IsIncluded]: Start isIncluded. First operand has 745 states, 741 states have (on average 1.7543859649122806) internal successors, (1300), 741 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 747 states. [2022-04-27 20:30:39,974 INFO L87 Difference]: Start difference. First operand has 745 states, 741 states have (on average 1.7543859649122806) internal successors, (1300), 741 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 747 states. [2022-04-27 20:30:40,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:40,002 INFO L93 Difference]: Finished difference Result 747 states and 1304 transitions. [2022-04-27 20:30:40,002 INFO L276 IsEmpty]: Start isEmpty. Operand 747 states and 1304 transitions. [2022-04-27 20:30:40,004 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:40,004 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:40,004 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:40,004 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:40,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 745 states, 741 states have (on average 1.7543859649122806) internal successors, (1300), 741 states have internal predecessors, (1300), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 745 states to 745 states and 1303 transitions. [2022-04-27 20:30:40,034 INFO L78 Accepts]: Start accepts. Automaton has 745 states and 1303 transitions. Word has length 30 [2022-04-27 20:30:40,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:40,034 INFO L495 AbstractCegarLoop]: Abstraction has 745 states and 1303 transitions. [2022-04-27 20:30:40,034 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,034 INFO L276 IsEmpty]: Start isEmpty. Operand 745 states and 1303 transitions. [2022-04-27 20:30:40,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:30:40,035 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:40,035 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:40,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-04-27 20:30:40,035 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:40,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:40,036 INFO L85 PathProgramCache]: Analyzing trace with hash 71945626, now seen corresponding path program 1 times [2022-04-27 20:30:40,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:40,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559589473] [2022-04-27 20:30:40,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:40,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:40,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:40,070 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:40,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:40,075 INFO L290 TraceCheckUtils]: 0: Hoare triple {16173#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16167#true} is VALID [2022-04-27 20:30:40,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {16167#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,075 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16167#true} {16167#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,076 INFO L272 TraceCheckUtils]: 0: Hoare triple {16167#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16173#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:40,076 INFO L290 TraceCheckUtils]: 1: Hoare triple {16173#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16167#true} is VALID [2022-04-27 20:30:40,076 INFO L290 TraceCheckUtils]: 2: Hoare triple {16167#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,076 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16167#true} {16167#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,076 INFO L272 TraceCheckUtils]: 4: Hoare triple {16167#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,077 INFO L290 TraceCheckUtils]: 5: Hoare triple {16167#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {16167#true} is VALID [2022-04-27 20:30:40,077 INFO L290 TraceCheckUtils]: 6: Hoare triple {16167#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {16167#true} is VALID [2022-04-27 20:30:40,077 INFO L290 TraceCheckUtils]: 7: Hoare triple {16167#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {16167#true} is VALID [2022-04-27 20:30:40,077 INFO L290 TraceCheckUtils]: 8: Hoare triple {16167#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,077 INFO L290 TraceCheckUtils]: 9: Hoare triple {16167#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,077 INFO L290 TraceCheckUtils]: 10: Hoare triple {16167#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,078 INFO L290 TraceCheckUtils]: 11: Hoare triple {16167#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {16167#true} is VALID [2022-04-27 20:30:40,078 INFO L290 TraceCheckUtils]: 12: Hoare triple {16167#true} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {16172#(= main_~lk5~0 1)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,079 INFO L290 TraceCheckUtils]: 14: Hoare triple {16172#(= main_~lk5~0 1)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,079 INFO L290 TraceCheckUtils]: 15: Hoare triple {16172#(= main_~lk5~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,079 INFO L290 TraceCheckUtils]: 16: Hoare triple {16172#(= main_~lk5~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,083 INFO L290 TraceCheckUtils]: 17: Hoare triple {16172#(= main_~lk5~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,084 INFO L290 TraceCheckUtils]: 18: Hoare triple {16172#(= main_~lk5~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,084 INFO L290 TraceCheckUtils]: 19: Hoare triple {16172#(= main_~lk5~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,084 INFO L290 TraceCheckUtils]: 20: Hoare triple {16172#(= main_~lk5~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,084 INFO L290 TraceCheckUtils]: 21: Hoare triple {16172#(= main_~lk5~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,085 INFO L290 TraceCheckUtils]: 22: Hoare triple {16172#(= main_~lk5~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,085 INFO L290 TraceCheckUtils]: 23: Hoare triple {16172#(= main_~lk5~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,085 INFO L290 TraceCheckUtils]: 24: Hoare triple {16172#(= main_~lk5~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,086 INFO L290 TraceCheckUtils]: 25: Hoare triple {16172#(= main_~lk5~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,086 INFO L290 TraceCheckUtils]: 26: Hoare triple {16172#(= main_~lk5~0 1)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,087 INFO L290 TraceCheckUtils]: 27: Hoare triple {16172#(= main_~lk5~0 1)} [349] L170-1-->L176: Formula: (not (= v_main_~p5~0_4 0)) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4} AuxVars[] AssignedVars[] {16172#(= main_~lk5~0 1)} is VALID [2022-04-27 20:30:40,088 INFO L290 TraceCheckUtils]: 28: Hoare triple {16172#(= main_~lk5~0 1)} [351] L176-->L226-1: Formula: (not (= v_main_~lk5~0_4 1)) InVars {main_~lk5~0=v_main_~lk5~0_4} OutVars{main_~lk5~0=v_main_~lk5~0_4} AuxVars[] AssignedVars[] {16168#false} is VALID [2022-04-27 20:30:40,090 INFO L290 TraceCheckUtils]: 29: Hoare triple {16168#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16168#false} is VALID [2022-04-27 20:30:40,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:40,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:40,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [559589473] [2022-04-27 20:30:40,091 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [559589473] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:40,091 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:40,091 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:40,091 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51204923] [2022-04-27 20:30:40,091 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:40,092 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:30:40,092 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:40,092 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,110 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:40,110 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:40,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:40,111 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:40,111 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:40,112 INFO L87 Difference]: Start difference. First operand 745 states and 1303 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:40,431 INFO L93 Difference]: Finished difference Result 1387 states and 2448 transitions. [2022-04-27 20:30:40,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:40,431 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:30:40,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:40,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:30:40,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:30:40,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-27 20:30:40,575 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:40,656 INFO L225 Difference]: With dead ends: 1387 [2022-04-27 20:30:40,657 INFO L226 Difference]: Without dead ends: 1387 [2022-04-27 20:30:40,657 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:40,658 INFO L413 NwaCegarLoop]: 97 mSDtfsCounter, 225 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 92 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 225 SdHoareTripleChecker+Valid, 104 SdHoareTripleChecker+Invalid, 94 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 92 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:40,658 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [225 Valid, 104 Invalid, 94 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 92 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:40,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1387 states. [2022-04-27 20:30:40,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1387 to 1033. [2022-04-27 20:30:40,673 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:40,675 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1387 states. Second operand has 1033 states, 1029 states have (on average 1.7220602526724975) internal successors, (1772), 1029 states have internal predecessors, (1772), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,676 INFO L74 IsIncluded]: Start isIncluded. First operand 1387 states. Second operand has 1033 states, 1029 states have (on average 1.7220602526724975) internal successors, (1772), 1029 states have internal predecessors, (1772), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,678 INFO L87 Difference]: Start difference. First operand 1387 states. Second operand has 1033 states, 1029 states have (on average 1.7220602526724975) internal successors, (1772), 1029 states have internal predecessors, (1772), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:40,762 INFO L93 Difference]: Finished difference Result 1387 states and 2448 transitions. [2022-04-27 20:30:40,762 INFO L276 IsEmpty]: Start isEmpty. Operand 1387 states and 2448 transitions. [2022-04-27 20:30:40,766 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:40,766 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:40,768 INFO L74 IsIncluded]: Start isIncluded. First operand has 1033 states, 1029 states have (on average 1.7220602526724975) internal successors, (1772), 1029 states have internal predecessors, (1772), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1387 states. [2022-04-27 20:30:40,770 INFO L87 Difference]: Start difference. First operand has 1033 states, 1029 states have (on average 1.7220602526724975) internal successors, (1772), 1029 states have internal predecessors, (1772), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1387 states. [2022-04-27 20:30:40,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:40,856 INFO L93 Difference]: Finished difference Result 1387 states and 2448 transitions. [2022-04-27 20:30:40,856 INFO L276 IsEmpty]: Start isEmpty. Operand 1387 states and 2448 transitions. [2022-04-27 20:30:40,858 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:40,858 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:40,858 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:40,858 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:40,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1033 states, 1029 states have (on average 1.7220602526724975) internal successors, (1772), 1029 states have internal predecessors, (1772), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1033 states to 1033 states and 1775 transitions. [2022-04-27 20:30:40,910 INFO L78 Accepts]: Start accepts. Automaton has 1033 states and 1775 transitions. Word has length 30 [2022-04-27 20:30:40,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:40,910 INFO L495 AbstractCegarLoop]: Abstraction has 1033 states and 1775 transitions. [2022-04-27 20:30:40,911 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:40,911 INFO L276 IsEmpty]: Start isEmpty. Operand 1033 states and 1775 transitions. [2022-04-27 20:30:40,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 20:30:40,912 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:40,912 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:40,912 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-04-27 20:30:40,912 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:40,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:40,913 INFO L85 PathProgramCache]: Analyzing trace with hash -925126727, now seen corresponding path program 1 times [2022-04-27 20:30:40,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:40,913 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259369598] [2022-04-27 20:30:40,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:40,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:40,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:40,969 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:40,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:40,975 INFO L290 TraceCheckUtils]: 0: Hoare triple {21379#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21373#true} is VALID [2022-04-27 20:30:40,977 INFO L290 TraceCheckUtils]: 1: Hoare triple {21373#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,977 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21373#true} {21373#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {21373#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21379#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:40,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {21379#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21373#true} is VALID [2022-04-27 20:30:40,979 INFO L290 TraceCheckUtils]: 2: Hoare triple {21373#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,979 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21373#true} {21373#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {21373#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,980 INFO L290 TraceCheckUtils]: 5: Hoare triple {21373#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {21373#true} is VALID [2022-04-27 20:30:40,980 INFO L290 TraceCheckUtils]: 6: Hoare triple {21373#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {21373#true} is VALID [2022-04-27 20:30:40,980 INFO L290 TraceCheckUtils]: 7: Hoare triple {21373#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {21373#true} is VALID [2022-04-27 20:30:40,983 INFO L290 TraceCheckUtils]: 8: Hoare triple {21373#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,983 INFO L290 TraceCheckUtils]: 9: Hoare triple {21373#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,983 INFO L290 TraceCheckUtils]: 10: Hoare triple {21373#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,983 INFO L290 TraceCheckUtils]: 11: Hoare triple {21373#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {21373#true} is VALID [2022-04-27 20:30:40,983 INFO L290 TraceCheckUtils]: 12: Hoare triple {21373#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,984 INFO L290 TraceCheckUtils]: 13: Hoare triple {21378#(= main_~p5~0 0)} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,984 INFO L290 TraceCheckUtils]: 14: Hoare triple {21378#(= main_~p5~0 0)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,984 INFO L290 TraceCheckUtils]: 15: Hoare triple {21378#(= main_~p5~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,985 INFO L290 TraceCheckUtils]: 16: Hoare triple {21378#(= main_~p5~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,985 INFO L290 TraceCheckUtils]: 17: Hoare triple {21378#(= main_~p5~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,985 INFO L290 TraceCheckUtils]: 18: Hoare triple {21378#(= main_~p5~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,986 INFO L290 TraceCheckUtils]: 19: Hoare triple {21378#(= main_~p5~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,986 INFO L290 TraceCheckUtils]: 20: Hoare triple {21378#(= main_~p5~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,986 INFO L290 TraceCheckUtils]: 21: Hoare triple {21378#(= main_~p5~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,987 INFO L290 TraceCheckUtils]: 22: Hoare triple {21378#(= main_~p5~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,987 INFO L290 TraceCheckUtils]: 23: Hoare triple {21378#(= main_~p5~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,987 INFO L290 TraceCheckUtils]: 24: Hoare triple {21378#(= main_~p5~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,987 INFO L290 TraceCheckUtils]: 25: Hoare triple {21378#(= main_~p5~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,988 INFO L290 TraceCheckUtils]: 26: Hoare triple {21378#(= main_~p5~0 0)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {21378#(= main_~p5~0 0)} is VALID [2022-04-27 20:30:40,988 INFO L290 TraceCheckUtils]: 27: Hoare triple {21378#(= main_~p5~0 0)} [349] L170-1-->L176: Formula: (not (= v_main_~p5~0_4 0)) InVars {main_~p5~0=v_main_~p5~0_4} OutVars{main_~p5~0=v_main_~p5~0_4} AuxVars[] AssignedVars[] {21374#false} is VALID [2022-04-27 20:30:40,988 INFO L290 TraceCheckUtils]: 28: Hoare triple {21374#false} [351] L176-->L226-1: Formula: (not (= v_main_~lk5~0_4 1)) InVars {main_~lk5~0=v_main_~lk5~0_4} OutVars{main_~lk5~0=v_main_~lk5~0_4} AuxVars[] AssignedVars[] {21374#false} is VALID [2022-04-27 20:30:40,988 INFO L290 TraceCheckUtils]: 29: Hoare triple {21374#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21374#false} is VALID [2022-04-27 20:30:40,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:40,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:40,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259369598] [2022-04-27 20:30:40,989 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1259369598] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:40,989 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:40,989 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:40,989 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [356381797] [2022-04-27 20:30:40,989 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:40,990 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:30:40,990 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:40,990 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,008 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:41,008 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:41,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:41,009 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:41,010 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:41,010 INFO L87 Difference]: Start difference. First operand 1033 states and 1775 transitions. Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:41,343 INFO L93 Difference]: Finished difference Result 1451 states and 2488 transitions. [2022-04-27 20:30:41,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:41,344 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 20:30:41,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:41,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 181 transitions. [2022-04-27 20:30:41,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 181 transitions. [2022-04-27 20:30:41,348 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 181 transitions. [2022-04-27 20:30:41,504 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 181 edges. 181 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:41,590 INFO L225 Difference]: With dead ends: 1451 [2022-04-27 20:30:41,591 INFO L226 Difference]: Without dead ends: 1451 [2022-04-27 20:30:41,591 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:41,592 INFO L413 NwaCegarLoop]: 136 mSDtfsCounter, 199 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 143 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:41,592 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 143 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 90 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:41,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1451 states. [2022-04-27 20:30:41,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1451 to 1449. [2022-04-27 20:30:41,614 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:41,616 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1451 states. Second operand has 1449 states, 1445 states have (on average 1.719031141868512) internal successors, (2484), 1445 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,618 INFO L74 IsIncluded]: Start isIncluded. First operand 1451 states. Second operand has 1449 states, 1445 states have (on average 1.719031141868512) internal successors, (2484), 1445 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,620 INFO L87 Difference]: Start difference. First operand 1451 states. Second operand has 1449 states, 1445 states have (on average 1.719031141868512) internal successors, (2484), 1445 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:41,713 INFO L93 Difference]: Finished difference Result 1451 states and 2488 transitions. [2022-04-27 20:30:41,713 INFO L276 IsEmpty]: Start isEmpty. Operand 1451 states and 2488 transitions. [2022-04-27 20:30:41,716 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:41,716 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:41,718 INFO L74 IsIncluded]: Start isIncluded. First operand has 1449 states, 1445 states have (on average 1.719031141868512) internal successors, (2484), 1445 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1451 states. [2022-04-27 20:30:41,720 INFO L87 Difference]: Start difference. First operand has 1449 states, 1445 states have (on average 1.719031141868512) internal successors, (2484), 1445 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1451 states. [2022-04-27 20:30:41,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:41,808 INFO L93 Difference]: Finished difference Result 1451 states and 2488 transitions. [2022-04-27 20:30:41,808 INFO L276 IsEmpty]: Start isEmpty. Operand 1451 states and 2488 transitions. [2022-04-27 20:30:41,810 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:41,810 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:41,810 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:41,811 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:41,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1449 states, 1445 states have (on average 1.719031141868512) internal successors, (2484), 1445 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1449 states to 1449 states and 2487 transitions. [2022-04-27 20:30:41,899 INFO L78 Accepts]: Start accepts. Automaton has 1449 states and 2487 transitions. Word has length 30 [2022-04-27 20:30:41,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:41,899 INFO L495 AbstractCegarLoop]: Abstraction has 1449 states and 2487 transitions. [2022-04-27 20:30:41,903 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,903 INFO L276 IsEmpty]: Start isEmpty. Operand 1449 states and 2487 transitions. [2022-04-27 20:30:41,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:30:41,905 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:41,905 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:41,905 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-04-27 20:30:41,905 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:41,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:41,905 INFO L85 PathProgramCache]: Analyzing trace with hash -2064620282, now seen corresponding path program 1 times [2022-04-27 20:30:41,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:41,906 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504018847] [2022-04-27 20:30:41,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:41,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:41,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:41,951 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:41,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:41,955 INFO L290 TraceCheckUtils]: 0: Hoare triple {27193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27187#true} is VALID [2022-04-27 20:30:41,955 INFO L290 TraceCheckUtils]: 1: Hoare triple {27187#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,955 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27187#true} {27187#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,956 INFO L272 TraceCheckUtils]: 0: Hoare triple {27187#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:41,956 INFO L290 TraceCheckUtils]: 1: Hoare triple {27193#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27187#true} is VALID [2022-04-27 20:30:41,956 INFO L290 TraceCheckUtils]: 2: Hoare triple {27187#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,956 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27187#true} {27187#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,956 INFO L272 TraceCheckUtils]: 4: Hoare triple {27187#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,956 INFO L290 TraceCheckUtils]: 5: Hoare triple {27187#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {27187#true} is VALID [2022-04-27 20:30:41,957 INFO L290 TraceCheckUtils]: 6: Hoare triple {27187#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {27187#true} is VALID [2022-04-27 20:30:41,958 INFO L290 TraceCheckUtils]: 7: Hoare triple {27187#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {27187#true} is VALID [2022-04-27 20:30:41,958 INFO L290 TraceCheckUtils]: 8: Hoare triple {27187#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,958 INFO L290 TraceCheckUtils]: 9: Hoare triple {27187#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,958 INFO L290 TraceCheckUtils]: 10: Hoare triple {27187#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,958 INFO L290 TraceCheckUtils]: 11: Hoare triple {27187#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {27187#true} is VALID [2022-04-27 20:30:41,958 INFO L290 TraceCheckUtils]: 12: Hoare triple {27187#true} [309] L105-1-->L109-1: Formula: (and (= v_main_~lk5~0_3 1) (not (= v_main_~p5~0_2 0))) InVars {main_~p5~0=v_main_~p5~0_2} OutVars{main_~p5~0=v_main_~p5~0_2, main_~lk5~0=v_main_~lk5~0_3} AuxVars[] AssignedVars[main_~lk5~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,959 INFO L290 TraceCheckUtils]: 13: Hoare triple {27192#(not (= main_~p5~0 0))} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,960 INFO L290 TraceCheckUtils]: 14: Hoare triple {27192#(not (= main_~p5~0 0))} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,960 INFO L290 TraceCheckUtils]: 15: Hoare triple {27192#(not (= main_~p5~0 0))} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,960 INFO L290 TraceCheckUtils]: 16: Hoare triple {27192#(not (= main_~p5~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,961 INFO L290 TraceCheckUtils]: 17: Hoare triple {27192#(not (= main_~p5~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,961 INFO L290 TraceCheckUtils]: 18: Hoare triple {27192#(not (= main_~p5~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,961 INFO L290 TraceCheckUtils]: 19: Hoare triple {27192#(not (= main_~p5~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,961 INFO L290 TraceCheckUtils]: 20: Hoare triple {27192#(not (= main_~p5~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,962 INFO L290 TraceCheckUtils]: 21: Hoare triple {27192#(not (= main_~p5~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,962 INFO L290 TraceCheckUtils]: 22: Hoare triple {27192#(not (= main_~p5~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,962 INFO L290 TraceCheckUtils]: 23: Hoare triple {27192#(not (= main_~p5~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,963 INFO L290 TraceCheckUtils]: 24: Hoare triple {27192#(not (= main_~p5~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,963 INFO L290 TraceCheckUtils]: 25: Hoare triple {27192#(not (= main_~p5~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,963 INFO L290 TraceCheckUtils]: 26: Hoare triple {27192#(not (= main_~p5~0 0))} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {27192#(not (= main_~p5~0 0))} is VALID [2022-04-27 20:30:41,964 INFO L290 TraceCheckUtils]: 27: Hoare triple {27192#(not (= main_~p5~0 0))} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {27188#false} is VALID [2022-04-27 20:30:41,964 INFO L290 TraceCheckUtils]: 28: Hoare triple {27188#false} [353] L175-1-->L181: Formula: (not (= v_main_~p6~0_4 0)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[] {27188#false} is VALID [2022-04-27 20:30:41,964 INFO L290 TraceCheckUtils]: 29: Hoare triple {27188#false} [355] L181-->L226-1: Formula: (not (= v_main_~lk6~0_4 1)) InVars {main_~lk6~0=v_main_~lk6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_4} AuxVars[] AssignedVars[] {27188#false} is VALID [2022-04-27 20:30:41,964 INFO L290 TraceCheckUtils]: 30: Hoare triple {27188#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27188#false} is VALID [2022-04-27 20:30:41,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:41,966 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:41,966 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504018847] [2022-04-27 20:30:41,966 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1504018847] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:41,966 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:41,966 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:41,966 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890244559] [2022-04-27 20:30:41,966 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:41,967 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:41,967 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:41,967 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:41,988 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:41,988 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:41,988 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:41,988 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:41,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:41,989 INFO L87 Difference]: Start difference. First operand 1449 states and 2487 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:42,310 INFO L93 Difference]: Finished difference Result 1467 states and 2488 transitions. [2022-04-27 20:30:42,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:42,311 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:42,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:42,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 180 transitions. [2022-04-27 20:30:42,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 180 transitions. [2022-04-27 20:30:42,313 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 180 transitions. [2022-04-27 20:30:42,460 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 180 edges. 180 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:42,546 INFO L225 Difference]: With dead ends: 1467 [2022-04-27 20:30:42,546 INFO L226 Difference]: Without dead ends: 1467 [2022-04-27 20:30:42,547 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:42,547 INFO L413 NwaCegarLoop]: 144 mSDtfsCounter, 192 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 192 SdHoareTripleChecker+Valid, 151 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:42,547 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [192 Valid, 151 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:42,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1467 states. [2022-04-27 20:30:42,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1467 to 1465. [2022-04-27 20:30:42,567 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:42,569 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1467 states. Second operand has 1465 states, 1461 states have (on average 1.700205338809035) internal successors, (2484), 1461 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,571 INFO L74 IsIncluded]: Start isIncluded. First operand 1467 states. Second operand has 1465 states, 1461 states have (on average 1.700205338809035) internal successors, (2484), 1461 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,572 INFO L87 Difference]: Start difference. First operand 1467 states. Second operand has 1465 states, 1461 states have (on average 1.700205338809035) internal successors, (2484), 1461 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:42,661 INFO L93 Difference]: Finished difference Result 1467 states and 2488 transitions. [2022-04-27 20:30:42,661 INFO L276 IsEmpty]: Start isEmpty. Operand 1467 states and 2488 transitions. [2022-04-27 20:30:42,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:42,663 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:42,666 INFO L74 IsIncluded]: Start isIncluded. First operand has 1465 states, 1461 states have (on average 1.700205338809035) internal successors, (2484), 1461 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1467 states. [2022-04-27 20:30:42,667 INFO L87 Difference]: Start difference. First operand has 1465 states, 1461 states have (on average 1.700205338809035) internal successors, (2484), 1461 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 1467 states. [2022-04-27 20:30:42,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:42,766 INFO L93 Difference]: Finished difference Result 1467 states and 2488 transitions. [2022-04-27 20:30:42,766 INFO L276 IsEmpty]: Start isEmpty. Operand 1467 states and 2488 transitions. [2022-04-27 20:30:42,769 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:42,769 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:42,769 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:42,769 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:42,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1465 states, 1461 states have (on average 1.700205338809035) internal successors, (2484), 1461 states have internal predecessors, (2484), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1465 states to 1465 states and 2487 transitions. [2022-04-27 20:30:42,861 INFO L78 Accepts]: Start accepts. Automaton has 1465 states and 2487 transitions. Word has length 31 [2022-04-27 20:30:42,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:42,861 INFO L495 AbstractCegarLoop]: Abstraction has 1465 states and 2487 transitions. [2022-04-27 20:30:42,861 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,861 INFO L276 IsEmpty]: Start isEmpty. Operand 1465 states and 2487 transitions. [2022-04-27 20:30:42,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:30:42,863 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:42,863 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:42,863 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-04-27 20:30:42,863 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:42,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:42,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1385875143, now seen corresponding path program 1 times [2022-04-27 20:30:42,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:42,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1441175178] [2022-04-27 20:30:42,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:42,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:42,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:42,906 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:42,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:42,910 INFO L290 TraceCheckUtils]: 0: Hoare triple {33071#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {33065#true} is VALID [2022-04-27 20:30:42,910 INFO L290 TraceCheckUtils]: 1: Hoare triple {33065#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,910 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {33065#true} {33065#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,910 INFO L272 TraceCheckUtils]: 0: Hoare triple {33065#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33071#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:42,911 INFO L290 TraceCheckUtils]: 1: Hoare triple {33071#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L290 TraceCheckUtils]: 2: Hoare triple {33065#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {33065#true} {33065#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L272 TraceCheckUtils]: 4: Hoare triple {33065#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L290 TraceCheckUtils]: 5: Hoare triple {33065#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L290 TraceCheckUtils]: 6: Hoare triple {33065#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L290 TraceCheckUtils]: 7: Hoare triple {33065#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {33065#true} is VALID [2022-04-27 20:30:42,911 INFO L290 TraceCheckUtils]: 8: Hoare triple {33065#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,912 INFO L290 TraceCheckUtils]: 9: Hoare triple {33065#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,912 INFO L290 TraceCheckUtils]: 10: Hoare triple {33065#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,912 INFO L290 TraceCheckUtils]: 11: Hoare triple {33065#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,912 INFO L290 TraceCheckUtils]: 12: Hoare triple {33065#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {33065#true} is VALID [2022-04-27 20:30:42,912 INFO L290 TraceCheckUtils]: 13: Hoare triple {33065#true} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,912 INFO L290 TraceCheckUtils]: 14: Hoare triple {33070#(= main_~lk6~0 1)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,913 INFO L290 TraceCheckUtils]: 15: Hoare triple {33070#(= main_~lk6~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,913 INFO L290 TraceCheckUtils]: 16: Hoare triple {33070#(= main_~lk6~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,913 INFO L290 TraceCheckUtils]: 17: Hoare triple {33070#(= main_~lk6~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,914 INFO L290 TraceCheckUtils]: 18: Hoare triple {33070#(= main_~lk6~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,914 INFO L290 TraceCheckUtils]: 19: Hoare triple {33070#(= main_~lk6~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,914 INFO L290 TraceCheckUtils]: 20: Hoare triple {33070#(= main_~lk6~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,915 INFO L290 TraceCheckUtils]: 21: Hoare triple {33070#(= main_~lk6~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,915 INFO L290 TraceCheckUtils]: 22: Hoare triple {33070#(= main_~lk6~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,915 INFO L290 TraceCheckUtils]: 23: Hoare triple {33070#(= main_~lk6~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,916 INFO L290 TraceCheckUtils]: 24: Hoare triple {33070#(= main_~lk6~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,916 INFO L290 TraceCheckUtils]: 25: Hoare triple {33070#(= main_~lk6~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,916 INFO L290 TraceCheckUtils]: 26: Hoare triple {33070#(= main_~lk6~0 1)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,917 INFO L290 TraceCheckUtils]: 27: Hoare triple {33070#(= main_~lk6~0 1)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,917 INFO L290 TraceCheckUtils]: 28: Hoare triple {33070#(= main_~lk6~0 1)} [353] L175-1-->L181: Formula: (not (= v_main_~p6~0_4 0)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[] {33070#(= main_~lk6~0 1)} is VALID [2022-04-27 20:30:42,917 INFO L290 TraceCheckUtils]: 29: Hoare triple {33070#(= main_~lk6~0 1)} [355] L181-->L226-1: Formula: (not (= v_main_~lk6~0_4 1)) InVars {main_~lk6~0=v_main_~lk6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_4} AuxVars[] AssignedVars[] {33066#false} is VALID [2022-04-27 20:30:42,917 INFO L290 TraceCheckUtils]: 30: Hoare triple {33066#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {33066#false} is VALID [2022-04-27 20:30:42,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:42,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:42,918 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1441175178] [2022-04-27 20:30:42,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1441175178] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:42,918 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:42,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:42,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052178291] [2022-04-27 20:30:42,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:42,928 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:42,929 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:42,929 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:42,948 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:42,949 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:42,949 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:42,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:42,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:42,949 INFO L87 Difference]: Start difference. First operand 1465 states and 2487 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:43,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:43,464 INFO L93 Difference]: Finished difference Result 2699 states and 4632 transitions. [2022-04-27 20:30:43,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:43,465 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:43,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:43,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:43,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-27 20:30:43,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:43,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 170 transitions. [2022-04-27 20:30:43,467 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 170 transitions. [2022-04-27 20:30:43,608 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 170 edges. 170 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:43,899 INFO L225 Difference]: With dead ends: 2699 [2022-04-27 20:30:43,900 INFO L226 Difference]: Without dead ends: 2699 [2022-04-27 20:30:43,901 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:43,903 INFO L413 NwaCegarLoop]: 96 mSDtfsCounter, 218 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 218 SdHoareTripleChecker+Valid, 103 SdHoareTripleChecker+Invalid, 93 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:43,904 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [218 Valid, 103 Invalid, 93 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:43,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2699 states. [2022-04-27 20:30:43,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2699 to 2057. [2022-04-27 20:30:43,938 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:43,941 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2699 states. Second operand has 2057 states, 2053 states have (on average 1.6619581100828056) internal successors, (3412), 2053 states have internal predecessors, (3412), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:43,944 INFO L74 IsIncluded]: Start isIncluded. First operand 2699 states. Second operand has 2057 states, 2053 states have (on average 1.6619581100828056) internal successors, (3412), 2053 states have internal predecessors, (3412), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:43,946 INFO L87 Difference]: Start difference. First operand 2699 states. Second operand has 2057 states, 2053 states have (on average 1.6619581100828056) internal successors, (3412), 2053 states have internal predecessors, (3412), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:44,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:44,229 INFO L93 Difference]: Finished difference Result 2699 states and 4632 transitions. [2022-04-27 20:30:44,229 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4632 transitions. [2022-04-27 20:30:44,233 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:44,233 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:44,236 INFO L74 IsIncluded]: Start isIncluded. First operand has 2057 states, 2053 states have (on average 1.6619581100828056) internal successors, (3412), 2053 states have internal predecessors, (3412), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-27 20:30:44,238 INFO L87 Difference]: Start difference. First operand has 2057 states, 2053 states have (on average 1.6619581100828056) internal successors, (3412), 2053 states have internal predecessors, (3412), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2699 states. [2022-04-27 20:30:44,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:44,522 INFO L93 Difference]: Finished difference Result 2699 states and 4632 transitions. [2022-04-27 20:30:44,522 INFO L276 IsEmpty]: Start isEmpty. Operand 2699 states and 4632 transitions. [2022-04-27 20:30:44,526 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:44,526 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:44,527 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:44,527 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:44,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2057 states, 2053 states have (on average 1.6619581100828056) internal successors, (3412), 2053 states have internal predecessors, (3412), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:44,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2057 states to 2057 states and 3415 transitions. [2022-04-27 20:30:44,714 INFO L78 Accepts]: Start accepts. Automaton has 2057 states and 3415 transitions. Word has length 31 [2022-04-27 20:30:44,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:44,714 INFO L495 AbstractCegarLoop]: Abstraction has 2057 states and 3415 transitions. [2022-04-27 20:30:44,715 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:44,715 INFO L276 IsEmpty]: Start isEmpty. Operand 2057 states and 3415 transitions. [2022-04-27 20:30:44,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 20:30:44,717 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:44,717 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:44,717 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-04-27 20:30:44,717 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:44,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:44,717 INFO L85 PathProgramCache]: Analyzing trace with hash 388802790, now seen corresponding path program 1 times [2022-04-27 20:30:44,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:44,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891268489] [2022-04-27 20:30:44,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:44,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:44,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:44,763 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:44,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:44,771 INFO L290 TraceCheckUtils]: 0: Hoare triple {43237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {43231#true} is VALID [2022-04-27 20:30:44,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {43231#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,771 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {43231#true} {43231#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,772 INFO L272 TraceCheckUtils]: 0: Hoare triple {43231#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:44,772 INFO L290 TraceCheckUtils]: 1: Hoare triple {43237#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {43231#true} is VALID [2022-04-27 20:30:44,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {43231#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,772 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {43231#true} {43231#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,772 INFO L272 TraceCheckUtils]: 4: Hoare triple {43231#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,772 INFO L290 TraceCheckUtils]: 5: Hoare triple {43231#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {43231#true} is VALID [2022-04-27 20:30:44,772 INFO L290 TraceCheckUtils]: 6: Hoare triple {43231#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 7: Hoare triple {43231#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 8: Hoare triple {43231#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 9: Hoare triple {43231#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 10: Hoare triple {43231#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 11: Hoare triple {43231#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 12: Hoare triple {43231#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {43231#true} is VALID [2022-04-27 20:30:44,773 INFO L290 TraceCheckUtils]: 13: Hoare triple {43231#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,774 INFO L290 TraceCheckUtils]: 14: Hoare triple {43236#(= main_~p6~0 0)} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,774 INFO L290 TraceCheckUtils]: 15: Hoare triple {43236#(= main_~p6~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,774 INFO L290 TraceCheckUtils]: 16: Hoare triple {43236#(= main_~p6~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,775 INFO L290 TraceCheckUtils]: 17: Hoare triple {43236#(= main_~p6~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,775 INFO L290 TraceCheckUtils]: 18: Hoare triple {43236#(= main_~p6~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,775 INFO L290 TraceCheckUtils]: 19: Hoare triple {43236#(= main_~p6~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,776 INFO L290 TraceCheckUtils]: 20: Hoare triple {43236#(= main_~p6~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,777 INFO L290 TraceCheckUtils]: 21: Hoare triple {43236#(= main_~p6~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,778 INFO L290 TraceCheckUtils]: 22: Hoare triple {43236#(= main_~p6~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,780 INFO L290 TraceCheckUtils]: 23: Hoare triple {43236#(= main_~p6~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,780 INFO L290 TraceCheckUtils]: 24: Hoare triple {43236#(= main_~p6~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,780 INFO L290 TraceCheckUtils]: 25: Hoare triple {43236#(= main_~p6~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,780 INFO L290 TraceCheckUtils]: 26: Hoare triple {43236#(= main_~p6~0 0)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,781 INFO L290 TraceCheckUtils]: 27: Hoare triple {43236#(= main_~p6~0 0)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {43236#(= main_~p6~0 0)} is VALID [2022-04-27 20:30:44,781 INFO L290 TraceCheckUtils]: 28: Hoare triple {43236#(= main_~p6~0 0)} [353] L175-1-->L181: Formula: (not (= v_main_~p6~0_4 0)) InVars {main_~p6~0=v_main_~p6~0_4} OutVars{main_~p6~0=v_main_~p6~0_4} AuxVars[] AssignedVars[] {43232#false} is VALID [2022-04-27 20:30:44,781 INFO L290 TraceCheckUtils]: 29: Hoare triple {43232#false} [355] L181-->L226-1: Formula: (not (= v_main_~lk6~0_4 1)) InVars {main_~lk6~0=v_main_~lk6~0_4} OutVars{main_~lk6~0=v_main_~lk6~0_4} AuxVars[] AssignedVars[] {43232#false} is VALID [2022-04-27 20:30:44,781 INFO L290 TraceCheckUtils]: 30: Hoare triple {43232#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {43232#false} is VALID [2022-04-27 20:30:44,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:44,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:44,782 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891268489] [2022-04-27 20:30:44,783 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1891268489] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:44,783 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:44,783 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:44,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810412928] [2022-04-27 20:30:44,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:44,784 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:44,784 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:44,784 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:44,803 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:44,803 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:44,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:44,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:44,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:44,804 INFO L87 Difference]: Start difference. First operand 2057 states and 3415 transitions. Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:45,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:45,314 INFO L93 Difference]: Finished difference Result 2859 states and 4744 transitions. [2022-04-27 20:30:45,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:45,314 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 20:30:45,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:45,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:45,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 179 transitions. [2022-04-27 20:30:45,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:45,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 179 transitions. [2022-04-27 20:30:45,321 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 179 transitions. [2022-04-27 20:30:45,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 179 edges. 179 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:45,671 INFO L225 Difference]: With dead ends: 2859 [2022-04-27 20:30:45,671 INFO L226 Difference]: Without dead ends: 2859 [2022-04-27 20:30:45,671 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:45,672 INFO L413 NwaCegarLoop]: 138 mSDtfsCounter, 193 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 193 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:45,673 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [193 Valid, 145 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:45,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2859 states. [2022-04-27 20:30:45,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2859 to 2857. [2022-04-27 20:30:45,712 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:45,716 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2859 states. Second operand has 2857 states, 2853 states have (on average 1.6614090431125133) internal successors, (4740), 2853 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:45,719 INFO L74 IsIncluded]: Start isIncluded. First operand 2859 states. Second operand has 2857 states, 2853 states have (on average 1.6614090431125133) internal successors, (4740), 2853 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:45,721 INFO L87 Difference]: Start difference. First operand 2859 states. Second operand has 2857 states, 2853 states have (on average 1.6614090431125133) internal successors, (4740), 2853 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:46,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:46,030 INFO L93 Difference]: Finished difference Result 2859 states and 4744 transitions. [2022-04-27 20:30:46,030 INFO L276 IsEmpty]: Start isEmpty. Operand 2859 states and 4744 transitions. [2022-04-27 20:30:46,034 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:46,034 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:46,038 INFO L74 IsIncluded]: Start isIncluded. First operand has 2857 states, 2853 states have (on average 1.6614090431125133) internal successors, (4740), 2853 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2859 states. [2022-04-27 20:30:46,041 INFO L87 Difference]: Start difference. First operand has 2857 states, 2853 states have (on average 1.6614090431125133) internal successors, (4740), 2853 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2859 states. [2022-04-27 20:30:46,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:46,273 INFO L93 Difference]: Finished difference Result 2859 states and 4744 transitions. [2022-04-27 20:30:46,274 INFO L276 IsEmpty]: Start isEmpty. Operand 2859 states and 4744 transitions. [2022-04-27 20:30:46,277 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:46,277 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:46,277 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:46,277 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:46,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2857 states, 2853 states have (on average 1.6614090431125133) internal successors, (4740), 2853 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:46,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2857 states to 2857 states and 4743 transitions. [2022-04-27 20:30:46,596 INFO L78 Accepts]: Start accepts. Automaton has 2857 states and 4743 transitions. Word has length 31 [2022-04-27 20:30:46,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:46,596 INFO L495 AbstractCegarLoop]: Abstraction has 2857 states and 4743 transitions. [2022-04-27 20:30:46,596 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.0) internal successors, (28), 3 states have internal predecessors, (28), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:46,596 INFO L276 IsEmpty]: Start isEmpty. Operand 2857 states and 4743 transitions. [2022-04-27 20:30:46,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:46,598 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:46,598 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:46,598 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-04-27 20:30:46,598 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:46,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:46,598 INFO L85 PathProgramCache]: Analyzing trace with hash 12489205, now seen corresponding path program 1 times [2022-04-27 20:30:46,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:46,599 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329297515] [2022-04-27 20:30:46,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:46,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:46,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:46,637 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:46,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:46,642 INFO L290 TraceCheckUtils]: 0: Hoare triple {54683#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {54677#true} is VALID [2022-04-27 20:30:46,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {54677#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,642 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {54677#true} {54677#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,642 INFO L272 TraceCheckUtils]: 0: Hoare triple {54677#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54683#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:46,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {54683#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {54677#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {54677#true} {54677#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L272 TraceCheckUtils]: 4: Hoare triple {54677#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 5: Hoare triple {54677#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 6: Hoare triple {54677#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 7: Hoare triple {54677#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 8: Hoare triple {54677#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 9: Hoare triple {54677#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 10: Hoare triple {54677#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,643 INFO L290 TraceCheckUtils]: 11: Hoare triple {54677#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,644 INFO L290 TraceCheckUtils]: 12: Hoare triple {54677#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {54677#true} is VALID [2022-04-27 20:30:46,644 INFO L290 TraceCheckUtils]: 13: Hoare triple {54677#true} [311] L109-1-->L113-1: Formula: (and (not (= v_main_~p6~0_2 0)) (= v_main_~lk6~0_3 1)) InVars {main_~p6~0=v_main_~p6~0_2} OutVars{main_~lk6~0=v_main_~lk6~0_3, main_~p6~0=v_main_~p6~0_2} AuxVars[] AssignedVars[main_~lk6~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,644 INFO L290 TraceCheckUtils]: 14: Hoare triple {54682#(not (= main_~p6~0 0))} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,644 INFO L290 TraceCheckUtils]: 15: Hoare triple {54682#(not (= main_~p6~0 0))} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,645 INFO L290 TraceCheckUtils]: 16: Hoare triple {54682#(not (= main_~p6~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,645 INFO L290 TraceCheckUtils]: 17: Hoare triple {54682#(not (= main_~p6~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,645 INFO L290 TraceCheckUtils]: 18: Hoare triple {54682#(not (= main_~p6~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,646 INFO L290 TraceCheckUtils]: 19: Hoare triple {54682#(not (= main_~p6~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,646 INFO L290 TraceCheckUtils]: 20: Hoare triple {54682#(not (= main_~p6~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,646 INFO L290 TraceCheckUtils]: 21: Hoare triple {54682#(not (= main_~p6~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,646 INFO L290 TraceCheckUtils]: 22: Hoare triple {54682#(not (= main_~p6~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,647 INFO L290 TraceCheckUtils]: 23: Hoare triple {54682#(not (= main_~p6~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,647 INFO L290 TraceCheckUtils]: 24: Hoare triple {54682#(not (= main_~p6~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,647 INFO L290 TraceCheckUtils]: 25: Hoare triple {54682#(not (= main_~p6~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,648 INFO L290 TraceCheckUtils]: 26: Hoare triple {54682#(not (= main_~p6~0 0))} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,648 INFO L290 TraceCheckUtils]: 27: Hoare triple {54682#(not (= main_~p6~0 0))} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {54682#(not (= main_~p6~0 0))} is VALID [2022-04-27 20:30:46,648 INFO L290 TraceCheckUtils]: 28: Hoare triple {54682#(not (= main_~p6~0 0))} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {54678#false} is VALID [2022-04-27 20:30:46,648 INFO L290 TraceCheckUtils]: 29: Hoare triple {54678#false} [357] L180-1-->L186: Formula: (not (= v_main_~p7~0_4 0)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[] {54678#false} is VALID [2022-04-27 20:30:46,648 INFO L290 TraceCheckUtils]: 30: Hoare triple {54678#false} [359] L186-->L226-1: Formula: (not (= v_main_~lk7~0_4 1)) InVars {main_~lk7~0=v_main_~lk7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_4} AuxVars[] AssignedVars[] {54678#false} is VALID [2022-04-27 20:30:46,648 INFO L290 TraceCheckUtils]: 31: Hoare triple {54678#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {54678#false} is VALID [2022-04-27 20:30:46,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:46,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:46,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329297515] [2022-04-27 20:30:46,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [329297515] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:46,649 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:46,649 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:46,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091135885] [2022-04-27 20:30:46,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:46,650 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:46,650 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:46,650 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:46,670 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:46,671 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:46,671 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:46,671 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:46,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:46,672 INFO L87 Difference]: Start difference. First operand 2857 states and 4743 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:47,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:47,217 INFO L93 Difference]: Finished difference Result 2891 states and 4744 transitions. [2022-04-27 20:30:47,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:47,218 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:47,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:47,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:47,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 178 transitions. [2022-04-27 20:30:47,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:47,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 178 transitions. [2022-04-27 20:30:47,220 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 178 transitions. [2022-04-27 20:30:47,367 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 178 edges. 178 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:47,656 INFO L225 Difference]: With dead ends: 2891 [2022-04-27 20:30:47,656 INFO L226 Difference]: Without dead ends: 2891 [2022-04-27 20:30:47,656 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:47,656 INFO L413 NwaCegarLoop]: 141 mSDtfsCounter, 191 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 191 SdHoareTripleChecker+Valid, 148 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:47,657 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [191 Valid, 148 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:47,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2891 states. [2022-04-27 20:30:47,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2891 to 2889. [2022-04-27 20:30:47,693 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:47,715 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2891 states. Second operand has 2889 states, 2885 states have (on average 1.6429809358752165) internal successors, (4740), 2885 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:47,718 INFO L74 IsIncluded]: Start isIncluded. First operand 2891 states. Second operand has 2889 states, 2885 states have (on average 1.6429809358752165) internal successors, (4740), 2885 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:47,721 INFO L87 Difference]: Start difference. First operand 2891 states. Second operand has 2889 states, 2885 states have (on average 1.6429809358752165) internal successors, (4740), 2885 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:47,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:47,974 INFO L93 Difference]: Finished difference Result 2891 states and 4744 transitions. [2022-04-27 20:30:47,974 INFO L276 IsEmpty]: Start isEmpty. Operand 2891 states and 4744 transitions. [2022-04-27 20:30:47,976 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:47,976 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:47,982 INFO L74 IsIncluded]: Start isIncluded. First operand has 2889 states, 2885 states have (on average 1.6429809358752165) internal successors, (4740), 2885 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2891 states. [2022-04-27 20:30:47,985 INFO L87 Difference]: Start difference. First operand has 2889 states, 2885 states have (on average 1.6429809358752165) internal successors, (4740), 2885 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 2891 states. [2022-04-27 20:30:48,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:48,287 INFO L93 Difference]: Finished difference Result 2891 states and 4744 transitions. [2022-04-27 20:30:48,287 INFO L276 IsEmpty]: Start isEmpty. Operand 2891 states and 4744 transitions. [2022-04-27 20:30:48,291 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:48,291 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:48,291 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:48,291 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:48,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2889 states, 2885 states have (on average 1.6429809358752165) internal successors, (4740), 2885 states have internal predecessors, (4740), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:48,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2889 states to 2889 states and 4743 transitions. [2022-04-27 20:30:48,604 INFO L78 Accepts]: Start accepts. Automaton has 2889 states and 4743 transitions. Word has length 32 [2022-04-27 20:30:48,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:48,604 INFO L495 AbstractCegarLoop]: Abstraction has 2889 states and 4743 transitions. [2022-04-27 20:30:48,605 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:48,605 INFO L276 IsEmpty]: Start isEmpty. Operand 2889 states and 4743 transitions. [2022-04-27 20:30:48,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:48,606 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:48,607 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:48,607 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-04-27 20:30:48,607 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:48,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:48,608 INFO L85 PathProgramCache]: Analyzing trace with hash -831982666, now seen corresponding path program 1 times [2022-04-27 20:30:48,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:48,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245651559] [2022-04-27 20:30:48,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:48,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:48,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:48,649 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:48,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:48,653 INFO L290 TraceCheckUtils]: 0: Hoare triple {66257#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {66251#true} is VALID [2022-04-27 20:30:48,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {66251#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,653 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {66251#true} {66251#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,653 INFO L272 TraceCheckUtils]: 0: Hoare triple {66251#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66257#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:48,653 INFO L290 TraceCheckUtils]: 1: Hoare triple {66257#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {66251#true} is VALID [2022-04-27 20:30:48,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {66251#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,654 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {66251#true} {66251#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,654 INFO L272 TraceCheckUtils]: 4: Hoare triple {66251#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,654 INFO L290 TraceCheckUtils]: 5: Hoare triple {66251#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 6: Hoare triple {66251#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 7: Hoare triple {66251#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 8: Hoare triple {66251#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 9: Hoare triple {66251#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 10: Hoare triple {66251#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 11: Hoare triple {66251#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 12: Hoare triple {66251#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,655 INFO L290 TraceCheckUtils]: 13: Hoare triple {66251#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {66251#true} is VALID [2022-04-27 20:30:48,656 INFO L290 TraceCheckUtils]: 14: Hoare triple {66251#true} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,656 INFO L290 TraceCheckUtils]: 15: Hoare triple {66256#(= main_~lk7~0 1)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,656 INFO L290 TraceCheckUtils]: 16: Hoare triple {66256#(= main_~lk7~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,656 INFO L290 TraceCheckUtils]: 17: Hoare triple {66256#(= main_~lk7~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,657 INFO L290 TraceCheckUtils]: 18: Hoare triple {66256#(= main_~lk7~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,657 INFO L290 TraceCheckUtils]: 19: Hoare triple {66256#(= main_~lk7~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,657 INFO L290 TraceCheckUtils]: 20: Hoare triple {66256#(= main_~lk7~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,658 INFO L290 TraceCheckUtils]: 21: Hoare triple {66256#(= main_~lk7~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,658 INFO L290 TraceCheckUtils]: 22: Hoare triple {66256#(= main_~lk7~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,658 INFO L290 TraceCheckUtils]: 23: Hoare triple {66256#(= main_~lk7~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,659 INFO L290 TraceCheckUtils]: 24: Hoare triple {66256#(= main_~lk7~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,659 INFO L290 TraceCheckUtils]: 25: Hoare triple {66256#(= main_~lk7~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,659 INFO L290 TraceCheckUtils]: 26: Hoare triple {66256#(= main_~lk7~0 1)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,659 INFO L290 TraceCheckUtils]: 27: Hoare triple {66256#(= main_~lk7~0 1)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,660 INFO L290 TraceCheckUtils]: 28: Hoare triple {66256#(= main_~lk7~0 1)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,660 INFO L290 TraceCheckUtils]: 29: Hoare triple {66256#(= main_~lk7~0 1)} [357] L180-1-->L186: Formula: (not (= v_main_~p7~0_4 0)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[] {66256#(= main_~lk7~0 1)} is VALID [2022-04-27 20:30:48,660 INFO L290 TraceCheckUtils]: 30: Hoare triple {66256#(= main_~lk7~0 1)} [359] L186-->L226-1: Formula: (not (= v_main_~lk7~0_4 1)) InVars {main_~lk7~0=v_main_~lk7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_4} AuxVars[] AssignedVars[] {66252#false} is VALID [2022-04-27 20:30:48,660 INFO L290 TraceCheckUtils]: 31: Hoare triple {66252#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {66252#false} is VALID [2022-04-27 20:30:48,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:48,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:48,661 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245651559] [2022-04-27 20:30:48,661 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1245651559] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:48,661 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:48,661 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:48,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1069035560] [2022-04-27 20:30:48,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:48,662 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:48,662 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:48,662 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:48,683 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:48,683 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:48,684 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:48,684 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:48,684 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:48,685 INFO L87 Difference]: Start difference. First operand 2889 states and 4743 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:49,636 INFO L93 Difference]: Finished difference Result 5259 states and 8744 transitions. [2022-04-27 20:30:49,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:49,636 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:49,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:49,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-27 20:30:49,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:49,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 166 transitions. [2022-04-27 20:30:49,639 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 166 transitions. [2022-04-27 20:30:49,768 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 166 edges. 166 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:50,660 INFO L225 Difference]: With dead ends: 5259 [2022-04-27 20:30:50,660 INFO L226 Difference]: Without dead ends: 5259 [2022-04-27 20:30:50,661 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:50,661 INFO L413 NwaCegarLoop]: 95 mSDtfsCounter, 211 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 90 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 102 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 90 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:50,661 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 102 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 90 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:50,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5259 states. [2022-04-27 20:30:50,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5259 to 4105. [2022-04-27 20:30:50,737 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:50,741 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5259 states. Second operand has 4105 states, 4101 states have (on average 1.6005852231163131) internal successors, (6564), 4101 states have internal predecessors, (6564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:50,744 INFO L74 IsIncluded]: Start isIncluded. First operand 5259 states. Second operand has 4105 states, 4101 states have (on average 1.6005852231163131) internal successors, (6564), 4101 states have internal predecessors, (6564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:50,747 INFO L87 Difference]: Start difference. First operand 5259 states. Second operand has 4105 states, 4101 states have (on average 1.6005852231163131) internal successors, (6564), 4101 states have internal predecessors, (6564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:51,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:51,551 INFO L93 Difference]: Finished difference Result 5259 states and 8744 transitions. [2022-04-27 20:30:51,551 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8744 transitions. [2022-04-27 20:30:51,558 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:51,558 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:51,562 INFO L74 IsIncluded]: Start isIncluded. First operand has 4105 states, 4101 states have (on average 1.6005852231163131) internal successors, (6564), 4101 states have internal predecessors, (6564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-27 20:30:51,565 INFO L87 Difference]: Start difference. First operand has 4105 states, 4101 states have (on average 1.6005852231163131) internal successors, (6564), 4101 states have internal predecessors, (6564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5259 states. [2022-04-27 20:30:52,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:52,339 INFO L93 Difference]: Finished difference Result 5259 states and 8744 transitions. [2022-04-27 20:30:52,339 INFO L276 IsEmpty]: Start isEmpty. Operand 5259 states and 8744 transitions. [2022-04-27 20:30:52,344 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:52,344 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:52,344 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:52,344 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:52,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4105 states, 4101 states have (on average 1.6005852231163131) internal successors, (6564), 4101 states have internal predecessors, (6564), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:52,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4105 states to 4105 states and 6567 transitions. [2022-04-27 20:30:52,806 INFO L78 Accepts]: Start accepts. Automaton has 4105 states and 6567 transitions. Word has length 32 [2022-04-27 20:30:52,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:52,806 INFO L495 AbstractCegarLoop]: Abstraction has 4105 states and 6567 transitions. [2022-04-27 20:30:52,806 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:52,807 INFO L276 IsEmpty]: Start isEmpty. Operand 4105 states and 6567 transitions. [2022-04-27 20:30:52,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 20:30:52,809 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:52,809 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:52,809 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-04-27 20:30:52,809 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:52,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:52,810 INFO L85 PathProgramCache]: Analyzing trace with hash -1829055019, now seen corresponding path program 1 times [2022-04-27 20:30:52,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:52,810 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983794243] [2022-04-27 20:30:52,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:52,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:52,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:52,839 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:52,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:52,842 INFO L290 TraceCheckUtils]: 0: Hoare triple {86151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {86145#true} is VALID [2022-04-27 20:30:52,842 INFO L290 TraceCheckUtils]: 1: Hoare triple {86145#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,842 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {86145#true} {86145#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,843 INFO L272 TraceCheckUtils]: 0: Hoare triple {86145#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:52,843 INFO L290 TraceCheckUtils]: 1: Hoare triple {86151#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {86145#true} is VALID [2022-04-27 20:30:52,843 INFO L290 TraceCheckUtils]: 2: Hoare triple {86145#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,843 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {86145#true} {86145#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,843 INFO L272 TraceCheckUtils]: 4: Hoare triple {86145#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 5: Hoare triple {86145#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 6: Hoare triple {86145#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 7: Hoare triple {86145#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 8: Hoare triple {86145#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 9: Hoare triple {86145#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 10: Hoare triple {86145#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 11: Hoare triple {86145#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 12: Hoare triple {86145#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,844 INFO L290 TraceCheckUtils]: 13: Hoare triple {86145#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {86145#true} is VALID [2022-04-27 20:30:52,845 INFO L290 TraceCheckUtils]: 14: Hoare triple {86145#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,845 INFO L290 TraceCheckUtils]: 15: Hoare triple {86150#(= main_~p7~0 0)} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,845 INFO L290 TraceCheckUtils]: 16: Hoare triple {86150#(= main_~p7~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,845 INFO L290 TraceCheckUtils]: 17: Hoare triple {86150#(= main_~p7~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,846 INFO L290 TraceCheckUtils]: 18: Hoare triple {86150#(= main_~p7~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,846 INFO L290 TraceCheckUtils]: 19: Hoare triple {86150#(= main_~p7~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,846 INFO L290 TraceCheckUtils]: 20: Hoare triple {86150#(= main_~p7~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,847 INFO L290 TraceCheckUtils]: 21: Hoare triple {86150#(= main_~p7~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,847 INFO L290 TraceCheckUtils]: 22: Hoare triple {86150#(= main_~p7~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,847 INFO L290 TraceCheckUtils]: 23: Hoare triple {86150#(= main_~p7~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,848 INFO L290 TraceCheckUtils]: 24: Hoare triple {86150#(= main_~p7~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,848 INFO L290 TraceCheckUtils]: 25: Hoare triple {86150#(= main_~p7~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,848 INFO L290 TraceCheckUtils]: 26: Hoare triple {86150#(= main_~p7~0 0)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,848 INFO L290 TraceCheckUtils]: 27: Hoare triple {86150#(= main_~p7~0 0)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,849 INFO L290 TraceCheckUtils]: 28: Hoare triple {86150#(= main_~p7~0 0)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {86150#(= main_~p7~0 0)} is VALID [2022-04-27 20:30:52,849 INFO L290 TraceCheckUtils]: 29: Hoare triple {86150#(= main_~p7~0 0)} [357] L180-1-->L186: Formula: (not (= v_main_~p7~0_4 0)) InVars {main_~p7~0=v_main_~p7~0_4} OutVars{main_~p7~0=v_main_~p7~0_4} AuxVars[] AssignedVars[] {86146#false} is VALID [2022-04-27 20:30:52,849 INFO L290 TraceCheckUtils]: 30: Hoare triple {86146#false} [359] L186-->L226-1: Formula: (not (= v_main_~lk7~0_4 1)) InVars {main_~lk7~0=v_main_~lk7~0_4} OutVars{main_~lk7~0=v_main_~lk7~0_4} AuxVars[] AssignedVars[] {86146#false} is VALID [2022-04-27 20:30:52,849 INFO L290 TraceCheckUtils]: 31: Hoare triple {86146#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {86146#false} is VALID [2022-04-27 20:30:52,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:52,850 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:52,850 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983794243] [2022-04-27 20:30:52,850 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1983794243] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:52,850 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:52,850 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:52,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38416723] [2022-04-27 20:30:52,850 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:52,850 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:52,850 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:52,851 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:52,871 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:52,871 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:52,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:52,872 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:52,872 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:52,872 INFO L87 Difference]: Start difference. First operand 4105 states and 6567 transitions. Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:54,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:54,049 INFO L93 Difference]: Finished difference Result 5643 states and 9032 transitions. [2022-04-27 20:30:54,049 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:54,050 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 20:30:54,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:54,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:54,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-27 20:30:54,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:54,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 177 transitions. [2022-04-27 20:30:54,052 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 177 transitions. [2022-04-27 20:30:54,166 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 177 edges. 177 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:55,043 INFO L225 Difference]: With dead ends: 5643 [2022-04-27 20:30:55,044 INFO L226 Difference]: Without dead ends: 5643 [2022-04-27 20:30:55,044 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:55,045 INFO L413 NwaCegarLoop]: 140 mSDtfsCounter, 187 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 147 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:55,046 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 147 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:55,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5643 states. [2022-04-27 20:30:55,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5643 to 5641. [2022-04-27 20:30:55,128 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:55,134 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5643 states. Second operand has 5641 states, 5637 states have (on average 1.6015611140677666) internal successors, (9028), 5637 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:55,140 INFO L74 IsIncluded]: Start isIncluded. First operand 5643 states. Second operand has 5641 states, 5637 states have (on average 1.6015611140677666) internal successors, (9028), 5637 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:55,146 INFO L87 Difference]: Start difference. First operand 5643 states. Second operand has 5641 states, 5637 states have (on average 1.6015611140677666) internal successors, (9028), 5637 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:56,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:56,061 INFO L93 Difference]: Finished difference Result 5643 states and 9032 transitions. [2022-04-27 20:30:56,062 INFO L276 IsEmpty]: Start isEmpty. Operand 5643 states and 9032 transitions. [2022-04-27 20:30:56,066 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:56,067 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:56,072 INFO L74 IsIncluded]: Start isIncluded. First operand has 5641 states, 5637 states have (on average 1.6015611140677666) internal successors, (9028), 5637 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5643 states. [2022-04-27 20:30:56,075 INFO L87 Difference]: Start difference. First operand has 5641 states, 5637 states have (on average 1.6015611140677666) internal successors, (9028), 5637 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5643 states. [2022-04-27 20:30:56,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:56,910 INFO L93 Difference]: Finished difference Result 5643 states and 9032 transitions. [2022-04-27 20:30:56,911 INFO L276 IsEmpty]: Start isEmpty. Operand 5643 states and 9032 transitions. [2022-04-27 20:30:56,916 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:30:56,917 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:30:56,917 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:30:56,917 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:30:56,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5641 states, 5637 states have (on average 1.6015611140677666) internal successors, (9028), 5637 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:57,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5641 states to 5641 states and 9031 transitions. [2022-04-27 20:30:57,753 INFO L78 Accepts]: Start accepts. Automaton has 5641 states and 9031 transitions. Word has length 32 [2022-04-27 20:30:57,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:30:57,753 INFO L495 AbstractCegarLoop]: Abstraction has 5641 states and 9031 transitions. [2022-04-27 20:30:57,753 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:57,753 INFO L276 IsEmpty]: Start isEmpty. Operand 5641 states and 9031 transitions. [2022-04-27 20:30:57,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:30:57,755 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:30:57,756 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:30:57,756 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-04-27 20:30:57,756 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:30:57,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:30:57,756 INFO L85 PathProgramCache]: Analyzing trace with hash -21626014, now seen corresponding path program 1 times [2022-04-27 20:30:57,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:30:57,757 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624844177] [2022-04-27 20:30:57,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:30:57,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:30:57,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:57,795 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:30:57,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:30:57,798 INFO L290 TraceCheckUtils]: 0: Hoare triple {108733#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {108727#true} is VALID [2022-04-27 20:30:57,799 INFO L290 TraceCheckUtils]: 1: Hoare triple {108727#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,799 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {108727#true} {108727#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,799 INFO L272 TraceCheckUtils]: 0: Hoare triple {108727#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108733#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:30:57,799 INFO L290 TraceCheckUtils]: 1: Hoare triple {108733#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {108727#true} is VALID [2022-04-27 20:30:57,799 INFO L290 TraceCheckUtils]: 2: Hoare triple {108727#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,799 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {108727#true} {108727#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L272 TraceCheckUtils]: 4: Hoare triple {108727#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 5: Hoare triple {108727#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 6: Hoare triple {108727#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 7: Hoare triple {108727#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 8: Hoare triple {108727#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 9: Hoare triple {108727#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 10: Hoare triple {108727#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 11: Hoare triple {108727#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 12: Hoare triple {108727#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,800 INFO L290 TraceCheckUtils]: 13: Hoare triple {108727#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {108727#true} is VALID [2022-04-27 20:30:57,801 INFO L290 TraceCheckUtils]: 14: Hoare triple {108727#true} [313] L113-1-->L117-1: Formula: (and (= v_main_~lk7~0_3 1) (not (= v_main_~p7~0_2 0))) InVars {main_~p7~0=v_main_~p7~0_2} OutVars{main_~lk7~0=v_main_~lk7~0_3, main_~p7~0=v_main_~p7~0_2} AuxVars[] AssignedVars[main_~lk7~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,801 INFO L290 TraceCheckUtils]: 15: Hoare triple {108732#(not (= main_~p7~0 0))} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,801 INFO L290 TraceCheckUtils]: 16: Hoare triple {108732#(not (= main_~p7~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,802 INFO L290 TraceCheckUtils]: 17: Hoare triple {108732#(not (= main_~p7~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,802 INFO L290 TraceCheckUtils]: 18: Hoare triple {108732#(not (= main_~p7~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,802 INFO L290 TraceCheckUtils]: 19: Hoare triple {108732#(not (= main_~p7~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,803 INFO L290 TraceCheckUtils]: 20: Hoare triple {108732#(not (= main_~p7~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,803 INFO L290 TraceCheckUtils]: 21: Hoare triple {108732#(not (= main_~p7~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,803 INFO L290 TraceCheckUtils]: 22: Hoare triple {108732#(not (= main_~p7~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,804 INFO L290 TraceCheckUtils]: 23: Hoare triple {108732#(not (= main_~p7~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,804 INFO L290 TraceCheckUtils]: 24: Hoare triple {108732#(not (= main_~p7~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,804 INFO L290 TraceCheckUtils]: 25: Hoare triple {108732#(not (= main_~p7~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,804 INFO L290 TraceCheckUtils]: 26: Hoare triple {108732#(not (= main_~p7~0 0))} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,805 INFO L290 TraceCheckUtils]: 27: Hoare triple {108732#(not (= main_~p7~0 0))} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,805 INFO L290 TraceCheckUtils]: 28: Hoare triple {108732#(not (= main_~p7~0 0))} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {108732#(not (= main_~p7~0 0))} is VALID [2022-04-27 20:30:57,805 INFO L290 TraceCheckUtils]: 29: Hoare triple {108732#(not (= main_~p7~0 0))} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {108728#false} is VALID [2022-04-27 20:30:57,805 INFO L290 TraceCheckUtils]: 30: Hoare triple {108728#false} [361] L185-1-->L191: Formula: (not (= v_main_~p8~0_4 0)) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4} AuxVars[] AssignedVars[] {108728#false} is VALID [2022-04-27 20:30:57,805 INFO L290 TraceCheckUtils]: 31: Hoare triple {108728#false} [363] L191-->L226-1: Formula: (not (= v_main_~lk8~0_4 1)) InVars {main_~lk8~0=v_main_~lk8~0_4} OutVars{main_~lk8~0=v_main_~lk8~0_4} AuxVars[] AssignedVars[] {108728#false} is VALID [2022-04-27 20:30:57,806 INFO L290 TraceCheckUtils]: 32: Hoare triple {108728#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {108728#false} is VALID [2022-04-27 20:30:57,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:30:57,806 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:30:57,806 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624844177] [2022-04-27 20:30:57,806 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [624844177] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:30:57,806 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:30:57,806 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:30:57,806 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [415056942] [2022-04-27 20:30:57,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:30:57,807 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:30:57,807 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:30:57,807 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:57,828 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:57,828 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:30:57,828 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:30:57,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:30:57,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:30:57,829 INFO L87 Difference]: Start difference. First operand 5641 states and 9031 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:58,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:30:58,893 INFO L93 Difference]: Finished difference Result 5707 states and 9032 transitions. [2022-04-27 20:30:58,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:30:58,893 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:30:58,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:30:58,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:58,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-27 20:30:58,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:58,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 176 transitions. [2022-04-27 20:30:58,895 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 176 transitions. [2022-04-27 20:30:59,014 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:30:59,827 INFO L225 Difference]: With dead ends: 5707 [2022-04-27 20:30:59,827 INFO L226 Difference]: Without dead ends: 5707 [2022-04-27 20:30:59,828 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:30:59,828 INFO L413 NwaCegarLoop]: 138 mSDtfsCounter, 190 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:30:59,829 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [190 Valid, 145 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:30:59,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5707 states. [2022-04-27 20:30:59,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5707 to 5705. [2022-04-27 20:30:59,886 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:30:59,891 INFO L82 GeneralOperation]: Start isEquivalent. First operand 5707 states. Second operand has 5705 states, 5701 states have (on average 1.5835818277495177) internal successors, (9028), 5701 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:59,895 INFO L74 IsIncluded]: Start isIncluded. First operand 5707 states. Second operand has 5705 states, 5701 states have (on average 1.5835818277495177) internal successors, (9028), 5701 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:30:59,898 INFO L87 Difference]: Start difference. First operand 5707 states. Second operand has 5705 states, 5701 states have (on average 1.5835818277495177) internal successors, (9028), 5701 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:00,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:00,749 INFO L93 Difference]: Finished difference Result 5707 states and 9032 transitions. [2022-04-27 20:31:00,749 INFO L276 IsEmpty]: Start isEmpty. Operand 5707 states and 9032 transitions. [2022-04-27 20:31:00,753 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:00,753 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:00,758 INFO L74 IsIncluded]: Start isIncluded. First operand has 5705 states, 5701 states have (on average 1.5835818277495177) internal successors, (9028), 5701 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5707 states. [2022-04-27 20:31:00,762 INFO L87 Difference]: Start difference. First operand has 5705 states, 5701 states have (on average 1.5835818277495177) internal successors, (9028), 5701 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 5707 states. [2022-04-27 20:31:01,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:01,634 INFO L93 Difference]: Finished difference Result 5707 states and 9032 transitions. [2022-04-27 20:31:01,634 INFO L276 IsEmpty]: Start isEmpty. Operand 5707 states and 9032 transitions. [2022-04-27 20:31:01,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:01,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:01,638 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:01,638 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:01,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5705 states, 5701 states have (on average 1.5835818277495177) internal successors, (9028), 5701 states have internal predecessors, (9028), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:02,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5705 states to 5705 states and 9031 transitions. [2022-04-27 20:31:02,473 INFO L78 Accepts]: Start accepts. Automaton has 5705 states and 9031 transitions. Word has length 33 [2022-04-27 20:31:02,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:02,473 INFO L495 AbstractCegarLoop]: Abstraction has 5705 states and 9031 transitions. [2022-04-27 20:31:02,473 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:02,473 INFO L276 IsEmpty]: Start isEmpty. Operand 5705 states and 9031 transitions. [2022-04-27 20:31:02,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:31:02,475 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:02,475 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:02,476 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-04-27 20:31:02,476 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:02,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:02,476 INFO L85 PathProgramCache]: Analyzing trace with hash -866097885, now seen corresponding path program 1 times [2022-04-27 20:31:02,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:02,476 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150094293] [2022-04-27 20:31:02,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:02,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:02,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:02,515 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:02,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:02,519 INFO L290 TraceCheckUtils]: 0: Hoare triple {131571#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {131565#true} is VALID [2022-04-27 20:31:02,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {131565#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,519 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {131565#true} {131565#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,520 INFO L272 TraceCheckUtils]: 0: Hoare triple {131565#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131571#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:02,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {131571#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {131565#true} is VALID [2022-04-27 20:31:02,520 INFO L290 TraceCheckUtils]: 2: Hoare triple {131565#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,520 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {131565#true} {131565#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,520 INFO L272 TraceCheckUtils]: 4: Hoare triple {131565#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 5: Hoare triple {131565#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 6: Hoare triple {131565#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 7: Hoare triple {131565#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 8: Hoare triple {131565#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 9: Hoare triple {131565#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 10: Hoare triple {131565#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 11: Hoare triple {131565#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,521 INFO L290 TraceCheckUtils]: 12: Hoare triple {131565#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,522 INFO L290 TraceCheckUtils]: 13: Hoare triple {131565#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,522 INFO L290 TraceCheckUtils]: 14: Hoare triple {131565#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {131565#true} is VALID [2022-04-27 20:31:02,522 INFO L290 TraceCheckUtils]: 15: Hoare triple {131565#true} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,522 INFO L290 TraceCheckUtils]: 16: Hoare triple {131570#(= main_~lk8~0 1)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,523 INFO L290 TraceCheckUtils]: 17: Hoare triple {131570#(= main_~lk8~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,523 INFO L290 TraceCheckUtils]: 18: Hoare triple {131570#(= main_~lk8~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,523 INFO L290 TraceCheckUtils]: 19: Hoare triple {131570#(= main_~lk8~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,524 INFO L290 TraceCheckUtils]: 20: Hoare triple {131570#(= main_~lk8~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,524 INFO L290 TraceCheckUtils]: 21: Hoare triple {131570#(= main_~lk8~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,524 INFO L290 TraceCheckUtils]: 22: Hoare triple {131570#(= main_~lk8~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,525 INFO L290 TraceCheckUtils]: 23: Hoare triple {131570#(= main_~lk8~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,525 INFO L290 TraceCheckUtils]: 24: Hoare triple {131570#(= main_~lk8~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,525 INFO L290 TraceCheckUtils]: 25: Hoare triple {131570#(= main_~lk8~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,526 INFO L290 TraceCheckUtils]: 26: Hoare triple {131570#(= main_~lk8~0 1)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,526 INFO L290 TraceCheckUtils]: 27: Hoare triple {131570#(= main_~lk8~0 1)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,526 INFO L290 TraceCheckUtils]: 28: Hoare triple {131570#(= main_~lk8~0 1)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,526 INFO L290 TraceCheckUtils]: 29: Hoare triple {131570#(= main_~lk8~0 1)} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,527 INFO L290 TraceCheckUtils]: 30: Hoare triple {131570#(= main_~lk8~0 1)} [361] L185-1-->L191: Formula: (not (= v_main_~p8~0_4 0)) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4} AuxVars[] AssignedVars[] {131570#(= main_~lk8~0 1)} is VALID [2022-04-27 20:31:02,527 INFO L290 TraceCheckUtils]: 31: Hoare triple {131570#(= main_~lk8~0 1)} [363] L191-->L226-1: Formula: (not (= v_main_~lk8~0_4 1)) InVars {main_~lk8~0=v_main_~lk8~0_4} OutVars{main_~lk8~0=v_main_~lk8~0_4} AuxVars[] AssignedVars[] {131566#false} is VALID [2022-04-27 20:31:02,527 INFO L290 TraceCheckUtils]: 32: Hoare triple {131566#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {131566#false} is VALID [2022-04-27 20:31:02,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:02,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:02,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150094293] [2022-04-27 20:31:02,528 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1150094293] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:02,528 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:02,528 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:02,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240863558] [2022-04-27 20:31:02,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:02,529 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:02,529 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:02,529 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:02,551 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:02,551 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:02,551 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:02,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:02,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:02,552 INFO L87 Difference]: Start difference. First operand 5705 states and 9031 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:05,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:05,649 INFO L93 Difference]: Finished difference Result 10251 states and 16456 transitions. [2022-04-27 20:31:05,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:31:05,649 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:05,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:31:05,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:05,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:31:05,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:05,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 162 transitions. [2022-04-27 20:31:05,651 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 162 transitions. [2022-04-27 20:31:05,757 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:09,200 INFO L225 Difference]: With dead ends: 10251 [2022-04-27 20:31:09,201 INFO L226 Difference]: Without dead ends: 10251 [2022-04-27 20:31:09,201 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:31:09,201 INFO L413 NwaCegarLoop]: 94 mSDtfsCounter, 204 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 204 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:31:09,201 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [204 Valid, 101 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:31:09,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10251 states. [2022-04-27 20:31:09,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10251 to 8201. [2022-04-27 20:31:09,287 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:31:09,297 INFO L82 GeneralOperation]: Start isEquivalent. First operand 10251 states. Second operand has 8201 states, 8197 states have (on average 1.5386116872026352) internal successors, (12612), 8197 states have internal predecessors, (12612), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:09,308 INFO L74 IsIncluded]: Start isIncluded. First operand 10251 states. Second operand has 8201 states, 8197 states have (on average 1.5386116872026352) internal successors, (12612), 8197 states have internal predecessors, (12612), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:09,319 INFO L87 Difference]: Start difference. First operand 10251 states. Second operand has 8201 states, 8197 states have (on average 1.5386116872026352) internal successors, (12612), 8197 states have internal predecessors, (12612), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:11,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:11,921 INFO L93 Difference]: Finished difference Result 10251 states and 16456 transitions. [2022-04-27 20:31:11,921 INFO L276 IsEmpty]: Start isEmpty. Operand 10251 states and 16456 transitions. [2022-04-27 20:31:11,927 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:11,927 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:11,933 INFO L74 IsIncluded]: Start isIncluded. First operand has 8201 states, 8197 states have (on average 1.5386116872026352) internal successors, (12612), 8197 states have internal predecessors, (12612), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10251 states. [2022-04-27 20:31:11,938 INFO L87 Difference]: Start difference. First operand has 8201 states, 8197 states have (on average 1.5386116872026352) internal successors, (12612), 8197 states have internal predecessors, (12612), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 10251 states. [2022-04-27 20:31:14,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:14,774 INFO L93 Difference]: Finished difference Result 10251 states and 16456 transitions. [2022-04-27 20:31:14,774 INFO L276 IsEmpty]: Start isEmpty. Operand 10251 states and 16456 transitions. [2022-04-27 20:31:14,782 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:14,782 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:14,782 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:14,782 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:14,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8201 states, 8197 states have (on average 1.5386116872026352) internal successors, (12612), 8197 states have internal predecessors, (12612), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:16,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8201 states to 8201 states and 12615 transitions. [2022-04-27 20:31:16,677 INFO L78 Accepts]: Start accepts. Automaton has 8201 states and 12615 transitions. Word has length 33 [2022-04-27 20:31:16,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:16,677 INFO L495 AbstractCegarLoop]: Abstraction has 8201 states and 12615 transitions. [2022-04-27 20:31:16,677 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:16,677 INFO L276 IsEmpty]: Start isEmpty. Operand 8201 states and 12615 transitions. [2022-04-27 20:31:16,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 20:31:16,682 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:16,682 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:16,682 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-04-27 20:31:16,682 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:16,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:16,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1863170238, now seen corresponding path program 1 times [2022-04-27 20:31:16,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:16,683 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562844583] [2022-04-27 20:31:16,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:16,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:16,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:16,728 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:16,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:16,734 INFO L290 TraceCheckUtils]: 0: Hoare triple {170537#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {170531#true} is VALID [2022-04-27 20:31:16,734 INFO L290 TraceCheckUtils]: 1: Hoare triple {170531#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,734 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {170531#true} {170531#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,735 INFO L272 TraceCheckUtils]: 0: Hoare triple {170531#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170537#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:16,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {170537#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {170531#true} is VALID [2022-04-27 20:31:16,735 INFO L290 TraceCheckUtils]: 2: Hoare triple {170531#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,735 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {170531#true} {170531#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,735 INFO L272 TraceCheckUtils]: 4: Hoare triple {170531#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 5: Hoare triple {170531#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 6: Hoare triple {170531#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 7: Hoare triple {170531#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 8: Hoare triple {170531#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 9: Hoare triple {170531#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 10: Hoare triple {170531#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 11: Hoare triple {170531#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 12: Hoare triple {170531#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,736 INFO L290 TraceCheckUtils]: 13: Hoare triple {170531#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,746 INFO L290 TraceCheckUtils]: 14: Hoare triple {170531#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {170531#true} is VALID [2022-04-27 20:31:16,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {170531#true} [316] L117-1-->L121-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,748 INFO L290 TraceCheckUtils]: 16: Hoare triple {170536#(= main_~p8~0 0)} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,749 INFO L290 TraceCheckUtils]: 17: Hoare triple {170536#(= main_~p8~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,749 INFO L290 TraceCheckUtils]: 18: Hoare triple {170536#(= main_~p8~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,749 INFO L290 TraceCheckUtils]: 19: Hoare triple {170536#(= main_~p8~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,750 INFO L290 TraceCheckUtils]: 20: Hoare triple {170536#(= main_~p8~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,750 INFO L290 TraceCheckUtils]: 21: Hoare triple {170536#(= main_~p8~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,750 INFO L290 TraceCheckUtils]: 22: Hoare triple {170536#(= main_~p8~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,751 INFO L290 TraceCheckUtils]: 23: Hoare triple {170536#(= main_~p8~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,751 INFO L290 TraceCheckUtils]: 24: Hoare triple {170536#(= main_~p8~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,751 INFO L290 TraceCheckUtils]: 25: Hoare triple {170536#(= main_~p8~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,751 INFO L290 TraceCheckUtils]: 26: Hoare triple {170536#(= main_~p8~0 0)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,752 INFO L290 TraceCheckUtils]: 27: Hoare triple {170536#(= main_~p8~0 0)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,755 INFO L290 TraceCheckUtils]: 28: Hoare triple {170536#(= main_~p8~0 0)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,756 INFO L290 TraceCheckUtils]: 29: Hoare triple {170536#(= main_~p8~0 0)} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {170536#(= main_~p8~0 0)} is VALID [2022-04-27 20:31:16,756 INFO L290 TraceCheckUtils]: 30: Hoare triple {170536#(= main_~p8~0 0)} [361] L185-1-->L191: Formula: (not (= v_main_~p8~0_4 0)) InVars {main_~p8~0=v_main_~p8~0_4} OutVars{main_~p8~0=v_main_~p8~0_4} AuxVars[] AssignedVars[] {170532#false} is VALID [2022-04-27 20:31:16,756 INFO L290 TraceCheckUtils]: 31: Hoare triple {170532#false} [363] L191-->L226-1: Formula: (not (= v_main_~lk8~0_4 1)) InVars {main_~lk8~0=v_main_~lk8~0_4} OutVars{main_~lk8~0=v_main_~lk8~0_4} AuxVars[] AssignedVars[] {170532#false} is VALID [2022-04-27 20:31:16,756 INFO L290 TraceCheckUtils]: 32: Hoare triple {170532#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {170532#false} is VALID [2022-04-27 20:31:16,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:16,757 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:16,757 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562844583] [2022-04-27 20:31:16,757 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [562844583] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:16,757 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:16,757 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:16,757 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901624432] [2022-04-27 20:31:16,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:16,757 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:16,758 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:16,758 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:16,779 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:16,779 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:16,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:16,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:16,780 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:16,780 INFO L87 Difference]: Start difference. First operand 8201 states and 12615 transitions. Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:20,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:20,017 INFO L93 Difference]: Finished difference Result 11147 states and 17160 transitions. [2022-04-27 20:31:20,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:31:20,017 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 20:31:20,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:31:20,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:20,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-27 20:31:20,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:20,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 175 transitions. [2022-04-27 20:31:20,020 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 175 transitions. [2022-04-27 20:31:20,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 175 edges. 175 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:23,832 INFO L225 Difference]: With dead ends: 11147 [2022-04-27 20:31:23,832 INFO L226 Difference]: Without dead ends: 11147 [2022-04-27 20:31:23,833 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:31:23,833 INFO L413 NwaCegarLoop]: 142 mSDtfsCounter, 181 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 181 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:31:23,833 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [181 Valid, 149 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:31:23,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11147 states. [2022-04-27 20:31:23,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11147 to 11145. [2022-04-27 20:31:23,926 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:31:23,941 INFO L82 GeneralOperation]: Start isEquivalent. First operand 11147 states. Second operand has 11145 states, 11141 states have (on average 1.5398976752535678) internal successors, (17156), 11141 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:23,956 INFO L74 IsIncluded]: Start isIncluded. First operand 11147 states. Second operand has 11145 states, 11141 states have (on average 1.5398976752535678) internal successors, (17156), 11141 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:23,971 INFO L87 Difference]: Start difference. First operand 11147 states. Second operand has 11145 states, 11141 states have (on average 1.5398976752535678) internal successors, (17156), 11141 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:26,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:26,964 INFO L93 Difference]: Finished difference Result 11147 states and 17160 transitions. [2022-04-27 20:31:26,964 INFO L276 IsEmpty]: Start isEmpty. Operand 11147 states and 17160 transitions. [2022-04-27 20:31:26,973 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:26,973 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:26,986 INFO L74 IsIncluded]: Start isIncluded. First operand has 11145 states, 11141 states have (on average 1.5398976752535678) internal successors, (17156), 11141 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 11147 states. [2022-04-27 20:31:26,998 INFO L87 Difference]: Start difference. First operand has 11145 states, 11141 states have (on average 1.5398976752535678) internal successors, (17156), 11141 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 11147 states. [2022-04-27 20:31:30,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:30,267 INFO L93 Difference]: Finished difference Result 11147 states and 17160 transitions. [2022-04-27 20:31:30,267 INFO L276 IsEmpty]: Start isEmpty. Operand 11147 states and 17160 transitions. [2022-04-27 20:31:30,273 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:30,274 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:30,274 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:30,274 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:30,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11145 states, 11141 states have (on average 1.5398976752535678) internal successors, (17156), 11141 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:33,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11145 states to 11145 states and 17159 transitions. [2022-04-27 20:31:33,573 INFO L78 Accepts]: Start accepts. Automaton has 11145 states and 17159 transitions. Word has length 33 [2022-04-27 20:31:33,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:33,573 INFO L495 AbstractCegarLoop]: Abstraction has 11145 states and 17159 transitions. [2022-04-27 20:31:33,573 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.5) internal successors, (30), 3 states have internal predecessors, (30), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:33,592 INFO L276 IsEmpty]: Start isEmpty. Operand 11145 states and 17159 transitions. [2022-04-27 20:31:33,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:31:33,597 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:33,597 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:33,597 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-04-27 20:31:33,597 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:33,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:33,598 INFO L85 PathProgramCache]: Analyzing trace with hash -1079197679, now seen corresponding path program 1 times [2022-04-27 20:31:33,599 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:33,599 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571988035] [2022-04-27 20:31:33,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:33,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:33,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:33,643 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:33,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:33,649 INFO L290 TraceCheckUtils]: 0: Hoare triple {215135#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {215129#true} is VALID [2022-04-27 20:31:33,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {215129#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,649 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {215129#true} {215129#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,650 INFO L272 TraceCheckUtils]: 0: Hoare triple {215129#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215135#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:33,650 INFO L290 TraceCheckUtils]: 1: Hoare triple {215135#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {215129#true} is VALID [2022-04-27 20:31:33,650 INFO L290 TraceCheckUtils]: 2: Hoare triple {215129#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,650 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {215129#true} {215129#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,650 INFO L272 TraceCheckUtils]: 4: Hoare triple {215129#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,650 INFO L290 TraceCheckUtils]: 5: Hoare triple {215129#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {215129#true} is VALID [2022-04-27 20:31:33,650 INFO L290 TraceCheckUtils]: 6: Hoare triple {215129#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 7: Hoare triple {215129#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 8: Hoare triple {215129#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {215129#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 10: Hoare triple {215129#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 11: Hoare triple {215129#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 12: Hoare triple {215129#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 13: Hoare triple {215129#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 14: Hoare triple {215129#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {215129#true} is VALID [2022-04-27 20:31:33,651 INFO L290 TraceCheckUtils]: 15: Hoare triple {215129#true} [315] L117-1-->L121-1: Formula: (and (not (= v_main_~p8~0_2 0)) (= v_main_~lk8~0_3 1)) InVars {main_~p8~0=v_main_~p8~0_2} OutVars{main_~p8~0=v_main_~p8~0_2, main_~lk8~0=v_main_~lk8~0_3} AuxVars[] AssignedVars[main_~lk8~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,652 INFO L290 TraceCheckUtils]: 16: Hoare triple {215134#(not (= main_~p8~0 0))} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,652 INFO L290 TraceCheckUtils]: 17: Hoare triple {215134#(not (= main_~p8~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,652 INFO L290 TraceCheckUtils]: 18: Hoare triple {215134#(not (= main_~p8~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,653 INFO L290 TraceCheckUtils]: 19: Hoare triple {215134#(not (= main_~p8~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,653 INFO L290 TraceCheckUtils]: 20: Hoare triple {215134#(not (= main_~p8~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,653 INFO L290 TraceCheckUtils]: 21: Hoare triple {215134#(not (= main_~p8~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,653 INFO L290 TraceCheckUtils]: 22: Hoare triple {215134#(not (= main_~p8~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,654 INFO L290 TraceCheckUtils]: 23: Hoare triple {215134#(not (= main_~p8~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,654 INFO L290 TraceCheckUtils]: 24: Hoare triple {215134#(not (= main_~p8~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,654 INFO L290 TraceCheckUtils]: 25: Hoare triple {215134#(not (= main_~p8~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,655 INFO L290 TraceCheckUtils]: 26: Hoare triple {215134#(not (= main_~p8~0 0))} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,655 INFO L290 TraceCheckUtils]: 27: Hoare triple {215134#(not (= main_~p8~0 0))} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,655 INFO L290 TraceCheckUtils]: 28: Hoare triple {215134#(not (= main_~p8~0 0))} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,655 INFO L290 TraceCheckUtils]: 29: Hoare triple {215134#(not (= main_~p8~0 0))} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {215134#(not (= main_~p8~0 0))} is VALID [2022-04-27 20:31:33,656 INFO L290 TraceCheckUtils]: 30: Hoare triple {215134#(not (= main_~p8~0 0))} [362] L185-1-->L190-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {215130#false} is VALID [2022-04-27 20:31:33,656 INFO L290 TraceCheckUtils]: 31: Hoare triple {215130#false} [365] L190-1-->L196: Formula: (not (= v_main_~p9~0_4 0)) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {215130#false} is VALID [2022-04-27 20:31:33,656 INFO L290 TraceCheckUtils]: 32: Hoare triple {215130#false} [367] L196-->L226-1: Formula: (not (= v_main_~lk9~0_4 1)) InVars {main_~lk9~0=v_main_~lk9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_4} AuxVars[] AssignedVars[] {215130#false} is VALID [2022-04-27 20:31:33,656 INFO L290 TraceCheckUtils]: 33: Hoare triple {215130#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215130#false} is VALID [2022-04-27 20:31:33,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:33,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:33,656 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571988035] [2022-04-27 20:31:33,657 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [571988035] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:33,657 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:33,657 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:33,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1399991569] [2022-04-27 20:31:33,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:33,658 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:31:33,658 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:33,658 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:33,681 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:33,681 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:33,681 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:33,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:33,682 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:33,682 INFO L87 Difference]: Start difference. First operand 11145 states and 17159 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:37,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:37,272 INFO L93 Difference]: Finished difference Result 11275 states and 17160 transitions. [2022-04-27 20:31:37,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:31:37,272 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:31:37,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:31:37,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:37,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:31:37,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:37,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 174 transitions. [2022-04-27 20:31:37,274 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 174 transitions. [2022-04-27 20:31:37,402 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 174 edges. 174 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:40,917 INFO L225 Difference]: With dead ends: 11275 [2022-04-27 20:31:40,917 INFO L226 Difference]: Without dead ends: 11275 [2022-04-27 20:31:40,917 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:31:40,918 INFO L413 NwaCegarLoop]: 135 mSDtfsCounter, 189 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 189 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 88 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:31:40,918 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [189 Valid, 142 Invalid, 88 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:31:40,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11275 states. [2022-04-27 20:31:41,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11275 to 11273. [2022-04-27 20:31:41,053 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:31:41,067 INFO L82 GeneralOperation]: Start isEquivalent. First operand 11275 states. Second operand has 11273 states, 11269 states have (on average 1.5224066021829799) internal successors, (17156), 11269 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:41,080 INFO L74 IsIncluded]: Start isIncluded. First operand 11275 states. Second operand has 11273 states, 11269 states have (on average 1.5224066021829799) internal successors, (17156), 11269 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:41,091 INFO L87 Difference]: Start difference. First operand 11275 states. Second operand has 11273 states, 11269 states have (on average 1.5224066021829799) internal successors, (17156), 11269 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:44,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:44,493 INFO L93 Difference]: Finished difference Result 11275 states and 17160 transitions. [2022-04-27 20:31:44,493 INFO L276 IsEmpty]: Start isEmpty. Operand 11275 states and 17160 transitions. [2022-04-27 20:31:44,500 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:44,500 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:44,513 INFO L74 IsIncluded]: Start isIncluded. First operand has 11273 states, 11269 states have (on average 1.5224066021829799) internal successors, (17156), 11269 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 11275 states. [2022-04-27 20:31:44,523 INFO L87 Difference]: Start difference. First operand has 11273 states, 11269 states have (on average 1.5224066021829799) internal successors, (17156), 11269 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 11275 states. [2022-04-27 20:31:47,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:31:47,690 INFO L93 Difference]: Finished difference Result 11275 states and 17160 transitions. [2022-04-27 20:31:47,690 INFO L276 IsEmpty]: Start isEmpty. Operand 11275 states and 17160 transitions. [2022-04-27 20:31:47,696 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:31:47,696 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:31:47,696 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:31:47,696 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:31:47,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11273 states, 11269 states have (on average 1.5224066021829799) internal successors, (17156), 11269 states have internal predecessors, (17156), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:51,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11273 states to 11273 states and 17159 transitions. [2022-04-27 20:31:51,291 INFO L78 Accepts]: Start accepts. Automaton has 11273 states and 17159 transitions. Word has length 34 [2022-04-27 20:31:51,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:31:51,291 INFO L495 AbstractCegarLoop]: Abstraction has 11273 states and 17159 transitions. [2022-04-27 20:31:51,291 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:51,292 INFO L276 IsEmpty]: Start isEmpty. Operand 11273 states and 17159 transitions. [2022-04-27 20:31:51,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:31:51,295 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:31:51,295 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:31:51,295 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-04-27 20:31:51,295 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:31:51,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:31:51,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1923669550, now seen corresponding path program 1 times [2022-04-27 20:31:51,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:31:51,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038660325] [2022-04-27 20:31:51,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:31:51,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:31:51,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:51,330 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:31:51,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:31:51,335 INFO L290 TraceCheckUtils]: 0: Hoare triple {260245#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {260239#true} is VALID [2022-04-27 20:31:51,335 INFO L290 TraceCheckUtils]: 1: Hoare triple {260239#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,335 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {260239#true} {260239#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,336 INFO L272 TraceCheckUtils]: 0: Hoare triple {260239#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260245#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:31:51,336 INFO L290 TraceCheckUtils]: 1: Hoare triple {260245#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {260239#true} is VALID [2022-04-27 20:31:51,336 INFO L290 TraceCheckUtils]: 2: Hoare triple {260239#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,336 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {260239#true} {260239#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,336 INFO L272 TraceCheckUtils]: 4: Hoare triple {260239#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 5: Hoare triple {260239#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 6: Hoare triple {260239#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 7: Hoare triple {260239#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 8: Hoare triple {260239#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 9: Hoare triple {260239#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 10: Hoare triple {260239#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 11: Hoare triple {260239#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 12: Hoare triple {260239#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 13: Hoare triple {260239#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 14: Hoare triple {260239#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,337 INFO L290 TraceCheckUtils]: 15: Hoare triple {260239#true} [316] L117-1-->L121-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {260239#true} is VALID [2022-04-27 20:31:51,338 INFO L290 TraceCheckUtils]: 16: Hoare triple {260239#true} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,338 INFO L290 TraceCheckUtils]: 17: Hoare triple {260244#(= main_~lk9~0 1)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,338 INFO L290 TraceCheckUtils]: 18: Hoare triple {260244#(= main_~lk9~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,339 INFO L290 TraceCheckUtils]: 19: Hoare triple {260244#(= main_~lk9~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,339 INFO L290 TraceCheckUtils]: 20: Hoare triple {260244#(= main_~lk9~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,339 INFO L290 TraceCheckUtils]: 21: Hoare triple {260244#(= main_~lk9~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,340 INFO L290 TraceCheckUtils]: 22: Hoare triple {260244#(= main_~lk9~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,340 INFO L290 TraceCheckUtils]: 23: Hoare triple {260244#(= main_~lk9~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,340 INFO L290 TraceCheckUtils]: 24: Hoare triple {260244#(= main_~lk9~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,340 INFO L290 TraceCheckUtils]: 25: Hoare triple {260244#(= main_~lk9~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,341 INFO L290 TraceCheckUtils]: 26: Hoare triple {260244#(= main_~lk9~0 1)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,341 INFO L290 TraceCheckUtils]: 27: Hoare triple {260244#(= main_~lk9~0 1)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,341 INFO L290 TraceCheckUtils]: 28: Hoare triple {260244#(= main_~lk9~0 1)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,342 INFO L290 TraceCheckUtils]: 29: Hoare triple {260244#(= main_~lk9~0 1)} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,342 INFO L290 TraceCheckUtils]: 30: Hoare triple {260244#(= main_~lk9~0 1)} [362] L185-1-->L190-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,342 INFO L290 TraceCheckUtils]: 31: Hoare triple {260244#(= main_~lk9~0 1)} [365] L190-1-->L196: Formula: (not (= v_main_~p9~0_4 0)) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {260244#(= main_~lk9~0 1)} is VALID [2022-04-27 20:31:51,342 INFO L290 TraceCheckUtils]: 32: Hoare triple {260244#(= main_~lk9~0 1)} [367] L196-->L226-1: Formula: (not (= v_main_~lk9~0_4 1)) InVars {main_~lk9~0=v_main_~lk9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_4} AuxVars[] AssignedVars[] {260240#false} is VALID [2022-04-27 20:31:51,343 INFO L290 TraceCheckUtils]: 33: Hoare triple {260240#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {260240#false} is VALID [2022-04-27 20:31:51,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:31:51,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:31:51,343 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038660325] [2022-04-27 20:31:51,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2038660325] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:31:51,343 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:31:51,343 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:31:51,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805325844] [2022-04-27 20:31:51,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:31:51,344 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:31:51,344 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:31:51,344 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:31:51,367 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:31:51,367 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:31:51,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:31:51,367 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:31:51,368 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:31:51,368 INFO L87 Difference]: Start difference. First operand 11273 states and 17159 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:01,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:01,456 INFO L93 Difference]: Finished difference Result 19979 states and 30856 transitions. [2022-04-27 20:32:01,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:32:01,456 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:32:01,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:32:01,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:01,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:32:01,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:01,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 158 transitions. [2022-04-27 20:32:01,458 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 158 transitions. [2022-04-27 20:32:01,567 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 158 edges. 158 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:32:12,328 INFO L225 Difference]: With dead ends: 19979 [2022-04-27 20:32:12,328 INFO L226 Difference]: Without dead ends: 19979 [2022-04-27 20:32:12,329 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:32:12,329 INFO L413 NwaCegarLoop]: 93 mSDtfsCounter, 197 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 197 SdHoareTripleChecker+Valid, 100 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:32:12,329 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [197 Valid, 100 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:32:12,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19979 states. [2022-04-27 20:32:12,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19979 to 16393. [2022-04-27 20:32:12,455 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:32:12,472 INFO L82 GeneralOperation]: Start isEquivalent. First operand 19979 states. Second operand has 16393 states, 16389 states have (on average 1.4763560925010677) internal successors, (24196), 16389 states have internal predecessors, (24196), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:12,490 INFO L74 IsIncluded]: Start isIncluded. First operand 19979 states. Second operand has 16393 states, 16389 states have (on average 1.4763560925010677) internal successors, (24196), 16389 states have internal predecessors, (24196), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:12,507 INFO L87 Difference]: Start difference. First operand 19979 states. Second operand has 16393 states, 16389 states have (on average 1.4763560925010677) internal successors, (24196), 16389 states have internal predecessors, (24196), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:22,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:22,994 INFO L93 Difference]: Finished difference Result 19979 states and 30856 transitions. [2022-04-27 20:32:22,994 INFO L276 IsEmpty]: Start isEmpty. Operand 19979 states and 30856 transitions. [2022-04-27 20:32:23,006 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:23,006 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:23,020 INFO L74 IsIncluded]: Start isIncluded. First operand has 16393 states, 16389 states have (on average 1.4763560925010677) internal successors, (24196), 16389 states have internal predecessors, (24196), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19979 states. [2022-04-27 20:32:23,054 INFO L87 Difference]: Start difference. First operand has 16393 states, 16389 states have (on average 1.4763560925010677) internal successors, (24196), 16389 states have internal predecessors, (24196), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 19979 states. [2022-04-27 20:32:34,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:34,303 INFO L93 Difference]: Finished difference Result 19979 states and 30856 transitions. [2022-04-27 20:32:34,303 INFO L276 IsEmpty]: Start isEmpty. Operand 19979 states and 30856 transitions. [2022-04-27 20:32:34,337 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:32:34,337 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:32:34,337 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:32:34,337 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:32:34,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16393 states, 16389 states have (on average 1.4763560925010677) internal successors, (24196), 16389 states have internal predecessors, (24196), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:42,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16393 states to 16393 states and 24199 transitions. [2022-04-27 20:32:42,515 INFO L78 Accepts]: Start accepts. Automaton has 16393 states and 24199 transitions. Word has length 34 [2022-04-27 20:32:42,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:32:42,515 INFO L495 AbstractCegarLoop]: Abstraction has 16393 states and 24199 transitions. [2022-04-27 20:32:42,516 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:42,516 INFO L276 IsEmpty]: Start isEmpty. Operand 16393 states and 24199 transitions. [2022-04-27 20:32:42,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 20:32:42,523 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:32:42,523 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:32:42,523 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-04-27 20:32:42,523 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:32:42,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:32:42,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1374225393, now seen corresponding path program 1 times [2022-04-27 20:32:42,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:32:42,523 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87339287] [2022-04-27 20:32:42,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:32:42,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:32:42,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:32:42,553 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:32:42,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:32:42,556 INFO L290 TraceCheckUtils]: 0: Hoare triple {336587#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {336581#true} is VALID [2022-04-27 20:32:42,556 INFO L290 TraceCheckUtils]: 1: Hoare triple {336581#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,557 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {336581#true} {336581#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,557 INFO L272 TraceCheckUtils]: 0: Hoare triple {336581#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336587#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:32:42,557 INFO L290 TraceCheckUtils]: 1: Hoare triple {336587#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {336581#true} is VALID [2022-04-27 20:32:42,557 INFO L290 TraceCheckUtils]: 2: Hoare triple {336581#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,557 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {336581#true} {336581#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,557 INFO L272 TraceCheckUtils]: 4: Hoare triple {336581#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 5: Hoare triple {336581#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 6: Hoare triple {336581#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 7: Hoare triple {336581#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 8: Hoare triple {336581#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 9: Hoare triple {336581#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 10: Hoare triple {336581#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 11: Hoare triple {336581#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 12: Hoare triple {336581#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 13: Hoare triple {336581#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,558 INFO L290 TraceCheckUtils]: 14: Hoare triple {336581#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,559 INFO L290 TraceCheckUtils]: 15: Hoare triple {336581#true} [316] L117-1-->L121-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {336581#true} is VALID [2022-04-27 20:32:42,559 INFO L290 TraceCheckUtils]: 16: Hoare triple {336581#true} [318] L121-1-->L125-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,559 INFO L290 TraceCheckUtils]: 17: Hoare triple {336586#(= main_~p9~0 0)} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,559 INFO L290 TraceCheckUtils]: 18: Hoare triple {336586#(= main_~p9~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,560 INFO L290 TraceCheckUtils]: 19: Hoare triple {336586#(= main_~p9~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,560 INFO L290 TraceCheckUtils]: 20: Hoare triple {336586#(= main_~p9~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,560 INFO L290 TraceCheckUtils]: 21: Hoare triple {336586#(= main_~p9~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,561 INFO L290 TraceCheckUtils]: 22: Hoare triple {336586#(= main_~p9~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,561 INFO L290 TraceCheckUtils]: 23: Hoare triple {336586#(= main_~p9~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,561 INFO L290 TraceCheckUtils]: 24: Hoare triple {336586#(= main_~p9~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,561 INFO L290 TraceCheckUtils]: 25: Hoare triple {336586#(= main_~p9~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,562 INFO L290 TraceCheckUtils]: 26: Hoare triple {336586#(= main_~p9~0 0)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,562 INFO L290 TraceCheckUtils]: 27: Hoare triple {336586#(= main_~p9~0 0)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,562 INFO L290 TraceCheckUtils]: 28: Hoare triple {336586#(= main_~p9~0 0)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,563 INFO L290 TraceCheckUtils]: 29: Hoare triple {336586#(= main_~p9~0 0)} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,563 INFO L290 TraceCheckUtils]: 30: Hoare triple {336586#(= main_~p9~0 0)} [362] L185-1-->L190-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {336586#(= main_~p9~0 0)} is VALID [2022-04-27 20:32:42,563 INFO L290 TraceCheckUtils]: 31: Hoare triple {336586#(= main_~p9~0 0)} [365] L190-1-->L196: Formula: (not (= v_main_~p9~0_4 0)) InVars {main_~p9~0=v_main_~p9~0_4} OutVars{main_~p9~0=v_main_~p9~0_4} AuxVars[] AssignedVars[] {336582#false} is VALID [2022-04-27 20:32:42,563 INFO L290 TraceCheckUtils]: 32: Hoare triple {336582#false} [367] L196-->L226-1: Formula: (not (= v_main_~lk9~0_4 1)) InVars {main_~lk9~0=v_main_~lk9~0_4} OutVars{main_~lk9~0=v_main_~lk9~0_4} AuxVars[] AssignedVars[] {336582#false} is VALID [2022-04-27 20:32:42,563 INFO L290 TraceCheckUtils]: 33: Hoare triple {336582#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {336582#false} is VALID [2022-04-27 20:32:42,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:32:42,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:32:42,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87339287] [2022-04-27 20:32:42,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [87339287] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:32:42,564 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:32:42,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:32:42,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773794356] [2022-04-27 20:32:42,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:32:42,565 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:32:42,565 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:32:42,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:42,586 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:32:42,587 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:32:42,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:32:42,587 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:32:42,587 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:32:42,587 INFO L87 Difference]: Start difference. First operand 16393 states and 24199 transitions. Second operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:55,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:32:55,423 INFO L93 Difference]: Finished difference Result 22027 states and 32520 transitions. [2022-04-27 20:32:55,423 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:32:55,423 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 20:32:55,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:32:55,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:55,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-27 20:32:55,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:32:55,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 173 transitions. [2022-04-27 20:32:55,426 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 173 transitions. [2022-04-27 20:32:55,536 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 173 edges. 173 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:33:08,065 INFO L225 Difference]: With dead ends: 22027 [2022-04-27 20:33:08,066 INFO L226 Difference]: Without dead ends: 22027 [2022-04-27 20:33:08,066 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:33:08,066 INFO L413 NwaCegarLoop]: 144 mSDtfsCounter, 175 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 151 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:33:08,066 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [175 Valid, 151 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:33:08,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22027 states. [2022-04-27 20:33:08,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22027 to 22025. [2022-04-27 20:33:08,280 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:33:08,304 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22027 states. Second operand has 22025 states, 22021 states have (on average 1.4765905272240134) internal successors, (32516), 22021 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:08,327 INFO L74 IsIncluded]: Start isIncluded. First operand 22027 states. Second operand has 22025 states, 22021 states have (on average 1.4765905272240134) internal successors, (32516), 22021 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:08,350 INFO L87 Difference]: Start difference. First operand 22027 states. Second operand has 22025 states, 22021 states have (on average 1.4765905272240134) internal successors, (32516), 22021 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:21,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:33:21,295 INFO L93 Difference]: Finished difference Result 22027 states and 32520 transitions. [2022-04-27 20:33:21,295 INFO L276 IsEmpty]: Start isEmpty. Operand 22027 states and 32520 transitions. [2022-04-27 20:33:21,315 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:33:21,315 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:33:21,341 INFO L74 IsIncluded]: Start isIncluded. First operand has 22025 states, 22021 states have (on average 1.4765905272240134) internal successors, (32516), 22021 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22027 states. [2022-04-27 20:33:21,366 INFO L87 Difference]: Start difference. First operand has 22025 states, 22021 states have (on average 1.4765905272240134) internal successors, (32516), 22021 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22027 states. [2022-04-27 20:33:34,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:33:34,263 INFO L93 Difference]: Finished difference Result 22027 states and 32520 transitions. [2022-04-27 20:33:34,263 INFO L276 IsEmpty]: Start isEmpty. Operand 22027 states and 32520 transitions. [2022-04-27 20:33:34,279 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:33:34,279 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:33:34,280 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:33:34,280 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:33:34,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22025 states, 22021 states have (on average 1.4765905272240134) internal successors, (32516), 22021 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:48,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22025 states to 22025 states and 32519 transitions. [2022-04-27 20:33:48,407 INFO L78 Accepts]: Start accepts. Automaton has 22025 states and 32519 transitions. Word has length 34 [2022-04-27 20:33:48,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:33:48,407 INFO L495 AbstractCegarLoop]: Abstraction has 22025 states and 32519 transitions. [2022-04-27 20:33:48,407 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 3 states have internal predecessors, (31), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:48,408 INFO L276 IsEmpty]: Start isEmpty. Operand 22025 states and 32519 transitions. [2022-04-27 20:33:48,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 20:33:48,418 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:33:48,418 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:33:48,418 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-04-27 20:33:48,418 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:33:48,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:33:48,418 INFO L85 PathProgramCache]: Analyzing trace with hash 495819198, now seen corresponding path program 1 times [2022-04-27 20:33:48,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:33:48,418 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600247712] [2022-04-27 20:33:48,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:33:48,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:33:48,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:33:48,445 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:33:48,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:33:48,448 INFO L290 TraceCheckUtils]: 0: Hoare triple {424705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {424699#true} is VALID [2022-04-27 20:33:48,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {424699#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,449 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {424699#true} {424699#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,449 INFO L272 TraceCheckUtils]: 0: Hoare triple {424699#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:33:48,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {424705#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 2: Hoare triple {424699#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {424699#true} {424699#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L272 TraceCheckUtils]: 4: Hoare triple {424699#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 5: Hoare triple {424699#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 6: Hoare triple {424699#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 7: Hoare triple {424699#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 8: Hoare triple {424699#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 9: Hoare triple {424699#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,450 INFO L290 TraceCheckUtils]: 10: Hoare triple {424699#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 11: Hoare triple {424699#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 12: Hoare triple {424699#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 13: Hoare triple {424699#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 14: Hoare triple {424699#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 15: Hoare triple {424699#true} [316] L117-1-->L121-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {424699#true} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 16: Hoare triple {424699#true} [317] L121-1-->L125-1: Formula: (and (not (= v_main_~p9~0_2 0)) (= v_main_~lk9~0_3 1)) InVars {main_~p9~0=v_main_~p9~0_2} OutVars{main_~lk9~0=v_main_~lk9~0_3, main_~p9~0=v_main_~p9~0_2} AuxVars[] AssignedVars[main_~lk9~0] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,451 INFO L290 TraceCheckUtils]: 17: Hoare triple {424704#(not (= main_~p9~0 0))} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,452 INFO L290 TraceCheckUtils]: 18: Hoare triple {424704#(not (= main_~p9~0 0))} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,452 INFO L290 TraceCheckUtils]: 19: Hoare triple {424704#(not (= main_~p9~0 0))} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,452 INFO L290 TraceCheckUtils]: 20: Hoare triple {424704#(not (= main_~p9~0 0))} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,453 INFO L290 TraceCheckUtils]: 21: Hoare triple {424704#(not (= main_~p9~0 0))} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,453 INFO L290 TraceCheckUtils]: 22: Hoare triple {424704#(not (= main_~p9~0 0))} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,453 INFO L290 TraceCheckUtils]: 23: Hoare triple {424704#(not (= main_~p9~0 0))} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,453 INFO L290 TraceCheckUtils]: 24: Hoare triple {424704#(not (= main_~p9~0 0))} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,454 INFO L290 TraceCheckUtils]: 25: Hoare triple {424704#(not (= main_~p9~0 0))} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,454 INFO L290 TraceCheckUtils]: 26: Hoare triple {424704#(not (= main_~p9~0 0))} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,454 INFO L290 TraceCheckUtils]: 27: Hoare triple {424704#(not (= main_~p9~0 0))} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,455 INFO L290 TraceCheckUtils]: 28: Hoare triple {424704#(not (= main_~p9~0 0))} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,455 INFO L290 TraceCheckUtils]: 29: Hoare triple {424704#(not (= main_~p9~0 0))} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,455 INFO L290 TraceCheckUtils]: 30: Hoare triple {424704#(not (= main_~p9~0 0))} [362] L185-1-->L190-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {424704#(not (= main_~p9~0 0))} is VALID [2022-04-27 20:33:48,456 INFO L290 TraceCheckUtils]: 31: Hoare triple {424704#(not (= main_~p9~0 0))} [366] L190-1-->L195-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {424700#false} is VALID [2022-04-27 20:33:48,456 INFO L290 TraceCheckUtils]: 32: Hoare triple {424700#false} [369] L195-1-->L201: Formula: (not (= v_main_~p10~0_4 0)) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {424700#false} is VALID [2022-04-27 20:33:48,456 INFO L290 TraceCheckUtils]: 33: Hoare triple {424700#false} [371] L201-->L226-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {424700#false} is VALID [2022-04-27 20:33:48,456 INFO L290 TraceCheckUtils]: 34: Hoare triple {424700#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {424700#false} is VALID [2022-04-27 20:33:48,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:33:48,456 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:33:48,456 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600247712] [2022-04-27 20:33:48,456 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [600247712] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:33:48,456 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:33:48,456 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:33:48,457 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139722395] [2022-04-27 20:33:48,457 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:33:48,457 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:33:48,458 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:33:48,458 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:33:48,481 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:33:48,481 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:33:48,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:33:48,481 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:33:48,481 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:33:48,481 INFO L87 Difference]: Start difference. First operand 22025 states and 32519 transitions. Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:02,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:34:02,118 INFO L93 Difference]: Finished difference Result 22283 states and 32520 transitions. [2022-04-27 20:34:02,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:34:02,118 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:34:02,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:34:02,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:02,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-27 20:34:02,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:02,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-27 20:34:02,120 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 172 transitions. [2022-04-27 20:34:02,234 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:34:15,879 INFO L225 Difference]: With dead ends: 22283 [2022-04-27 20:34:15,879 INFO L226 Difference]: Without dead ends: 22283 [2022-04-27 20:34:15,879 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:34:15,880 INFO L413 NwaCegarLoop]: 132 mSDtfsCounter, 188 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 188 SdHoareTripleChecker+Valid, 139 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:34:15,880 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [188 Valid, 139 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:34:15,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22283 states. [2022-04-27 20:34:16,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22283 to 22281. [2022-04-27 20:34:16,081 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:34:16,112 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22283 states. Second operand has 22281 states, 22277 states have (on average 1.4596220316918795) internal successors, (32516), 22277 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:16,146 INFO L74 IsIncluded]: Start isIncluded. First operand 22283 states. Second operand has 22281 states, 22277 states have (on average 1.4596220316918795) internal successors, (32516), 22277 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:16,187 INFO L87 Difference]: Start difference. First operand 22283 states. Second operand has 22281 states, 22277 states have (on average 1.4596220316918795) internal successors, (32516), 22277 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:28,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:34:28,649 INFO L93 Difference]: Finished difference Result 22283 states and 32520 transitions. [2022-04-27 20:34:28,649 INFO L276 IsEmpty]: Start isEmpty. Operand 22283 states and 32520 transitions. [2022-04-27 20:34:28,663 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:34:28,663 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:34:28,684 INFO L74 IsIncluded]: Start isIncluded. First operand has 22281 states, 22277 states have (on average 1.4596220316918795) internal successors, (32516), 22277 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22283 states. [2022-04-27 20:34:28,704 INFO L87 Difference]: Start difference. First operand has 22281 states, 22277 states have (on average 1.4596220316918795) internal successors, (32516), 22277 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22283 states. [2022-04-27 20:34:42,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:34:42,042 INFO L93 Difference]: Finished difference Result 22283 states and 32520 transitions. [2022-04-27 20:34:42,042 INFO L276 IsEmpty]: Start isEmpty. Operand 22283 states and 32520 transitions. [2022-04-27 20:34:42,056 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:34:42,057 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:34:42,057 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:34:42,057 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:34:42,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22281 states, 22277 states have (on average 1.4596220316918795) internal successors, (32516), 22277 states have internal predecessors, (32516), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:56,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22281 states to 22281 states and 32519 transitions. [2022-04-27 20:34:56,080 INFO L78 Accepts]: Start accepts. Automaton has 22281 states and 32519 transitions. Word has length 35 [2022-04-27 20:34:56,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:34:56,080 INFO L495 AbstractCegarLoop]: Abstraction has 22281 states and 32519 transitions. [2022-04-27 20:34:56,080 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:56,080 INFO L276 IsEmpty]: Start isEmpty. Operand 22281 states and 32519 transitions. [2022-04-27 20:34:56,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 20:34:56,090 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:34:56,090 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:34:56,090 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-04-27 20:34:56,091 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:34:56,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:34:56,091 INFO L85 PathProgramCache]: Analyzing trace with hash -348652673, now seen corresponding path program 1 times [2022-04-27 20:34:56,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:34:56,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105809236] [2022-04-27 20:34:56,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:34:56,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:34:56,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:34:56,133 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:34:56,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:34:56,137 INFO L290 TraceCheckUtils]: 0: Hoare triple {513847#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {513841#true} is VALID [2022-04-27 20:34:56,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {513841#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,137 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {513841#true} {513841#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,137 INFO L272 TraceCheckUtils]: 0: Hoare triple {513841#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513847#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:34:56,137 INFO L290 TraceCheckUtils]: 1: Hoare triple {513847#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 2: Hoare triple {513841#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {513841#true} {513841#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L272 TraceCheckUtils]: 4: Hoare triple {513841#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 5: Hoare triple {513841#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 6: Hoare triple {513841#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 7: Hoare triple {513841#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 8: Hoare triple {513841#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 9: Hoare triple {513841#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 10: Hoare triple {513841#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,138 INFO L290 TraceCheckUtils]: 11: Hoare triple {513841#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,139 INFO L290 TraceCheckUtils]: 12: Hoare triple {513841#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,139 INFO L290 TraceCheckUtils]: 13: Hoare triple {513841#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,139 INFO L290 TraceCheckUtils]: 14: Hoare triple {513841#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,139 INFO L290 TraceCheckUtils]: 15: Hoare triple {513841#true} [316] L117-1-->L121-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,139 INFO L290 TraceCheckUtils]: 16: Hoare triple {513841#true} [318] L121-1-->L125-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {513841#true} is VALID [2022-04-27 20:34:56,139 INFO L290 TraceCheckUtils]: 17: Hoare triple {513841#true} [320] L125-1-->L129-1: Formula: (= v_main_~p10~0_3 0) InVars {main_~p10~0=v_main_~p10~0_3} OutVars{main_~p10~0=v_main_~p10~0_3} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,140 INFO L290 TraceCheckUtils]: 18: Hoare triple {513846#(= main_~p10~0 0)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,140 INFO L290 TraceCheckUtils]: 19: Hoare triple {513846#(= main_~p10~0 0)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,140 INFO L290 TraceCheckUtils]: 20: Hoare triple {513846#(= main_~p10~0 0)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,141 INFO L290 TraceCheckUtils]: 21: Hoare triple {513846#(= main_~p10~0 0)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,141 INFO L290 TraceCheckUtils]: 22: Hoare triple {513846#(= main_~p10~0 0)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,141 INFO L290 TraceCheckUtils]: 23: Hoare triple {513846#(= main_~p10~0 0)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,141 INFO L290 TraceCheckUtils]: 24: Hoare triple {513846#(= main_~p10~0 0)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,142 INFO L290 TraceCheckUtils]: 25: Hoare triple {513846#(= main_~p10~0 0)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,142 INFO L290 TraceCheckUtils]: 26: Hoare triple {513846#(= main_~p10~0 0)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,142 INFO L290 TraceCheckUtils]: 27: Hoare triple {513846#(= main_~p10~0 0)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,143 INFO L290 TraceCheckUtils]: 28: Hoare triple {513846#(= main_~p10~0 0)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,143 INFO L290 TraceCheckUtils]: 29: Hoare triple {513846#(= main_~p10~0 0)} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,143 INFO L290 TraceCheckUtils]: 30: Hoare triple {513846#(= main_~p10~0 0)} [362] L185-1-->L190-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,144 INFO L290 TraceCheckUtils]: 31: Hoare triple {513846#(= main_~p10~0 0)} [366] L190-1-->L195-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {513846#(= main_~p10~0 0)} is VALID [2022-04-27 20:34:56,144 INFO L290 TraceCheckUtils]: 32: Hoare triple {513846#(= main_~p10~0 0)} [369] L195-1-->L201: Formula: (not (= v_main_~p10~0_4 0)) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {513842#false} is VALID [2022-04-27 20:34:56,144 INFO L290 TraceCheckUtils]: 33: Hoare triple {513842#false} [371] L201-->L226-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {513842#false} is VALID [2022-04-27 20:34:56,144 INFO L290 TraceCheckUtils]: 34: Hoare triple {513842#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {513842#false} is VALID [2022-04-27 20:34:56,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:34:56,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:34:56,145 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105809236] [2022-04-27 20:34:56,145 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105809236] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:34:56,145 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:34:56,145 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:34:56,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [606577838] [2022-04-27 20:34:56,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:34:56,146 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:34:56,146 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:34:56,146 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:34:56,166 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:34:56,166 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:34:56,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:34:56,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:34:56,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:34:56,167 INFO L87 Difference]: Start difference. First operand 22281 states and 32519 transitions. Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:44,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:36:44,289 INFO L93 Difference]: Finished difference Result 43531 states and 61960 transitions. [2022-04-27 20:36:44,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:36:44,289 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:36:44,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:36:44,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:44,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-27 20:36:44,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:36:44,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 172 transitions. [2022-04-27 20:36:44,291 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 172 transitions. [2022-04-27 20:36:44,400 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 172 edges. 172 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:37:54,498 INFO L225 Difference]: With dead ends: 43531 [2022-04-27 20:37:54,499 INFO L226 Difference]: Without dead ends: 43531 [2022-04-27 20:37:54,499 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 20:37:54,499 INFO L413 NwaCegarLoop]: 110 mSDtfsCounter, 208 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 86 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 208 SdHoareTripleChecker+Valid, 117 SdHoareTripleChecker+Invalid, 89 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 86 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 20:37:54,499 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [208 Valid, 117 Invalid, 89 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 86 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 20:37:54,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43531 states. [2022-04-27 20:37:54,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43531 to 43529. [2022-04-27 20:37:54,865 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 20:37:54,969 INFO L82 GeneralOperation]: Start isEquivalent. First operand 43531 states. Second operand has 43529 states, 43525 states have (on average 1.4234577828834003) internal successors, (61956), 43525 states have internal predecessors, (61956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:37:55,031 INFO L74 IsIncluded]: Start isIncluded. First operand 43531 states. Second operand has 43529 states, 43525 states have (on average 1.4234577828834003) internal successors, (61956), 43525 states have internal predecessors, (61956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:37:55,083 INFO L87 Difference]: Start difference. First operand 43531 states. Second operand has 43529 states, 43525 states have (on average 1.4234577828834003) internal successors, (61956), 43525 states have internal predecessors, (61956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:38:53,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:38:53,634 INFO L93 Difference]: Finished difference Result 43531 states and 61960 transitions. [2022-04-27 20:38:53,634 INFO L276 IsEmpty]: Start isEmpty. Operand 43531 states and 61960 transitions. [2022-04-27 20:38:53,711 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:38:53,711 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:38:53,743 INFO L74 IsIncluded]: Start isIncluded. First operand has 43529 states, 43525 states have (on average 1.4234577828834003) internal successors, (61956), 43525 states have internal predecessors, (61956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43531 states. [2022-04-27 20:38:53,776 INFO L87 Difference]: Start difference. First operand has 43529 states, 43525 states have (on average 1.4234577828834003) internal successors, (61956), 43525 states have internal predecessors, (61956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 43531 states. [2022-04-27 20:40:26,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:40:26,433 INFO L93 Difference]: Finished difference Result 43531 states and 61960 transitions. [2022-04-27 20:40:26,433 INFO L276 IsEmpty]: Start isEmpty. Operand 43531 states and 61960 transitions. [2022-04-27 20:40:26,518 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 20:40:26,519 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 20:40:26,519 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 20:40:26,519 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 20:40:26,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43529 states, 43525 states have (on average 1.4234577828834003) internal successors, (61956), 43525 states have internal predecessors, (61956), 2 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:22,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43529 states to 43529 states and 61959 transitions. [2022-04-27 20:42:22,734 INFO L78 Accepts]: Start accepts. Automaton has 43529 states and 61959 transitions. Word has length 35 [2022-04-27 20:42:22,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 20:42:22,734 INFO L495 AbstractCegarLoop]: Abstraction has 43529 states and 61959 transitions. [2022-04-27 20:42:22,734 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:22,734 INFO L276 IsEmpty]: Start isEmpty. Operand 43529 states and 61959 transitions. [2022-04-27 20:42:22,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 20:42:22,749 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 20:42:22,749 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 20:42:22,749 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-04-27 20:42:22,749 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting mainErr0ASSERT_VIOLATIONERROR_FUNCTION === [mainErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 20:42:22,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 20:42:22,750 INFO L85 PathProgramCache]: Analyzing trace with hash 648419680, now seen corresponding path program 1 times [2022-04-27 20:42:22,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 20:42:22,750 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831583061] [2022-04-27 20:42:22,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 20:42:22,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 20:42:22,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:42:22,776 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 20:42:22,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 20:42:22,780 INFO L290 TraceCheckUtils]: 0: Hoare triple {687981#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {687975#true} is VALID [2022-04-27 20:42:22,780 INFO L290 TraceCheckUtils]: 1: Hoare triple {687975#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,780 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {687975#true} {687975#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,780 INFO L272 TraceCheckUtils]: 0: Hoare triple {687975#true} [288] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687981#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 1: Hoare triple {687981#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [290] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 2: Hoare triple {687975#true} [293] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {687975#true} {687975#true} [393] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L272 TraceCheckUtils]: 4: Hoare triple {687975#true} [289] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 5: Hoare triple {687975#true} [292] mainENTRY-->L225-1: Formula: (and (<= |v_main_#t~nondet17_2| 2147483647) (= v_main_~p4~0_1 |v_main_#t~nondet7_2|) (= |v_main_#t~nondet18_2| v_main_~p15~0_1) (<= |v_main_#t~nondet8_2| 2147483647) (= |v_main_#t~nondet15_2| v_main_~p12~0_1) (= v_main_~p9~0_1 |v_main_#t~nondet12_2|) (<= |v_main_#t~nondet5_2| 2147483647) (<= 0 (+ |v_main_#t~nondet8_2| 2147483648)) (= |v_main_#t~nondet17_2| v_main_~p14~0_2) (= v_main_~p7~0_1 |v_main_#t~nondet10_2|) (<= 0 (+ |v_main_#t~nondet16_2| 2147483648)) (<= |v_main_#t~nondet6_2| 2147483647) (<= |v_main_#t~nondet14_2| 2147483647) (<= |v_main_#t~nondet13_2| 2147483647) (<= 0 (+ |v_main_#t~nondet9_2| 2147483648)) (= v_main_~p1~0_1 |v_main_#t~nondet4_2|) (= v_main_~p5~0_1 |v_main_#t~nondet8_2|) (= v_main_~p6~0_1 |v_main_#t~nondet9_2|) (<= 0 (+ |v_main_#t~nondet4_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet10_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet7_2| 2147483648)) (= v_main_~p3~0_1 |v_main_#t~nondet6_2|) (<= 0 (+ |v_main_#t~nondet11_2| 2147483648)) (= |v_main_#t~nondet14_2| v_main_~p11~0_1) (<= |v_main_#t~nondet9_2| 2147483647) (<= |v_main_#t~nondet18_2| 2147483647) (= v_main_~p2~0_1 |v_main_#t~nondet5_2|) (<= |v_main_#t~nondet4_2| 2147483647) (<= 0 (+ |v_main_#t~nondet18_2| 2147483648)) (= v_main_~p8~0_1 |v_main_#t~nondet11_2|) (<= |v_main_#t~nondet16_2| 2147483647) (<= 0 (+ |v_main_#t~nondet6_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet5_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet15_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet13_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet17_2| 2147483648)) (<= 0 (+ |v_main_#t~nondet12_2| 2147483648)) (<= |v_main_#t~nondet7_2| 2147483647) (<= |v_main_#t~nondet11_2| 2147483647) (<= |v_main_#t~nondet10_2| 2147483647) (= |v_main_#t~nondet16_2| v_main_~p13~0_1) (= |v_main_#t~nondet13_2| v_main_~p10~0_1) (<= |v_main_#t~nondet12_2| 2147483647) (<= 0 (+ |v_main_#t~nondet14_2| 2147483648)) (<= |v_main_#t~nondet15_2| 2147483647)) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|, main_#t~nondet4=|v_main_#t~nondet4_2|, main_#t~nondet7=|v_main_#t~nondet7_2|, main_#t~nondet6=|v_main_#t~nondet6_2|, main_#t~nondet9=|v_main_#t~nondet9_2|, main_#t~nondet8=|v_main_#t~nondet8_2|, main_#t~nondet16=|v_main_#t~nondet16_2|, main_#t~nondet15=|v_main_#t~nondet15_2|, main_#t~nondet14=|v_main_#t~nondet14_2|, main_#t~nondet13=|v_main_#t~nondet13_2|, main_#t~nondet18=|v_main_#t~nondet18_2|, main_#t~nondet17=|v_main_#t~nondet17_2|, main_#t~nondet12=|v_main_#t~nondet12_2|, main_#t~nondet11=|v_main_#t~nondet11_2|, main_#t~nondet10=|v_main_#t~nondet10_2|} OutVars{main_~p13~0=v_main_~p13~0_1, main_~p1~0=v_main_~p1~0_1, main_~lk1~0=v_main_~lk1~0_1, main_~lk12~0=v_main_~lk12~0_1, main_~lk5~0=v_main_~lk5~0_1, main_~p2~0=v_main_~p2~0_1, main_~cond~0=v_main_~cond~0_1, main_~p6~0=v_main_~p6~0_1, main_~p5~0=v_main_~p5~0_1, main_~lk2~0=v_main_~lk2~0_1, main_~lk11~0=v_main_~lk11~0_1, main_~p10~0=v_main_~p10~0_1, main_~p14~0=v_main_~p14~0_2, main_~lk6~0=v_main_~lk6~0_1, main_~p9~0=v_main_~p9~0_1, main_~lk3~0=v_main_~lk3~0_1, main_~lk14~0=v_main_~lk14~0_4, main_~lk15~0=v_main_~lk15~0_1, main_~p8~0=v_main_~p8~0_1, main_~lk10~0=v_main_~lk10~0_1, main_~p11~0=v_main_~p11~0_1, main_~lk9~0=v_main_~lk9~0_1, main_~p4~0=v_main_~p4~0_1, main_~p15~0=v_main_~p15~0_1, main_~lk7~0=v_main_~lk7~0_1, main_~p12~0=v_main_~p12~0_1, main_~lk13~0=v_main_~lk13~0_1, main_~lk4~0=v_main_~lk4~0_1, main_~p3~0=v_main_~p3~0_1, main_~lk8~0=v_main_~lk8~0_1, main_~p7~0=v_main_~p7~0_1} AuxVars[] AssignedVars[main_#t~nondet5, main_~p13~0, main_#t~nondet4, main_#t~nondet7, main_#t~nondet6, main_~p1~0, main_~lk1~0, main_~lk12~0, main_~lk5~0, main_~p2~0, main_#t~nondet9, main_#t~nondet8, main_~cond~0, main_~p6~0, main_~p5~0, main_~lk2~0, main_~lk11~0, main_~p10~0, main_~p14~0, main_~lk6~0, main_~p9~0, main_~lk3~0, main_~lk14~0, main_~lk15~0, main_~p8~0, main_~lk10~0, main_~p11~0, main_~lk9~0, main_~p4~0, main_~p15~0, main_~lk7~0, main_#t~nondet16, main_#t~nondet15, main_~p12~0, main_#t~nondet14, main_#t~nondet13, main_~lk13~0, main_#t~nondet18, main_#t~nondet17, main_~lk4~0, main_~p3~0, main_#t~nondet12, main_#t~nondet11, main_~lk8~0, main_#t~nondet10, main_~p7~0] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 6: Hoare triple {687975#true} [296] L225-1-->L58: Formula: (and (<= 0 (+ |v_main_#t~nondet19_2| 2147483648)) (= |v_main_#t~nondet19_2| v_main_~cond~0_2) (<= |v_main_#t~nondet19_2| 2147483647)) InVars {main_#t~nondet19=|v_main_#t~nondet19_2|} OutVars{main_~cond~0=v_main_~cond~0_2} AuxVars[] AssignedVars[main_#t~nondet19, main_~cond~0] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 7: Hoare triple {687975#true} [299] L58-->L93: Formula: (and (= v_main_~lk4~0_2 0) (= v_main_~lk9~0_2 0) (= v_main_~lk1~0_2 0) (= v_main_~lk3~0_2 0) (= v_main_~lk15~0_5 0) (= v_main_~lk7~0_2 0) (= v_main_~lk6~0_2 0) (= v_main_~lk12~0_2 0) (= v_main_~lk2~0_2 0) (= v_main_~lk14~0_5 0) (= v_main_~lk8~0_2 0) (= v_main_~lk13~0_2 0) (not (= 0 v_main_~cond~0_4)) (= v_main_~lk5~0_2 0) (= v_main_~lk11~0_2 0) (= v_main_~lk10~0_2 0)) InVars {main_~cond~0=v_main_~cond~0_4} OutVars{main_~lk3~0=v_main_~lk3~0_2, main_~lk14~0=v_main_~lk14~0_5, main_~lk1~0=v_main_~lk1~0_2, main_~lk12~0=v_main_~lk12~0_2, main_~lk15~0=v_main_~lk15~0_5, main_~lk10~0=v_main_~lk10~0_2, main_~lk5~0=v_main_~lk5~0_2, main_~lk9~0=v_main_~lk9~0_2, main_~lk7~0=v_main_~lk7~0_2, main_~cond~0=v_main_~cond~0_4, main_~lk2~0=v_main_~lk2~0_2, main_~lk11~0=v_main_~lk11~0_2, main_~lk13~0=v_main_~lk13~0_2, main_~lk4~0=v_main_~lk4~0_2, main_~lk6~0=v_main_~lk6~0_2, main_~lk8~0=v_main_~lk8~0_2} AuxVars[] AssignedVars[main_~lk3~0, main_~lk14~0, main_~lk1~0, main_~lk12~0, main_~lk15~0, main_~lk10~0, main_~lk5~0, main_~lk9~0, main_~lk7~0, main_~lk2~0, main_~lk11~0, main_~lk13~0, main_~lk4~0, main_~lk6~0, main_~lk8~0] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 8: Hoare triple {687975#true} [302] L93-->L93-2: Formula: (= v_main_~p1~0_3 0) InVars {main_~p1~0=v_main_~p1~0_3} OutVars{main_~p1~0=v_main_~p1~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 9: Hoare triple {687975#true} [304] L93-2-->L97-1: Formula: (= v_main_~p2~0_3 0) InVars {main_~p2~0=v_main_~p2~0_3} OutVars{main_~p2~0=v_main_~p2~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,781 INFO L290 TraceCheckUtils]: 10: Hoare triple {687975#true} [306] L97-1-->L101-1: Formula: (= v_main_~p3~0_3 0) InVars {main_~p3~0=v_main_~p3~0_3} OutVars{main_~p3~0=v_main_~p3~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 11: Hoare triple {687975#true} [308] L101-1-->L105-1: Formula: (= v_main_~p4~0_3 0) InVars {main_~p4~0=v_main_~p4~0_3} OutVars{main_~p4~0=v_main_~p4~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 12: Hoare triple {687975#true} [310] L105-1-->L109-1: Formula: (= v_main_~p5~0_3 0) InVars {main_~p5~0=v_main_~p5~0_3} OutVars{main_~p5~0=v_main_~p5~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 13: Hoare triple {687975#true} [312] L109-1-->L113-1: Formula: (= v_main_~p6~0_3 0) InVars {main_~p6~0=v_main_~p6~0_3} OutVars{main_~p6~0=v_main_~p6~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 14: Hoare triple {687975#true} [314] L113-1-->L117-1: Formula: (= v_main_~p7~0_3 0) InVars {main_~p7~0=v_main_~p7~0_3} OutVars{main_~p7~0=v_main_~p7~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 15: Hoare triple {687975#true} [316] L117-1-->L121-1: Formula: (= v_main_~p8~0_3 0) InVars {main_~p8~0=v_main_~p8~0_3} OutVars{main_~p8~0=v_main_~p8~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 16: Hoare triple {687975#true} [318] L121-1-->L125-1: Formula: (= v_main_~p9~0_3 0) InVars {main_~p9~0=v_main_~p9~0_3} OutVars{main_~p9~0=v_main_~p9~0_3} AuxVars[] AssignedVars[] {687975#true} is VALID [2022-04-27 20:42:22,782 INFO L290 TraceCheckUtils]: 17: Hoare triple {687975#true} [319] L125-1-->L129-1: Formula: (and (not (= v_main_~p10~0_2 0)) (= v_main_~lk10~0_3 1)) InVars {main_~p10~0=v_main_~p10~0_2} OutVars{main_~lk10~0=v_main_~lk10~0_3, main_~p10~0=v_main_~p10~0_2} AuxVars[] AssignedVars[main_~lk10~0] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,783 INFO L290 TraceCheckUtils]: 18: Hoare triple {687980#(= main_~lk10~0 1)} [321] L129-1-->L133-1: Formula: (and (= v_main_~lk11~0_3 1) (not (= v_main_~p11~0_2 0))) InVars {main_~p11~0=v_main_~p11~0_2} OutVars{main_~lk11~0=v_main_~lk11~0_3, main_~p11~0=v_main_~p11~0_2} AuxVars[] AssignedVars[main_~lk11~0] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,783 INFO L290 TraceCheckUtils]: 19: Hoare triple {687980#(= main_~lk10~0 1)} [323] L133-1-->L137-1: Formula: (and (= v_main_~lk12~0_3 1) (not (= v_main_~p12~0_2 0))) InVars {main_~p12~0=v_main_~p12~0_2} OutVars{main_~p12~0=v_main_~p12~0_2, main_~lk12~0=v_main_~lk12~0_3} AuxVars[] AssignedVars[main_~lk12~0] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,783 INFO L290 TraceCheckUtils]: 20: Hoare triple {687980#(= main_~lk10~0 1)} [325] L137-1-->L141-1: Formula: (and (= v_main_~lk13~0_3 1) (not (= v_main_~p13~0_2 0))) InVars {main_~p13~0=v_main_~p13~0_2} OutVars{main_~p13~0=v_main_~p13~0_2, main_~lk13~0=v_main_~lk13~0_3} AuxVars[] AssignedVars[main_~lk13~0] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,783 INFO L290 TraceCheckUtils]: 21: Hoare triple {687980#(= main_~lk10~0 1)} [327] L141-1-->L145-1: Formula: (and (not (= v_main_~p14~0_4 0)) (= v_main_~lk14~0_6 1)) InVars {main_~p14~0=v_main_~p14~0_4} OutVars{main_~p14~0=v_main_~p14~0_4, main_~lk14~0=v_main_~lk14~0_6} AuxVars[] AssignedVars[main_~lk14~0] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,784 INFO L290 TraceCheckUtils]: 22: Hoare triple {687980#(= main_~lk10~0 1)} [329] L145-1-->L149-1: Formula: (and (= v_main_~lk15~0_6 1) (not (= v_main_~p15~0_4 0))) InVars {main_~p15~0=v_main_~p15~0_4} OutVars{main_~lk15~0=v_main_~lk15~0_6, main_~p15~0=v_main_~p15~0_4} AuxVars[] AssignedVars[main_~lk15~0] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,784 INFO L290 TraceCheckUtils]: 23: Hoare triple {687980#(= main_~lk10~0 1)} [332] L149-1-->L155-1: Formula: (= v_main_~p1~0_5 0) InVars {main_~p1~0=v_main_~p1~0_5} OutVars{main_~p1~0=v_main_~p1~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,784 INFO L290 TraceCheckUtils]: 24: Hoare triple {687980#(= main_~lk10~0 1)} [336] L155-1-->L160-1: Formula: (= v_main_~p2~0_5 0) InVars {main_~p2~0=v_main_~p2~0_5} OutVars{main_~p2~0=v_main_~p2~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,784 INFO L290 TraceCheckUtils]: 25: Hoare triple {687980#(= main_~lk10~0 1)} [342] L160-1-->L165-1: Formula: (= v_main_~p3~0_5 0) InVars {main_~p3~0=v_main_~p3~0_5} OutVars{main_~p3~0=v_main_~p3~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,785 INFO L290 TraceCheckUtils]: 26: Hoare triple {687980#(= main_~lk10~0 1)} [346] L165-1-->L170-1: Formula: (= v_main_~p4~0_5 0) InVars {main_~p4~0=v_main_~p4~0_5} OutVars{main_~p4~0=v_main_~p4~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,785 INFO L290 TraceCheckUtils]: 27: Hoare triple {687980#(= main_~lk10~0 1)} [350] L170-1-->L175-1: Formula: (= v_main_~p5~0_5 0) InVars {main_~p5~0=v_main_~p5~0_5} OutVars{main_~p5~0=v_main_~p5~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,785 INFO L290 TraceCheckUtils]: 28: Hoare triple {687980#(= main_~lk10~0 1)} [354] L175-1-->L180-1: Formula: (= v_main_~p6~0_5 0) InVars {main_~p6~0=v_main_~p6~0_5} OutVars{main_~p6~0=v_main_~p6~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,786 INFO L290 TraceCheckUtils]: 29: Hoare triple {687980#(= main_~lk10~0 1)} [358] L180-1-->L185-1: Formula: (= v_main_~p7~0_5 0) InVars {main_~p7~0=v_main_~p7~0_5} OutVars{main_~p7~0=v_main_~p7~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,786 INFO L290 TraceCheckUtils]: 30: Hoare triple {687980#(= main_~lk10~0 1)} [362] L185-1-->L190-1: Formula: (= v_main_~p8~0_5 0) InVars {main_~p8~0=v_main_~p8~0_5} OutVars{main_~p8~0=v_main_~p8~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,786 INFO L290 TraceCheckUtils]: 31: Hoare triple {687980#(= main_~lk10~0 1)} [366] L190-1-->L195-1: Formula: (= v_main_~p9~0_5 0) InVars {main_~p9~0=v_main_~p9~0_5} OutVars{main_~p9~0=v_main_~p9~0_5} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,786 INFO L290 TraceCheckUtils]: 32: Hoare triple {687980#(= main_~lk10~0 1)} [369] L195-1-->L201: Formula: (not (= v_main_~p10~0_4 0)) InVars {main_~p10~0=v_main_~p10~0_4} OutVars{main_~p10~0=v_main_~p10~0_4} AuxVars[] AssignedVars[] {687980#(= main_~lk10~0 1)} is VALID [2022-04-27 20:42:22,787 INFO L290 TraceCheckUtils]: 33: Hoare triple {687980#(= main_~lk10~0 1)} [371] L201-->L226-1: Formula: (not (= v_main_~lk10~0_4 1)) InVars {main_~lk10~0=v_main_~lk10~0_4} OutVars{main_~lk10~0=v_main_~lk10~0_4} AuxVars[] AssignedVars[] {687976#false} is VALID [2022-04-27 20:42:22,787 INFO L290 TraceCheckUtils]: 34: Hoare triple {687976#false} [337] L226-1-->mainErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {687976#false} is VALID [2022-04-27 20:42:22,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 20:42:22,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 20:42:22,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831583061] [2022-04-27 20:42:22,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831583061] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 20:42:22,787 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 20:42:22,787 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 20:42:22,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [83659621] [2022-04-27 20:42:22,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 20:42:22,788 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:42:22,788 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 20:42:22,788 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:42:22,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 20:42:22,809 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 20:42:22,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 20:42:22,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 20:42:22,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 20:42:22,810 INFO L87 Difference]: Start difference. First operand 43529 states and 61959 transitions. Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:44:44,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 20:44:44,986 INFO L93 Difference]: Finished difference Result 49675 states and 72712 transitions. [2022-04-27 20:44:44,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 20:44:44,986 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 20:44:44,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 20:44:44,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:44:44,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-27 20:44:44,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 3 states have internal predecessors, (32), 1 states have call successors, (2), 2 states have call predecessors, (2), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 20:44:44,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 151 transitions. [2022-04-27 20:44:44,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 151 transitions. [2022-04-27 20:44:45,092 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 151 edges. 151 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity.