/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops/count_up_down-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 21:05:26,932 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 21:05:26,934 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 21:05:26,975 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 21:05:26,976 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 21:05:26,977 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 21:05:26,980 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 21:05:26,982 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 21:05:26,984 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 21:05:26,988 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 21:05:26,989 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 21:05:26,990 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 21:05:26,990 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 21:05:26,992 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 21:05:26,993 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 21:05:26,995 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 21:05:26,996 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 21:05:26,996 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 21:05:26,997 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 21:05:26,999 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 21:05:27,000 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 21:05:27,004 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 21:05:27,004 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 21:05:27,005 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 21:05:27,006 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 21:05:27,013 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 21:05:27,020 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 21:05:27,021 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 21:05:27,023 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 21:05:27,023 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 21:05:27,049 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 21:05:27,049 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 21:05:27,050 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 21:05:27,050 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 21:05:27,051 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 21:05:27,051 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 21:05:27,051 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 21:05:27,051 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 21:05:27,051 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 21:05:27,052 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 21:05:27,052 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 21:05:27,052 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 21:05:27,053 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 21:05:27,053 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:05:27,054 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 21:05:27,054 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 21:05:27,054 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 21:05:27,054 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 21:05:27,054 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 21:05:27,054 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 21:05:27,055 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 21:05:27,055 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 21:05:27,056 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 21:05:27,056 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 21:05:27,285 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 21:05:27,304 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 21:05:27,306 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 21:05:27,307 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 21:05:27,308 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 21:05:27,309 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops/count_up_down-1.c [2022-04-27 21:05:27,361 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f033b8136/c72747a9ca4f48be9cae5f9a71dfe2aa/FLAGdbcfd4711 [2022-04-27 21:05:27,745 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 21:05:27,746 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops/count_up_down-1.c [2022-04-27 21:05:27,750 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f033b8136/c72747a9ca4f48be9cae5f9a71dfe2aa/FLAGdbcfd4711 [2022-04-27 21:05:27,760 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f033b8136/c72747a9ca4f48be9cae5f9a71dfe2aa [2022-04-27 21:05:27,762 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 21:05:27,763 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 21:05:27,765 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 21:05:27,765 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 21:05:27,767 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 21:05:27,768 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:27,769 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3a66acca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27, skipping insertion in model container [2022-04-27 21:05:27,769 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:27,775 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 21:05:27,786 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 21:05:27,940 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/count_up_down-1.c[327,340] [2022-04-27 21:05:27,960 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:05:27,967 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 21:05:27,977 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops/count_up_down-1.c[327,340] [2022-04-27 21:05:27,979 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:05:27,990 INFO L208 MainTranslator]: Completed translation [2022-04-27 21:05:27,990 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27 WrapperNode [2022-04-27 21:05:27,991 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 21:05:27,992 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 21:05:27,992 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 21:05:27,992 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 21:05:28,001 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,001 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,006 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,007 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,011 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,014 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,015 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,016 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 21:05:28,017 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 21:05:28,017 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 21:05:28,017 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 21:05:28,018 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (1/1) ... [2022-04-27 21:05:28,028 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:05:28,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:28,052 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 21:05:28,076 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 21:05:28,094 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 21:05:28,094 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 21:05:28,095 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 21:05:28,095 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 21:05:28,095 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 21:05:28,095 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 21:05:28,096 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 21:05:28,096 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 21:05:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 21:05:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 21:05:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 21:05:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 21:05:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 21:05:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 21:05:28,098 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 21:05:28,098 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 21:05:28,098 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 21:05:28,098 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 21:05:28,157 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 21:05:28,159 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 21:05:28,251 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 21:05:28,257 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 21:05:28,257 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-04-27 21:05:28,258 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:05:28 BoogieIcfgContainer [2022-04-27 21:05:28,259 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 21:05:28,259 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 21:05:28,259 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 21:05:28,260 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 21:05:28,263 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:05:28" (1/1) ... [2022-04-27 21:05:28,264 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 21:05:28,278 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:05:28 BasicIcfg [2022-04-27 21:05:28,279 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 21:05:28,280 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 21:05:28,280 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 21:05:28,283 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 21:05:28,283 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 09:05:27" (1/4) ... [2022-04-27 21:05:28,283 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45fa3f8a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:05:28, skipping insertion in model container [2022-04-27 21:05:28,284 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:05:27" (2/4) ... [2022-04-27 21:05:28,284 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45fa3f8a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:05:28, skipping insertion in model container [2022-04-27 21:05:28,284 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:05:28" (3/4) ... [2022-04-27 21:05:28,284 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45fa3f8a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:05:28, skipping insertion in model container [2022-04-27 21:05:28,285 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:05:28" (4/4) ... [2022-04-27 21:05:28,285 INFO L111 eAbstractionObserver]: Analyzing ICFG count_up_down-1.cqvasr [2022-04-27 21:05:28,301 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 21:05:28,301 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 21:05:28,341 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 21:05:28,346 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@59af2cbb, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@39c9e822 [2022-04-27 21:05:28,347 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 21:05:28,354 INFO L276 IsEmpty]: Start isEmpty. Operand has 18 states, 10 states have (on average 1.4) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:05:28,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 21:05:28,359 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:28,360 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:28,360 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:28,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:28,365 INFO L85 PathProgramCache]: Analyzing trace with hash -1690616289, now seen corresponding path program 1 times [2022-04-27 21:05:28,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:28,374 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648845523] [2022-04-27 21:05:28,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:28,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:28,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:28,502 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:28,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:28,534 INFO L290 TraceCheckUtils]: 0: Hoare triple {26#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21#true} is VALID [2022-04-27 21:05:28,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {21#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:05:28,535 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21#true} {21#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:05:28,536 INFO L272 TraceCheckUtils]: 0: Hoare triple {21#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:28,537 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21#true} is VALID [2022-04-27 21:05:28,537 INFO L290 TraceCheckUtils]: 2: Hoare triple {21#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:05:28,537 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21#true} {21#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:05:28,538 INFO L272 TraceCheckUtils]: 4: Hoare triple {21#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21#true} is VALID [2022-04-27 21:05:28,538 INFO L290 TraceCheckUtils]: 5: Hoare triple {21#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {21#true} is VALID [2022-04-27 21:05:28,541 INFO L290 TraceCheckUtils]: 6: Hoare triple {21#true} [45] L17-2-->L17-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {22#false} is VALID [2022-04-27 21:05:28,542 INFO L272 TraceCheckUtils]: 7: Hoare triple {22#false} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {22#false} is VALID [2022-04-27 21:05:28,542 INFO L290 TraceCheckUtils]: 8: Hoare triple {22#false} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {22#false} is VALID [2022-04-27 21:05:28,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {22#false} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {22#false} is VALID [2022-04-27 21:05:28,543 INFO L290 TraceCheckUtils]: 10: Hoare triple {22#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {22#false} is VALID [2022-04-27 21:05:28,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:28,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:28,544 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648845523] [2022-04-27 21:05:28,544 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648845523] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:05:28,544 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:05:28,545 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 21:05:28,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976865173] [2022-04-27 21:05:28,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:05:28,550 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:05:28,551 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:28,554 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,604 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:28,604 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 21:05:28,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:28,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 21:05:28,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:05:28,624 INFO L87 Difference]: Start difference. First operand has 18 states, 10 states have (on average 1.4) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:28,703 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2022-04-27 21:05:28,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 21:05:28,704 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:05:28,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:28,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 32 transitions. [2022-04-27 21:05:28,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 32 transitions. [2022-04-27 21:05:28,717 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 32 transitions. [2022-04-27 21:05:28,771 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:28,778 INFO L225 Difference]: With dead ends: 29 [2022-04-27 21:05:28,778 INFO L226 Difference]: Without dead ends: 12 [2022-04-27 21:05:28,780 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:05:28,786 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 9 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:28,789 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 20 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:05:28,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states. [2022-04-27 21:05:28,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2022-04-27 21:05:28,816 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:28,817 INFO L82 GeneralOperation]: Start isEquivalent. First operand 12 states. Second operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,817 INFO L74 IsIncluded]: Start isIncluded. First operand 12 states. Second operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,818 INFO L87 Difference]: Start difference. First operand 12 states. Second operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:28,821 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2022-04-27 21:05:28,821 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-04-27 21:05:28,821 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:28,821 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:28,822 INFO L74 IsIncluded]: Start isIncluded. First operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 12 states. [2022-04-27 21:05:28,822 INFO L87 Difference]: Start difference. First operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 12 states. [2022-04-27 21:05:28,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:28,824 INFO L93 Difference]: Finished difference Result 12 states and 12 transitions. [2022-04-27 21:05:28,824 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-04-27 21:05:28,825 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:28,825 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:28,825 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:28,825 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:28,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 7 states have internal predecessors, (8), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 12 transitions. [2022-04-27 21:05:28,828 INFO L78 Accepts]: Start accepts. Automaton has 12 states and 12 transitions. Word has length 11 [2022-04-27 21:05:28,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:28,828 INFO L495 AbstractCegarLoop]: Abstraction has 12 states and 12 transitions. [2022-04-27 21:05:28,829 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 2 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:28,829 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states and 12 transitions. [2022-04-27 21:05:28,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-04-27 21:05:28,829 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:28,829 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:28,830 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 21:05:28,830 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:28,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:28,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1689692768, now seen corresponding path program 1 times [2022-04-27 21:05:28,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:28,831 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612690108] [2022-04-27 21:05:28,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:28,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:28,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:29,049 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:29,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:29,077 INFO L290 TraceCheckUtils]: 0: Hoare triple {119#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-27 21:05:29,078 INFO L290 TraceCheckUtils]: 1: Hoare triple {110#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:05:29,078 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {110#true} {110#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:05:29,079 INFO L272 TraceCheckUtils]: 0: Hoare triple {110#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {119#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:29,079 INFO L290 TraceCheckUtils]: 1: Hoare triple {119#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {110#true} is VALID [2022-04-27 21:05:29,080 INFO L290 TraceCheckUtils]: 2: Hoare triple {110#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:05:29,080 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {110#true} {110#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:05:29,080 INFO L272 TraceCheckUtils]: 4: Hoare triple {110#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {110#true} is VALID [2022-04-27 21:05:29,082 INFO L290 TraceCheckUtils]: 5: Hoare triple {110#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {115#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:05:29,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {115#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {116#(and (= main_~y~0 0) (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:05:29,085 INFO L272 TraceCheckUtils]: 7: Hoare triple {116#(and (= main_~y~0 0) (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296))))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {117#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:05:29,086 INFO L290 TraceCheckUtils]: 8: Hoare triple {117#(not (= |__VERIFIER_assert_#in~cond| 0))} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {118#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:05:29,086 INFO L290 TraceCheckUtils]: 9: Hoare triple {118#(not (= __VERIFIER_assert_~cond 0))} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-27 21:05:29,087 INFO L290 TraceCheckUtils]: 10: Hoare triple {111#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {111#false} is VALID [2022-04-27 21:05:29,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:29,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:29,087 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612690108] [2022-04-27 21:05:29,087 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612690108] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:05:29,088 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:05:29,088 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2022-04-27 21:05:29,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1577211259] [2022-04-27 21:05:29,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:05:29,089 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:05:29,089 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:29,089 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,103 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 11 edges. 11 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:29,103 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 21:05:29,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:29,104 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 21:05:29,108 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-27 21:05:29,109 INFO L87 Difference]: Start difference. First operand 12 states and 12 transitions. Second operand has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:29,289 INFO L93 Difference]: Finished difference Result 18 states and 18 transitions. [2022-04-27 21:05:29,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 21:05:29,289 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 11 [2022-04-27 21:05:29,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:29,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 18 transitions. [2022-04-27 21:05:29,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 18 transitions. [2022-04-27 21:05:29,293 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 18 transitions. [2022-04-27 21:05:29,311 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 18 edges. 18 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:29,313 INFO L225 Difference]: With dead ends: 18 [2022-04-27 21:05:29,314 INFO L226 Difference]: Without dead ends: 13 [2022-04-27 21:05:29,314 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2022-04-27 21:05:29,316 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 10 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 10 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:29,317 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [10 Valid, 31 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:05:29,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states. [2022-04-27 21:05:29,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 13. [2022-04-27 21:05:29,323 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:29,327 INFO L82 GeneralOperation]: Start isEquivalent. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,328 INFO L74 IsIncluded]: Start isIncluded. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,328 INFO L87 Difference]: Start difference. First operand 13 states. Second operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:29,330 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2022-04-27 21:05:29,330 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2022-04-27 21:05:29,331 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:29,331 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:29,331 INFO L74 IsIncluded]: Start isIncluded. First operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 21:05:29,331 INFO L87 Difference]: Start difference. First operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 13 states. [2022-04-27 21:05:29,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:29,334 INFO L93 Difference]: Finished difference Result 13 states and 13 transitions. [2022-04-27 21:05:29,334 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2022-04-27 21:05:29,334 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:29,334 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:29,334 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:29,335 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:29,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 13 transitions. [2022-04-27 21:05:29,338 INFO L78 Accepts]: Start accepts. Automaton has 13 states and 13 transitions. Word has length 11 [2022-04-27 21:05:29,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:29,338 INFO L495 AbstractCegarLoop]: Abstraction has 13 states and 13 transitions. [2022-04-27 21:05:29,338 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:29,338 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 13 transitions. [2022-04-27 21:05:29,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-04-27 21:05:29,339 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:29,339 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:29,339 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 21:05:29,339 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:29,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:29,340 INFO L85 PathProgramCache]: Analyzing trace with hash -814146699, now seen corresponding path program 1 times [2022-04-27 21:05:29,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:29,340 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288540812] [2022-04-27 21:05:29,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:29,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:29,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:29,594 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:29,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:29,607 INFO L290 TraceCheckUtils]: 0: Hoare triple {215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {205#true} is VALID [2022-04-27 21:05:29,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {205#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:29,607 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {205#true} {205#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:29,608 INFO L272 TraceCheckUtils]: 0: Hoare triple {205#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:29,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {215#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {205#true} is VALID [2022-04-27 21:05:29,609 INFO L290 TraceCheckUtils]: 2: Hoare triple {205#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:29,609 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {205#true} {205#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:29,609 INFO L272 TraceCheckUtils]: 4: Hoare triple {205#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:29,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {205#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {210#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:05:29,612 INFO L290 TraceCheckUtils]: 6: Hoare triple {210#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {211#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:05:29,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {211#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {212#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:05:29,615 INFO L272 TraceCheckUtils]: 8: Hoare triple {212#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {213#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:05:29,616 INFO L290 TraceCheckUtils]: 9: Hoare triple {213#(not (= |__VERIFIER_assert_#in~cond| 0))} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {214#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:05:29,616 INFO L290 TraceCheckUtils]: 10: Hoare triple {214#(not (= __VERIFIER_assert_~cond 0))} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {206#false} is VALID [2022-04-27 21:05:29,617 INFO L290 TraceCheckUtils]: 11: Hoare triple {206#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {206#false} is VALID [2022-04-27 21:05:29,617 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:29,617 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:29,617 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288540812] [2022-04-27 21:05:29,618 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [288540812] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:29,618 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1989209663] [2022-04-27 21:05:29,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:29,619 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:29,619 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:29,620 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:29,625 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 21:05:29,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:29,678 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 21:05:29,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:29,704 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:05:30,040 INFO L272 TraceCheckUtils]: 0: Hoare triple {205#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {205#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {205#true} is VALID [2022-04-27 21:05:30,041 INFO L290 TraceCheckUtils]: 2: Hoare triple {205#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,041 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {205#true} {205#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,041 INFO L272 TraceCheckUtils]: 4: Hoare triple {205#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,042 INFO L290 TraceCheckUtils]: 5: Hoare triple {205#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {210#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:05:30,043 INFO L290 TraceCheckUtils]: 6: Hoare triple {210#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {237#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} is VALID [2022-04-27 21:05:30,044 INFO L290 TraceCheckUtils]: 7: Hoare triple {237#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {241#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 21:05:30,046 INFO L272 TraceCheckUtils]: 8: Hoare triple {241#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {245#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:30,047 INFO L290 TraceCheckUtils]: 9: Hoare triple {245#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {249#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:30,047 INFO L290 TraceCheckUtils]: 10: Hoare triple {249#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {206#false} is VALID [2022-04-27 21:05:30,047 INFO L290 TraceCheckUtils]: 11: Hoare triple {206#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {206#false} is VALID [2022-04-27 21:05:30,048 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:30,048 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:05:30,430 INFO L290 TraceCheckUtils]: 11: Hoare triple {206#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {206#false} is VALID [2022-04-27 21:05:30,431 INFO L290 TraceCheckUtils]: 10: Hoare triple {249#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {206#false} is VALID [2022-04-27 21:05:30,431 INFO L290 TraceCheckUtils]: 9: Hoare triple {245#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {249#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:05:30,433 INFO L272 TraceCheckUtils]: 8: Hoare triple {212#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {245#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:05:30,434 INFO L290 TraceCheckUtils]: 7: Hoare triple {268#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {212#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:05:30,436 INFO L290 TraceCheckUtils]: 6: Hoare triple {272#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {268#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:05:30,437 INFO L290 TraceCheckUtils]: 5: Hoare triple {205#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {272#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:05:30,437 INFO L272 TraceCheckUtils]: 4: Hoare triple {205#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,437 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {205#true} {205#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,437 INFO L290 TraceCheckUtils]: 2: Hoare triple {205#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {205#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {205#true} is VALID [2022-04-27 21:05:30,438 INFO L272 TraceCheckUtils]: 0: Hoare triple {205#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {205#true} is VALID [2022-04-27 21:05:30,438 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:30,440 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1989209663] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:05:30,440 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:05:30,440 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-04-27 21:05:30,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368151274] [2022-04-27 21:05:30,442 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:05:30,444 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 21:05:30,445 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:05:30,445 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,468 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:30,469 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 21:05:30,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:05:30,469 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 21:05:30,470 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2022-04-27 21:05:30,471 INFO L87 Difference]: Start difference. First operand 13 states and 13 transitions. Second operand has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:30,908 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-27 21:05:30,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 21:05:30,909 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 12 [2022-04-27 21:05:30,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:05:30,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 24 transitions. [2022-04-27 21:05:30,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 24 transitions. [2022-04-27 21:05:30,912 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 24 transitions. [2022-04-27 21:05:30,970 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:05:30,971 INFO L225 Difference]: With dead ends: 22 [2022-04-27 21:05:30,971 INFO L226 Difference]: Without dead ends: 16 [2022-04-27 21:05:30,972 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 17 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=112, Invalid=394, Unknown=0, NotChecked=0, Total=506 [2022-04-27 21:05:30,973 INFO L413 NwaCegarLoop]: 9 mSDtfsCounter, 17 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 51 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 66 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 51 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:05:30,973 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 36 Invalid, 66 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 51 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:05:30,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-27 21:05:30,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-27 21:05:30,985 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:05:30,986 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,986 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,986 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:30,987 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 21:05:30,987 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 21:05:30,988 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:30,988 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:30,988 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 21:05:30,988 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 21:05:30,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:05:30,989 INFO L93 Difference]: Finished difference Result 16 states and 16 transitions. [2022-04-27 21:05:30,989 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 21:05:30,990 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:05:30,990 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:05:30,990 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:05:30,990 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:05:30,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 11 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 16 transitions. [2022-04-27 21:05:30,991 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 16 transitions. Word has length 12 [2022-04-27 21:05:30,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:05:30,992 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 16 transitions. [2022-04-27 21:05:30,992 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:05:30,992 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 16 transitions. [2022-04-27 21:05:30,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 21:05:30,992 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:05:30,993 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:05:31,020 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 21:05:31,206 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:31,206 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:05:31,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:05:31,207 INFO L85 PathProgramCache]: Analyzing trace with hash 200712928, now seen corresponding path program 2 times [2022-04-27 21:05:31,207 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:05:31,207 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714189742] [2022-04-27 21:05:31,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:05:31,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:05:31,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:31,728 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:05:31,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:31,734 INFO L290 TraceCheckUtils]: 0: Hoare triple {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {406#true} is VALID [2022-04-27 21:05:31,734 INFO L290 TraceCheckUtils]: 1: Hoare triple {406#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:05:31,734 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {406#true} {406#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:05:31,735 INFO L272 TraceCheckUtils]: 0: Hoare triple {406#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:05:31,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {406#true} is VALID [2022-04-27 21:05:31,735 INFO L290 TraceCheckUtils]: 2: Hoare triple {406#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:05:31,736 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {406#true} {406#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:05:31,736 INFO L272 TraceCheckUtils]: 4: Hoare triple {406#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:05:31,736 INFO L290 TraceCheckUtils]: 5: Hoare triple {406#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {411#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:05:31,742 INFO L290 TraceCheckUtils]: 6: Hoare triple {411#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {412#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:05:31,747 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {413#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:05:31,751 INFO L290 TraceCheckUtils]: 8: Hoare triple {413#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {414#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:05:31,761 INFO L290 TraceCheckUtils]: 9: Hoare triple {414#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {415#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:05:31,763 INFO L290 TraceCheckUtils]: 10: Hoare triple {415#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {416#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:05:31,764 INFO L272 TraceCheckUtils]: 11: Hoare triple {416#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {417#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:05:31,765 INFO L290 TraceCheckUtils]: 12: Hoare triple {417#(not (= |__VERIFIER_assert_#in~cond| 0))} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {418#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:05:31,765 INFO L290 TraceCheckUtils]: 13: Hoare triple {418#(not (= __VERIFIER_assert_~cond 0))} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {407#false} is VALID [2022-04-27 21:05:31,765 INFO L290 TraceCheckUtils]: 14: Hoare triple {407#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {407#false} is VALID [2022-04-27 21:05:31,766 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:05:31,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:05:31,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [714189742] [2022-04-27 21:05:31,766 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [714189742] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:05:31,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [611214180] [2022-04-27 21:05:31,766 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:05:31,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:05:31,767 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:05:31,770 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:05:31,774 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 21:05:31,829 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:05:31,829 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:05:31,830 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-27 21:05:31,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:05:31,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:06:38,430 INFO L272 TraceCheckUtils]: 0: Hoare triple {406#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:38,431 INFO L290 TraceCheckUtils]: 1: Hoare triple {406#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {406#true} is VALID [2022-04-27 21:06:38,431 INFO L290 TraceCheckUtils]: 2: Hoare triple {406#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:38,431 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {406#true} {406#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:38,431 INFO L272 TraceCheckUtils]: 4: Hoare triple {406#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:38,432 INFO L290 TraceCheckUtils]: 5: Hoare triple {406#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {411#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:06:38,435 INFO L290 TraceCheckUtils]: 6: Hoare triple {411#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {412#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:06:38,492 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {413#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:06:38,522 INFO L290 TraceCheckUtils]: 8: Hoare triple {413#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {414#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:06:38,523 INFO L290 TraceCheckUtils]: 9: Hoare triple {414#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {450#(and (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0) (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:06:38,533 INFO L290 TraceCheckUtils]: 10: Hoare triple {450#(and (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0) (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {454#(and (<= main_~y~0 4) (<= (div (+ (* main_~y~0 (- 4294967295)) (* (- 1) main_~n~0)) (- 4294967296)) (+ (div (+ main_~n~0 (- 3)) 4294967296) main_~y~0)) (< 0 (+ (div (+ (div (+ main_~n~0 (- 4)) 4294967296) (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296)) 2) (div (+ main_~y~0 (- 4)) 4294967296) (div (+ main_~y~0 4294967294 (* (- 1) main_~n~0)) 4294967296) 1)))} is VALID [2022-04-27 21:06:38,646 INFO L272 TraceCheckUtils]: 11: Hoare triple {454#(and (<= main_~y~0 4) (<= (div (+ (* main_~y~0 (- 4294967295)) (* (- 1) main_~n~0)) (- 4294967296)) (+ (div (+ main_~n~0 (- 3)) 4294967296) main_~y~0)) (< 0 (+ (div (+ (div (+ main_~n~0 (- 4)) 4294967296) (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296)) 2) (div (+ main_~y~0 (- 4)) 4294967296) (div (+ main_~y~0 4294967294 (* (- 1) main_~n~0)) 4294967296) 1)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {458#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:06:38,647 INFO L290 TraceCheckUtils]: 12: Hoare triple {458#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {462#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:06:38,648 INFO L290 TraceCheckUtils]: 13: Hoare triple {462#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {407#false} is VALID [2022-04-27 21:06:38,648 INFO L290 TraceCheckUtils]: 14: Hoare triple {407#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {407#false} is VALID [2022-04-27 21:06:38,648 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:06:38,648 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:06:39,465 INFO L290 TraceCheckUtils]: 14: Hoare triple {407#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {407#false} is VALID [2022-04-27 21:06:39,465 INFO L290 TraceCheckUtils]: 13: Hoare triple {462#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {407#false} is VALID [2022-04-27 21:06:39,466 INFO L290 TraceCheckUtils]: 12: Hoare triple {458#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {462#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:06:39,467 INFO L272 TraceCheckUtils]: 11: Hoare triple {416#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {458#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:06:39,471 INFO L290 TraceCheckUtils]: 10: Hoare triple {481#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {416#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:06:39,473 INFO L290 TraceCheckUtils]: 9: Hoare triple {485#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {481#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:06:39,474 INFO L290 TraceCheckUtils]: 8: Hoare triple {489#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {485#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:06:39,475 INFO L290 TraceCheckUtils]: 7: Hoare triple {493#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {489#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:06:39,477 INFO L290 TraceCheckUtils]: 6: Hoare triple {497#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {493#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:06:39,478 INFO L290 TraceCheckUtils]: 5: Hoare triple {406#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {497#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:06:39,478 INFO L272 TraceCheckUtils]: 4: Hoare triple {406#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:39,478 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {406#true} {406#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:39,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {406#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:39,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {406#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {406#true} is VALID [2022-04-27 21:06:39,478 INFO L272 TraceCheckUtils]: 0: Hoare triple {406#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {406#true} is VALID [2022-04-27 21:06:39,479 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:06:39,479 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [611214180] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:06:39,480 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:06:39,480 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 20 [2022-04-27 21:06:39,480 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302049879] [2022-04-27 21:06:39,480 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:06:39,481 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:06:39,481 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:06:39,481 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:41,441 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:06:41,441 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 21:06:41,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:06:41,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 21:06:41,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2022-04-27 21:06:41,442 INFO L87 Difference]: Start difference. First operand 16 states and 16 transitions. Second operand has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:49,516 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.31s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:06:56,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:06:56,250 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2022-04-27 21:06:56,250 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 21:06:56,250 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:06:56,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:06:56,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:56,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 33 transitions. [2022-04-27 21:06:56,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:56,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 33 transitions. [2022-04-27 21:06:56,254 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 33 transitions. [2022-04-27 21:06:58,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:06:58,481 INFO L225 Difference]: With dead ends: 28 [2022-04-27 21:06:58,481 INFO L226 Difference]: Without dead ends: 22 [2022-04-27 21:06:58,482 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 17 SyntacticMatches, 6 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 9.7s TimeCoverageRelationStatistics Valid=252, Invalid=937, Unknown=1, NotChecked=0, Total=1190 [2022-04-27 21:06:58,483 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 36 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.7s IncrementalHoareTripleChecker+Time [2022-04-27 21:06:58,483 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 52 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 3.7s Time] [2022-04-27 21:06:58,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-27 21:06:58,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-27 21:06:58,532 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:06:58,533 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:58,533 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:58,533 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:58,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:06:58,534 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2022-04-27 21:06:58,534 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2022-04-27 21:06:58,535 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:06:58,535 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:06:58,535 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 21:06:58,535 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 21:06:58,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:06:58,536 INFO L93 Difference]: Finished difference Result 22 states and 22 transitions. [2022-04-27 21:06:58,536 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2022-04-27 21:06:58,537 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:06:58,537 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:06:58,537 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:06:58,537 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:06:58,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:58,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2022-04-27 21:06:58,538 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 15 [2022-04-27 21:06:58,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:06:58,538 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2022-04-27 21:06:58,539 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:06:58,539 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2022-04-27 21:06:58,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 21:06:58,539 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:06:58,539 INFO L195 NwaCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:06:58,556 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-27 21:06:58,740 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 21:06:58,740 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:06:58,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:06:58,741 INFO L85 PathProgramCache]: Analyzing trace with hash 270494400, now seen corresponding path program 3 times [2022-04-27 21:06:58,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:06:58,741 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901757025] [2022-04-27 21:06:58,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:06:58,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:06:58,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:07:00,245 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:07:00,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:07:00,251 INFO L290 TraceCheckUtils]: 0: Hoare triple {698#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {679#true} is VALID [2022-04-27 21:07:00,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {679#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:00,251 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {679#true} {679#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:00,252 INFO L272 TraceCheckUtils]: 0: Hoare triple {679#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {698#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:07:00,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {698#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {679#true} is VALID [2022-04-27 21:07:00,252 INFO L290 TraceCheckUtils]: 2: Hoare triple {679#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:00,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {679#true} {679#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:00,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {679#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:00,253 INFO L290 TraceCheckUtils]: 5: Hoare triple {679#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {684#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:07:00,255 INFO L290 TraceCheckUtils]: 6: Hoare triple {684#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {685#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:07:00,258 INFO L290 TraceCheckUtils]: 7: Hoare triple {685#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {686#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:07:00,263 INFO L290 TraceCheckUtils]: 8: Hoare triple {686#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {687#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:07:00,270 INFO L290 TraceCheckUtils]: 9: Hoare triple {687#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {688#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:07:00,274 INFO L290 TraceCheckUtils]: 10: Hoare triple {688#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {689#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:07:00,276 INFO L290 TraceCheckUtils]: 11: Hoare triple {689#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {690#(and (<= main_~y~0 6) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967289)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-27 21:07:00,282 INFO L290 TraceCheckUtils]: 12: Hoare triple {690#(and (<= main_~y~0 6) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967289)) (<= (+ main_~x~0 6) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {691#(and (<= 7 main_~y~0) (<= main_~y~0 7) (<= main_~x~0 (+ 4294967288 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:07:00,359 INFO L290 TraceCheckUtils]: 13: Hoare triple {691#(and (<= 7 main_~y~0) (<= main_~y~0 7) (<= main_~x~0 (+ 4294967288 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {692#(and (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967287)) (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0))} is VALID [2022-04-27 21:07:00,361 INFO L290 TraceCheckUtils]: 14: Hoare triple {692#(and (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967287)) (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {693#(and (<= main_~x~0 (+ 4294967286 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:07:00,390 INFO L290 TraceCheckUtils]: 15: Hoare triple {693#(and (<= main_~x~0 (+ 4294967286 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {694#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:07:00,391 INFO L290 TraceCheckUtils]: 16: Hoare triple {694#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {695#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:07:00,392 INFO L272 TraceCheckUtils]: 17: Hoare triple {695#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {696#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:07:00,392 INFO L290 TraceCheckUtils]: 18: Hoare triple {696#(not (= |__VERIFIER_assert_#in~cond| 0))} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {697#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:07:00,393 INFO L290 TraceCheckUtils]: 19: Hoare triple {697#(not (= __VERIFIER_assert_~cond 0))} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {680#false} is VALID [2022-04-27 21:07:00,393 INFO L290 TraceCheckUtils]: 20: Hoare triple {680#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {680#false} is VALID [2022-04-27 21:07:00,393 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:07:00,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:07:00,393 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901757025] [2022-04-27 21:07:00,394 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901757025] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:07:00,394 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [59199124] [2022-04-27 21:07:00,394 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:07:00,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:07:00,394 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:07:00,396 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:07:00,401 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 21:07:00,550 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-04-27 21:07:00,550 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:07:00,552 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 50 conjunts are in the unsatisfiable core [2022-04-27 21:07:00,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:07:00,572 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:07:29,479 INFO L272 TraceCheckUtils]: 0: Hoare triple {679#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:29,479 INFO L290 TraceCheckUtils]: 1: Hoare triple {679#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {679#true} is VALID [2022-04-27 21:07:29,479 INFO L290 TraceCheckUtils]: 2: Hoare triple {679#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:29,479 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {679#true} {679#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:29,480 INFO L272 TraceCheckUtils]: 4: Hoare triple {679#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:29,480 INFO L290 TraceCheckUtils]: 5: Hoare triple {679#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {684#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:07:29,482 INFO L290 TraceCheckUtils]: 6: Hoare triple {684#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {685#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:07:29,485 INFO L290 TraceCheckUtils]: 7: Hoare triple {685#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {723#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 21:07:29,500 INFO L290 TraceCheckUtils]: 8: Hoare triple {723#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {727#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:07:29,502 INFO L290 TraceCheckUtils]: 9: Hoare triple {727#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {731#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:07:29,505 INFO L290 TraceCheckUtils]: 10: Hoare triple {731#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {735#(and (<= 5 main_~y~0) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:07:29,508 INFO L290 TraceCheckUtils]: 11: Hoare triple {735#(and (<= 5 main_~y~0) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {739#(and (<= main_~y~0 6) (<= main_~x~0 (+ 4294967289 (* (div (+ main_~y~0 main_~x~0 (* (div (+ 5 main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 6 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-27 21:07:29,512 INFO L290 TraceCheckUtils]: 12: Hoare triple {739#(and (<= main_~y~0 6) (<= main_~x~0 (+ 4294967289 (* (div (+ main_~y~0 main_~x~0 (* (div (+ 5 main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 6 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {743#(and (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= 7 main_~y~0) (<= main_~y~0 7) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 6) 4294967296)) (* (- 1) main_~n~0)) 4294967296)))))} is VALID [2022-04-27 21:07:29,515 INFO L290 TraceCheckUtils]: 13: Hoare triple {743#(and (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= 7 main_~y~0) (<= main_~y~0 7) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 6) 4294967296)) (* (- 1) main_~n~0)) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {747#(and (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0) (<= main_~x~0 (+ 4294967287 (* (div (+ (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:07:29,517 INFO L290 TraceCheckUtils]: 14: Hoare triple {747#(and (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0) (<= main_~x~0 (+ 4294967287 (* (div (+ (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {751#(and (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9) (<= main_~x~0 (+ (* (div (+ (* (div (+ main_~x~0 8) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967286)))} is VALID [2022-04-27 21:07:29,520 INFO L290 TraceCheckUtils]: 15: Hoare triple {751#(and (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9) (<= main_~x~0 (+ (* (div (+ (* (div (+ main_~x~0 8) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967286)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {755#(and (<= main_~y~0 10) (<= 10 main_~y~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 9) 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967285)) (< 0 (mod (+ main_~x~0 6) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:07:29,546 INFO L290 TraceCheckUtils]: 16: Hoare triple {755#(and (<= main_~y~0 10) (<= 10 main_~y~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 9) 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967285)) (< 0 (mod (+ main_~x~0 6) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {759#(and (<= main_~y~0 10) (<= 10 main_~y~0) (< (div (+ main_~y~0 4294967289 (* (- 1) main_~n~0)) (- 4294967296)) (+ (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 1)) (exists ((aux_div_aux_mod_aux_mod_aux_mod_main_~x~0_26_43_137_159 Int) (aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 Int)) (and (< (+ (div (+ main_~y~0 4294967289 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) aux_div_aux_mod_aux_mod_aux_mod_main_~x~0_26_43_137_159) (+ (* aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 3) 1)) (< aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 (+ (div (+ 5 main_~n~0 (* (- 1) main_~y~0)) 4294967296) 1)) (<= aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 aux_div_aux_mod_aux_mod_aux_mod_main_~x~0_26_43_137_159))))} is VALID [2022-04-27 21:07:29,594 INFO L272 TraceCheckUtils]: 17: Hoare triple {759#(and (<= main_~y~0 10) (<= 10 main_~y~0) (< (div (+ main_~y~0 4294967289 (* (- 1) main_~n~0)) (- 4294967296)) (+ (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 1)) (exists ((aux_div_aux_mod_aux_mod_aux_mod_main_~x~0_26_43_137_159 Int) (aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 Int)) (and (< (+ (div (+ main_~y~0 4294967289 (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~y~0 (* (- 1) main_~n~0)) (- 4294967296)) aux_div_aux_mod_aux_mod_aux_mod_main_~x~0_26_43_137_159) (+ (* aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 3) 1)) (< aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 (+ (div (+ 5 main_~n~0 (* (- 1) main_~y~0)) 4294967296) 1)) (<= aux_div_aux_mod_aux_mod_main_~x~0_26_43_137 aux_div_aux_mod_aux_mod_aux_mod_main_~x~0_26_43_137_159))))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {763#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:07:29,594 INFO L290 TraceCheckUtils]: 18: Hoare triple {763#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {767#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:07:29,595 INFO L290 TraceCheckUtils]: 19: Hoare triple {767#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {680#false} is VALID [2022-04-27 21:07:29,595 INFO L290 TraceCheckUtils]: 20: Hoare triple {680#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {680#false} is VALID [2022-04-27 21:07:29,596 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:07:29,596 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:07:44,546 INFO L290 TraceCheckUtils]: 20: Hoare triple {680#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {680#false} is VALID [2022-04-27 21:07:44,547 INFO L290 TraceCheckUtils]: 19: Hoare triple {767#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {680#false} is VALID [2022-04-27 21:07:44,547 INFO L290 TraceCheckUtils]: 18: Hoare triple {763#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {767#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:07:44,548 INFO L272 TraceCheckUtils]: 17: Hoare triple {695#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {763#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:07:44,549 INFO L290 TraceCheckUtils]: 16: Hoare triple {786#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {695#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:07:44,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {790#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {786#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:07:44,552 INFO L290 TraceCheckUtils]: 14: Hoare triple {794#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {790#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:07:44,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {798#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {794#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:07:44,555 INFO L290 TraceCheckUtils]: 12: Hoare triple {802#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {798#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:07:44,557 INFO L290 TraceCheckUtils]: 11: Hoare triple {806#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {802#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:07:44,558 INFO L290 TraceCheckUtils]: 10: Hoare triple {810#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {806#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:07:44,560 INFO L290 TraceCheckUtils]: 9: Hoare triple {814#(or (and (<= (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296))) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8))) (< 0 (mod (+ main_~x~0 4294967289) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {810#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:07:44,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {818#(or (< 0 (mod (+ 4294967288 main_~x~0) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8) (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {814#(or (and (<= (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296))) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8))) (< 0 (mod (+ main_~x~0 4294967289) 4294967296)))} is VALID [2022-04-27 21:07:44,563 INFO L290 TraceCheckUtils]: 7: Hoare triple {822#(or (and (< (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10)) (<= (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967287) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {818#(or (< 0 (mod (+ 4294967288 main_~x~0) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8) (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:07:44,564 INFO L290 TraceCheckUtils]: 6: Hoare triple {826#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10) (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 11))) (< 0 (mod (+ main_~x~0 4294967286) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {822#(or (and (< (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10)) (<= (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967287) 4294967296)))} is VALID [2022-04-27 21:07:44,566 INFO L290 TraceCheckUtils]: 5: Hoare triple {679#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {826#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10) (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 11))) (< 0 (mod (+ main_~x~0 4294967286) 4294967296)))} is VALID [2022-04-27 21:07:44,566 INFO L272 TraceCheckUtils]: 4: Hoare triple {679#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:44,566 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {679#true} {679#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:44,566 INFO L290 TraceCheckUtils]: 2: Hoare triple {679#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:44,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {679#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {679#true} is VALID [2022-04-27 21:07:44,567 INFO L272 TraceCheckUtils]: 0: Hoare triple {679#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {679#true} is VALID [2022-04-27 21:07:44,567 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:07:44,567 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [59199124] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:07:44,567 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:07:44,568 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 40 [2022-04-27 21:07:44,568 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268998656] [2022-04-27 21:07:44,568 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:07:44,568 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:07:44,569 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:07:44,569 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:07:45,874 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:07:45,875 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2022-04-27 21:07:45,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:07:45,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2022-04-27 21:07:45,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=309, Invalid=1248, Unknown=3, NotChecked=0, Total=1560 [2022-04-27 21:07:45,876 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:07:49,397 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:07:55,854 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:07:57,485 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.15s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:07:59,588 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:08:25,878 WARN L232 SmtUtils]: Spent 5.25s on a formula simplification that was a NOOP. DAG size: 166 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:10:52,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:10:52,305 INFO L93 Difference]: Finished difference Result 41 states and 52 transitions. [2022-04-27 21:10:52,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-27 21:10:52,306 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:10:52,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:10:52,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:52,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 52 transitions. [2022-04-27 21:10:52,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:52,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 52 transitions. [2022-04-27 21:10:52,310 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 52 transitions. [2022-04-27 21:10:57,887 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 51 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 21:10:57,888 INFO L225 Difference]: With dead ends: 41 [2022-04-27 21:10:57,888 INFO L226 Difference]: Without dead ends: 34 [2022-04-27 21:10:57,890 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 17 SyntacticMatches, 4 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 641 ImplicationChecksByTransitivity, 187.1s TimeCoverageRelationStatistics Valid=843, Invalid=3549, Unknown=30, NotChecked=0, Total=4422 [2022-04-27 21:10:57,891 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 97 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 383 mSolverCounterSat, 133 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 11.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 539 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 133 IncrementalHoareTripleChecker+Valid, 383 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 20 IncrementalHoareTripleChecker+Unchecked, 11.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:10:57,891 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [97 Valid, 97 Invalid, 539 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [133 Valid, 383 Invalid, 3 Unknown, 20 Unchecked, 11.1s Time] [2022-04-27 21:10:57,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-27 21:10:58,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2022-04-27 21:10:58,067 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:10:58,067 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:58,067 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:58,068 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:58,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:10:58,069 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-27 21:10:58,069 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-27 21:10:58,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:10:58,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:10:58,070 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 21:10:58,070 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 21:10:58,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:10:58,071 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2022-04-27 21:10:58,071 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-27 21:10:58,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:10:58,072 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:10:58,072 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:10:58,072 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:10:58,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:58,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2022-04-27 21:10:58,073 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 21 [2022-04-27 21:10:58,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:10:58,073 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2022-04-27 21:10:58,074 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:10:58,074 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2022-04-27 21:10:58,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 21:10:58,074 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:10:58,074 INFO L195 NwaCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:10:58,087 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 21:10:58,278 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:10:58,278 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:10:58,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:10:58,279 INFO L85 PathProgramCache]: Analyzing trace with hash 749126272, now seen corresponding path program 4 times [2022-04-27 21:10:58,279 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:10:58,279 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495896298] [2022-04-27 21:10:58,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:10:58,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:10:58,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:11:00,220 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:11:00,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:11:00,234 INFO L290 TraceCheckUtils]: 0: Hoare triple {1137#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1106#true} is VALID [2022-04-27 21:11:00,234 INFO L290 TraceCheckUtils]: 1: Hoare triple {1106#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:00,234 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1106#true} {1106#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:00,235 INFO L272 TraceCheckUtils]: 0: Hoare triple {1106#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1137#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:11:00,235 INFO L290 TraceCheckUtils]: 1: Hoare triple {1137#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1106#true} is VALID [2022-04-27 21:11:00,235 INFO L290 TraceCheckUtils]: 2: Hoare triple {1106#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:00,235 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1106#true} {1106#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:00,236 INFO L272 TraceCheckUtils]: 4: Hoare triple {1106#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:00,236 INFO L290 TraceCheckUtils]: 5: Hoare triple {1106#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {1111#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:11:00,238 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1112#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:11:00,243 INFO L290 TraceCheckUtils]: 7: Hoare triple {1112#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1113#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:00,246 INFO L290 TraceCheckUtils]: 8: Hoare triple {1113#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1114#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:11:00,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {1114#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1115#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:00,380 INFO L290 TraceCheckUtils]: 10: Hoare triple {1115#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1116#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:11:00,404 INFO L290 TraceCheckUtils]: 11: Hoare triple {1116#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1117#(and (<= main_~y~0 6) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967289)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-27 21:11:00,420 INFO L290 TraceCheckUtils]: 12: Hoare triple {1117#(and (<= main_~y~0 6) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967289)) (<= (+ main_~x~0 6) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1118#(and (<= 7 main_~y~0) (<= main_~y~0 7) (<= main_~x~0 (+ 4294967288 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:00,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {1118#(and (<= 7 main_~y~0) (<= main_~y~0 7) (<= main_~x~0 (+ 4294967288 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1119#(and (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967287)) (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0))} is VALID [2022-04-27 21:11:00,436 INFO L290 TraceCheckUtils]: 14: Hoare triple {1119#(and (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967287)) (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1120#(and (<= main_~x~0 (+ 4294967286 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:11:00,461 INFO L290 TraceCheckUtils]: 15: Hoare triple {1120#(and (<= main_~x~0 (+ 4294967286 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1121#(and (<= main_~y~0 10) (<= main_~x~0 (+ 4294967285 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 10) main_~n~0))} is VALID [2022-04-27 21:11:00,496 INFO L290 TraceCheckUtils]: 16: Hoare triple {1121#(and (<= main_~y~0 10) (<= main_~x~0 (+ 4294967285 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 10) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1122#(and (<= main_~y~0 11) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967284)) (<= (+ main_~x~0 11) main_~n~0))} is VALID [2022-04-27 21:11:00,516 INFO L290 TraceCheckUtils]: 17: Hoare triple {1122#(and (<= main_~y~0 11) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967284)) (<= (+ main_~x~0 11) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1123#(and (<= main_~x~0 (+ 4294967283 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 12) (<= (+ main_~x~0 12) main_~n~0))} is VALID [2022-04-27 21:11:01,742 INFO L290 TraceCheckUtils]: 18: Hoare triple {1123#(and (<= main_~x~0 (+ 4294967283 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 12) (<= (+ main_~x~0 12) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1124#(and (<= main_~y~0 13) (<= main_~x~0 (+ 4294967282 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 13 main_~y~0))} is VALID [2022-04-27 21:11:01,768 INFO L290 TraceCheckUtils]: 19: Hoare triple {1124#(and (<= main_~y~0 13) (<= main_~x~0 (+ 4294967282 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 13 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1125#(and (<= (+ main_~x~0 14) main_~n~0) (<= main_~y~0 14) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967281)))} is VALID [2022-04-27 21:11:01,861 INFO L290 TraceCheckUtils]: 20: Hoare triple {1125#(and (<= (+ main_~x~0 14) main_~n~0) (<= main_~y~0 14) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967281)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1126#(and (<= main_~y~0 15) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967280)) (<= (+ main_~x~0 15) main_~n~0))} is VALID [2022-04-27 21:11:01,868 INFO L290 TraceCheckUtils]: 21: Hoare triple {1126#(and (<= main_~y~0 15) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967280)) (<= (+ main_~x~0 15) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1127#(and (<= (+ main_~x~0 16) main_~n~0) (<= main_~y~0 16) (<= main_~x~0 (+ 4294967279 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:11:01,879 INFO L290 TraceCheckUtils]: 22: Hoare triple {1127#(and (<= (+ main_~x~0 16) main_~n~0) (<= main_~y~0 16) (<= main_~x~0 (+ 4294967279 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1128#(and (<= main_~y~0 17) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967278)) (<= (+ main_~x~0 17) main_~n~0))} is VALID [2022-04-27 21:11:01,882 INFO L290 TraceCheckUtils]: 23: Hoare triple {1128#(and (<= main_~y~0 17) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967278)) (<= (+ main_~x~0 17) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1129#(and (<= (+ main_~x~0 18) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967277)) (<= main_~y~0 18))} is VALID [2022-04-27 21:11:01,883 INFO L290 TraceCheckUtils]: 24: Hoare triple {1129#(and (<= (+ main_~x~0 18) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967277)) (<= main_~y~0 18))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1130#(and (<= main_~x~0 (+ 4294967276 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ 19 main_~x~0) main_~n~0) (<= main_~y~0 19))} is VALID [2022-04-27 21:11:01,887 INFO L290 TraceCheckUtils]: 25: Hoare triple {1130#(and (<= main_~x~0 (+ 4294967276 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ 19 main_~x~0) main_~n~0) (<= main_~y~0 19))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1131#(and (<= main_~x~0 (+ 4294967275 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 20 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 20))} is VALID [2022-04-27 21:11:01,889 INFO L290 TraceCheckUtils]: 26: Hoare triple {1131#(and (<= main_~x~0 (+ 4294967275 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 20 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 20))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1132#(and (<= main_~x~0 (+ 4294967274 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 21) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 21 main_~y~0))} is VALID [2022-04-27 21:11:01,936 INFO L290 TraceCheckUtils]: 27: Hoare triple {1132#(and (<= main_~x~0 (+ 4294967274 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 21) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 21 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1133#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:11:01,937 INFO L290 TraceCheckUtils]: 28: Hoare triple {1133#(and (<= (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~y~0 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1134#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:11:01,938 INFO L272 TraceCheckUtils]: 29: Hoare triple {1134#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1135#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:11:01,939 INFO L290 TraceCheckUtils]: 30: Hoare triple {1135#(not (= |__VERIFIER_assert_#in~cond| 0))} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1136#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:11:01,939 INFO L290 TraceCheckUtils]: 31: Hoare triple {1136#(not (= __VERIFIER_assert_~cond 0))} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1107#false} is VALID [2022-04-27 21:11:01,939 INFO L290 TraceCheckUtils]: 32: Hoare triple {1107#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1107#false} is VALID [2022-04-27 21:11:01,940 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:11:01,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:11:01,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495896298] [2022-04-27 21:11:01,940 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495896298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:11:01,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1242721342] [2022-04-27 21:11:01,941 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:11:01,941 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:11:01,941 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:11:01,948 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:11:01,951 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 21:11:02,281 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:11:02,281 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:11:02,283 WARN L261 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 97 conjunts are in the unsatisfiable core [2022-04-27 21:11:02,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:11:02,310 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:11:35,266 INFO L272 TraceCheckUtils]: 0: Hoare triple {1106#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:35,266 INFO L290 TraceCheckUtils]: 1: Hoare triple {1106#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1106#true} is VALID [2022-04-27 21:11:35,266 INFO L290 TraceCheckUtils]: 2: Hoare triple {1106#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:35,266 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1106#true} {1106#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:35,266 INFO L272 TraceCheckUtils]: 4: Hoare triple {1106#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:11:35,267 INFO L290 TraceCheckUtils]: 5: Hoare triple {1106#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {1111#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:11:35,268 INFO L290 TraceCheckUtils]: 6: Hoare triple {1111#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1112#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:11:35,271 INFO L290 TraceCheckUtils]: 7: Hoare triple {1112#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1162#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 21:11:35,274 INFO L290 TraceCheckUtils]: 8: Hoare triple {1162#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1166#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:11:35,275 INFO L290 TraceCheckUtils]: 9: Hoare triple {1166#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1170#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,277 INFO L290 TraceCheckUtils]: 10: Hoare triple {1170#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1174#(and (<= 5 main_~y~0) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:11:35,278 INFO L290 TraceCheckUtils]: 11: Hoare triple {1174#(and (<= 5 main_~y~0) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1178#(and (<= main_~y~0 6) (<= main_~x~0 (+ 4294967289 (* (div (+ main_~y~0 main_~x~0 (* (div (+ 5 main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 6 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,280 INFO L290 TraceCheckUtils]: 12: Hoare triple {1178#(and (<= main_~y~0 6) (<= main_~x~0 (+ 4294967289 (* (div (+ main_~y~0 main_~x~0 (* (div (+ 5 main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 6 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1182#(and (<= 7 main_~y~0) (<= main_~y~0 7) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 6) 4294967296)) (* (- 1) main_~n~0)) 4294967296)))))} is VALID [2022-04-27 21:11:35,284 INFO L290 TraceCheckUtils]: 13: Hoare triple {1182#(and (<= 7 main_~y~0) (<= main_~y~0 7) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 6) 4294967296)) (* (- 1) main_~n~0)) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1186#(and (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0) (<= main_~x~0 (+ 4294967287 (* (div (+ (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:11:35,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {1186#(and (<= main_~y~0 8) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 8 main_~y~0) (<= main_~x~0 (+ 4294967287 (* (div (+ (* (div (+ 7 main_~x~0) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1190#(and (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9) (<= main_~x~0 (+ (* (div (+ (* (div (+ main_~x~0 8) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967286)))} is VALID [2022-04-27 21:11:35,287 INFO L290 TraceCheckUtils]: 15: Hoare triple {1190#(and (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 9 main_~y~0) (<= main_~y~0 9) (<= main_~x~0 (+ (* (div (+ (* (div (+ main_~x~0 8) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967286)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1194#(and (<= main_~y~0 10) (<= 10 main_~y~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 9) 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967285)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,288 INFO L290 TraceCheckUtils]: 16: Hoare triple {1194#(and (<= main_~y~0 10) (<= 10 main_~y~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 9) 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967285)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1198#(and (<= main_~y~0 11) (<= main_~x~0 (+ (* (div (+ (* (div (+ main_~x~0 10) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967284)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 11 main_~y~0))} is VALID [2022-04-27 21:11:35,290 INFO L290 TraceCheckUtils]: 17: Hoare triple {1198#(and (<= main_~y~0 11) (<= main_~x~0 (+ (* (div (+ (* (div (+ main_~x~0 10) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967284)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 11 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1202#(and (<= main_~x~0 (+ 4294967283 (* (div (+ (* (div (+ main_~x~0 11) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 12 main_~y~0) (<= main_~y~0 12) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,325 INFO L290 TraceCheckUtils]: 18: Hoare triple {1202#(and (<= main_~x~0 (+ 4294967283 (* (div (+ (* (div (+ main_~x~0 11) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 12 main_~y~0) (<= main_~y~0 12) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1206#(and (<= main_~y~0 13) (<= main_~x~0 (+ 4294967282 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 12) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 13 main_~y~0))} is VALID [2022-04-27 21:11:35,329 INFO L290 TraceCheckUtils]: 19: Hoare triple {1206#(and (<= main_~y~0 13) (<= main_~x~0 (+ 4294967282 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 12) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 13 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1210#(and (<= 14 main_~y~0) (<= main_~y~0 14) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 13) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967281)))} is VALID [2022-04-27 21:11:35,331 INFO L290 TraceCheckUtils]: 20: Hoare triple {1210#(and (<= 14 main_~y~0) (<= main_~y~0 14) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 13) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967281)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1214#(and (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 14) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967280)) (<= main_~y~0 15) (<= 15 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,335 INFO L290 TraceCheckUtils]: 21: Hoare triple {1214#(and (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 14) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967280)) (<= main_~y~0 15) (<= 15 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1218#(and (<= 16 main_~y~0) (<= main_~y~0 16) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 15) 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967279)))} is VALID [2022-04-27 21:11:35,340 INFO L290 TraceCheckUtils]: 22: Hoare triple {1218#(and (<= 16 main_~y~0) (<= main_~y~0 16) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div (+ main_~x~0 15) 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967279)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1222#(and (<= main_~y~0 17) (<= 17 main_~y~0) (<= main_~x~0 (+ 4294967278 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 16) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,344 INFO L290 TraceCheckUtils]: 23: Hoare triple {1222#(and (<= main_~y~0 17) (<= 17 main_~y~0) (<= main_~x~0 (+ 4294967278 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 16) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1226#(and (<= 18 main_~y~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 17) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967277)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 18))} is VALID [2022-04-27 21:11:35,347 INFO L290 TraceCheckUtils]: 24: Hoare triple {1226#(and (<= 18 main_~y~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 17) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967277)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 18))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1230#(and (<= 19 main_~y~0) (<= main_~y~0 19) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967276 (* 4294967296 (div (+ (* 4294967296 (div (+ main_~x~0 18) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296)))))} is VALID [2022-04-27 21:11:35,349 INFO L290 TraceCheckUtils]: 25: Hoare triple {1230#(and (<= 19 main_~y~0) (<= main_~y~0 19) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967276 (* 4294967296 (div (+ (* 4294967296 (div (+ main_~x~0 18) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1234#(and (<= main_~x~0 (+ 4294967275 (* (div (+ main_~y~0 main_~x~0 (* (div (+ 19 main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 20 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 20))} is VALID [2022-04-27 21:11:35,356 INFO L290 TraceCheckUtils]: 26: Hoare triple {1234#(and (<= main_~x~0 (+ 4294967275 (* (div (+ main_~y~0 main_~x~0 (* (div (+ 19 main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 20 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 20))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1238#(and (<= main_~x~0 (+ (* 4294967296 (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 20) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) 4294967274)) (<= main_~y~0 21) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 21 main_~y~0))} is VALID [2022-04-27 21:11:35,364 INFO L290 TraceCheckUtils]: 27: Hoare triple {1238#(and (<= main_~x~0 (+ (* 4294967296 (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 20) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) 4294967274)) (<= main_~y~0 21) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 21 main_~y~0))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1242#(and (<= main_~x~0 (+ 4294967273 (* (div (+ (* (div (+ main_~x~0 21) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 22) (<= 22 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:11:35,371 INFO L290 TraceCheckUtils]: 28: Hoare triple {1242#(and (<= main_~x~0 (+ 4294967273 (* (div (+ (* (div (+ main_~x~0 21) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 22) (<= 22 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1246#(and (<= main_~y~0 22) (<= 22 main_~y~0) (<= (div (+ (* main_~y~0 (- 4294967295)) (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* main_~y~0 4294967295)) 4294967296)))} is VALID [2022-04-27 21:11:35,378 INFO L272 TraceCheckUtils]: 29: Hoare triple {1246#(and (<= main_~y~0 22) (<= 22 main_~y~0) (<= (div (+ (* main_~y~0 (- 4294967295)) (* (- 1) main_~n~0)) (- 4294967296)) (div (+ main_~n~0 (* main_~y~0 4294967295)) 4294967296)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1250#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:11:35,379 INFO L290 TraceCheckUtils]: 30: Hoare triple {1250#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1254#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:11:35,379 INFO L290 TraceCheckUtils]: 31: Hoare triple {1254#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1107#false} is VALID [2022-04-27 21:11:35,379 INFO L290 TraceCheckUtils]: 32: Hoare triple {1107#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1107#false} is VALID [2022-04-27 21:11:35,380 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:11:35,380 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:12:23,918 INFO L290 TraceCheckUtils]: 32: Hoare triple {1107#false} [53] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1107#false} is VALID [2022-04-27 21:12:23,918 INFO L290 TraceCheckUtils]: 31: Hoare triple {1254#(<= 1 __VERIFIER_assert_~cond)} [51] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1107#false} is VALID [2022-04-27 21:12:23,919 INFO L290 TraceCheckUtils]: 30: Hoare triple {1250#(<= 1 |__VERIFIER_assert_#in~cond|)} [50] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1254#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:12:23,920 INFO L272 TraceCheckUtils]: 29: Hoare triple {1134#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [48] L17-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_5 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_5, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1250#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:12:23,921 INFO L290 TraceCheckUtils]: 28: Hoare triple {1273#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [46] L17-2-->L17-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1134#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:12:23,923 INFO L290 TraceCheckUtils]: 27: Hoare triple {1277#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1273#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:12:23,925 INFO L290 TraceCheckUtils]: 26: Hoare triple {1281#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1277#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:12:23,927 INFO L290 TraceCheckUtils]: 25: Hoare triple {1285#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1281#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:12:23,928 INFO L290 TraceCheckUtils]: 24: Hoare triple {1289#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1285#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:12:23,929 INFO L290 TraceCheckUtils]: 23: Hoare triple {1293#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1289#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:12:23,930 INFO L290 TraceCheckUtils]: 22: Hoare triple {1297#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1293#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:12:23,932 INFO L290 TraceCheckUtils]: 21: Hoare triple {1301#(or (and (<= (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296))) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8))) (< 0 (mod (+ main_~x~0 4294967289) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1297#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:12:23,933 INFO L290 TraceCheckUtils]: 20: Hoare triple {1305#(or (< 0 (mod (+ 4294967288 main_~x~0) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8) (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1301#(or (and (<= (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div (+ 7 main_~y~0) 4294967296))) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8))) (< 0 (mod (+ main_~x~0 4294967289) 4294967296)))} is VALID [2022-04-27 21:12:23,934 INFO L290 TraceCheckUtils]: 19: Hoare triple {1309#(or (and (< (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10)) (<= (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967287) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1305#(or (< 0 (mod (+ 4294967288 main_~x~0) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 8) (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 8) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:12:23,935 INFO L290 TraceCheckUtils]: 18: Hoare triple {1313#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10) (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 11))) (< 0 (mod (+ main_~x~0 4294967286) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1309#(or (and (< (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10)) (<= (+ main_~y~0 9 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~y~0 9) 4294967296)) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967287) 4294967296)))} is VALID [2022-04-27 21:12:23,937 INFO L290 TraceCheckUtils]: 17: Hoare triple {1317#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 11) (+ main_~n~0 (* (div (+ main_~y~0 11) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 11) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 12))) (< 0 (mod (+ main_~x~0 4294967285) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1313#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 10) (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 10) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 11))) (< 0 (mod (+ main_~x~0 4294967286) 4294967296)))} is VALID [2022-04-27 21:12:23,938 INFO L290 TraceCheckUtils]: 16: Hoare triple {1321#(or (< 0 (mod (+ main_~x~0 4294967284) 4294967296)) (and (< (+ (* (div (+ main_~y~0 12) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 13)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 12) (+ (* (div (+ main_~y~0 12) 4294967296) 4294967296) main_~n~0))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1317#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 11) (+ main_~n~0 (* (div (+ main_~y~0 11) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 11) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 12))) (< 0 (mod (+ main_~x~0 4294967285) 4294967296)))} is VALID [2022-04-27 21:12:23,939 INFO L290 TraceCheckUtils]: 15: Hoare triple {1325#(or (< 0 (mod (+ 4294967283 main_~x~0) 4294967296)) (and (< (+ (* (div (+ main_~y~0 13) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 14 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 13) (+ (* (div (+ main_~y~0 13) 4294967296) 4294967296) main_~n~0))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1321#(or (< 0 (mod (+ main_~x~0 4294967284) 4294967296)) (and (< (+ (* (div (+ main_~y~0 12) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 13)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 12) (+ (* (div (+ main_~y~0 12) 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:12:23,940 INFO L290 TraceCheckUtils]: 14: Hoare triple {1329#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 14) 4294967296) 4294967296)) (+ main_~y~0 15 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 14 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 14) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967282 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1325#(or (< 0 (mod (+ 4294967283 main_~x~0) 4294967296)) (and (< (+ (* (div (+ main_~y~0 13) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 14 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 13) (+ (* (div (+ main_~y~0 13) 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:12:23,942 INFO L290 TraceCheckUtils]: 13: Hoare triple {1333#(or (and (<= (+ main_~y~0 15 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 15) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 15) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 16 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967281) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1329#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 14) 4294967296) 4294967296)) (+ main_~y~0 15 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 14 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 14) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967282 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:12:23,943 INFO L290 TraceCheckUtils]: 12: Hoare triple {1337#(or (and (< (+ (* (div (+ main_~y~0 16) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 17)) (<= (+ main_~y~0 16 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 16) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967280) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1333#(or (and (<= (+ main_~y~0 15 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 15) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 15) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 16 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967281) 4294967296)))} is VALID [2022-04-27 21:12:23,944 INFO L290 TraceCheckUtils]: 11: Hoare triple {1341#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 17) (+ main_~n~0 (* (div (+ main_~y~0 17) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 17) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 18))) (< 0 (mod (+ main_~x~0 4294967279) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1337#(or (and (< (+ (* (div (+ main_~y~0 16) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 17)) (<= (+ main_~y~0 16 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 16) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967280) 4294967296)))} is VALID [2022-04-27 21:12:23,946 INFO L290 TraceCheckUtils]: 10: Hoare triple {1345#(or (and (< (+ (* (div (+ main_~y~0 18) 4294967296) 4294967296) main_~n~0) (+ 19 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 18) (+ (* (div (+ main_~y~0 18) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967278) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1341#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 17) (+ main_~n~0 (* (div (+ main_~y~0 17) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 17) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 18))) (< 0 (mod (+ main_~x~0 4294967279) 4294967296)))} is VALID [2022-04-27 21:12:23,947 INFO L290 TraceCheckUtils]: 9: Hoare triple {1349#(or (and (<= (+ 19 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 19 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 19 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 20))) (< 0 (mod (+ main_~x~0 4294967277) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1345#(or (and (< (+ (* (div (+ main_~y~0 18) 4294967296) 4294967296) main_~n~0) (+ 19 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 18) (+ (* (div (+ main_~y~0 18) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967278) 4294967296)))} is VALID [2022-04-27 21:12:23,948 INFO L290 TraceCheckUtils]: 8: Hoare triple {1353#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 20) (+ (* 4294967296 (div (+ main_~y~0 20) 4294967296)) main_~n~0)) (< (+ (* 4294967296 (div (+ main_~y~0 20) 4294967296)) main_~n~0) (+ main_~y~0 21 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ 4294967276 main_~x~0) 4294967296)))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1349#(or (and (<= (+ 19 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 19 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 19 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 20))) (< 0 (mod (+ main_~x~0 4294967277) 4294967296)))} is VALID [2022-04-27 21:12:23,949 INFO L290 TraceCheckUtils]: 7: Hoare triple {1357#(or (< 0 (mod (+ 4294967275 main_~x~0) 4294967296)) (and (< (+ main_~n~0 (* (div (+ main_~y~0 21) 4294967296) 4294967296)) (+ main_~y~0 22 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 21 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 21) 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1353#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 20) (+ (* 4294967296 (div (+ main_~y~0 20) 4294967296)) main_~n~0)) (< (+ (* 4294967296 (div (+ main_~y~0 20) 4294967296)) main_~n~0) (+ main_~y~0 21 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ 4294967276 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:12:23,950 INFO L290 TraceCheckUtils]: 6: Hoare triple {1361#(or (< 0 (mod (+ 4294967274 main_~x~0) 4294967296)) (and (<= (+ main_~y~0 22 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 22) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 22) 4294967296) 4294967296) main_~n~0) (+ 23 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)))))} [47] L17-2-->L17-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (< 0 (mod v_main_~x~0_4 4294967296)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1357#(or (< 0 (mod (+ 4294967275 main_~x~0) 4294967296)) (and (< (+ main_~n~0 (* (div (+ main_~y~0 21) 4294967296) 4294967296)) (+ main_~y~0 22 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 21 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 21) 4294967296) 4294967296)))))} is VALID [2022-04-27 21:12:23,951 INFO L290 TraceCheckUtils]: 5: Hoare triple {1106#true} [43] mainENTRY-->L17-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~y~0, main_~n~0] {1361#(or (< 0 (mod (+ 4294967274 main_~x~0) 4294967296)) (and (<= (+ main_~y~0 22 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 22) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ main_~y~0 22) 4294967296) 4294967296) main_~n~0) (+ 23 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:12:23,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {1106#true} [40] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:12:23,952 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1106#true} {1106#true} [56] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:12:23,952 INFO L290 TraceCheckUtils]: 2: Hoare triple {1106#true} [44] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:12:23,952 INFO L290 TraceCheckUtils]: 1: Hoare triple {1106#true} [41] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= (select |v_#length_1| 2) 18) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1106#true} is VALID [2022-04-27 21:12:23,952 INFO L272 TraceCheckUtils]: 0: Hoare triple {1106#true} [39] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1106#true} is VALID [2022-04-27 21:12:23,952 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:12:23,953 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1242721342] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:12:23,953 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:12:23,953 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 28, 28] total 76 [2022-04-27 21:12:23,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038890528] [2022-04-27 21:12:23,953 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:12:23,954 INFO L78 Accepts]: Start accepts. Automaton has has 76 states, 74 states have (on average 1.054054054054054) internal successors, (78), 73 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 21:12:23,955 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:12:23,955 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 76 states, 74 states have (on average 1.054054054054054) internal successors, (78), 73 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:12:25,533 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:12:25,533 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 76 states [2022-04-27 21:12:25,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:12:25,534 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2022-04-27 21:12:25,535 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1187, Invalid=4512, Unknown=1, NotChecked=0, Total=5700 [2022-04-27 21:12:25,535 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand has 76 states, 74 states have (on average 1.054054054054054) internal successors, (78), 73 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:12:38,595 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:12:42,968 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:12:49,095 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:12:55,176 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:16,541 WARN L232 SmtUtils]: Spent 1.63m on a formula simplification that was a NOOP. DAG size: 334 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:16:20,252 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.11s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:29,408 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:35,125 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.39s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:38,235 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.01s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:44,917 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.37s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:50,013 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.41s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:54,736 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.37s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:56,951 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:16:58,966 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:17:01,442 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.67s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:17:03,998 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:20:00,337 WARN L232 SmtUtils]: Spent 1.56m on a formula simplification. DAG size of input: 318 DAG size of output: 106 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)