/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de20.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 21:54:45,272 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 21:54:45,274 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 21:54:45,325 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-27 21:54:45,340 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 21:54:45,341 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 21:54:45,341 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 21:54:45,342 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 21:54:45,342 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 21:54:45,343 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 21:54:45,343 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 21:54:45,344 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 21:54:45,345 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 21:54:45,347 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 21:54:45,348 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 21:54:45,349 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 21:54:45,350 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 21:54:45,358 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 21:54:45,363 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 21:54:45,363 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 21:54:45,366 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 21:54:45,369 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 21:54:45,387 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 21:54:45,388 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 21:54:45,388 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 21:54:45,388 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 21:54:45,389 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 21:54:45,389 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 21:54:45,389 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 21:54:45,389 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 21:54:45,389 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 21:54:45,390 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 21:54:45,390 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 21:54:45,390 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 21:54:45,390 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 21:54:45,390 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 21:54:45,390 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 21:54:45,391 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:54:45,391 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 21:54:45,391 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 21:54:45,392 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 21:54:45,392 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 21:54:45,392 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 21:54:45,392 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 21:54:45,392 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 21:54:45,393 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 21:54:45,585 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 21:54:45,604 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 21:54:45,606 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 21:54:45,606 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 21:54:45,607 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 21:54:45,607 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de20.c [2022-04-27 21:54:45,657 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9053b1e3b/b27a840abf414f5da12faf8d80a488fa/FLAGad696e6bb [2022-04-27 21:54:45,973 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 21:54:45,974 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de20.c [2022-04-27 21:54:45,979 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9053b1e3b/b27a840abf414f5da12faf8d80a488fa/FLAGad696e6bb [2022-04-27 21:54:46,399 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9053b1e3b/b27a840abf414f5da12faf8d80a488fa [2022-04-27 21:54:46,402 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 21:54:46,404 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 21:54:46,405 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 21:54:46,405 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 21:54:46,407 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 21:54:46,408 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,409 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@37675282 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46, skipping insertion in model container [2022-04-27 21:54:46,409 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,413 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 21:54:46,422 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 21:54:46,550 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de20.c[368,381] [2022-04-27 21:54:46,569 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:54:46,574 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 21:54:46,588 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de20.c[368,381] [2022-04-27 21:54:46,591 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:54:46,599 INFO L208 MainTranslator]: Completed translation [2022-04-27 21:54:46,599 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46 WrapperNode [2022-04-27 21:54:46,599 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 21:54:46,600 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 21:54:46,600 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 21:54:46,600 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 21:54:46,607 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,607 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,611 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,612 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,622 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,625 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,626 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,632 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 21:54:46,632 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 21:54:46,633 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 21:54:46,633 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 21:54:46,633 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,638 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:54:46,644 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:46,653 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 21:54:46,670 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 21:54:46,680 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 21:54:46,680 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 21:54:46,680 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 21:54:46,680 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 21:54:46,680 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 21:54:46,680 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 21:54:46,680 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 21:54:46,680 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 21:54:46,680 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 21:54:46,680 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 21:54:46,681 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 21:54:46,720 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 21:54:46,721 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 21:54:46,867 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 21:54:46,875 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 21:54:46,875 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-04-27 21:54:46,876 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:54:46 BoogieIcfgContainer [2022-04-27 21:54:46,876 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 21:54:46,877 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 21:54:46,877 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 21:54:46,883 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 21:54:46,897 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:54:46" (1/1) ... [2022-04-27 21:54:46,898 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 21:54:46,911 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:54:46 BasicIcfg [2022-04-27 21:54:46,911 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 21:54:46,922 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 21:54:46,922 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 21:54:46,925 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 21:54:46,925 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 09:54:46" (1/4) ... [2022-04-27 21:54:46,925 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78253760 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:54:46, skipping insertion in model container [2022-04-27 21:54:46,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:54:46" (2/4) ... [2022-04-27 21:54:46,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78253760 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:54:46, skipping insertion in model container [2022-04-27 21:54:46,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:54:46" (3/4) ... [2022-04-27 21:54:46,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78253760 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:54:46, skipping insertion in model container [2022-04-27 21:54:46,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:54:46" (4/4) ... [2022-04-27 21:54:46,927 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de20.cqvasr [2022-04-27 21:54:46,936 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 21:54:46,936 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 21:54:46,989 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 21:54:46,993 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@b0d99b9, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@13e21fa4 [2022-04-27 21:54:46,993 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 21:54:46,999 INFO L276 IsEmpty]: Start isEmpty. Operand has 21 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:54:47,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-27 21:54:47,003 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:47,003 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:47,003 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:47,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:47,007 INFO L85 PathProgramCache]: Analyzing trace with hash 1032895658, now seen corresponding path program 1 times [2022-04-27 21:54:47,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:47,013 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207219216] [2022-04-27 21:54:47,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:47,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:47,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:47,146 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:47,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:47,167 INFO L290 TraceCheckUtils]: 0: Hoare triple {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24#true} is VALID [2022-04-27 21:54:47,168 INFO L290 TraceCheckUtils]: 1: Hoare triple {24#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 21:54:47,168 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24#true} {24#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 21:54:47,169 INFO L272 TraceCheckUtils]: 0: Hoare triple {24#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:47,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {29#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24#true} is VALID [2022-04-27 21:54:47,171 INFO L290 TraceCheckUtils]: 2: Hoare triple {24#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 21:54:47,171 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24#true} {24#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 21:54:47,171 INFO L272 TraceCheckUtils]: 4: Hoare triple {24#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24#true} is VALID [2022-04-27 21:54:47,171 INFO L290 TraceCheckUtils]: 5: Hoare triple {24#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24#true} is VALID [2022-04-27 21:54:47,172 INFO L290 TraceCheckUtils]: 6: Hoare triple {24#true} [59] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 21:54:47,173 INFO L290 TraceCheckUtils]: 7: Hoare triple {25#false} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {25#false} is VALID [2022-04-27 21:54:47,173 INFO L290 TraceCheckUtils]: 8: Hoare triple {25#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 21:54:47,174 INFO L272 TraceCheckUtils]: 9: Hoare triple {25#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25#false} is VALID [2022-04-27 21:54:47,174 INFO L290 TraceCheckUtils]: 10: Hoare triple {25#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25#false} is VALID [2022-04-27 21:54:47,175 INFO L290 TraceCheckUtils]: 11: Hoare triple {25#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 21:54:47,175 INFO L290 TraceCheckUtils]: 12: Hoare triple {25#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#false} is VALID [2022-04-27 21:54:47,175 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:47,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:47,176 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207219216] [2022-04-27 21:54:47,177 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [207219216] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:54:47,177 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:54:47,177 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 21:54:47,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631828280] [2022-04-27 21:54:47,179 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:54:47,184 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 21:54:47,185 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:47,187 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,214 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:47,214 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 21:54:47,215 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:47,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 21:54:47,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:54:47,241 INFO L87 Difference]: Start difference. First operand has 21 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 14 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,292 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2022-04-27 21:54:47,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 21:54:47,293 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 21:54:47,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:47,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 42 transitions. [2022-04-27 21:54:47,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 42 transitions. [2022-04-27 21:54:47,301 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 42 transitions. [2022-04-27 21:54:47,348 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:47,354 INFO L225 Difference]: With dead ends: 35 [2022-04-27 21:54:47,354 INFO L226 Difference]: Without dead ends: 14 [2022-04-27 21:54:47,356 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:54:47,362 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 13 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:47,364 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 24 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:54:47,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states. [2022-04-27 21:54:47,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2022-04-27 21:54:47,387 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:47,388 INFO L82 GeneralOperation]: Start isEquivalent. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,388 INFO L74 IsIncluded]: Start isIncluded. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,389 INFO L87 Difference]: Start difference. First operand 14 states. Second operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,394 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-27 21:54:47,394 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-27 21:54:47,394 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:47,394 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:47,395 INFO L74 IsIncluded]: Start isIncluded. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-27 21:54:47,395 INFO L87 Difference]: Start difference. First operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 14 states. [2022-04-27 21:54:47,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,398 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions. [2022-04-27 21:54:47,398 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-27 21:54:47,398 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:47,398 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:47,398 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:47,399 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:47,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 9 states have internal predecessors, (11), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 15 transitions. [2022-04-27 21:54:47,408 INFO L78 Accepts]: Start accepts. Automaton has 14 states and 15 transitions. Word has length 13 [2022-04-27 21:54:47,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:47,410 INFO L495 AbstractCegarLoop]: Abstraction has 14 states and 15 transitions. [2022-04-27 21:54:47,412 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.0) internal successors, (9), 2 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,412 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 15 transitions. [2022-04-27 21:54:47,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-04-27 21:54:47,413 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:47,413 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:47,413 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 21:54:47,413 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:47,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:47,414 INFO L85 PathProgramCache]: Analyzing trace with hash 1920399339, now seen corresponding path program 1 times [2022-04-27 21:54:47,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:47,414 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829186132] [2022-04-27 21:54:47,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:47,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:47,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:47,580 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:47,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:47,589 INFO L290 TraceCheckUtils]: 0: Hoare triple {136#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {128#true} is VALID [2022-04-27 21:54:47,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {128#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-27 21:54:47,589 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {128#true} {128#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-27 21:54:47,590 INFO L272 TraceCheckUtils]: 0: Hoare triple {128#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {136#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:47,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {136#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {128#true} is VALID [2022-04-27 21:54:47,591 INFO L290 TraceCheckUtils]: 2: Hoare triple {128#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-27 21:54:47,591 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {128#true} {128#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-27 21:54:47,591 INFO L272 TraceCheckUtils]: 4: Hoare triple {128#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {128#true} is VALID [2022-04-27 21:54:47,591 INFO L290 TraceCheckUtils]: 5: Hoare triple {128#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:47,592 INFO L290 TraceCheckUtils]: 6: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:47,593 INFO L290 TraceCheckUtils]: 7: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:47,593 INFO L290 TraceCheckUtils]: 8: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:47,594 INFO L272 TraceCheckUtils]: 9: Hoare triple {133#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {134#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:54:47,594 INFO L290 TraceCheckUtils]: 10: Hoare triple {134#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {135#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:54:47,595 INFO L290 TraceCheckUtils]: 11: Hoare triple {135#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {129#false} is VALID [2022-04-27 21:54:47,595 INFO L290 TraceCheckUtils]: 12: Hoare triple {129#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {129#false} is VALID [2022-04-27 21:54:47,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:47,595 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:47,596 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829186132] [2022-04-27 21:54:47,596 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [829186132] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:54:47,596 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:54:47,596 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 21:54:47,596 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094134477] [2022-04-27 21:54:47,596 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:54:47,597 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 21:54:47,597 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:47,598 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,608 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 13 edges. 13 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:47,608 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 21:54:47,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:47,609 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 21:54:47,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 21:54:47,613 INFO L87 Difference]: Start difference. First operand 14 states and 15 transitions. Second operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,731 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2022-04-27 21:54:47,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 21:54:47,732 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 13 [2022-04-27 21:54:47,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:47,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 24 transitions. [2022-04-27 21:54:47,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 24 transitions. [2022-04-27 21:54:47,739 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 24 transitions. [2022-04-27 21:54:47,759 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:47,760 INFO L225 Difference]: With dead ends: 22 [2022-04-27 21:54:47,760 INFO L226 Difference]: Without dead ends: 17 [2022-04-27 21:54:47,761 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-27 21:54:47,763 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:47,765 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 28 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:54:47,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-27 21:54:47,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-27 21:54:47,771 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:47,771 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,771 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,773 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,774 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-27 21:54:47,774 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-27 21:54:47,774 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:47,775 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:47,775 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 21:54:47,775 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 21:54:47,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,777 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-27 21:54:47,777 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-27 21:54:47,777 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:47,777 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:47,777 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:47,778 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:47,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-04-27 21:54:47,779 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 13 [2022-04-27 21:54:47,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:47,779 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-04-27 21:54:47,779 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.5) internal successors, (9), 4 states have internal predecessors, (9), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,780 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-27 21:54:47,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 21:54:47,780 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:47,780 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:47,781 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 21:54:47,781 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:47,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:47,783 INFO L85 PathProgramCache]: Analyzing trace with hash -570442020, now seen corresponding path program 1 times [2022-04-27 21:54:47,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:47,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855005816] [2022-04-27 21:54:47,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:47,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:47,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:47,837 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:47,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:47,853 INFO L290 TraceCheckUtils]: 0: Hoare triple {247#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-27 21:54:47,853 INFO L290 TraceCheckUtils]: 1: Hoare triple {240#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-27 21:54:47,853 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {240#true} {240#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-27 21:54:47,854 INFO L272 TraceCheckUtils]: 0: Hoare triple {240#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {247#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:47,854 INFO L290 TraceCheckUtils]: 1: Hoare triple {247#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {240#true} is VALID [2022-04-27 21:54:47,855 INFO L290 TraceCheckUtils]: 2: Hoare triple {240#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-27 21:54:47,855 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {240#true} {240#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-27 21:54:47,855 INFO L272 TraceCheckUtils]: 4: Hoare triple {240#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {240#true} is VALID [2022-04-27 21:54:47,855 INFO L290 TraceCheckUtils]: 5: Hoare triple {240#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {245#(= main_~y~0 0)} is VALID [2022-04-27 21:54:47,856 INFO L290 TraceCheckUtils]: 6: Hoare triple {245#(= main_~y~0 0)} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {245#(= main_~y~0 0)} is VALID [2022-04-27 21:54:47,856 INFO L290 TraceCheckUtils]: 7: Hoare triple {245#(= main_~y~0 0)} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {246#(= main_~z~0 0)} is VALID [2022-04-27 21:54:47,857 INFO L290 TraceCheckUtils]: 8: Hoare triple {246#(= main_~z~0 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {241#false} is VALID [2022-04-27 21:54:47,858 INFO L290 TraceCheckUtils]: 9: Hoare triple {241#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-27 21:54:47,858 INFO L272 TraceCheckUtils]: 10: Hoare triple {241#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {241#false} is VALID [2022-04-27 21:54:47,858 INFO L290 TraceCheckUtils]: 11: Hoare triple {241#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {241#false} is VALID [2022-04-27 21:54:47,858 INFO L290 TraceCheckUtils]: 12: Hoare triple {241#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-27 21:54:47,858 INFO L290 TraceCheckUtils]: 13: Hoare triple {241#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {241#false} is VALID [2022-04-27 21:54:47,859 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:47,859 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:47,861 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855005816] [2022-04-27 21:54:47,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1855005816] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:54:47,862 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:54:47,863 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 21:54:47,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735299938] [2022-04-27 21:54:47,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:54:47,864 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:54:47,864 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:47,865 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,874 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:47,874 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 21:54:47,874 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:47,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 21:54:47,875 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 21:54:47,875 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,944 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2022-04-27 21:54:47,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 21:54:47,944 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:54:47,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:47,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 25 transitions. [2022-04-27 21:54:47,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 25 transitions. [2022-04-27 21:54:47,946 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 25 transitions. [2022-04-27 21:54:47,966 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:47,967 INFO L225 Difference]: With dead ends: 23 [2022-04-27 21:54:47,967 INFO L226 Difference]: Without dead ends: 15 [2022-04-27 21:54:47,967 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 21:54:47,968 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 12 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:47,968 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 25 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:54:47,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-27 21:54:47,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-27 21:54:47,970 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:47,970 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,970 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,971 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,971 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-27 21:54:47,971 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-27 21:54:47,972 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:47,972 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:47,972 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 21:54:47,972 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 21:54:47,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:47,973 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2022-04-27 21:54:47,973 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-27 21:54:47,973 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:47,973 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:47,973 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:47,973 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:47,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.2) internal successors, (12), 10 states have internal predecessors, (12), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2022-04-27 21:54:47,974 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 16 transitions. Word has length 14 [2022-04-27 21:54:47,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:47,974 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 16 transitions. [2022-04-27 21:54:47,974 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.0) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:47,974 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 16 transitions. [2022-04-27 21:54:47,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 21:54:47,975 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:47,975 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:47,975 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 21:54:47,975 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:47,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:47,975 INFO L85 PathProgramCache]: Analyzing trace with hash -688526500, now seen corresponding path program 1 times [2022-04-27 21:54:47,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:47,975 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524150876] [2022-04-27 21:54:47,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:47,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:47,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:48,026 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:48,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:48,031 INFO L290 TraceCheckUtils]: 0: Hoare triple {352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-27 21:54:48,031 INFO L290 TraceCheckUtils]: 1: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,032 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,032 INFO L272 TraceCheckUtils]: 0: Hoare triple {344#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:48,032 INFO L290 TraceCheckUtils]: 1: Hoare triple {352#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-27 21:54:48,033 INFO L290 TraceCheckUtils]: 2: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,033 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,033 INFO L272 TraceCheckUtils]: 4: Hoare triple {344#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,033 INFO L290 TraceCheckUtils]: 5: Hoare triple {344#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {349#(= main_~y~0 0)} is VALID [2022-04-27 21:54:48,034 INFO L290 TraceCheckUtils]: 6: Hoare triple {349#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:48,034 INFO L290 TraceCheckUtils]: 7: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:48,035 INFO L290 TraceCheckUtils]: 8: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {351#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:48,035 INFO L290 TraceCheckUtils]: 9: Hoare triple {351#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,035 INFO L272 TraceCheckUtils]: 10: Hoare triple {345#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {345#false} is VALID [2022-04-27 21:54:48,035 INFO L290 TraceCheckUtils]: 11: Hoare triple {345#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {345#false} is VALID [2022-04-27 21:54:48,036 INFO L290 TraceCheckUtils]: 12: Hoare triple {345#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,036 INFO L290 TraceCheckUtils]: 13: Hoare triple {345#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,036 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:48,036 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:48,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524150876] [2022-04-27 21:54:48,036 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [524150876] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:48,036 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1836752958] [2022-04-27 21:54:48,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:48,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:48,037 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:48,067 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:48,073 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 21:54:48,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:48,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 21:54:48,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:48,118 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:48,312 INFO L272 TraceCheckUtils]: 0: Hoare triple {344#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {344#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-27 21:54:48,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,312 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,313 INFO L272 TraceCheckUtils]: 4: Hoare triple {344#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,313 INFO L290 TraceCheckUtils]: 5: Hoare triple {344#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {349#(= main_~y~0 0)} is VALID [2022-04-27 21:54:48,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {349#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:48,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:48,315 INFO L290 TraceCheckUtils]: 8: Hoare triple {350#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {380#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:48,315 INFO L290 TraceCheckUtils]: 9: Hoare triple {380#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,315 INFO L272 TraceCheckUtils]: 10: Hoare triple {345#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {345#false} is VALID [2022-04-27 21:54:48,316 INFO L290 TraceCheckUtils]: 11: Hoare triple {345#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {345#false} is VALID [2022-04-27 21:54:48,316 INFO L290 TraceCheckUtils]: 12: Hoare triple {345#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,316 INFO L290 TraceCheckUtils]: 13: Hoare triple {345#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:48,316 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:48,416 INFO L290 TraceCheckUtils]: 13: Hoare triple {345#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,417 INFO L290 TraceCheckUtils]: 12: Hoare triple {345#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,417 INFO L290 TraceCheckUtils]: 11: Hoare triple {345#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {345#false} is VALID [2022-04-27 21:54:48,417 INFO L272 TraceCheckUtils]: 10: Hoare triple {345#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {345#false} is VALID [2022-04-27 21:54:48,418 INFO L290 TraceCheckUtils]: 9: Hoare triple {408#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {345#false} is VALID [2022-04-27 21:54:48,418 INFO L290 TraceCheckUtils]: 8: Hoare triple {412#(< 0 (mod main_~y~0 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {408#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:54:48,418 INFO L290 TraceCheckUtils]: 7: Hoare triple {412#(< 0 (mod main_~y~0 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {412#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:54:48,419 INFO L290 TraceCheckUtils]: 6: Hoare triple {419#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {412#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:54:48,420 INFO L290 TraceCheckUtils]: 5: Hoare triple {344#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {419#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:54:48,420 INFO L272 TraceCheckUtils]: 4: Hoare triple {344#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,420 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {344#true} {344#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,420 INFO L290 TraceCheckUtils]: 2: Hoare triple {344#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,420 INFO L290 TraceCheckUtils]: 1: Hoare triple {344#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {344#true} is VALID [2022-04-27 21:54:48,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {344#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {344#true} is VALID [2022-04-27 21:54:48,421 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:48,421 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1836752958] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:48,421 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:48,421 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-27 21:54:48,421 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462795793] [2022-04-27 21:54:48,421 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:48,422 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:54:48,422 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:48,422 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,437 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 23 edges. 23 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:48,437 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 21:54:48,437 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:48,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 21:54:48,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-27 21:54:48,439 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. Second operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:48,723 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2022-04-27 21:54:48,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 21:54:48,723 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:54:48,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:48,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-27 21:54:48,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 44 transitions. [2022-04-27 21:54:48,728 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 44 transitions. [2022-04-27 21:54:48,769 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:48,770 INFO L225 Difference]: With dead ends: 35 [2022-04-27 21:54:48,770 INFO L226 Difference]: Without dead ends: 30 [2022-04-27 21:54:48,772 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=197, Unknown=0, NotChecked=0, Total=272 [2022-04-27 21:54:48,776 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 35 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:48,777 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 39 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:54:48,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-04-27 21:54:48,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 20. [2022-04-27 21:54:48,796 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:48,797 INFO L82 GeneralOperation]: Start isEquivalent. First operand 30 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,797 INFO L74 IsIncluded]: Start isIncluded. First operand 30 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,797 INFO L87 Difference]: Start difference. First operand 30 states. Second operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:48,802 INFO L93 Difference]: Finished difference Result 30 states and 37 transitions. [2022-04-27 21:54:48,802 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 37 transitions. [2022-04-27 21:54:48,802 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:48,802 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:48,803 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-27 21:54:48,803 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 30 states. [2022-04-27 21:54:48,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:48,806 INFO L93 Difference]: Finished difference Result 30 states and 37 transitions. [2022-04-27 21:54:48,806 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 37 transitions. [2022-04-27 21:54:48,807 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:48,807 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:48,807 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:48,807 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:48,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 15 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2022-04-27 21:54:48,809 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 24 transitions. Word has length 14 [2022-04-27 21:54:48,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:48,809 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 24 transitions. [2022-04-27 21:54:48,809 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 9 states have internal predecessors, (18), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:48,809 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 24 transitions. [2022-04-27 21:54:48,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 21:54:48,811 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:48,811 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:48,836 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 21:54:49,035 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:49,036 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:49,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:49,036 INFO L85 PathProgramCache]: Analyzing trace with hash 157235595, now seen corresponding path program 1 times [2022-04-27 21:54:49,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:49,036 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397032858] [2022-04-27 21:54:49,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:49,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:49,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:49,157 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:49,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:49,162 INFO L290 TraceCheckUtils]: 0: Hoare triple {615#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-27 21:54:49,162 INFO L290 TraceCheckUtils]: 1: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,162 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,163 INFO L272 TraceCheckUtils]: 0: Hoare triple {605#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:49,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {615#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-27 21:54:49,163 INFO L290 TraceCheckUtils]: 2: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,163 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,163 INFO L272 TraceCheckUtils]: 4: Hoare triple {605#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,164 INFO L290 TraceCheckUtils]: 5: Hoare triple {605#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:49,164 INFO L290 TraceCheckUtils]: 6: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:49,165 INFO L290 TraceCheckUtils]: 7: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:49,165 INFO L290 TraceCheckUtils]: 8: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:49,166 INFO L290 TraceCheckUtils]: 9: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:54:49,167 INFO L290 TraceCheckUtils]: 10: Hoare triple {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:54:49,168 INFO L272 TraceCheckUtils]: 11: Hoare triple {612#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {613#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:54:49,168 INFO L290 TraceCheckUtils]: 12: Hoare triple {613#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {614#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:54:49,168 INFO L290 TraceCheckUtils]: 13: Hoare triple {614#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-27 21:54:49,169 INFO L290 TraceCheckUtils]: 14: Hoare triple {606#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-27 21:54:49,169 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:49,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:49,169 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397032858] [2022-04-27 21:54:49,169 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [397032858] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:49,169 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [598979584] [2022-04-27 21:54:49,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:49,169 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:49,169 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:49,170 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:49,186 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 21:54:49,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:49,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 9 conjunts are in the unsatisfiable core [2022-04-27 21:54:49,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:49,218 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:49,297 INFO L272 TraceCheckUtils]: 0: Hoare triple {605#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,298 INFO L290 TraceCheckUtils]: 1: Hoare triple {605#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-27 21:54:49,298 INFO L290 TraceCheckUtils]: 2: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,298 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,298 INFO L272 TraceCheckUtils]: 4: Hoare triple {605#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,298 INFO L290 TraceCheckUtils]: 5: Hoare triple {605#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:49,299 INFO L290 TraceCheckUtils]: 6: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:49,299 INFO L290 TraceCheckUtils]: 7: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:49,300 INFO L290 TraceCheckUtils]: 8: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:49,300 INFO L290 TraceCheckUtils]: 9: Hoare triple {611#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:49,301 INFO L290 TraceCheckUtils]: 10: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:49,302 INFO L272 TraceCheckUtils]: 11: Hoare triple {610#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {652#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:54:49,302 INFO L290 TraceCheckUtils]: 12: Hoare triple {652#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {656#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:54:49,302 INFO L290 TraceCheckUtils]: 13: Hoare triple {656#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-27 21:54:49,303 INFO L290 TraceCheckUtils]: 14: Hoare triple {606#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-27 21:54:49,303 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:49,303 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:49,391 INFO L290 TraceCheckUtils]: 14: Hoare triple {606#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-27 21:54:49,391 INFO L290 TraceCheckUtils]: 13: Hoare triple {656#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {606#false} is VALID [2022-04-27 21:54:49,392 INFO L290 TraceCheckUtils]: 12: Hoare triple {652#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {656#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:54:49,392 INFO L272 TraceCheckUtils]: 11: Hoare triple {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {652#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:54:49,393 INFO L290 TraceCheckUtils]: 10: Hoare triple {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:49,394 INFO L290 TraceCheckUtils]: 9: Hoare triple {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:49,394 INFO L290 TraceCheckUtils]: 8: Hoare triple {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:49,394 INFO L290 TraceCheckUtils]: 7: Hoare triple {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:49,395 INFO L290 TraceCheckUtils]: 6: Hoare triple {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {679#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:49,396 INFO L290 TraceCheckUtils]: 5: Hoare triple {605#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {672#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:49,396 INFO L272 TraceCheckUtils]: 4: Hoare triple {605#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,396 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {605#true} {605#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,396 INFO L290 TraceCheckUtils]: 2: Hoare triple {605#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,396 INFO L290 TraceCheckUtils]: 1: Hoare triple {605#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {605#true} is VALID [2022-04-27 21:54:49,396 INFO L272 TraceCheckUtils]: 0: Hoare triple {605#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {605#true} is VALID [2022-04-27 21:54:49,396 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:49,396 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [598979584] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:49,397 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:49,397 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 12 [2022-04-27 21:54:49,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062213452] [2022-04-27 21:54:49,397 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:49,397 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:54:49,397 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:49,397 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,419 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:49,419 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 21:54:49,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:49,420 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 21:54:49,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2022-04-27 21:54:49,420 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. Second operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:49,631 INFO L93 Difference]: Finished difference Result 28 states and 32 transitions. [2022-04-27 21:54:49,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 21:54:49,631 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:54:49,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:49,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 26 transitions. [2022-04-27 21:54:49,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 26 transitions. [2022-04-27 21:54:49,633 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 26 transitions. [2022-04-27 21:54:49,653 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:49,653 INFO L225 Difference]: With dead ends: 28 [2022-04-27 21:54:49,653 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 21:54:49,654 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 24 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-27 21:54:49,654 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 48 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:49,654 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 48 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:54:49,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 21:54:49,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-04-27 21:54:49,671 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:49,671 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,672 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,672 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:49,672 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2022-04-27 21:54:49,673 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-27 21:54:49,673 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:49,673 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:49,673 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 21:54:49,673 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 21:54:49,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:49,674 INFO L93 Difference]: Finished difference Result 23 states and 27 transitions. [2022-04-27 21:54:49,674 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2022-04-27 21:54:49,674 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:49,674 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:49,674 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:49,674 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:49,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.2941176470588236) internal successors, (22), 17 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 26 transitions. [2022-04-27 21:54:49,675 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 26 transitions. Word has length 15 [2022-04-27 21:54:49,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:49,675 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 26 transitions. [2022-04-27 21:54:49,675 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:49,675 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 26 transitions. [2022-04-27 21:54:49,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 21:54:49,676 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:49,676 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:49,692 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-27 21:54:49,886 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:49,886 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:49,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:49,887 INFO L85 PathProgramCache]: Analyzing trace with hash 606056764, now seen corresponding path program 2 times [2022-04-27 21:54:49,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:49,887 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993291833] [2022-04-27 21:54:49,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:49,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:49,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:50,001 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:50,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:50,020 INFO L290 TraceCheckUtils]: 0: Hoare triple {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-27 21:54:50,020 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,020 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,021 INFO L272 TraceCheckUtils]: 0: Hoare triple {844#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:50,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {853#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-27 21:54:50,021 INFO L290 TraceCheckUtils]: 2: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,021 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,021 INFO L272 TraceCheckUtils]: 4: Hoare triple {844#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,022 INFO L290 TraceCheckUtils]: 5: Hoare triple {844#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {849#(= main_~y~0 0)} is VALID [2022-04-27 21:54:50,022 INFO L290 TraceCheckUtils]: 6: Hoare triple {849#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:50,022 INFO L290 TraceCheckUtils]: 7: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:50,023 INFO L290 TraceCheckUtils]: 8: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:50,023 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:54:50,024 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {845#false} is VALID [2022-04-27 21:54:50,024 INFO L290 TraceCheckUtils]: 11: Hoare triple {845#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,024 INFO L272 TraceCheckUtils]: 12: Hoare triple {845#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {845#false} is VALID [2022-04-27 21:54:50,024 INFO L290 TraceCheckUtils]: 13: Hoare triple {845#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {845#false} is VALID [2022-04-27 21:54:50,024 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,025 INFO L290 TraceCheckUtils]: 15: Hoare triple {845#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,025 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:50,025 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:50,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [993291833] [2022-04-27 21:54:50,025 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [993291833] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:50,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1156534898] [2022-04-27 21:54:50,025 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:54:50,025 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:50,025 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:50,027 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:50,033 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 21:54:50,061 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:54:50,062 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:54:50,062 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 11 conjunts are in the unsatisfiable core [2022-04-27 21:54:50,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:50,069 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:50,232 INFO L272 TraceCheckUtils]: 0: Hoare triple {844#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-27 21:54:50,233 INFO L290 TraceCheckUtils]: 2: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,233 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,233 INFO L272 TraceCheckUtils]: 4: Hoare triple {844#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,233 INFO L290 TraceCheckUtils]: 5: Hoare triple {844#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {849#(= main_~y~0 0)} is VALID [2022-04-27 21:54:50,234 INFO L290 TraceCheckUtils]: 6: Hoare triple {849#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:50,234 INFO L290 TraceCheckUtils]: 7: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:50,235 INFO L290 TraceCheckUtils]: 8: Hoare triple {850#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:50,235 INFO L290 TraceCheckUtils]: 9: Hoare triple {851#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:54:50,236 INFO L290 TraceCheckUtils]: 10: Hoare triple {852#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {887#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:54:50,236 INFO L290 TraceCheckUtils]: 11: Hoare triple {887#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,236 INFO L272 TraceCheckUtils]: 12: Hoare triple {845#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {845#false} is VALID [2022-04-27 21:54:50,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {845#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {845#false} is VALID [2022-04-27 21:54:50,237 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,237 INFO L290 TraceCheckUtils]: 15: Hoare triple {845#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,237 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:50,237 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:50,322 INFO L290 TraceCheckUtils]: 15: Hoare triple {845#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,322 INFO L290 TraceCheckUtils]: 14: Hoare triple {845#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,322 INFO L290 TraceCheckUtils]: 13: Hoare triple {845#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {845#false} is VALID [2022-04-27 21:54:50,322 INFO L272 TraceCheckUtils]: 12: Hoare triple {845#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {845#false} is VALID [2022-04-27 21:54:50,323 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {845#false} is VALID [2022-04-27 21:54:50,324 INFO L290 TraceCheckUtils]: 10: Hoare triple {919#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:54:50,324 INFO L290 TraceCheckUtils]: 9: Hoare triple {923#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {919#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:50,325 INFO L290 TraceCheckUtils]: 8: Hoare triple {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {923#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:50,325 INFO L290 TraceCheckUtils]: 7: Hoare triple {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:50,326 INFO L290 TraceCheckUtils]: 6: Hoare triple {934#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {927#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:50,326 INFO L290 TraceCheckUtils]: 5: Hoare triple {844#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {934#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:50,326 INFO L272 TraceCheckUtils]: 4: Hoare triple {844#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,326 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {844#true} {844#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,326 INFO L290 TraceCheckUtils]: 2: Hoare triple {844#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,327 INFO L290 TraceCheckUtils]: 1: Hoare triple {844#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {844#true} is VALID [2022-04-27 21:54:50,327 INFO L272 TraceCheckUtils]: 0: Hoare triple {844#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {844#true} is VALID [2022-04-27 21:54:50,327 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:50,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1156534898] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:50,327 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:50,327 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-04-27 21:54:50,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2080291250] [2022-04-27 21:54:50,327 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:50,328 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 21:54:50,328 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:50,328 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,346 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:50,346 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 21:54:50,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:50,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 21:54:50,346 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2022-04-27 21:54:50,346 INFO L87 Difference]: Start difference. First operand 22 states and 26 transitions. Second operand has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:50,832 INFO L93 Difference]: Finished difference Result 38 states and 47 transitions. [2022-04-27 21:54:50,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-04-27 21:54:50,832 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 21:54:50,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:50,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 47 transitions. [2022-04-27 21:54:50,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 47 transitions. [2022-04-27 21:54:50,835 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 17 states and 47 transitions. [2022-04-27 21:54:50,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 47 edges. 47 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:50,875 INFO L225 Difference]: With dead ends: 38 [2022-04-27 21:54:50,875 INFO L226 Difference]: Without dead ends: 29 [2022-04-27 21:54:50,876 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=135, Invalid=567, Unknown=0, NotChecked=0, Total=702 [2022-04-27 21:54:50,876 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 28 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:50,877 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 46 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:54:50,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-27 21:54:50,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 24. [2022-04-27 21:54:50,906 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:50,906 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,906 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,907 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:50,908 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-27 21:54:50,908 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 35 transitions. [2022-04-27 21:54:50,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:50,908 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:50,908 INFO L74 IsIncluded]: Start isIncluded. First operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-27 21:54:50,908 INFO L87 Difference]: Start difference. First operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-27 21:54:50,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:50,909 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-27 21:54:50,909 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 35 transitions. [2022-04-27 21:54:50,909 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:50,909 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:50,910 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:50,926 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:50,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.263157894736842) internal successors, (24), 19 states have internal predecessors, (24), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 28 transitions. [2022-04-27 21:54:50,927 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 28 transitions. Word has length 16 [2022-04-27 21:54:50,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:50,929 INFO L495 AbstractCegarLoop]: Abstraction has 24 states and 28 transitions. [2022-04-27 21:54:50,930 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.6923076923076923) internal successors, (22), 12 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:50,930 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 28 transitions. [2022-04-27 21:54:50,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 21:54:50,930 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:50,930 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:50,954 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 21:54:51,146 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:51,147 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:51,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:51,147 INFO L85 PathProgramCache]: Analyzing trace with hash -175424469, now seen corresponding path program 3 times [2022-04-27 21:54:51,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:51,147 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491149299] [2022-04-27 21:54:51,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:51,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:51,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:51,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:51,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:51,333 INFO L290 TraceCheckUtils]: 0: Hoare triple {1156#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-27 21:54:51,333 INFO L290 TraceCheckUtils]: 1: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,333 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,334 INFO L272 TraceCheckUtils]: 0: Hoare triple {1145#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1156#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:51,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {1156#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-27 21:54:51,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,334 INFO L272 TraceCheckUtils]: 4: Hoare triple {1145#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,337 INFO L290 TraceCheckUtils]: 5: Hoare triple {1145#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:51,338 INFO L290 TraceCheckUtils]: 6: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:51,338 INFO L290 TraceCheckUtils]: 7: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:51,339 INFO L290 TraceCheckUtils]: 8: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:51,340 INFO L290 TraceCheckUtils]: 9: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:51,340 INFO L290 TraceCheckUtils]: 10: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:51,341 INFO L290 TraceCheckUtils]: 11: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:54:51,342 INFO L290 TraceCheckUtils]: 12: Hoare triple {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:54:51,343 INFO L272 TraceCheckUtils]: 13: Hoare triple {1153#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1154#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:54:51,343 INFO L290 TraceCheckUtils]: 14: Hoare triple {1154#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1155#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:54:51,343 INFO L290 TraceCheckUtils]: 15: Hoare triple {1155#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-27 21:54:51,343 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-27 21:54:51,343 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:51,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:51,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491149299] [2022-04-27 21:54:51,344 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [491149299] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:51,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1677314919] [2022-04-27 21:54:51,344 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:54:51,344 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:51,344 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:51,352 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:51,353 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 21:54:51,382 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 21:54:51,382 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:54:51,383 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 21:54:51,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:51,388 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:51,485 INFO L272 TraceCheckUtils]: 0: Hoare triple {1145#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,486 INFO L290 TraceCheckUtils]: 1: Hoare triple {1145#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-27 21:54:51,486 INFO L290 TraceCheckUtils]: 2: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,486 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,486 INFO L272 TraceCheckUtils]: 4: Hoare triple {1145#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,486 INFO L290 TraceCheckUtils]: 5: Hoare triple {1145#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:51,487 INFO L290 TraceCheckUtils]: 6: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:51,488 INFO L290 TraceCheckUtils]: 7: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:51,488 INFO L290 TraceCheckUtils]: 8: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:51,488 INFO L290 TraceCheckUtils]: 9: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:51,489 INFO L290 TraceCheckUtils]: 10: Hoare triple {1152#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:51,489 INFO L290 TraceCheckUtils]: 11: Hoare triple {1151#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:51,490 INFO L290 TraceCheckUtils]: 12: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:51,490 INFO L272 TraceCheckUtils]: 13: Hoare triple {1150#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:54:51,491 INFO L290 TraceCheckUtils]: 14: Hoare triple {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1203#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:54:51,491 INFO L290 TraceCheckUtils]: 15: Hoare triple {1203#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-27 21:54:51,491 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-27 21:54:51,491 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:51,491 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:51,605 INFO L290 TraceCheckUtils]: 16: Hoare triple {1146#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-27 21:54:51,605 INFO L290 TraceCheckUtils]: 15: Hoare triple {1203#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1146#false} is VALID [2022-04-27 21:54:51,606 INFO L290 TraceCheckUtils]: 14: Hoare triple {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1203#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:54:51,607 INFO L272 TraceCheckUtils]: 13: Hoare triple {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1199#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:54:51,607 INFO L290 TraceCheckUtils]: 12: Hoare triple {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:51,608 INFO L290 TraceCheckUtils]: 11: Hoare triple {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:51,609 INFO L290 TraceCheckUtils]: 10: Hoare triple {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:51,609 INFO L290 TraceCheckUtils]: 9: Hoare triple {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:54:51,609 INFO L290 TraceCheckUtils]: 8: Hoare triple {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:54:51,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1230#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:54:51,611 INFO L290 TraceCheckUtils]: 6: Hoare triple {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1226#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:51,611 INFO L290 TraceCheckUtils]: 5: Hoare triple {1145#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1219#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:51,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {1145#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1145#true} {1145#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {1145#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {1145#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1145#true} is VALID [2022-04-27 21:54:51,612 INFO L272 TraceCheckUtils]: 0: Hoare triple {1145#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1145#true} is VALID [2022-04-27 21:54:51,612 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:51,612 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1677314919] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:51,612 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:51,612 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 7] total 14 [2022-04-27 21:54:51,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196468797] [2022-04-27 21:54:51,613 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:51,613 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:54:51,614 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:51,615 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:51,637 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:51,637 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 21:54:51,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:51,637 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 21:54:51,638 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2022-04-27 21:54:51,639 INFO L87 Difference]: Start difference. First operand 24 states and 28 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:51,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:51,986 INFO L93 Difference]: Finished difference Result 31 states and 35 transitions. [2022-04-27 21:54:51,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 21:54:51,987 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:54:51,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:51,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:51,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 28 transitions. [2022-04-27 21:54:51,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:51,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 28 transitions. [2022-04-27 21:54:51,991 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 28 transitions. [2022-04-27 21:54:52,008 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:52,008 INFO L225 Difference]: With dead ends: 31 [2022-04-27 21:54:52,008 INFO L226 Difference]: Without dead ends: 26 [2022-04-27 21:54:52,009 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=281, Unknown=0, NotChecked=0, Total=342 [2022-04-27 21:54:52,010 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:52,010 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 58 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:54:52,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-27 21:54:52,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2022-04-27 21:54:52,044 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:52,044 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:52,044 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:52,044 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:52,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:52,045 INFO L93 Difference]: Finished difference Result 26 states and 30 transitions. [2022-04-27 21:54:52,045 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 30 transitions. [2022-04-27 21:54:52,046 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:52,046 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:52,046 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-27 21:54:52,046 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-27 21:54:52,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:52,047 INFO L93 Difference]: Finished difference Result 26 states and 30 transitions. [2022-04-27 21:54:52,047 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 30 transitions. [2022-04-27 21:54:52,047 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:52,047 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:52,047 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:52,047 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:52,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.25) internal successors, (25), 20 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:52,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 29 transitions. [2022-04-27 21:54:52,048 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 29 transitions. Word has length 17 [2022-04-27 21:54:52,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:52,048 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 29 transitions. [2022-04-27 21:54:52,048 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:52,048 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 29 transitions. [2022-04-27 21:54:52,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 21:54:52,048 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:52,049 INFO L195 NwaCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:52,073 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 21:54:52,264 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:52,265 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:52,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:52,265 INFO L85 PathProgramCache]: Analyzing trace with hash 458923947, now seen corresponding path program 4 times [2022-04-27 21:54:52,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:52,265 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [680223589] [2022-04-27 21:54:52,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:52,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:52,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:52,359 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:52,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:52,363 INFO L290 TraceCheckUtils]: 0: Hoare triple {1429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-27 21:54:52,363 INFO L290 TraceCheckUtils]: 1: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,364 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,364 INFO L272 TraceCheckUtils]: 0: Hoare triple {1418#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:52,364 INFO L290 TraceCheckUtils]: 1: Hoare triple {1429#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-27 21:54:52,364 INFO L290 TraceCheckUtils]: 2: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,364 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,364 INFO L272 TraceCheckUtils]: 4: Hoare triple {1418#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,365 INFO L290 TraceCheckUtils]: 5: Hoare triple {1418#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1423#(= main_~y~0 0)} is VALID [2022-04-27 21:54:52,365 INFO L290 TraceCheckUtils]: 6: Hoare triple {1423#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:52,366 INFO L290 TraceCheckUtils]: 7: Hoare triple {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:52,366 INFO L290 TraceCheckUtils]: 8: Hoare triple {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:52,367 INFO L290 TraceCheckUtils]: 9: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:52,367 INFO L290 TraceCheckUtils]: 10: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:54:52,367 INFO L290 TraceCheckUtils]: 11: Hoare triple {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1428#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 21:54:52,368 INFO L290 TraceCheckUtils]: 12: Hoare triple {1428#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,368 INFO L272 TraceCheckUtils]: 13: Hoare triple {1419#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1419#false} is VALID [2022-04-27 21:54:52,368 INFO L290 TraceCheckUtils]: 14: Hoare triple {1419#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1419#false} is VALID [2022-04-27 21:54:52,368 INFO L290 TraceCheckUtils]: 15: Hoare triple {1419#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,368 INFO L290 TraceCheckUtils]: 16: Hoare triple {1419#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,368 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:52,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:52,369 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [680223589] [2022-04-27 21:54:52,369 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [680223589] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:52,369 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [91156748] [2022-04-27 21:54:52,369 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:54:52,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:52,369 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:52,392 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:52,410 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 21:54:52,436 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:54:52,436 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:54:52,437 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 21:54:52,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:52,447 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:52,615 INFO L272 TraceCheckUtils]: 0: Hoare triple {1418#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {1418#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-27 21:54:52,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,616 INFO L272 TraceCheckUtils]: 4: Hoare triple {1418#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,616 INFO L290 TraceCheckUtils]: 5: Hoare triple {1418#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1423#(= main_~y~0 0)} is VALID [2022-04-27 21:54:52,617 INFO L290 TraceCheckUtils]: 6: Hoare triple {1423#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:52,617 INFO L290 TraceCheckUtils]: 7: Hoare triple {1424#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:52,618 INFO L290 TraceCheckUtils]: 8: Hoare triple {1425#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:52,618 INFO L290 TraceCheckUtils]: 9: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:52,619 INFO L290 TraceCheckUtils]: 10: Hoare triple {1426#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:54:52,619 INFO L290 TraceCheckUtils]: 11: Hoare triple {1427#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1466#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:54:52,620 INFO L290 TraceCheckUtils]: 12: Hoare triple {1466#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,620 INFO L272 TraceCheckUtils]: 13: Hoare triple {1419#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1419#false} is VALID [2022-04-27 21:54:52,620 INFO L290 TraceCheckUtils]: 14: Hoare triple {1419#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1419#false} is VALID [2022-04-27 21:54:52,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {1419#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,620 INFO L290 TraceCheckUtils]: 16: Hoare triple {1419#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,620 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:52,620 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:52,729 INFO L290 TraceCheckUtils]: 16: Hoare triple {1419#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,730 INFO L290 TraceCheckUtils]: 15: Hoare triple {1419#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,730 INFO L290 TraceCheckUtils]: 14: Hoare triple {1419#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1419#false} is VALID [2022-04-27 21:54:52,730 INFO L272 TraceCheckUtils]: 13: Hoare triple {1419#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1419#false} is VALID [2022-04-27 21:54:52,730 INFO L290 TraceCheckUtils]: 12: Hoare triple {1494#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1419#false} is VALID [2022-04-27 21:54:52,731 INFO L290 TraceCheckUtils]: 11: Hoare triple {1498#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1494#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:54:52,731 INFO L290 TraceCheckUtils]: 10: Hoare triple {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1498#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:52,732 INFO L290 TraceCheckUtils]: 9: Hoare triple {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:52,733 INFO L290 TraceCheckUtils]: 8: Hoare triple {1509#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1502#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:52,733 INFO L290 TraceCheckUtils]: 7: Hoare triple {1513#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1509#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:54:52,734 INFO L290 TraceCheckUtils]: 6: Hoare triple {1517#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1513#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:54:52,734 INFO L290 TraceCheckUtils]: 5: Hoare triple {1418#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1517#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:54:52,734 INFO L272 TraceCheckUtils]: 4: Hoare triple {1418#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,735 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1418#true} {1418#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,735 INFO L290 TraceCheckUtils]: 2: Hoare triple {1418#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,735 INFO L290 TraceCheckUtils]: 1: Hoare triple {1418#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1418#true} is VALID [2022-04-27 21:54:52,735 INFO L272 TraceCheckUtils]: 0: Hoare triple {1418#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1418#true} is VALID [2022-04-27 21:54:52,735 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:52,735 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [91156748] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:52,735 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:52,735 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-27 21:54:52,735 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916443678] [2022-04-27 21:54:52,735 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:52,736 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:54:52,736 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:52,736 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:52,757 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:52,757 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 21:54:52,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:52,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 21:54:52,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2022-04-27 21:54:52,758 INFO L87 Difference]: Start difference. First operand 25 states and 29 transitions. Second operand has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:53,794 INFO L93 Difference]: Finished difference Result 59 states and 80 transitions. [2022-04-27 21:54:53,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2022-04-27 21:54:53,795 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:54:53,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:53,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 79 transitions. [2022-04-27 21:54:53,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 79 transitions. [2022-04-27 21:54:53,798 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 30 states and 79 transitions. [2022-04-27 21:54:53,868 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 79 edges. 79 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:53,868 INFO L225 Difference]: With dead ends: 59 [2022-04-27 21:54:53,868 INFO L226 Difference]: Without dead ends: 54 [2022-04-27 21:54:53,869 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 397 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=434, Invalid=1372, Unknown=0, NotChecked=0, Total=1806 [2022-04-27 21:54:53,869 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 93 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 84 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 93 SdHoareTripleChecker+Valid, 47 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:53,870 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [93 Valid, 47 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:54:53,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-04-27 21:54:53,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 29. [2022-04-27 21:54:53,920 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:53,920 INFO L82 GeneralOperation]: Start isEquivalent. First operand 54 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,920 INFO L74 IsIncluded]: Start isIncluded. First operand 54 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,920 INFO L87 Difference]: Start difference. First operand 54 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:53,921 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2022-04-27 21:54:53,921 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 68 transitions. [2022-04-27 21:54:53,921 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:53,922 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:53,922 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 54 states. [2022-04-27 21:54:53,922 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 54 states. [2022-04-27 21:54:53,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:53,923 INFO L93 Difference]: Finished difference Result 54 states and 68 transitions. [2022-04-27 21:54:53,923 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 68 transitions. [2022-04-27 21:54:53,923 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:53,923 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:53,923 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:53,923 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:53,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2022-04-27 21:54:53,924 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 37 transitions. Word has length 17 [2022-04-27 21:54:53,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:53,924 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 37 transitions. [2022-04-27 21:54:53,924 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.5) internal successors, (24), 15 states have internal predecessors, (24), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:53,924 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-27 21:54:53,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 21:54:53,925 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:53,925 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:53,945 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-27 21:54:54,141 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:54,141 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:54,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:54,142 INFO L85 PathProgramCache]: Analyzing trace with hash -1116470628, now seen corresponding path program 5 times [2022-04-27 21:54:54,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:54,142 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644820472] [2022-04-27 21:54:54,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:54,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:54,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:54,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:54,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:54,242 INFO L290 TraceCheckUtils]: 0: Hoare triple {1863#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-27 21:54:54,242 INFO L290 TraceCheckUtils]: 1: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,242 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,243 INFO L272 TraceCheckUtils]: 0: Hoare triple {1852#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1863#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:54,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {1863#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-27 21:54:54,243 INFO L290 TraceCheckUtils]: 2: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,243 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,243 INFO L272 TraceCheckUtils]: 4: Hoare triple {1852#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,243 INFO L290 TraceCheckUtils]: 5: Hoare triple {1852#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1857#(= main_~y~0 0)} is VALID [2022-04-27 21:54:54,244 INFO L290 TraceCheckUtils]: 6: Hoare triple {1857#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:54,244 INFO L290 TraceCheckUtils]: 7: Hoare triple {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:54,245 INFO L290 TraceCheckUtils]: 8: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:54,245 INFO L290 TraceCheckUtils]: 9: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:54:54,246 INFO L290 TraceCheckUtils]: 10: Hoare triple {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:54,246 INFO L290 TraceCheckUtils]: 11: Hoare triple {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:54:54,247 INFO L290 TraceCheckUtils]: 12: Hoare triple {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1853#false} is VALID [2022-04-27 21:54:54,247 INFO L290 TraceCheckUtils]: 13: Hoare triple {1853#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,247 INFO L272 TraceCheckUtils]: 14: Hoare triple {1853#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1853#false} is VALID [2022-04-27 21:54:54,247 INFO L290 TraceCheckUtils]: 15: Hoare triple {1853#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1853#false} is VALID [2022-04-27 21:54:54,247 INFO L290 TraceCheckUtils]: 16: Hoare triple {1853#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,247 INFO L290 TraceCheckUtils]: 17: Hoare triple {1853#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,247 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:54,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:54,248 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644820472] [2022-04-27 21:54:54,248 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644820472] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:54,248 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1137772201] [2022-04-27 21:54:54,248 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:54:54,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:54,248 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:54,264 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:54,279 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 21:54:54,310 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-27 21:54:54,311 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:54:54,311 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-27 21:54:54,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:54,316 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:54,487 INFO L272 TraceCheckUtils]: 0: Hoare triple {1852#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {1852#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-27 21:54:54,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,488 INFO L272 TraceCheckUtils]: 4: Hoare triple {1852#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,488 INFO L290 TraceCheckUtils]: 5: Hoare triple {1852#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1857#(= main_~y~0 0)} is VALID [2022-04-27 21:54:54,489 INFO L290 TraceCheckUtils]: 6: Hoare triple {1857#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:54,489 INFO L290 TraceCheckUtils]: 7: Hoare triple {1858#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:54,490 INFO L290 TraceCheckUtils]: 8: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:54,490 INFO L290 TraceCheckUtils]: 9: Hoare triple {1859#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:54:54,491 INFO L290 TraceCheckUtils]: 10: Hoare triple {1860#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:54,491 INFO L290 TraceCheckUtils]: 11: Hoare triple {1861#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:54:54,492 INFO L290 TraceCheckUtils]: 12: Hoare triple {1862#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1903#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:54:54,492 INFO L290 TraceCheckUtils]: 13: Hoare triple {1903#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,492 INFO L272 TraceCheckUtils]: 14: Hoare triple {1853#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1853#false} is VALID [2022-04-27 21:54:54,492 INFO L290 TraceCheckUtils]: 15: Hoare triple {1853#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1853#false} is VALID [2022-04-27 21:54:54,493 INFO L290 TraceCheckUtils]: 16: Hoare triple {1853#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,493 INFO L290 TraceCheckUtils]: 17: Hoare triple {1853#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,493 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:54,493 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:54,618 INFO L290 TraceCheckUtils]: 17: Hoare triple {1853#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,619 INFO L290 TraceCheckUtils]: 16: Hoare triple {1853#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,619 INFO L290 TraceCheckUtils]: 15: Hoare triple {1853#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1853#false} is VALID [2022-04-27 21:54:54,619 INFO L272 TraceCheckUtils]: 14: Hoare triple {1853#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1853#false} is VALID [2022-04-27 21:54:54,619 INFO L290 TraceCheckUtils]: 13: Hoare triple {1931#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {1853#false} is VALID [2022-04-27 21:54:54,620 INFO L290 TraceCheckUtils]: 12: Hoare triple {1935#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1931#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:54:54,621 INFO L290 TraceCheckUtils]: 11: Hoare triple {1939#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1935#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:54,622 INFO L290 TraceCheckUtils]: 10: Hoare triple {1943#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1939#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:54,622 INFO L290 TraceCheckUtils]: 9: Hoare triple {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1943#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 21:54:54,622 INFO L290 TraceCheckUtils]: 8: Hoare triple {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:54:54,623 INFO L290 TraceCheckUtils]: 7: Hoare triple {1954#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1947#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:54:54,624 INFO L290 TraceCheckUtils]: 6: Hoare triple {1958#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1954#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:54,624 INFO L290 TraceCheckUtils]: 5: Hoare triple {1852#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1958#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:54,624 INFO L272 TraceCheckUtils]: 4: Hoare triple {1852#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,624 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1852#true} {1852#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,624 INFO L290 TraceCheckUtils]: 2: Hoare triple {1852#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {1852#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1852#true} is VALID [2022-04-27 21:54:54,625 INFO L272 TraceCheckUtils]: 0: Hoare triple {1852#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1852#true} is VALID [2022-04-27 21:54:54,625 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:54,625 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1137772201] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:54,625 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:54,625 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2022-04-27 21:54:54,625 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175548551] [2022-04-27 21:54:54,625 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:54,626 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 21:54:54,626 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:54,626 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:54,646 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:54,646 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-27 21:54:54,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:54,646 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-27 21:54:54,646 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2022-04-27 21:54:54,646 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. Second operand has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:55,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:55,889 INFO L93 Difference]: Finished difference Result 57 states and 72 transitions. [2022-04-27 21:54:55,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 21:54:55,890 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 21:54:55,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:55,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:55,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 62 transitions. [2022-04-27 21:54:55,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:55,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 62 transitions. [2022-04-27 21:54:55,892 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 62 transitions. [2022-04-27 21:54:55,949 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:55,950 INFO L225 Difference]: With dead ends: 57 [2022-04-27 21:54:55,950 INFO L226 Difference]: Without dead ends: 47 [2022-04-27 21:54:55,950 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 272 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=275, Invalid=1365, Unknown=0, NotChecked=0, Total=1640 [2022-04-27 21:54:55,951 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 42 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 259 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 42 SdHoareTripleChecker+Valid, 79 SdHoareTripleChecker+Invalid, 318 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 259 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:55,951 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [42 Valid, 79 Invalid, 318 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 259 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 21:54:55,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-04-27 21:54:56,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 34. [2022-04-27 21:54:56,031 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:56,031 INFO L82 GeneralOperation]: Start isEquivalent. First operand 47 states. Second operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:56,031 INFO L74 IsIncluded]: Start isIncluded. First operand 47 states. Second operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:56,031 INFO L87 Difference]: Start difference. First operand 47 states. Second operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:56,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:56,033 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2022-04-27 21:54:56,033 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 58 transitions. [2022-04-27 21:54:56,033 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:56,033 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:56,033 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-27 21:54:56,033 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 47 states. [2022-04-27 21:54:56,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:56,034 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2022-04-27 21:54:56,034 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 58 transitions. [2022-04-27 21:54:56,034 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:56,034 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:56,034 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:56,034 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:56,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 29 states have internal predecessors, (37), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:56,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 41 transitions. [2022-04-27 21:54:56,035 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 41 transitions. Word has length 18 [2022-04-27 21:54:56,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:56,035 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 41 transitions. [2022-04-27 21:54:56,035 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 1.5294117647058822) internal successors, (26), 16 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:56,036 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 41 transitions. [2022-04-27 21:54:56,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 21:54:56,036 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:56,036 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:56,052 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 21:54:56,247 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:56,247 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:56,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:56,248 INFO L85 PathProgramCache]: Analyzing trace with hash -500658741, now seen corresponding path program 6 times [2022-04-27 21:54:56,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:56,248 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680427431] [2022-04-27 21:54:56,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:56,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:56,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:56,382 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:56,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:56,386 INFO L290 TraceCheckUtils]: 0: Hoare triple {2289#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-27 21:54:56,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,386 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,387 INFO L272 TraceCheckUtils]: 0: Hoare triple {2277#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2289#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:56,387 INFO L290 TraceCheckUtils]: 1: Hoare triple {2289#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-27 21:54:56,387 INFO L290 TraceCheckUtils]: 2: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,387 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,387 INFO L272 TraceCheckUtils]: 4: Hoare triple {2277#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,387 INFO L290 TraceCheckUtils]: 5: Hoare triple {2277#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:56,388 INFO L290 TraceCheckUtils]: 6: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:56,389 INFO L290 TraceCheckUtils]: 7: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:56,389 INFO L290 TraceCheckUtils]: 8: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:54:56,390 INFO L290 TraceCheckUtils]: 9: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:54:56,390 INFO L290 TraceCheckUtils]: 10: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:54:56,391 INFO L290 TraceCheckUtils]: 11: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:56,391 INFO L290 TraceCheckUtils]: 12: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:56,392 INFO L290 TraceCheckUtils]: 13: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:54:56,392 INFO L290 TraceCheckUtils]: 14: Hoare triple {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:54:56,393 INFO L272 TraceCheckUtils]: 15: Hoare triple {2286#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2287#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:54:56,394 INFO L290 TraceCheckUtils]: 16: Hoare triple {2287#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2288#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:54:56,394 INFO L290 TraceCheckUtils]: 17: Hoare triple {2288#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-27 21:54:56,394 INFO L290 TraceCheckUtils]: 18: Hoare triple {2278#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-27 21:54:56,394 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:56,394 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:56,394 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680427431] [2022-04-27 21:54:56,395 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1680427431] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:56,395 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [894213606] [2022-04-27 21:54:56,395 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:54:56,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:56,395 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:56,396 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:56,397 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 21:54:56,428 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-27 21:54:56,428 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:54:56,429 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-27 21:54:56,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:56,434 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:56,593 INFO L272 TraceCheckUtils]: 0: Hoare triple {2277#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {2277#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-27 21:54:56,594 INFO L290 TraceCheckUtils]: 2: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,594 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,594 INFO L272 TraceCheckUtils]: 4: Hoare triple {2277#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,597 INFO L290 TraceCheckUtils]: 5: Hoare triple {2277#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:56,597 INFO L290 TraceCheckUtils]: 6: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:56,599 INFO L290 TraceCheckUtils]: 7: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:56,600 INFO L290 TraceCheckUtils]: 8: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:54:56,600 INFO L290 TraceCheckUtils]: 9: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:54:56,601 INFO L290 TraceCheckUtils]: 10: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:54:56,601 INFO L290 TraceCheckUtils]: 11: Hoare triple {2285#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:54:56,602 INFO L290 TraceCheckUtils]: 12: Hoare triple {2284#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:54:56,602 INFO L290 TraceCheckUtils]: 13: Hoare triple {2283#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:56,603 INFO L290 TraceCheckUtils]: 14: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:54:56,603 INFO L272 TraceCheckUtils]: 15: Hoare triple {2282#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:54:56,604 INFO L290 TraceCheckUtils]: 16: Hoare triple {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2342#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:54:56,604 INFO L290 TraceCheckUtils]: 17: Hoare triple {2342#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-27 21:54:56,604 INFO L290 TraceCheckUtils]: 18: Hoare triple {2278#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-27 21:54:56,604 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:56,604 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:56,766 INFO L290 TraceCheckUtils]: 18: Hoare triple {2278#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-27 21:54:56,767 INFO L290 TraceCheckUtils]: 17: Hoare triple {2342#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2278#false} is VALID [2022-04-27 21:54:56,767 INFO L290 TraceCheckUtils]: 16: Hoare triple {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2342#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:54:56,768 INFO L272 TraceCheckUtils]: 15: Hoare triple {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2338#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:54:56,768 INFO L290 TraceCheckUtils]: 14: Hoare triple {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:56,769 INFO L290 TraceCheckUtils]: 13: Hoare triple {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:56,769 INFO L290 TraceCheckUtils]: 12: Hoare triple {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:56,770 INFO L290 TraceCheckUtils]: 11: Hoare triple {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:54:56,770 INFO L290 TraceCheckUtils]: 10: Hoare triple {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:54:56,771 INFO L290 TraceCheckUtils]: 9: Hoare triple {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:54:56,771 INFO L290 TraceCheckUtils]: 8: Hoare triple {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2373#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:54:56,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2369#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:54:56,773 INFO L290 TraceCheckUtils]: 6: Hoare triple {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2365#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:54:56,774 INFO L290 TraceCheckUtils]: 5: Hoare triple {2277#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2358#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:54:56,774 INFO L272 TraceCheckUtils]: 4: Hoare triple {2277#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,774 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2277#true} {2277#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,774 INFO L290 TraceCheckUtils]: 2: Hoare triple {2277#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {2277#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2277#true} is VALID [2022-04-27 21:54:56,774 INFO L272 TraceCheckUtils]: 0: Hoare triple {2277#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2277#true} is VALID [2022-04-27 21:54:56,774 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:56,774 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [894213606] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:56,774 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:56,774 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 8] total 16 [2022-04-27 21:54:56,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179892847] [2022-04-27 21:54:56,775 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:56,775 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 21:54:56,775 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:56,775 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:56,804 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:56,804 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 21:54:56,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:56,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 21:54:56,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2022-04-27 21:54:56,805 INFO L87 Difference]: Start difference. First operand 34 states and 41 transitions. Second operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:57,306 INFO L93 Difference]: Finished difference Result 43 states and 50 transitions. [2022-04-27 21:54:57,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 21:54:57,307 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 21:54:57,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:57,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 30 transitions. [2022-04-27 21:54:57,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 30 transitions. [2022-04-27 21:54:57,309 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 30 transitions. [2022-04-27 21:54:57,340 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:57,341 INFO L225 Difference]: With dead ends: 43 [2022-04-27 21:54:57,341 INFO L226 Difference]: Without dead ends: 38 [2022-04-27 21:54:57,341 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 32 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=391, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:54:57,341 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 15 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:57,341 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 73 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:54:57,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-27 21:54:57,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 33. [2022-04-27 21:54:57,443 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:57,443 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,443 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,443 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:57,444 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2022-04-27 21:54:57,444 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 45 transitions. [2022-04-27 21:54:57,444 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:57,444 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:57,444 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 21:54:57,444 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 21:54:57,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:57,445 INFO L93 Difference]: Finished difference Result 38 states and 45 transitions. [2022-04-27 21:54:57,445 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 45 transitions. [2022-04-27 21:54:57,445 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:57,445 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:57,445 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:57,445 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:57,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.2857142857142858) internal successors, (36), 28 states have internal predecessors, (36), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 40 transitions. [2022-04-27 21:54:57,446 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 40 transitions. Word has length 19 [2022-04-27 21:54:57,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:57,446 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 40 transitions. [2022-04-27 21:54:57,446 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:57,446 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 40 transitions. [2022-04-27 21:54:57,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 21:54:57,447 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:57,447 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:57,467 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 21:54:57,659 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:57,659 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:57,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:57,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1686168828, now seen corresponding path program 7 times [2022-04-27 21:54:57,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:57,660 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406537870] [2022-04-27 21:54:57,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:57,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:57,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:57,822 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:57,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:57,827 INFO L290 TraceCheckUtils]: 0: Hoare triple {2638#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-27 21:54:57,827 INFO L290 TraceCheckUtils]: 1: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:57,828 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:57,828 INFO L272 TraceCheckUtils]: 0: Hoare triple {2625#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2638#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:57,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {2638#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-27 21:54:57,828 INFO L290 TraceCheckUtils]: 2: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:57,828 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:57,828 INFO L272 TraceCheckUtils]: 4: Hoare triple {2625#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:57,829 INFO L290 TraceCheckUtils]: 5: Hoare triple {2625#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2630#(= main_~y~0 0)} is VALID [2022-04-27 21:54:57,829 INFO L290 TraceCheckUtils]: 6: Hoare triple {2630#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:57,830 INFO L290 TraceCheckUtils]: 7: Hoare triple {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:57,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:57,831 INFO L290 TraceCheckUtils]: 9: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:57,831 INFO L290 TraceCheckUtils]: 10: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:54:57,831 INFO L290 TraceCheckUtils]: 11: Hoare triple {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:54:57,832 INFO L290 TraceCheckUtils]: 12: Hoare triple {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:57,833 INFO L290 TraceCheckUtils]: 13: Hoare triple {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:54:57,833 INFO L290 TraceCheckUtils]: 14: Hoare triple {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2626#false} is VALID [2022-04-27 21:54:57,833 INFO L290 TraceCheckUtils]: 15: Hoare triple {2626#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:57,833 INFO L272 TraceCheckUtils]: 16: Hoare triple {2626#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2626#false} is VALID [2022-04-27 21:54:57,833 INFO L290 TraceCheckUtils]: 17: Hoare triple {2626#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2626#false} is VALID [2022-04-27 21:54:57,833 INFO L290 TraceCheckUtils]: 18: Hoare triple {2626#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:57,834 INFO L290 TraceCheckUtils]: 19: Hoare triple {2626#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:57,834 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:57,834 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:57,834 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406537870] [2022-04-27 21:54:57,834 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406537870] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:57,834 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1034829132] [2022-04-27 21:54:57,834 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 21:54:57,834 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:57,834 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:57,835 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:57,836 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 21:54:57,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:57,865 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-27 21:54:57,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:57,870 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:58,054 INFO L272 TraceCheckUtils]: 0: Hoare triple {2625#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,054 INFO L290 TraceCheckUtils]: 1: Hoare triple {2625#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-27 21:54:58,054 INFO L290 TraceCheckUtils]: 2: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,055 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,055 INFO L272 TraceCheckUtils]: 4: Hoare triple {2625#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,055 INFO L290 TraceCheckUtils]: 5: Hoare triple {2625#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2630#(= main_~y~0 0)} is VALID [2022-04-27 21:54:58,056 INFO L290 TraceCheckUtils]: 6: Hoare triple {2630#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:58,056 INFO L290 TraceCheckUtils]: 7: Hoare triple {2631#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:58,057 INFO L290 TraceCheckUtils]: 8: Hoare triple {2632#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:58,057 INFO L290 TraceCheckUtils]: 9: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:58,057 INFO L290 TraceCheckUtils]: 10: Hoare triple {2633#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:54:58,058 INFO L290 TraceCheckUtils]: 11: Hoare triple {2634#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:54:58,058 INFO L290 TraceCheckUtils]: 12: Hoare triple {2635#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:54:58,059 INFO L290 TraceCheckUtils]: 13: Hoare triple {2636#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:54:58,060 INFO L290 TraceCheckUtils]: 14: Hoare triple {2637#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2626#false} is VALID [2022-04-27 21:54:58,060 INFO L290 TraceCheckUtils]: 15: Hoare triple {2626#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:58,060 INFO L272 TraceCheckUtils]: 16: Hoare triple {2626#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2626#false} is VALID [2022-04-27 21:54:58,060 INFO L290 TraceCheckUtils]: 17: Hoare triple {2626#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2626#false} is VALID [2022-04-27 21:54:58,060 INFO L290 TraceCheckUtils]: 18: Hoare triple {2626#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:58,060 INFO L290 TraceCheckUtils]: 19: Hoare triple {2626#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:58,060 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:58,060 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:58,216 INFO L290 TraceCheckUtils]: 19: Hoare triple {2626#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:58,216 INFO L290 TraceCheckUtils]: 18: Hoare triple {2626#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:58,216 INFO L290 TraceCheckUtils]: 17: Hoare triple {2626#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2626#false} is VALID [2022-04-27 21:54:58,216 INFO L272 TraceCheckUtils]: 16: Hoare triple {2626#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2626#false} is VALID [2022-04-27 21:54:58,216 INFO L290 TraceCheckUtils]: 15: Hoare triple {2626#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2626#false} is VALID [2022-04-27 21:54:58,217 INFO L290 TraceCheckUtils]: 14: Hoare triple {2714#(not (< 0 (mod main_~z~0 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2626#false} is VALID [2022-04-27 21:54:58,218 INFO L290 TraceCheckUtils]: 13: Hoare triple {2718#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2714#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 21:54:58,218 INFO L290 TraceCheckUtils]: 12: Hoare triple {2722#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2718#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:54:58,219 INFO L290 TraceCheckUtils]: 11: Hoare triple {2726#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2722#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:54:58,219 INFO L290 TraceCheckUtils]: 10: Hoare triple {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2726#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:54:58,220 INFO L290 TraceCheckUtils]: 9: Hoare triple {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:54:58,221 INFO L290 TraceCheckUtils]: 8: Hoare triple {2737#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2730#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:54:58,222 INFO L290 TraceCheckUtils]: 7: Hoare triple {2741#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2737#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:54:58,223 INFO L290 TraceCheckUtils]: 6: Hoare triple {2745#(not (< 0 (mod main_~y~0 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2741#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:54:58,224 INFO L290 TraceCheckUtils]: 5: Hoare triple {2625#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2745#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 21:54:58,224 INFO L272 TraceCheckUtils]: 4: Hoare triple {2625#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,224 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2625#true} {2625#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,224 INFO L290 TraceCheckUtils]: 2: Hoare triple {2625#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,224 INFO L290 TraceCheckUtils]: 1: Hoare triple {2625#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2625#true} is VALID [2022-04-27 21:54:58,224 INFO L272 TraceCheckUtils]: 0: Hoare triple {2625#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2625#true} is VALID [2022-04-27 21:54:58,224 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:58,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1034829132] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:58,224 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:58,224 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 19 [2022-04-27 21:54:58,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106892271] [2022-04-27 21:54:58,225 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:58,226 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 21:54:58,226 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:58,226 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,248 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:58,248 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 21:54:58,248 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:58,249 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 21:54:58,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2022-04-27 21:54:58,249 INFO L87 Difference]: Start difference. First operand 33 states and 40 transitions. Second operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:58,824 INFO L93 Difference]: Finished difference Result 44 states and 51 transitions. [2022-04-27 21:54:58,824 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 21:54:58,824 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 21:54:58,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:54:58,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 31 transitions. [2022-04-27 21:54:58,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 31 transitions. [2022-04-27 21:54:58,825 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 31 transitions. [2022-04-27 21:54:58,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:58,848 INFO L225 Difference]: With dead ends: 44 [2022-04-27 21:54:58,848 INFO L226 Difference]: Without dead ends: 33 [2022-04-27 21:54:58,848 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=100, Invalid=656, Unknown=0, NotChecked=0, Total=756 [2022-04-27 21:54:58,849 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 163 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 178 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 163 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:54:58,849 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 69 Invalid, 178 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 163 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:54:58,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2022-04-27 21:54:58,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2022-04-27 21:54:58,941 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:54:58,942 INFO L82 GeneralOperation]: Start isEquivalent. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,942 INFO L74 IsIncluded]: Start isIncluded. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,942 INFO L87 Difference]: Start difference. First operand 33 states. Second operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:58,942 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2022-04-27 21:54:58,943 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2022-04-27 21:54:58,943 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:58,943 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:58,943 INFO L74 IsIncluded]: Start isIncluded. First operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-27 21:54:58,943 INFO L87 Difference]: Start difference. First operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 33 states. [2022-04-27 21:54:58,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:54:58,944 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2022-04-27 21:54:58,944 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2022-04-27 21:54:58,944 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:54:58,944 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:54:58,944 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:54:58,944 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:54:58,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 28 states have (on average 1.25) internal successors, (35), 28 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 39 transitions. [2022-04-27 21:54:58,945 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 39 transitions. Word has length 20 [2022-04-27 21:54:58,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:54:58,945 INFO L495 AbstractCegarLoop]: Abstraction has 33 states and 39 transitions. [2022-04-27 21:54:58,945 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 18 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:58,945 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 39 transitions. [2022-04-27 21:54:58,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 21:54:58,945 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:54:58,946 INFO L195 NwaCegarLoop]: trace histogram [5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:54:58,963 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 21:54:59,161 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-27 21:54:59,161 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:54:59,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:54:59,161 INFO L85 PathProgramCache]: Analyzing trace with hash -400395012, now seen corresponding path program 8 times [2022-04-27 21:54:59,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:54:59,162 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298812326] [2022-04-27 21:54:59,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:54:59,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:54:59,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:59,289 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:54:59,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:59,295 INFO L290 TraceCheckUtils]: 0: Hoare triple {2994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-27 21:54:59,295 INFO L290 TraceCheckUtils]: 1: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,295 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,296 INFO L272 TraceCheckUtils]: 0: Hoare triple {2980#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:54:59,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {2994#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-27 21:54:59,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,296 INFO L272 TraceCheckUtils]: 4: Hoare triple {2980#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {2980#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2985#(= main_~y~0 0)} is VALID [2022-04-27 21:54:59,297 INFO L290 TraceCheckUtils]: 6: Hoare triple {2985#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:59,297 INFO L290 TraceCheckUtils]: 7: Hoare triple {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:59,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:59,298 INFO L290 TraceCheckUtils]: 9: Hoare triple {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:54:59,299 INFO L290 TraceCheckUtils]: 10: Hoare triple {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:54:59,299 INFO L290 TraceCheckUtils]: 11: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:54:59,300 INFO L290 TraceCheckUtils]: 12: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:54:59,300 INFO L290 TraceCheckUtils]: 13: Hoare triple {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:54:59,301 INFO L290 TraceCheckUtils]: 14: Hoare triple {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2993#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:54:59,301 INFO L290 TraceCheckUtils]: 15: Hoare triple {2993#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,301 INFO L272 TraceCheckUtils]: 16: Hoare triple {2981#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2981#false} is VALID [2022-04-27 21:54:59,301 INFO L290 TraceCheckUtils]: 17: Hoare triple {2981#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#false} is VALID [2022-04-27 21:54:59,301 INFO L290 TraceCheckUtils]: 18: Hoare triple {2981#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,302 INFO L290 TraceCheckUtils]: 19: Hoare triple {2981#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,302 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:59,302 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:54:59,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298812326] [2022-04-27 21:54:59,302 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298812326] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:54:59,302 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [894643558] [2022-04-27 21:54:59,302 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:54:59,302 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:54:59,302 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:54:59,303 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:54:59,304 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 21:54:59,332 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:54:59,332 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:54:59,333 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 19 conjunts are in the unsatisfiable core [2022-04-27 21:54:59,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:54:59,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:54:59,532 INFO L272 TraceCheckUtils]: 0: Hoare triple {2980#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,532 INFO L290 TraceCheckUtils]: 1: Hoare triple {2980#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-27 21:54:59,532 INFO L290 TraceCheckUtils]: 2: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,532 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,532 INFO L272 TraceCheckUtils]: 4: Hoare triple {2980#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,540 INFO L290 TraceCheckUtils]: 5: Hoare triple {2980#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2985#(= main_~y~0 0)} is VALID [2022-04-27 21:54:59,540 INFO L290 TraceCheckUtils]: 6: Hoare triple {2985#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:54:59,541 INFO L290 TraceCheckUtils]: 7: Hoare triple {2986#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:54:59,541 INFO L290 TraceCheckUtils]: 8: Hoare triple {2987#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:54:59,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {2988#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:54:59,542 INFO L290 TraceCheckUtils]: 10: Hoare triple {2989#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:54:59,543 INFO L290 TraceCheckUtils]: 11: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:54:59,543 INFO L290 TraceCheckUtils]: 12: Hoare triple {2990#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:54:59,543 INFO L290 TraceCheckUtils]: 13: Hoare triple {2991#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:54:59,544 INFO L290 TraceCheckUtils]: 14: Hoare triple {2992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3040#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:54:59,544 INFO L290 TraceCheckUtils]: 15: Hoare triple {3040#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,544 INFO L272 TraceCheckUtils]: 16: Hoare triple {2981#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2981#false} is VALID [2022-04-27 21:54:59,544 INFO L290 TraceCheckUtils]: 17: Hoare triple {2981#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#false} is VALID [2022-04-27 21:54:59,545 INFO L290 TraceCheckUtils]: 18: Hoare triple {2981#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,545 INFO L290 TraceCheckUtils]: 19: Hoare triple {2981#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,545 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:59,545 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:54:59,721 INFO L290 TraceCheckUtils]: 19: Hoare triple {2981#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,721 INFO L290 TraceCheckUtils]: 18: Hoare triple {2981#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,721 INFO L290 TraceCheckUtils]: 17: Hoare triple {2981#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#false} is VALID [2022-04-27 21:54:59,721 INFO L272 TraceCheckUtils]: 16: Hoare triple {2981#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2981#false} is VALID [2022-04-27 21:54:59,722 INFO L290 TraceCheckUtils]: 15: Hoare triple {3068#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {2981#false} is VALID [2022-04-27 21:54:59,722 INFO L290 TraceCheckUtils]: 14: Hoare triple {3072#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3068#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:54:59,723 INFO L290 TraceCheckUtils]: 13: Hoare triple {3076#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3072#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:59,723 INFO L290 TraceCheckUtils]: 12: Hoare triple {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3076#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:59,724 INFO L290 TraceCheckUtils]: 11: Hoare triple {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:59,724 INFO L290 TraceCheckUtils]: 10: Hoare triple {3087#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3080#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:54:59,725 INFO L290 TraceCheckUtils]: 9: Hoare triple {3091#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3087#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:54:59,726 INFO L290 TraceCheckUtils]: 8: Hoare triple {3095#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3091#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:54:59,726 INFO L290 TraceCheckUtils]: 7: Hoare triple {3099#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3095#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:54:59,727 INFO L290 TraceCheckUtils]: 6: Hoare triple {3103#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3099#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:54:59,727 INFO L290 TraceCheckUtils]: 5: Hoare triple {2980#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3103#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:54:59,727 INFO L272 TraceCheckUtils]: 4: Hoare triple {2980#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,728 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2980#true} {2980#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,728 INFO L290 TraceCheckUtils]: 2: Hoare triple {2980#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {2980#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2980#true} is VALID [2022-04-27 21:54:59,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {2980#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2980#true} is VALID [2022-04-27 21:54:59,728 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:54:59,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [894643558] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:54:59,728 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:54:59,728 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 22 [2022-04-27 21:54:59,728 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799406877] [2022-04-27 21:54:59,728 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:54:59,729 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 21:54:59,729 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:54:59,729 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:54:59,754 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:54:59,754 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 21:54:59,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:54:59,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 21:54:59,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=373, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:54:59,754 INFO L87 Difference]: Start difference. First operand 33 states and 39 transitions. Second operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:03,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:03,866 INFO L93 Difference]: Finished difference Result 82 states and 115 transitions. [2022-04-27 21:55:03,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2022-04-27 21:55:03,867 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 21:55:03,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:03,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:03,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 115 transitions. [2022-04-27 21:55:03,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:03,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 115 transitions. [2022-04-27 21:55:03,870 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 50 states and 115 transitions. [2022-04-27 21:55:04,016 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 115 edges. 115 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:04,017 INFO L225 Difference]: With dead ends: 82 [2022-04-27 21:55:04,017 INFO L226 Difference]: Without dead ends: 77 [2022-04-27 21:55:04,018 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1229 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=1065, Invalid=3627, Unknown=0, NotChecked=0, Total=4692 [2022-04-27 21:55:04,019 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 138 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 298 mSolverCounterSat, 157 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 455 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 157 IncrementalHoareTripleChecker+Valid, 298 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:04,019 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 82 Invalid, 455 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [157 Valid, 298 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 21:55:04,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2022-04-27 21:55:04,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 39. [2022-04-27 21:55:04,136 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:04,136 INFO L82 GeneralOperation]: Start isEquivalent. First operand 77 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:04,136 INFO L74 IsIncluded]: Start isIncluded. First operand 77 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:04,136 INFO L87 Difference]: Start difference. First operand 77 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:04,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:04,138 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-27 21:55:04,138 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 97 transitions. [2022-04-27 21:55:04,138 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:04,138 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:04,138 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-27 21:55:04,138 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 77 states. [2022-04-27 21:55:04,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:04,139 INFO L93 Difference]: Finished difference Result 77 states and 97 transitions. [2022-04-27 21:55:04,139 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 97 transitions. [2022-04-27 21:55:04,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:04,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:04,140 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:04,140 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:04,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:04,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 51 transitions. [2022-04-27 21:55:04,140 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 51 transitions. Word has length 20 [2022-04-27 21:55:04,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:04,141 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 51 transitions. [2022-04-27 21:55:04,141 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:04,141 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-27 21:55:04,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 21:55:04,141 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:04,141 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:04,173 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:04,369 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:04,369 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:04,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:04,370 INFO L85 PathProgramCache]: Analyzing trace with hash 775905387, now seen corresponding path program 9 times [2022-04-27 21:55:04,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:04,370 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983346867] [2022-04-27 21:55:04,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:04,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:04,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:04,514 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:04,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:04,518 INFO L290 TraceCheckUtils]: 0: Hoare triple {3599#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-27 21:55:04,518 INFO L290 TraceCheckUtils]: 1: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,518 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,519 INFO L272 TraceCheckUtils]: 0: Hoare triple {3586#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3599#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:04,519 INFO L290 TraceCheckUtils]: 1: Hoare triple {3599#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-27 21:55:04,519 INFO L290 TraceCheckUtils]: 2: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,519 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,519 INFO L272 TraceCheckUtils]: 4: Hoare triple {3586#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,520 INFO L290 TraceCheckUtils]: 5: Hoare triple {3586#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:04,520 INFO L290 TraceCheckUtils]: 6: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:04,521 INFO L290 TraceCheckUtils]: 7: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:04,521 INFO L290 TraceCheckUtils]: 8: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:04,522 INFO L290 TraceCheckUtils]: 9: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:04,522 INFO L290 TraceCheckUtils]: 10: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:04,523 INFO L290 TraceCheckUtils]: 11: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:04,523 INFO L290 TraceCheckUtils]: 12: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:04,524 INFO L290 TraceCheckUtils]: 13: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:04,524 INFO L290 TraceCheckUtils]: 14: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:04,525 INFO L290 TraceCheckUtils]: 15: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:55:04,526 INFO L290 TraceCheckUtils]: 16: Hoare triple {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:55:04,526 INFO L272 TraceCheckUtils]: 17: Hoare triple {3596#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3597#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:55:04,527 INFO L290 TraceCheckUtils]: 18: Hoare triple {3597#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3598#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:55:04,527 INFO L290 TraceCheckUtils]: 19: Hoare triple {3598#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-27 21:55:04,527 INFO L290 TraceCheckUtils]: 20: Hoare triple {3587#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-27 21:55:04,527 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:04,527 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:04,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983346867] [2022-04-27 21:55:04,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983346867] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:04,528 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1602893023] [2022-04-27 21:55:04,528 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:55:04,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:04,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:04,529 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:04,541 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 21:55:04,572 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 21:55:04,572 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:55:04,573 INFO L263 TraceCheckSpWp]: Trace formula consists of 98 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-27 21:55:04,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:04,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:04,718 INFO L272 TraceCheckUtils]: 0: Hoare triple {3586#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,718 INFO L290 TraceCheckUtils]: 1: Hoare triple {3586#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-27 21:55:04,718 INFO L290 TraceCheckUtils]: 2: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,718 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,718 INFO L272 TraceCheckUtils]: 4: Hoare triple {3586#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,719 INFO L290 TraceCheckUtils]: 5: Hoare triple {3586#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:04,719 INFO L290 TraceCheckUtils]: 6: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:04,720 INFO L290 TraceCheckUtils]: 7: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:04,720 INFO L290 TraceCheckUtils]: 8: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:04,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:04,721 INFO L290 TraceCheckUtils]: 10: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:04,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:04,722 INFO L290 TraceCheckUtils]: 12: Hoare triple {3595#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:04,722 INFO L290 TraceCheckUtils]: 13: Hoare triple {3594#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:04,723 INFO L290 TraceCheckUtils]: 14: Hoare triple {3593#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:04,724 INFO L290 TraceCheckUtils]: 15: Hoare triple {3592#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:04,724 INFO L290 TraceCheckUtils]: 16: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:04,725 INFO L272 TraceCheckUtils]: 17: Hoare triple {3591#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:55:04,725 INFO L290 TraceCheckUtils]: 18: Hoare triple {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3658#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:55:04,725 INFO L290 TraceCheckUtils]: 19: Hoare triple {3658#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-27 21:55:04,725 INFO L290 TraceCheckUtils]: 20: Hoare triple {3587#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-27 21:55:04,726 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:04,726 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:04,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {3587#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-27 21:55:04,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {3658#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3587#false} is VALID [2022-04-27 21:55:04,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3658#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:55:04,884 INFO L272 TraceCheckUtils]: 17: Hoare triple {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3654#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:55:04,884 INFO L290 TraceCheckUtils]: 16: Hoare triple {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:04,885 INFO L290 TraceCheckUtils]: 15: Hoare triple {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:04,885 INFO L290 TraceCheckUtils]: 14: Hoare triple {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:55:04,886 INFO L290 TraceCheckUtils]: 13: Hoare triple {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:55:04,887 INFO L290 TraceCheckUtils]: 12: Hoare triple {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:55:04,887 INFO L290 TraceCheckUtils]: 11: Hoare triple {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:04,888 INFO L290 TraceCheckUtils]: 10: Hoare triple {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:04,889 INFO L290 TraceCheckUtils]: 9: Hoare triple {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3693#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:04,889 INFO L290 TraceCheckUtils]: 8: Hoare triple {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3689#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:55:04,890 INFO L290 TraceCheckUtils]: 7: Hoare triple {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3685#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:55:04,891 INFO L290 TraceCheckUtils]: 6: Hoare triple {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3681#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:55:04,891 INFO L290 TraceCheckUtils]: 5: Hoare triple {3586#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3674#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:04,891 INFO L272 TraceCheckUtils]: 4: Hoare triple {3586#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,891 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3586#true} {3586#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,891 INFO L290 TraceCheckUtils]: 2: Hoare triple {3586#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {3586#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3586#true} is VALID [2022-04-27 21:55:04,892 INFO L272 TraceCheckUtils]: 0: Hoare triple {3586#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3586#true} is VALID [2022-04-27 21:55:04,892 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:04,892 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1602893023] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:04,892 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:04,892 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9] total 18 [2022-04-27 21:55:04,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989368341] [2022-04-27 21:55:04,892 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:04,892 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:55:04,893 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:04,893 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:04,930 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:04,931 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 21:55:04,931 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:04,931 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 21:55:04,931 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2022-04-27 21:55:04,931 INFO L87 Difference]: Start difference. First operand 39 states and 51 transitions. Second operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:05,539 INFO L93 Difference]: Finished difference Result 49 states and 61 transitions. [2022-04-27 21:55:05,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 21:55:05,539 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 21:55:05,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:05,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-27 21:55:05,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 32 transitions. [2022-04-27 21:55:05,541 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 32 transitions. [2022-04-27 21:55:05,579 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:05,579 INFO L225 Difference]: With dead ends: 49 [2022-04-27 21:55:05,579 INFO L226 Difference]: Without dead ends: 44 [2022-04-27 21:55:05,580 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 36 SyntacticMatches, 4 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=519, Unknown=0, NotChecked=0, Total=600 [2022-04-27 21:55:05,580 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 208 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:05,580 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 68 Invalid, 208 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:55:05,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2022-04-27 21:55:05,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 38. [2022-04-27 21:55:05,732 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:05,732 INFO L82 GeneralOperation]: Start isEquivalent. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,733 INFO L74 IsIncluded]: Start isIncluded. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,733 INFO L87 Difference]: Start difference. First operand 44 states. Second operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:05,733 INFO L93 Difference]: Finished difference Result 44 states and 56 transitions. [2022-04-27 21:55:05,734 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 56 transitions. [2022-04-27 21:55:05,734 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:05,734 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:05,734 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-27 21:55:05,734 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 44 states. [2022-04-27 21:55:05,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:05,735 INFO L93 Difference]: Finished difference Result 44 states and 56 transitions. [2022-04-27 21:55:05,735 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 56 transitions. [2022-04-27 21:55:05,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:05,735 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:05,735 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:05,735 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:05,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.393939393939394) internal successors, (46), 33 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 50 transitions. [2022-04-27 21:55:05,736 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 50 transitions. Word has length 21 [2022-04-27 21:55:05,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:05,736 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 50 transitions. [2022-04-27 21:55:05,736 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 15 states have internal predecessors, (34), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:05,736 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 50 transitions. [2022-04-27 21:55:05,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 21:55:05,737 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:05,737 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:05,753 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:05,952 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 21:55:05,952 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:05,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:05,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1690016164, now seen corresponding path program 10 times [2022-04-27 21:55:05,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:05,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435002394] [2022-04-27 21:55:05,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:05,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:05,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:06,111 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:06,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:06,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {3999#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-27 21:55:06,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,116 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {3984#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3999#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:06,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {3999#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-27 21:55:06,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,117 INFO L272 TraceCheckUtils]: 4: Hoare triple {3984#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,117 INFO L290 TraceCheckUtils]: 5: Hoare triple {3984#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3989#(= main_~y~0 0)} is VALID [2022-04-27 21:55:06,118 INFO L290 TraceCheckUtils]: 6: Hoare triple {3989#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:06,118 INFO L290 TraceCheckUtils]: 7: Hoare triple {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:06,119 INFO L290 TraceCheckUtils]: 8: Hoare triple {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:06,120 INFO L290 TraceCheckUtils]: 9: Hoare triple {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:06,121 INFO L290 TraceCheckUtils]: 10: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:06,121 INFO L290 TraceCheckUtils]: 11: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:55:06,122 INFO L290 TraceCheckUtils]: 12: Hoare triple {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:55:06,122 INFO L290 TraceCheckUtils]: 13: Hoare triple {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:55:06,123 INFO L290 TraceCheckUtils]: 14: Hoare triple {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:55:06,123 INFO L290 TraceCheckUtils]: 15: Hoare triple {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:55:06,124 INFO L290 TraceCheckUtils]: 16: Hoare triple {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3985#false} is VALID [2022-04-27 21:55:06,124 INFO L290 TraceCheckUtils]: 17: Hoare triple {3985#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,138 INFO L272 TraceCheckUtils]: 18: Hoare triple {3985#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3985#false} is VALID [2022-04-27 21:55:06,138 INFO L290 TraceCheckUtils]: 19: Hoare triple {3985#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3985#false} is VALID [2022-04-27 21:55:06,138 INFO L290 TraceCheckUtils]: 20: Hoare triple {3985#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,138 INFO L290 TraceCheckUtils]: 21: Hoare triple {3985#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,138 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:06,138 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:06,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435002394] [2022-04-27 21:55:06,138 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [435002394] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:06,138 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1344671775] [2022-04-27 21:55:06,139 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:55:06,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:06,139 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:06,139 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:06,144 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 21:55:06,192 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:55:06,192 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:55:06,194 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-27 21:55:06,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:06,204 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:06,409 INFO L272 TraceCheckUtils]: 0: Hoare triple {3984#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,409 INFO L290 TraceCheckUtils]: 1: Hoare triple {3984#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-27 21:55:06,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {3984#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,410 INFO L290 TraceCheckUtils]: 5: Hoare triple {3984#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3989#(= main_~y~0 0)} is VALID [2022-04-27 21:55:06,410 INFO L290 TraceCheckUtils]: 6: Hoare triple {3989#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:06,411 INFO L290 TraceCheckUtils]: 7: Hoare triple {3990#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:06,412 INFO L290 TraceCheckUtils]: 8: Hoare triple {3991#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:06,412 INFO L290 TraceCheckUtils]: 9: Hoare triple {3992#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:06,412 INFO L290 TraceCheckUtils]: 10: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:06,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {3993#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:55:06,413 INFO L290 TraceCheckUtils]: 12: Hoare triple {3994#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:55:06,413 INFO L290 TraceCheckUtils]: 13: Hoare triple {3995#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:55:06,414 INFO L290 TraceCheckUtils]: 14: Hoare triple {3996#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:55:06,414 INFO L290 TraceCheckUtils]: 15: Hoare triple {3997#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:55:06,415 INFO L290 TraceCheckUtils]: 16: Hoare triple {3998#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3985#false} is VALID [2022-04-27 21:55:06,415 INFO L290 TraceCheckUtils]: 17: Hoare triple {3985#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,415 INFO L272 TraceCheckUtils]: 18: Hoare triple {3985#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3985#false} is VALID [2022-04-27 21:55:06,415 INFO L290 TraceCheckUtils]: 19: Hoare triple {3985#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3985#false} is VALID [2022-04-27 21:55:06,415 INFO L290 TraceCheckUtils]: 20: Hoare triple {3985#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,415 INFO L290 TraceCheckUtils]: 21: Hoare triple {3985#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,415 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:06,415 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:06,619 INFO L290 TraceCheckUtils]: 21: Hoare triple {3985#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,619 INFO L290 TraceCheckUtils]: 20: Hoare triple {3985#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,619 INFO L290 TraceCheckUtils]: 19: Hoare triple {3985#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3985#false} is VALID [2022-04-27 21:55:06,619 INFO L272 TraceCheckUtils]: 18: Hoare triple {3985#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3985#false} is VALID [2022-04-27 21:55:06,619 INFO L290 TraceCheckUtils]: 17: Hoare triple {3985#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {3985#false} is VALID [2022-04-27 21:55:06,620 INFO L290 TraceCheckUtils]: 16: Hoare triple {4081#(not (< 0 (mod main_~z~0 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3985#false} is VALID [2022-04-27 21:55:06,621 INFO L290 TraceCheckUtils]: 15: Hoare triple {4085#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4081#(not (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 21:55:06,621 INFO L290 TraceCheckUtils]: 14: Hoare triple {4089#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4085#(not (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:55:06,622 INFO L290 TraceCheckUtils]: 13: Hoare triple {4093#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4089#(not (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:55:06,623 INFO L290 TraceCheckUtils]: 12: Hoare triple {4097#(not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4093#(not (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:55:06,623 INFO L290 TraceCheckUtils]: 11: Hoare triple {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4097#(not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-27 21:55:06,623 INFO L290 TraceCheckUtils]: 10: Hoare triple {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 21:55:06,624 INFO L290 TraceCheckUtils]: 9: Hoare triple {4108#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4101#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 21:55:06,625 INFO L290 TraceCheckUtils]: 8: Hoare triple {4112#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4108#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:55:06,625 INFO L290 TraceCheckUtils]: 7: Hoare triple {4116#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4112#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:55:06,626 INFO L290 TraceCheckUtils]: 6: Hoare triple {4120#(not (< 0 (mod main_~y~0 4294967296)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4116#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:55:06,626 INFO L290 TraceCheckUtils]: 5: Hoare triple {3984#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4120#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 21:55:06,626 INFO L272 TraceCheckUtils]: 4: Hoare triple {3984#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,627 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3984#true} {3984#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,627 INFO L290 TraceCheckUtils]: 2: Hoare triple {3984#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,627 INFO L290 TraceCheckUtils]: 1: Hoare triple {3984#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3984#true} is VALID [2022-04-27 21:55:06,627 INFO L272 TraceCheckUtils]: 0: Hoare triple {3984#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3984#true} is VALID [2022-04-27 21:55:06,627 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:06,627 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1344671775] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:06,627 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:06,627 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 23 [2022-04-27 21:55:06,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1668387120] [2022-04-27 21:55:06,627 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:06,628 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:55:06,628 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:06,628 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:06,658 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:06,659 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 21:55:06,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:06,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 21:55:06,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=453, Unknown=0, NotChecked=0, Total=506 [2022-04-27 21:55:06,659 INFO L87 Difference]: Start difference. First operand 38 states and 50 transitions. Second operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:07,410 INFO L93 Difference]: Finished difference Result 50 states and 62 transitions. [2022-04-27 21:55:07,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 21:55:07,410 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:55:07,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:07,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 33 transitions. [2022-04-27 21:55:07,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 33 transitions. [2022-04-27 21:55:07,412 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 33 transitions. [2022-04-27 21:55:07,437 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:07,437 INFO L225 Difference]: With dead ends: 50 [2022-04-27 21:55:07,438 INFO L226 Difference]: Without dead ends: 38 [2022-04-27 21:55:07,438 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=123, Invalid=999, Unknown=0, NotChecked=0, Total=1122 [2022-04-27 21:55:07,438 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 13 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 233 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 233 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:07,439 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [13 Valid, 84 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 233 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:55:07,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-27 21:55:07,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2022-04-27 21:55:07,549 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:07,549 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,549 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,549 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:07,550 INFO L93 Difference]: Finished difference Result 38 states and 49 transitions. [2022-04-27 21:55:07,550 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 49 transitions. [2022-04-27 21:55:07,550 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:07,550 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:07,550 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 21:55:07,550 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 21:55:07,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:07,551 INFO L93 Difference]: Finished difference Result 38 states and 49 transitions. [2022-04-27 21:55:07,551 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 49 transitions. [2022-04-27 21:55:07,551 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:07,551 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:07,551 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:07,551 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:07,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.3636363636363635) internal successors, (45), 33 states have internal predecessors, (45), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 49 transitions. [2022-04-27 21:55:07,553 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 49 transitions. Word has length 22 [2022-04-27 21:55:07,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:07,553 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 49 transitions. [2022-04-27 21:55:07,553 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 22 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:07,553 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 49 transitions. [2022-04-27 21:55:07,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 21:55:07,553 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:07,553 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:07,569 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:07,769 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 21:55:07,770 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:07,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:07,770 INFO L85 PathProgramCache]: Analyzing trace with hash -1948985764, now seen corresponding path program 11 times [2022-04-27 21:55:07,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:07,770 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255195269] [2022-04-27 21:55:07,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:07,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:07,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:07,897 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:07,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:07,900 INFO L290 TraceCheckUtils]: 0: Hoare triple {4407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-27 21:55:07,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:07,900 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:07,901 INFO L272 TraceCheckUtils]: 0: Hoare triple {4391#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:07,901 INFO L290 TraceCheckUtils]: 1: Hoare triple {4407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-27 21:55:07,901 INFO L290 TraceCheckUtils]: 2: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:07,901 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:07,901 INFO L272 TraceCheckUtils]: 4: Hoare triple {4391#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:07,901 INFO L290 TraceCheckUtils]: 5: Hoare triple {4391#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4396#(= main_~y~0 0)} is VALID [2022-04-27 21:55:07,901 INFO L290 TraceCheckUtils]: 6: Hoare triple {4396#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:07,902 INFO L290 TraceCheckUtils]: 7: Hoare triple {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:07,902 INFO L290 TraceCheckUtils]: 8: Hoare triple {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:07,903 INFO L290 TraceCheckUtils]: 9: Hoare triple {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:07,903 INFO L290 TraceCheckUtils]: 10: Hoare triple {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:55:07,904 INFO L290 TraceCheckUtils]: 11: Hoare triple {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:07,904 INFO L290 TraceCheckUtils]: 12: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:07,904 INFO L290 TraceCheckUtils]: 13: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:55:07,905 INFO L290 TraceCheckUtils]: 14: Hoare triple {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:55:07,905 INFO L290 TraceCheckUtils]: 15: Hoare triple {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:55:07,906 INFO L290 TraceCheckUtils]: 16: Hoare triple {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4406#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:55:07,906 INFO L290 TraceCheckUtils]: 17: Hoare triple {4406#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:07,906 INFO L272 TraceCheckUtils]: 18: Hoare triple {4392#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4392#false} is VALID [2022-04-27 21:55:07,906 INFO L290 TraceCheckUtils]: 19: Hoare triple {4392#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4392#false} is VALID [2022-04-27 21:55:07,907 INFO L290 TraceCheckUtils]: 20: Hoare triple {4392#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:07,907 INFO L290 TraceCheckUtils]: 21: Hoare triple {4392#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:07,907 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:07,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:07,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255195269] [2022-04-27 21:55:07,907 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255195269] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:07,907 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1587344776] [2022-04-27 21:55:07,907 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:55:07,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:07,908 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:07,909 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:07,910 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 21:55:07,949 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 21:55:07,949 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:55:07,950 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 23 conjunts are in the unsatisfiable core [2022-04-27 21:55:07,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:07,956 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:08,172 INFO L272 TraceCheckUtils]: 0: Hoare triple {4391#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {4391#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-27 21:55:08,172 INFO L290 TraceCheckUtils]: 2: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,172 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,172 INFO L272 TraceCheckUtils]: 4: Hoare triple {4391#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,173 INFO L290 TraceCheckUtils]: 5: Hoare triple {4391#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4396#(= main_~y~0 0)} is VALID [2022-04-27 21:55:08,173 INFO L290 TraceCheckUtils]: 6: Hoare triple {4396#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:08,174 INFO L290 TraceCheckUtils]: 7: Hoare triple {4397#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:08,175 INFO L290 TraceCheckUtils]: 8: Hoare triple {4398#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:08,175 INFO L290 TraceCheckUtils]: 9: Hoare triple {4399#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:08,176 INFO L290 TraceCheckUtils]: 10: Hoare triple {4400#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:55:08,176 INFO L290 TraceCheckUtils]: 11: Hoare triple {4401#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:08,177 INFO L290 TraceCheckUtils]: 12: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:08,177 INFO L290 TraceCheckUtils]: 13: Hoare triple {4402#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:55:08,178 INFO L290 TraceCheckUtils]: 14: Hoare triple {4403#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:55:08,178 INFO L290 TraceCheckUtils]: 15: Hoare triple {4404#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:55:08,189 INFO L290 TraceCheckUtils]: 16: Hoare triple {4405#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4459#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:55:08,199 INFO L290 TraceCheckUtils]: 17: Hoare triple {4459#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:08,199 INFO L272 TraceCheckUtils]: 18: Hoare triple {4392#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4392#false} is VALID [2022-04-27 21:55:08,199 INFO L290 TraceCheckUtils]: 19: Hoare triple {4392#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4392#false} is VALID [2022-04-27 21:55:08,200 INFO L290 TraceCheckUtils]: 20: Hoare triple {4392#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:08,200 INFO L290 TraceCheckUtils]: 21: Hoare triple {4392#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:08,200 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:08,200 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:08,414 INFO L290 TraceCheckUtils]: 21: Hoare triple {4392#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:08,414 INFO L290 TraceCheckUtils]: 20: Hoare triple {4392#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:08,414 INFO L290 TraceCheckUtils]: 19: Hoare triple {4392#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4392#false} is VALID [2022-04-27 21:55:08,414 INFO L272 TraceCheckUtils]: 18: Hoare triple {4392#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4392#false} is VALID [2022-04-27 21:55:08,415 INFO L290 TraceCheckUtils]: 17: Hoare triple {4487#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {4392#false} is VALID [2022-04-27 21:55:08,416 INFO L290 TraceCheckUtils]: 16: Hoare triple {4491#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4487#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:55:08,423 INFO L290 TraceCheckUtils]: 15: Hoare triple {4495#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4491#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:55:08,424 INFO L290 TraceCheckUtils]: 14: Hoare triple {4499#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4495#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:55:08,424 INFO L290 TraceCheckUtils]: 13: Hoare triple {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4499#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 21:55:08,425 INFO L290 TraceCheckUtils]: 12: Hoare triple {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:55:08,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {4510#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4503#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:55:08,426 INFO L290 TraceCheckUtils]: 10: Hoare triple {4514#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4510#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:55:08,427 INFO L290 TraceCheckUtils]: 9: Hoare triple {4518#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4514#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:55:08,427 INFO L290 TraceCheckUtils]: 8: Hoare triple {4522#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4518#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:55:08,428 INFO L290 TraceCheckUtils]: 7: Hoare triple {4526#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4522#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:55:08,430 INFO L290 TraceCheckUtils]: 6: Hoare triple {4530#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4526#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:55:08,430 INFO L290 TraceCheckUtils]: 5: Hoare triple {4391#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4530#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:55:08,431 INFO L272 TraceCheckUtils]: 4: Hoare triple {4391#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,431 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4391#true} {4391#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,431 INFO L290 TraceCheckUtils]: 2: Hoare triple {4391#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,431 INFO L290 TraceCheckUtils]: 1: Hoare triple {4391#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4391#true} is VALID [2022-04-27 21:55:08,432 INFO L272 TraceCheckUtils]: 0: Hoare triple {4391#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#true} is VALID [2022-04-27 21:55:08,433 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:08,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1587344776] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:08,433 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:08,433 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 26 [2022-04-27 21:55:08,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266668456] [2022-04-27 21:55:08,433 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:08,434 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:55:08,434 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:08,434 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:08,474 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:08,474 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-04-27 21:55:08,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:08,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-04-27 21:55:08,475 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=534, Unknown=0, NotChecked=0, Total=650 [2022-04-27 21:55:08,475 INFO L87 Difference]: Start difference. First operand 38 states and 49 transitions. Second operand has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:19,377 INFO L93 Difference]: Finished difference Result 103 states and 144 transitions. [2022-04-27 21:55:19,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-04-27 21:55:19,378 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:55:19,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:19,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 144 transitions. [2022-04-27 21:55:19,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 144 transitions. [2022-04-27 21:55:19,381 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 69 states and 144 transitions. [2022-04-27 21:55:19,693 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 144 edges. 144 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:19,694 INFO L225 Difference]: With dead ends: 103 [2022-04-27 21:55:19,694 INFO L226 Difference]: Without dead ends: 98 [2022-04-27 21:55:19,697 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2398 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=1783, Invalid=6589, Unknown=0, NotChecked=0, Total=8372 [2022-04-27 21:55:19,697 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 195 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 347 mSolverCounterSat, 270 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 195 SdHoareTripleChecker+Valid, 80 SdHoareTripleChecker+Invalid, 617 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 270 IncrementalHoareTripleChecker+Valid, 347 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:19,698 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [195 Valid, 80 Invalid, 617 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [270 Valid, 347 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 21:55:19,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-27 21:55:19,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 50. [2022-04-27 21:55:19,925 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:19,926 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,926 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,926 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:19,927 INFO L93 Difference]: Finished difference Result 98 states and 125 transitions. [2022-04-27 21:55:19,927 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 125 transitions. [2022-04-27 21:55:19,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:19,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:19,928 INFO L74 IsIncluded]: Start isIncluded. First operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-27 21:55:19,928 INFO L87 Difference]: Start difference. First operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-27 21:55:19,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:19,929 INFO L93 Difference]: Finished difference Result 98 states and 125 transitions. [2022-04-27 21:55:19,929 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 125 transitions. [2022-04-27 21:55:19,930 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:19,930 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:19,930 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:19,930 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:19,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 45 states have (on average 1.3777777777777778) internal successors, (62), 45 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 66 transitions. [2022-04-27 21:55:19,931 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 66 transitions. Word has length 22 [2022-04-27 21:55:19,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:19,931 INFO L495 AbstractCegarLoop]: Abstraction has 50 states and 66 transitions. [2022-04-27 21:55:19,931 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 1.3076923076923077) internal successors, (34), 25 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:19,931 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 66 transitions. [2022-04-27 21:55:19,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 21:55:19,931 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:19,931 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:19,947 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:20,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 21:55:20,147 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:20,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:20,148 INFO L85 PathProgramCache]: Analyzing trace with hash -279854581, now seen corresponding path program 12 times [2022-04-27 21:55:20,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:20,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1971280759] [2022-04-27 21:55:20,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:20,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:20,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:20,312 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:20,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:20,315 INFO L290 TraceCheckUtils]: 0: Hoare triple {5169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-27 21:55:20,315 INFO L290 TraceCheckUtils]: 1: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,315 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,315 INFO L272 TraceCheckUtils]: 0: Hoare triple {5155#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:20,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {5169#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-27 21:55:20,316 INFO L290 TraceCheckUtils]: 2: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,316 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,316 INFO L272 TraceCheckUtils]: 4: Hoare triple {5155#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,316 INFO L290 TraceCheckUtils]: 5: Hoare triple {5155#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:20,317 INFO L290 TraceCheckUtils]: 6: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:20,317 INFO L290 TraceCheckUtils]: 7: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:20,318 INFO L290 TraceCheckUtils]: 8: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:20,318 INFO L290 TraceCheckUtils]: 9: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:20,319 INFO L290 TraceCheckUtils]: 10: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-27 21:55:20,319 INFO L290 TraceCheckUtils]: 11: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-27 21:55:20,320 INFO L290 TraceCheckUtils]: 12: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-27 21:55:20,320 INFO L290 TraceCheckUtils]: 13: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:20,321 INFO L290 TraceCheckUtils]: 14: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:20,321 INFO L290 TraceCheckUtils]: 15: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:20,322 INFO L290 TraceCheckUtils]: 16: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:20,323 INFO L290 TraceCheckUtils]: 17: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:55:20,323 INFO L290 TraceCheckUtils]: 18: Hoare triple {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:55:20,324 INFO L272 TraceCheckUtils]: 19: Hoare triple {5166#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~x~0 main_~n~0) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5167#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:55:20,324 INFO L290 TraceCheckUtils]: 20: Hoare triple {5167#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5168#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:55:20,324 INFO L290 TraceCheckUtils]: 21: Hoare triple {5168#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-27 21:55:20,325 INFO L290 TraceCheckUtils]: 22: Hoare triple {5156#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-27 21:55:20,325 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:20,325 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:20,325 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1971280759] [2022-04-27 21:55:20,325 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1971280759] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:20,325 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [911156793] [2022-04-27 21:55:20,325 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:55:20,325 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:20,325 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:20,326 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:20,327 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 21:55:20,372 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-27 21:55:20,373 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:55:20,373 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-27 21:55:20,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:20,379 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:20,491 INFO L272 TraceCheckUtils]: 0: Hoare triple {5155#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {5155#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-27 21:55:20,491 INFO L290 TraceCheckUtils]: 2: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,491 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,491 INFO L272 TraceCheckUtils]: 4: Hoare triple {5155#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,492 INFO L290 TraceCheckUtils]: 5: Hoare triple {5155#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:20,492 INFO L290 TraceCheckUtils]: 6: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:20,493 INFO L290 TraceCheckUtils]: 7: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:20,493 INFO L290 TraceCheckUtils]: 8: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:20,494 INFO L290 TraceCheckUtils]: 9: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:20,494 INFO L290 TraceCheckUtils]: 10: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-27 21:55:20,494 INFO L290 TraceCheckUtils]: 11: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-27 21:55:20,495 INFO L290 TraceCheckUtils]: 12: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} is VALID [2022-04-27 21:55:20,495 INFO L290 TraceCheckUtils]: 13: Hoare triple {5165#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:20,496 INFO L290 TraceCheckUtils]: 14: Hoare triple {5164#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 21:55:20,496 INFO L290 TraceCheckUtils]: 15: Hoare triple {5163#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:20,496 INFO L290 TraceCheckUtils]: 16: Hoare triple {5162#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:20,497 INFO L290 TraceCheckUtils]: 17: Hoare triple {5161#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:20,497 INFO L290 TraceCheckUtils]: 18: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:20,498 INFO L272 TraceCheckUtils]: 19: Hoare triple {5160#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:55:20,498 INFO L290 TraceCheckUtils]: 20: Hoare triple {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5234#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:55:20,523 INFO L290 TraceCheckUtils]: 21: Hoare triple {5234#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-27 21:55:20,523 INFO L290 TraceCheckUtils]: 22: Hoare triple {5156#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-27 21:55:20,523 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:20,523 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:20,696 INFO L290 TraceCheckUtils]: 22: Hoare triple {5156#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-27 21:55:20,697 INFO L290 TraceCheckUtils]: 21: Hoare triple {5234#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5156#false} is VALID [2022-04-27 21:55:20,697 INFO L290 TraceCheckUtils]: 20: Hoare triple {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5234#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:55:20,698 INFO L272 TraceCheckUtils]: 19: Hoare triple {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5230#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:55:20,698 INFO L290 TraceCheckUtils]: 18: Hoare triple {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:20,699 INFO L290 TraceCheckUtils]: 17: Hoare triple {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:20,699 INFO L290 TraceCheckUtils]: 16: Hoare triple {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:55:20,700 INFO L290 TraceCheckUtils]: 15: Hoare triple {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:55:20,701 INFO L290 TraceCheckUtils]: 14: Hoare triple {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:55:20,701 INFO L290 TraceCheckUtils]: 13: Hoare triple {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:20,702 INFO L290 TraceCheckUtils]: 12: Hoare triple {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:55:20,702 INFO L290 TraceCheckUtils]: 11: Hoare triple {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:55:20,703 INFO L290 TraceCheckUtils]: 10: Hoare triple {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5273#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:55:20,703 INFO L290 TraceCheckUtils]: 9: Hoare triple {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5269#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:20,704 INFO L290 TraceCheckUtils]: 8: Hoare triple {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5265#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:55:20,705 INFO L290 TraceCheckUtils]: 7: Hoare triple {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5261#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:55:20,706 INFO L290 TraceCheckUtils]: 6: Hoare triple {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5257#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:55:20,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {5155#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5250#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:20,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {5155#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5155#true} {5155#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {5155#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {5155#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5155#true} is VALID [2022-04-27 21:55:20,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {5155#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5155#true} is VALID [2022-04-27 21:55:20,707 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:20,707 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [911156793] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:20,707 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:20,707 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10, 10] total 20 [2022-04-27 21:55:20,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1233053157] [2022-04-27 21:55:20,707 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:20,707 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 21:55:20,708 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:20,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:20,743 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:20,743 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 21:55:20,743 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:20,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 21:55:20,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2022-04-27 21:55:20,744 INFO L87 Difference]: Start difference. First operand 50 states and 66 transitions. Second operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:21,515 INFO L93 Difference]: Finished difference Result 61 states and 77 transitions. [2022-04-27 21:55:21,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 21:55:21,515 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 21:55:21,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:21,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 34 transitions. [2022-04-27 21:55:21,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 34 transitions. [2022-04-27 21:55:21,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 34 transitions. [2022-04-27 21:55:21,543 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:21,543 INFO L225 Difference]: With dead ends: 61 [2022-04-27 21:55:21,543 INFO L226 Difference]: Without dead ends: 56 [2022-04-27 21:55:21,544 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 40 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=665, Unknown=0, NotChecked=0, Total=756 [2022-04-27 21:55:21,545 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 14 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 239 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 239 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:21,545 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 73 Invalid, 251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 239 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:55:21,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-04-27 21:55:21,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 53. [2022-04-27 21:55:21,733 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:21,733 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,733 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,733 INFO L87 Difference]: Start difference. First operand 56 states. Second operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:21,734 INFO L93 Difference]: Finished difference Result 56 states and 72 transitions. [2022-04-27 21:55:21,734 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 72 transitions. [2022-04-27 21:55:21,734 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:21,734 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:21,734 INFO L74 IsIncluded]: Start isIncluded. First operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-27 21:55:21,735 INFO L87 Difference]: Start difference. First operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-27 21:55:21,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:21,735 INFO L93 Difference]: Finished difference Result 56 states and 72 transitions. [2022-04-27 21:55:21,735 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 72 transitions. [2022-04-27 21:55:21,736 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:21,736 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:21,736 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:21,736 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:21,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 48 states have (on average 1.3541666666666667) internal successors, (65), 48 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 69 transitions. [2022-04-27 21:55:21,737 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 69 transitions. Word has length 23 [2022-04-27 21:55:21,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:21,737 INFO L495 AbstractCegarLoop]: Abstraction has 53 states and 69 transitions. [2022-04-27 21:55:21,737 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.9) internal successors, (38), 17 states have internal predecessors, (38), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:21,737 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 69 transitions. [2022-04-27 21:55:21,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 21:55:21,737 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:21,737 INFO L195 NwaCegarLoop]: trace histogram [7, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:21,764 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:21,964 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-27 21:55:21,964 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:21,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:21,965 INFO L85 PathProgramCache]: Analyzing trace with hash 503040188, now seen corresponding path program 13 times [2022-04-27 21:55:21,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:21,965 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1273436878] [2022-04-27 21:55:21,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:21,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:21,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:22,095 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:22,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:22,099 INFO L290 TraceCheckUtils]: 0: Hoare triple {5662#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-27 21:55:22,099 INFO L290 TraceCheckUtils]: 1: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,099 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,100 INFO L272 TraceCheckUtils]: 0: Hoare triple {5644#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5662#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:22,100 INFO L290 TraceCheckUtils]: 1: Hoare triple {5662#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-27 21:55:22,100 INFO L290 TraceCheckUtils]: 2: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,100 INFO L272 TraceCheckUtils]: 4: Hoare triple {5644#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,100 INFO L290 TraceCheckUtils]: 5: Hoare triple {5644#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5649#(= main_~y~0 0)} is VALID [2022-04-27 21:55:22,101 INFO L290 TraceCheckUtils]: 6: Hoare triple {5649#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:22,101 INFO L290 TraceCheckUtils]: 7: Hoare triple {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:22,101 INFO L290 TraceCheckUtils]: 8: Hoare triple {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:22,102 INFO L290 TraceCheckUtils]: 9: Hoare triple {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:22,102 INFO L290 TraceCheckUtils]: 10: Hoare triple {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:55:22,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:22,103 INFO L290 TraceCheckUtils]: 12: Hoare triple {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:55:22,103 INFO L290 TraceCheckUtils]: 13: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:55:22,104 INFO L290 TraceCheckUtils]: 14: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 21:55:22,104 INFO L290 TraceCheckUtils]: 15: Hoare triple {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:55:22,105 INFO L290 TraceCheckUtils]: 16: Hoare triple {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:55:22,105 INFO L290 TraceCheckUtils]: 17: Hoare triple {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:55:22,105 INFO L290 TraceCheckUtils]: 18: Hoare triple {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5661#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:55:22,106 INFO L290 TraceCheckUtils]: 19: Hoare triple {5661#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,106 INFO L272 TraceCheckUtils]: 20: Hoare triple {5645#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5645#false} is VALID [2022-04-27 21:55:22,106 INFO L290 TraceCheckUtils]: 21: Hoare triple {5645#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5645#false} is VALID [2022-04-27 21:55:22,106 INFO L290 TraceCheckUtils]: 22: Hoare triple {5645#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,106 INFO L290 TraceCheckUtils]: 23: Hoare triple {5645#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,106 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:22,106 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:22,106 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1273436878] [2022-04-27 21:55:22,106 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1273436878] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:22,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [537916196] [2022-04-27 21:55:22,107 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 21:55:22,107 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:22,107 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:22,114 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:22,114 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 21:55:22,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:22,152 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-27 21:55:22,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:22,158 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:22,379 INFO L272 TraceCheckUtils]: 0: Hoare triple {5644#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {5644#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-27 21:55:22,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,380 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,380 INFO L272 TraceCheckUtils]: 4: Hoare triple {5644#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,380 INFO L290 TraceCheckUtils]: 5: Hoare triple {5644#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5649#(= main_~y~0 0)} is VALID [2022-04-27 21:55:22,381 INFO L290 TraceCheckUtils]: 6: Hoare triple {5649#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:22,381 INFO L290 TraceCheckUtils]: 7: Hoare triple {5650#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:22,382 INFO L290 TraceCheckUtils]: 8: Hoare triple {5651#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:22,382 INFO L290 TraceCheckUtils]: 9: Hoare triple {5652#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:22,383 INFO L290 TraceCheckUtils]: 10: Hoare triple {5653#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:55:22,383 INFO L290 TraceCheckUtils]: 11: Hoare triple {5654#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:22,384 INFO L290 TraceCheckUtils]: 12: Hoare triple {5655#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:55:22,384 INFO L290 TraceCheckUtils]: 13: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:55:22,384 INFO L290 TraceCheckUtils]: 14: Hoare triple {5656#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 21:55:22,385 INFO L290 TraceCheckUtils]: 15: Hoare triple {5657#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:55:22,385 INFO L290 TraceCheckUtils]: 16: Hoare triple {5658#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:55:22,386 INFO L290 TraceCheckUtils]: 17: Hoare triple {5659#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:55:22,387 INFO L290 TraceCheckUtils]: 18: Hoare triple {5660#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5720#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:55:22,387 INFO L290 TraceCheckUtils]: 19: Hoare triple {5720#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,387 INFO L272 TraceCheckUtils]: 20: Hoare triple {5645#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5645#false} is VALID [2022-04-27 21:55:22,387 INFO L290 TraceCheckUtils]: 21: Hoare triple {5645#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5645#false} is VALID [2022-04-27 21:55:22,387 INFO L290 TraceCheckUtils]: 22: Hoare triple {5645#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,387 INFO L290 TraceCheckUtils]: 23: Hoare triple {5645#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,387 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:22,388 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:22,700 INFO L290 TraceCheckUtils]: 23: Hoare triple {5645#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,700 INFO L290 TraceCheckUtils]: 22: Hoare triple {5645#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,700 INFO L290 TraceCheckUtils]: 21: Hoare triple {5645#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5645#false} is VALID [2022-04-27 21:55:22,700 INFO L272 TraceCheckUtils]: 20: Hoare triple {5645#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5645#false} is VALID [2022-04-27 21:55:22,701 INFO L290 TraceCheckUtils]: 19: Hoare triple {5748#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {5645#false} is VALID [2022-04-27 21:55:22,702 INFO L290 TraceCheckUtils]: 18: Hoare triple {5752#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5748#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:55:22,702 INFO L290 TraceCheckUtils]: 17: Hoare triple {5756#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5752#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:55:22,703 INFO L290 TraceCheckUtils]: 16: Hoare triple {5760#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5756#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:55:22,703 INFO L290 TraceCheckUtils]: 15: Hoare triple {5764#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5760#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 21:55:22,704 INFO L290 TraceCheckUtils]: 14: Hoare triple {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5764#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 21:55:22,704 INFO L290 TraceCheckUtils]: 13: Hoare triple {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 21:55:22,705 INFO L290 TraceCheckUtils]: 12: Hoare triple {5775#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5768#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 21:55:22,705 INFO L290 TraceCheckUtils]: 11: Hoare triple {5779#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5775#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:55:22,706 INFO L290 TraceCheckUtils]: 10: Hoare triple {5783#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5779#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:55:22,707 INFO L290 TraceCheckUtils]: 9: Hoare triple {5787#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5783#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:55:22,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {5791#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5787#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:55:22,708 INFO L290 TraceCheckUtils]: 7: Hoare triple {5795#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5791#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:55:22,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {5799#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5795#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:55:22,709 INFO L290 TraceCheckUtils]: 5: Hoare triple {5644#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5799#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:55:22,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {5644#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5644#true} {5644#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {5644#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {5644#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5644#true} is VALID [2022-04-27 21:55:22,710 INFO L272 TraceCheckUtils]: 0: Hoare triple {5644#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5644#true} is VALID [2022-04-27 21:55:22,710 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:22,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [537916196] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:22,710 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:22,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 30 [2022-04-27 21:55:22,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394310951] [2022-04-27 21:55:22,710 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:22,710 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 21:55:22,711 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:22,711 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:22,741 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:22,741 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 21:55:22,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:22,741 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 21:55:22,741 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=723, Unknown=0, NotChecked=0, Total=870 [2022-04-27 21:55:22,741 INFO L87 Difference]: Start difference. First operand 53 states and 69 transitions. Second operand has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:49,017 INFO L93 Difference]: Finished difference Result 135 states and 188 transitions. [2022-04-27 21:55:49,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2022-04-27 21:55:49,017 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 21:55:49,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:49,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 188 transitions. [2022-04-27 21:55:49,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 188 transitions. [2022-04-27 21:55:49,022 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 97 states and 188 transitions. [2022-04-27 21:55:49,452 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 188 edges. 188 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:49,454 INFO L225 Difference]: With dead ends: 135 [2022-04-27 21:55:49,454 INFO L226 Difference]: Without dead ends: 130 [2022-04-27 21:55:49,457 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4829 ImplicationChecksByTransitivity, 23.1s TimeCoverageRelationStatistics Valid=3140, Invalid=12112, Unknown=0, NotChecked=0, Total=15252 [2022-04-27 21:55:49,457 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 283 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 491 mSolverCounterSat, 467 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 283 SdHoareTripleChecker+Valid, 83 SdHoareTripleChecker+Invalid, 958 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 467 IncrementalHoareTripleChecker+Valid, 491 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:49,457 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [283 Valid, 83 Invalid, 958 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [467 Valid, 491 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-04-27 21:55:49,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2022-04-27 21:55:49,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 63. [2022-04-27 21:55:49,828 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:49,843 INFO L82 GeneralOperation]: Start isEquivalent. First operand 130 states. Second operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,843 INFO L74 IsIncluded]: Start isIncluded. First operand 130 states. Second operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,843 INFO L87 Difference]: Start difference. First operand 130 states. Second operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:49,848 INFO L93 Difference]: Finished difference Result 130 states and 165 transitions. [2022-04-27 21:55:49,848 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 165 transitions. [2022-04-27 21:55:49,849 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:49,849 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:49,849 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 130 states. [2022-04-27 21:55:49,849 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 130 states. [2022-04-27 21:55:49,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:49,851 INFO L93 Difference]: Finished difference Result 130 states and 165 transitions. [2022-04-27 21:55:49,851 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 165 transitions. [2022-04-27 21:55:49,851 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:49,851 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:49,851 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:49,851 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:49,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.396551724137931) internal successors, (81), 58 states have internal predecessors, (81), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 85 transitions. [2022-04-27 21:55:49,852 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 85 transitions. Word has length 24 [2022-04-27 21:55:49,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:49,853 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 85 transitions. [2022-04-27 21:55:49,853 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.2666666666666666) internal successors, (38), 29 states have internal predecessors, (38), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:49,853 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 85 transitions. [2022-04-27 21:55:49,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 21:55:49,853 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:49,853 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:49,869 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:50,071 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:50,072 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:50,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:50,072 INFO L85 PathProgramCache]: Analyzing trace with hash -2103221077, now seen corresponding path program 14 times [2022-04-27 21:55:50,072 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:50,072 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887271891] [2022-04-27 21:55:50,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:50,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:50,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:50,653 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:50,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:50,659 INFO L290 TraceCheckUtils]: 0: Hoare triple {6651#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-27 21:55:50,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,659 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,660 INFO L272 TraceCheckUtils]: 0: Hoare triple {6630#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6651#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:50,660 INFO L290 TraceCheckUtils]: 1: Hoare triple {6651#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-27 21:55:50,660 INFO L290 TraceCheckUtils]: 2: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,660 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,660 INFO L272 TraceCheckUtils]: 4: Hoare triple {6630#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,660 INFO L290 TraceCheckUtils]: 5: Hoare triple {6630#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:50,661 INFO L290 TraceCheckUtils]: 6: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6636#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:50,662 INFO L290 TraceCheckUtils]: 7: Hoare triple {6636#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6637#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:50,663 INFO L290 TraceCheckUtils]: 8: Hoare triple {6637#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6638#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-27 21:55:50,664 INFO L290 TraceCheckUtils]: 9: Hoare triple {6638#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6639#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:55:50,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {6639#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6640#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-27 21:55:50,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {6640#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6641#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 21:55:50,667 INFO L290 TraceCheckUtils]: 12: Hoare triple {6641#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 21:55:50,668 INFO L290 TraceCheckUtils]: 13: Hoare triple {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 21:55:50,669 INFO L290 TraceCheckUtils]: 14: Hoare triple {6642#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= main_~n~0 (+ main_~x~0 6)) (<= (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6643#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 21:55:50,670 INFO L290 TraceCheckUtils]: 15: Hoare triple {6643#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6644#(and (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:55:50,671 INFO L290 TraceCheckUtils]: 16: Hoare triple {6644#(and (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6645#(and (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:55:50,672 INFO L290 TraceCheckUtils]: 17: Hoare triple {6645#(and (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6646#(and (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:55:50,673 INFO L290 TraceCheckUtils]: 18: Hoare triple {6646#(and (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6647#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:55:50,674 INFO L290 TraceCheckUtils]: 19: Hoare triple {6647#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:55:50,675 INFO L290 TraceCheckUtils]: 20: Hoare triple {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:55:50,675 INFO L272 TraceCheckUtils]: 21: Hoare triple {6648#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6649#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:55:50,676 INFO L290 TraceCheckUtils]: 22: Hoare triple {6649#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6650#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:55:50,676 INFO L290 TraceCheckUtils]: 23: Hoare triple {6650#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-27 21:55:50,676 INFO L290 TraceCheckUtils]: 24: Hoare triple {6631#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-27 21:55:50,676 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:50,676 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:50,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887271891] [2022-04-27 21:55:50,676 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887271891] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:50,677 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [445706067] [2022-04-27 21:55:50,677 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:55:50,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:50,677 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:50,679 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:50,680 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 21:55:50,718 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:55:50,718 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:55:50,719 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 21:55:50,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:50,726 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:50,991 INFO L272 TraceCheckUtils]: 0: Hoare triple {6630#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,992 INFO L290 TraceCheckUtils]: 1: Hoare triple {6630#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-27 21:55:50,992 INFO L290 TraceCheckUtils]: 2: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,992 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,992 INFO L272 TraceCheckUtils]: 4: Hoare triple {6630#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:50,992 INFO L290 TraceCheckUtils]: 5: Hoare triple {6630#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:50,993 INFO L290 TraceCheckUtils]: 6: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6673#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 21:55:50,993 INFO L290 TraceCheckUtils]: 7: Hoare triple {6673#(= (+ main_~x~0 1) main_~n~0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6677#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 21:55:50,994 INFO L290 TraceCheckUtils]: 8: Hoare triple {6677#(= main_~n~0 (+ main_~x~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 21:55:50,994 INFO L290 TraceCheckUtils]: 9: Hoare triple {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 21:55:50,995 INFO L290 TraceCheckUtils]: 10: Hoare triple {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 21:55:50,996 INFO L290 TraceCheckUtils]: 11: Hoare triple {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} is VALID [2022-04-27 21:55:50,996 INFO L290 TraceCheckUtils]: 12: Hoare triple {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} is VALID [2022-04-27 21:55:50,996 INFO L290 TraceCheckUtils]: 13: Hoare triple {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} is VALID [2022-04-27 21:55:50,997 INFO L290 TraceCheckUtils]: 14: Hoare triple {6693#(= (+ main_~x~0 1) (+ main_~n~0 (- 5)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 21:55:50,997 INFO L290 TraceCheckUtils]: 15: Hoare triple {6689#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 21:55:50,998 INFO L290 TraceCheckUtils]: 16: Hoare triple {6685#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 21:55:50,998 INFO L290 TraceCheckUtils]: 17: Hoare triple {6681#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6677#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 21:55:50,999 INFO L290 TraceCheckUtils]: 18: Hoare triple {6677#(= main_~n~0 (+ main_~x~0 2))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6673#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 21:55:51,000 INFO L290 TraceCheckUtils]: 19: Hoare triple {6673#(= (+ main_~x~0 1) main_~n~0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:51,000 INFO L290 TraceCheckUtils]: 20: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:55:51,001 INFO L272 TraceCheckUtils]: 21: Hoare triple {6635#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:55:51,001 INFO L290 TraceCheckUtils]: 22: Hoare triple {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6728#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:55:51,001 INFO L290 TraceCheckUtils]: 23: Hoare triple {6728#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-27 21:55:51,001 INFO L290 TraceCheckUtils]: 24: Hoare triple {6631#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-27 21:55:51,002 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:51,002 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:51,341 INFO L290 TraceCheckUtils]: 24: Hoare triple {6631#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-27 21:55:51,341 INFO L290 TraceCheckUtils]: 23: Hoare triple {6728#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6631#false} is VALID [2022-04-27 21:55:51,342 INFO L290 TraceCheckUtils]: 22: Hoare triple {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6728#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:55:51,342 INFO L272 TraceCheckUtils]: 21: Hoare triple {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6724#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:55:51,343 INFO L290 TraceCheckUtils]: 20: Hoare triple {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:51,343 INFO L290 TraceCheckUtils]: 19: Hoare triple {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:51,344 INFO L290 TraceCheckUtils]: 18: Hoare triple {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:55:51,345 INFO L290 TraceCheckUtils]: 17: Hoare triple {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:55:51,346 INFO L290 TraceCheckUtils]: 16: Hoare triple {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:55:51,347 INFO L290 TraceCheckUtils]: 15: Hoare triple {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:51,347 INFO L290 TraceCheckUtils]: 14: Hoare triple {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:55:51,348 INFO L290 TraceCheckUtils]: 13: Hoare triple {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 21:55:51,348 INFO L290 TraceCheckUtils]: 12: Hoare triple {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 21:55:51,350 INFO L290 TraceCheckUtils]: 11: Hoare triple {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6771#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 21:55:51,351 INFO L290 TraceCheckUtils]: 10: Hoare triple {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6767#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:55:51,351 INFO L290 TraceCheckUtils]: 9: Hoare triple {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6763#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:55:51,352 INFO L290 TraceCheckUtils]: 8: Hoare triple {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6759#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:55:51,353 INFO L290 TraceCheckUtils]: 7: Hoare triple {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6755#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:55:51,353 INFO L290 TraceCheckUtils]: 6: Hoare triple {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6751#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:55:51,354 INFO L290 TraceCheckUtils]: 5: Hoare triple {6630#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6744#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:55:51,354 INFO L272 TraceCheckUtils]: 4: Hoare triple {6630#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:51,354 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6630#true} {6630#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:51,354 INFO L290 TraceCheckUtils]: 2: Hoare triple {6630#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:51,354 INFO L290 TraceCheckUtils]: 1: Hoare triple {6630#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6630#true} is VALID [2022-04-27 21:55:51,354 INFO L272 TraceCheckUtils]: 0: Hoare triple {6630#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6630#true} is VALID [2022-04-27 21:55:51,354 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:51,354 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [445706067] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:51,354 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:51,355 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 11, 11] total 34 [2022-04-27 21:55:51,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119195618] [2022-04-27 21:55:51,355 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:51,355 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:55:51,355 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:51,355 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:51,434 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:51,435 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 21:55:51,435 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:51,435 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 21:55:51,435 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=1016, Unknown=0, NotChecked=0, Total=1122 [2022-04-27 21:55:51,436 INFO L87 Difference]: Start difference. First operand 63 states and 85 transitions. Second operand has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:53,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:53,627 INFO L93 Difference]: Finished difference Result 78 states and 100 transitions. [2022-04-27 21:55:53,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 21:55:53,627 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:55:53,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:55:53,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:53,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 43 transitions. [2022-04-27 21:55:53,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:53,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 43 transitions. [2022-04-27 21:55:53,629 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 43 transitions. [2022-04-27 21:55:53,686 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:53,688 INFO L225 Difference]: With dead ends: 78 [2022-04-27 21:55:53,688 INFO L226 Difference]: Without dead ends: 73 [2022-04-27 21:55:53,689 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 30 SyntacticMatches, 7 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 528 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=209, Invalid=2143, Unknown=0, NotChecked=0, Total=2352 [2022-04-27 21:55:53,689 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 21 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 455 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 476 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 455 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 21:55:53,689 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 94 Invalid, 476 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 455 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 21:55:53,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2022-04-27 21:55:54,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 64. [2022-04-27 21:55:54,065 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:55:54,066 INFO L82 GeneralOperation]: Start isEquivalent. First operand 73 states. Second operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:54,066 INFO L74 IsIncluded]: Start isIncluded. First operand 73 states. Second operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:54,066 INFO L87 Difference]: Start difference. First operand 73 states. Second operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:54,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:54,067 INFO L93 Difference]: Finished difference Result 73 states and 95 transitions. [2022-04-27 21:55:54,067 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 95 transitions. [2022-04-27 21:55:54,067 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:54,067 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:54,067 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 73 states. [2022-04-27 21:55:54,068 INFO L87 Difference]: Start difference. First operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 73 states. [2022-04-27 21:55:54,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:55:54,068 INFO L93 Difference]: Finished difference Result 73 states and 95 transitions. [2022-04-27 21:55:54,068 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 95 transitions. [2022-04-27 21:55:54,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:55:54,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:55:54,069 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:55:54,069 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:55:54,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 59 states have (on average 1.3898305084745763) internal successors, (82), 59 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:54,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 86 transitions. [2022-04-27 21:55:54,070 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 86 transitions. Word has length 25 [2022-04-27 21:55:54,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:55:54,070 INFO L495 AbstractCegarLoop]: Abstraction has 64 states and 86 transitions. [2022-04-27 21:55:54,070 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.6176470588235294) internal successors, (55), 31 states have internal predecessors, (55), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:54,070 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 86 transitions. [2022-04-27 21:55:54,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 21:55:54,070 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:55:54,070 INFO L195 NwaCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:55:54,086 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 21:55:54,283 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 21:55:54,283 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:55:54,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:55:54,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1183323307, now seen corresponding path program 2 times [2022-04-27 21:55:54,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:55:54,284 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469430992] [2022-04-27 21:55:54,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:55:54,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:55:54,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:54,433 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:55:54,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:54,436 INFO L290 TraceCheckUtils]: 0: Hoare triple {7264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-27 21:55:54,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,436 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,436 INFO L272 TraceCheckUtils]: 0: Hoare triple {7245#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:55:54,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {7264#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-27 21:55:54,437 INFO L290 TraceCheckUtils]: 2: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,437 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,437 INFO L272 TraceCheckUtils]: 4: Hoare triple {7245#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,437 INFO L290 TraceCheckUtils]: 5: Hoare triple {7245#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7250#(= main_~y~0 0)} is VALID [2022-04-27 21:55:54,437 INFO L290 TraceCheckUtils]: 6: Hoare triple {7250#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:54,438 INFO L290 TraceCheckUtils]: 7: Hoare triple {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:54,438 INFO L290 TraceCheckUtils]: 8: Hoare triple {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:54,438 INFO L290 TraceCheckUtils]: 9: Hoare triple {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:54,439 INFO L290 TraceCheckUtils]: 10: Hoare triple {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:55:54,439 INFO L290 TraceCheckUtils]: 11: Hoare triple {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:54,440 INFO L290 TraceCheckUtils]: 12: Hoare triple {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:55:54,440 INFO L290 TraceCheckUtils]: 13: Hoare triple {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 21:55:54,440 INFO L290 TraceCheckUtils]: 14: Hoare triple {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:55:54,441 INFO L290 TraceCheckUtils]: 15: Hoare triple {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 21:55:54,441 INFO L290 TraceCheckUtils]: 16: Hoare triple {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 21:55:54,442 INFO L290 TraceCheckUtils]: 17: Hoare triple {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 21:55:54,442 INFO L290 TraceCheckUtils]: 18: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 21:55:54,442 INFO L290 TraceCheckUtils]: 19: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7263#(and (<= (div main_~z~0 4294967296) 0) (<= 12 main_~z~0))} is VALID [2022-04-27 21:55:54,443 INFO L290 TraceCheckUtils]: 20: Hoare triple {7263#(and (<= (div main_~z~0 4294967296) 0) (<= 12 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,443 INFO L272 TraceCheckUtils]: 21: Hoare triple {7246#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7246#false} is VALID [2022-04-27 21:55:54,443 INFO L290 TraceCheckUtils]: 22: Hoare triple {7246#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7246#false} is VALID [2022-04-27 21:55:54,443 INFO L290 TraceCheckUtils]: 23: Hoare triple {7246#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,443 INFO L290 TraceCheckUtils]: 24: Hoare triple {7246#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,443 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:54,443 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:55:54,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469430992] [2022-04-27 21:55:54,443 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [469430992] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:55:54,443 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1873191420] [2022-04-27 21:55:54,443 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:55:54,444 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:55:54,444 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:55:54,444 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:55:54,445 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 21:55:54,476 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:55:54,476 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:55:54,476 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 21:55:54,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:55:54,481 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:55:54,655 INFO L272 TraceCheckUtils]: 0: Hoare triple {7245#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,655 INFO L290 TraceCheckUtils]: 1: Hoare triple {7245#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-27 21:55:54,655 INFO L290 TraceCheckUtils]: 2: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,655 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,655 INFO L272 TraceCheckUtils]: 4: Hoare triple {7245#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,655 INFO L290 TraceCheckUtils]: 5: Hoare triple {7245#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7250#(= main_~y~0 0)} is VALID [2022-04-27 21:55:54,656 INFO L290 TraceCheckUtils]: 6: Hoare triple {7250#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:55:54,656 INFO L290 TraceCheckUtils]: 7: Hoare triple {7251#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:55:54,657 INFO L290 TraceCheckUtils]: 8: Hoare triple {7252#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:55:54,657 INFO L290 TraceCheckUtils]: 9: Hoare triple {7253#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:55:54,658 INFO L290 TraceCheckUtils]: 10: Hoare triple {7254#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:55:54,658 INFO L290 TraceCheckUtils]: 11: Hoare triple {7255#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:55:54,659 INFO L290 TraceCheckUtils]: 12: Hoare triple {7256#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:55:54,659 INFO L290 TraceCheckUtils]: 13: Hoare triple {7257#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 21:55:54,659 INFO L290 TraceCheckUtils]: 14: Hoare triple {7258#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:55:54,660 INFO L290 TraceCheckUtils]: 15: Hoare triple {7259#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 21:55:54,660 INFO L290 TraceCheckUtils]: 16: Hoare triple {7260#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 21:55:54,661 INFO L290 TraceCheckUtils]: 17: Hoare triple {7261#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 21:55:54,661 INFO L290 TraceCheckUtils]: 18: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 21:55:54,661 INFO L290 TraceCheckUtils]: 19: Hoare triple {7262#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7325#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-27 21:55:54,662 INFO L290 TraceCheckUtils]: 20: Hoare triple {7325#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,662 INFO L272 TraceCheckUtils]: 21: Hoare triple {7246#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7246#false} is VALID [2022-04-27 21:55:54,662 INFO L290 TraceCheckUtils]: 22: Hoare triple {7246#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7246#false} is VALID [2022-04-27 21:55:54,662 INFO L290 TraceCheckUtils]: 23: Hoare triple {7246#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,662 INFO L290 TraceCheckUtils]: 24: Hoare triple {7246#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,662 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:54,662 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:55:54,984 INFO L290 TraceCheckUtils]: 24: Hoare triple {7246#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,984 INFO L290 TraceCheckUtils]: 23: Hoare triple {7246#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,985 INFO L290 TraceCheckUtils]: 22: Hoare triple {7246#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7246#false} is VALID [2022-04-27 21:55:54,985 INFO L272 TraceCheckUtils]: 21: Hoare triple {7246#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7246#false} is VALID [2022-04-27 21:55:54,985 INFO L290 TraceCheckUtils]: 20: Hoare triple {7353#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {7246#false} is VALID [2022-04-27 21:55:54,985 INFO L290 TraceCheckUtils]: 19: Hoare triple {7357#(< 0 (mod main_~y~0 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7353#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:55:54,986 INFO L290 TraceCheckUtils]: 18: Hoare triple {7357#(< 0 (mod main_~y~0 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {7357#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:55:54,986 INFO L290 TraceCheckUtils]: 17: Hoare triple {7364#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7357#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:55:54,987 INFO L290 TraceCheckUtils]: 16: Hoare triple {7368#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7364#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:55:54,987 INFO L290 TraceCheckUtils]: 15: Hoare triple {7372#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7368#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:55:54,988 INFO L290 TraceCheckUtils]: 14: Hoare triple {7376#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7372#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:55:54,989 INFO L290 TraceCheckUtils]: 13: Hoare triple {7380#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7376#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 21:55:54,989 INFO L290 TraceCheckUtils]: 12: Hoare triple {7384#(< 0 (mod (+ main_~y~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7380#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 21:55:54,990 INFO L290 TraceCheckUtils]: 11: Hoare triple {7388#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7384#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 21:55:54,991 INFO L290 TraceCheckUtils]: 10: Hoare triple {7392#(< 0 (mod (+ main_~y~0 8) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7388#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 21:55:54,991 INFO L290 TraceCheckUtils]: 9: Hoare triple {7396#(< 0 (mod (+ main_~y~0 9) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7392#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 21:55:54,992 INFO L290 TraceCheckUtils]: 8: Hoare triple {7400#(< 0 (mod (+ main_~y~0 10) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7396#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 21:55:54,992 INFO L290 TraceCheckUtils]: 7: Hoare triple {7404#(< 0 (mod (+ main_~y~0 11) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7400#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 21:55:54,993 INFO L290 TraceCheckUtils]: 6: Hoare triple {7408#(< 0 (mod (+ main_~y~0 12) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7404#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 21:55:54,993 INFO L290 TraceCheckUtils]: 5: Hoare triple {7245#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7408#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 21:55:54,994 INFO L272 TraceCheckUtils]: 4: Hoare triple {7245#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,994 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7245#true} {7245#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,994 INFO L290 TraceCheckUtils]: 2: Hoare triple {7245#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,994 INFO L290 TraceCheckUtils]: 1: Hoare triple {7245#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7245#true} is VALID [2022-04-27 21:55:54,994 INFO L272 TraceCheckUtils]: 0: Hoare triple {7245#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7245#true} is VALID [2022-04-27 21:55:54,994 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:55:54,994 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1873191420] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:55:54,994 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:55:54,994 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 32 [2022-04-27 21:55:54,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [918545813] [2022-04-27 21:55:54,994 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:55:54,995 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:55:54,995 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:55:54,995 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:55:55,023 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:55:55,023 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 21:55:55,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:55:55,023 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 21:55:55,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=760, Unknown=0, NotChecked=0, Total=992 [2022-04-27 21:55:55,024 INFO L87 Difference]: Start difference. First operand 64 states and 86 transitions. Second operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:28,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:28,936 INFO L93 Difference]: Finished difference Result 185 states and 248 transitions. [2022-04-27 21:56:28,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-04-27 21:56:28,937 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:56:28,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:28,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:28,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 186 transitions. [2022-04-27 21:56:28,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:28,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 186 transitions. [2022-04-27 21:56:28,941 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 51 states and 186 transitions. [2022-04-27 21:56:29,141 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 186 edges. 186 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:29,143 INFO L225 Difference]: With dead ends: 185 [2022-04-27 21:56:29,143 INFO L226 Difference]: Without dead ends: 180 [2022-04-27 21:56:29,145 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1361 ImplicationChecksByTransitivity, 29.5s TimeCoverageRelationStatistics Valid=1536, Invalid=4784, Unknown=0, NotChecked=0, Total=6320 [2022-04-27 21:56:29,145 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 676 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 908 mSolverCounterSat, 259 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 676 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 1167 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 259 IncrementalHoareTripleChecker+Valid, 908 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:29,145 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [676 Valid, 115 Invalid, 1167 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [259 Valid, 908 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-27 21:56:29,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2022-04-27 21:56:29,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 73. [2022-04-27 21:56:29,700 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:29,700 INFO L82 GeneralOperation]: Start isEquivalent. First operand 180 states. Second operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:29,700 INFO L74 IsIncluded]: Start isIncluded. First operand 180 states. Second operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:29,700 INFO L87 Difference]: Start difference. First operand 180 states. Second operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:29,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:29,702 INFO L93 Difference]: Finished difference Result 180 states and 230 transitions. [2022-04-27 21:56:29,702 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 230 transitions. [2022-04-27 21:56:29,703 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:29,703 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:29,703 INFO L74 IsIncluded]: Start isIncluded. First operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 180 states. [2022-04-27 21:56:29,703 INFO L87 Difference]: Start difference. First operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 180 states. [2022-04-27 21:56:29,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:29,705 INFO L93 Difference]: Finished difference Result 180 states and 230 transitions. [2022-04-27 21:56:29,705 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 230 transitions. [2022-04-27 21:56:29,706 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:29,706 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:29,706 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:29,706 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:29,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 68 states have (on average 1.4264705882352942) internal successors, (97), 68 states have internal predecessors, (97), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:29,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 101 transitions. [2022-04-27 21:56:29,707 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 101 transitions. Word has length 25 [2022-04-27 21:56:29,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:29,707 INFO L495 AbstractCegarLoop]: Abstraction has 73 states and 101 transitions. [2022-04-27 21:56:29,707 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:29,707 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 101 transitions. [2022-04-27 21:56:29,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 21:56:29,707 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:29,707 INFO L195 NwaCegarLoop]: trace histogram [8, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:29,743 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 21:56:29,908 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:29,908 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:29,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:29,908 INFO L85 PathProgramCache]: Analyzing trace with hash 147465884, now seen corresponding path program 15 times [2022-04-27 21:56:29,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:29,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831904473] [2022-04-27 21:56:29,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:29,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:29,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:30,072 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:30,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:30,075 INFO L290 TraceCheckUtils]: 0: Hoare triple {8374#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-27 21:56:30,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,075 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,075 INFO L272 TraceCheckUtils]: 0: Hoare triple {8357#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8374#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:30,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {8374#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-27 21:56:30,075 INFO L290 TraceCheckUtils]: 2: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,075 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,076 INFO L272 TraceCheckUtils]: 4: Hoare triple {8357#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,076 INFO L290 TraceCheckUtils]: 5: Hoare triple {8357#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8362#(= main_~y~0 0)} is VALID [2022-04-27 21:56:30,076 INFO L290 TraceCheckUtils]: 6: Hoare triple {8362#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:30,077 INFO L290 TraceCheckUtils]: 7: Hoare triple {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:30,077 INFO L290 TraceCheckUtils]: 8: Hoare triple {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:56:30,078 INFO L290 TraceCheckUtils]: 9: Hoare triple {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:56:30,078 INFO L290 TraceCheckUtils]: 10: Hoare triple {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:56:30,079 INFO L290 TraceCheckUtils]: 11: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:56:30,079 INFO L290 TraceCheckUtils]: 12: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:56:30,080 INFO L290 TraceCheckUtils]: 13: Hoare triple {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:56:30,080 INFO L290 TraceCheckUtils]: 14: Hoare triple {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:56:30,081 INFO L290 TraceCheckUtils]: 15: Hoare triple {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:56:30,081 INFO L290 TraceCheckUtils]: 16: Hoare triple {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:56:30,082 INFO L290 TraceCheckUtils]: 17: Hoare triple {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:56:30,082 INFO L290 TraceCheckUtils]: 18: Hoare triple {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8358#false} is VALID [2022-04-27 21:56:30,082 INFO L290 TraceCheckUtils]: 19: Hoare triple {8358#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8358#false} is VALID [2022-04-27 21:56:30,082 INFO L290 TraceCheckUtils]: 20: Hoare triple {8358#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8358#false} is VALID [2022-04-27 21:56:30,082 INFO L290 TraceCheckUtils]: 21: Hoare triple {8358#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,083 INFO L272 TraceCheckUtils]: 22: Hoare triple {8358#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8358#false} is VALID [2022-04-27 21:56:30,083 INFO L290 TraceCheckUtils]: 23: Hoare triple {8358#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8358#false} is VALID [2022-04-27 21:56:30,083 INFO L290 TraceCheckUtils]: 24: Hoare triple {8358#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,083 INFO L290 TraceCheckUtils]: 25: Hoare triple {8358#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,083 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 21:56:30,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:30,083 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831904473] [2022-04-27 21:56:30,083 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831904473] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:30,083 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1476176233] [2022-04-27 21:56:30,083 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:56:30,083 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:30,083 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:30,103 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:30,132 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 21:56:30,203 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-27 21:56:30,203 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:56:30,204 INFO L263 TraceCheckSpWp]: Trace formula consists of 123 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-27 21:56:30,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:30,210 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:56:30,477 INFO L272 TraceCheckUtils]: 0: Hoare triple {8357#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {8357#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-27 21:56:30,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,478 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,478 INFO L272 TraceCheckUtils]: 4: Hoare triple {8357#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,478 INFO L290 TraceCheckUtils]: 5: Hoare triple {8357#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8362#(= main_~y~0 0)} is VALID [2022-04-27 21:56:30,478 INFO L290 TraceCheckUtils]: 6: Hoare triple {8362#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:30,479 INFO L290 TraceCheckUtils]: 7: Hoare triple {8363#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:30,479 INFO L290 TraceCheckUtils]: 8: Hoare triple {8364#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:56:30,480 INFO L290 TraceCheckUtils]: 9: Hoare triple {8365#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:56:30,480 INFO L290 TraceCheckUtils]: 10: Hoare triple {8366#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:56:30,481 INFO L290 TraceCheckUtils]: 11: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:56:30,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {8367#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:56:30,482 INFO L290 TraceCheckUtils]: 13: Hoare triple {8368#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:56:30,482 INFO L290 TraceCheckUtils]: 14: Hoare triple {8369#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:56:30,483 INFO L290 TraceCheckUtils]: 15: Hoare triple {8370#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:56:30,483 INFO L290 TraceCheckUtils]: 16: Hoare triple {8371#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:56:30,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {8372#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:56:30,484 INFO L290 TraceCheckUtils]: 18: Hoare triple {8373#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8432#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:56:30,485 INFO L290 TraceCheckUtils]: 19: Hoare triple {8432#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8436#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} is VALID [2022-04-27 21:56:30,485 INFO L290 TraceCheckUtils]: 20: Hoare triple {8436#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8440#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} is VALID [2022-04-27 21:56:30,486 INFO L290 TraceCheckUtils]: 21: Hoare triple {8440#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,486 INFO L272 TraceCheckUtils]: 22: Hoare triple {8358#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8358#false} is VALID [2022-04-27 21:56:30,486 INFO L290 TraceCheckUtils]: 23: Hoare triple {8358#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8358#false} is VALID [2022-04-27 21:56:30,486 INFO L290 TraceCheckUtils]: 24: Hoare triple {8358#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,486 INFO L290 TraceCheckUtils]: 25: Hoare triple {8358#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,486 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:30,486 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:56:30,820 INFO L290 TraceCheckUtils]: 25: Hoare triple {8358#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,820 INFO L290 TraceCheckUtils]: 24: Hoare triple {8358#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,820 INFO L290 TraceCheckUtils]: 23: Hoare triple {8358#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8358#false} is VALID [2022-04-27 21:56:30,820 INFO L272 TraceCheckUtils]: 22: Hoare triple {8358#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8358#false} is VALID [2022-04-27 21:56:30,820 INFO L290 TraceCheckUtils]: 21: Hoare triple {8468#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {8358#false} is VALID [2022-04-27 21:56:30,821 INFO L290 TraceCheckUtils]: 20: Hoare triple {8472#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8468#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:56:30,822 INFO L290 TraceCheckUtils]: 19: Hoare triple {8476#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8472#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:56:30,822 INFO L290 TraceCheckUtils]: 18: Hoare triple {8480#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8476#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:56:30,823 INFO L290 TraceCheckUtils]: 17: Hoare triple {8484#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8480#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 21:56:30,824 INFO L290 TraceCheckUtils]: 16: Hoare triple {8488#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8484#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 21:56:30,824 INFO L290 TraceCheckUtils]: 15: Hoare triple {8492#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8488#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 21:56:30,825 INFO L290 TraceCheckUtils]: 14: Hoare triple {8496#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8492#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-27 21:56:30,825 INFO L290 TraceCheckUtils]: 13: Hoare triple {8500#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8496#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-27 21:56:30,826 INFO L290 TraceCheckUtils]: 12: Hoare triple {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8500#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-27 21:56:30,826 INFO L290 TraceCheckUtils]: 11: Hoare triple {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 21:56:30,826 INFO L290 TraceCheckUtils]: 10: Hoare triple {8511#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8504#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 21:56:30,827 INFO L290 TraceCheckUtils]: 9: Hoare triple {8515#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8511#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 21:56:30,827 INFO L290 TraceCheckUtils]: 8: Hoare triple {8519#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8515#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 21:56:30,828 INFO L290 TraceCheckUtils]: 7: Hoare triple {8523#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8519#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 21:56:30,829 INFO L290 TraceCheckUtils]: 6: Hoare triple {8527#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8523#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 21:56:30,829 INFO L290 TraceCheckUtils]: 5: Hoare triple {8357#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8527#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:56:30,829 INFO L272 TraceCheckUtils]: 4: Hoare triple {8357#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,829 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8357#true} {8357#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,829 INFO L290 TraceCheckUtils]: 2: Hoare triple {8357#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,829 INFO L290 TraceCheckUtils]: 1: Hoare triple {8357#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8357#true} is VALID [2022-04-27 21:56:30,829 INFO L272 TraceCheckUtils]: 0: Hoare triple {8357#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8357#true} is VALID [2022-04-27 21:56:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:30,830 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1476176233] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:56:30,830 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:56:30,830 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 33 [2022-04-27 21:56:30,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280172903] [2022-04-27 21:56:30,830 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:56:30,831 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 21:56:30,831 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:30,832 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:30,854 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:30,854 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-27 21:56:30,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:30,855 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-27 21:56:30,855 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=885, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 21:56:30,856 INFO L87 Difference]: Start difference. First operand 73 states and 101 transitions. Second operand has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:57,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:57,063 INFO L93 Difference]: Finished difference Result 146 states and 196 transitions. [2022-04-27 21:56:57,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2022-04-27 21:56:57,064 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 21:56:57,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:57,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:57,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 140 transitions. [2022-04-27 21:56:57,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:57,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 140 transitions. [2022-04-27 21:56:57,067 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 81 states and 140 transitions. [2022-04-27 21:56:57,409 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 140 edges. 140 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:57,410 INFO L225 Difference]: With dead ends: 146 [2022-04-27 21:56:57,410 INFO L226 Difference]: Without dead ends: 131 [2022-04-27 21:56:57,413 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3028 ImplicationChecksByTransitivity, 14.2s TimeCoverageRelationStatistics Valid=1479, Invalid=10731, Unknown=0, NotChecked=0, Total=12210 [2022-04-27 21:56:57,413 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 115 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 680 mSolverCounterSat, 267 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 115 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 947 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 267 IncrementalHoareTripleChecker+Valid, 680 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:57,413 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [115 Valid, 106 Invalid, 947 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [267 Valid, 680 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-04-27 21:56:57,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-04-27 21:56:58,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 88. [2022-04-27 21:56:58,027 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:58,028 INFO L82 GeneralOperation]: Start isEquivalent. First operand 131 states. Second operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:58,029 INFO L74 IsIncluded]: Start isIncluded. First operand 131 states. Second operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:58,029 INFO L87 Difference]: Start difference. First operand 131 states. Second operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:58,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:58,030 INFO L93 Difference]: Finished difference Result 131 states and 171 transitions. [2022-04-27 21:56:58,030 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 171 transitions. [2022-04-27 21:56:58,031 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:58,031 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:58,031 INFO L74 IsIncluded]: Start isIncluded. First operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-27 21:56:58,031 INFO L87 Difference]: Start difference. First operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 131 states. [2022-04-27 21:56:58,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:58,033 INFO L93 Difference]: Finished difference Result 131 states and 171 transitions. [2022-04-27 21:56:58,033 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 171 transitions. [2022-04-27 21:56:58,033 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:58,033 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:58,033 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:58,033 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:58,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 83 states have (on average 1.3373493975903614) internal successors, (111), 83 states have internal predecessors, (111), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:58,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 115 transitions. [2022-04-27 21:56:58,036 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 115 transitions. Word has length 26 [2022-04-27 21:56:58,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:58,036 INFO L495 AbstractCegarLoop]: Abstraction has 88 states and 115 transitions. [2022-04-27 21:56:58,036 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 1.303030303030303) internal successors, (43), 32 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:58,036 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 115 transitions. [2022-04-27 21:56:58,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 21:56:58,037 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:58,037 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:58,067 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-04-27 21:56:58,251 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:58,251 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:58,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:58,252 INFO L85 PathProgramCache]: Analyzing trace with hash 1693111883, now seen corresponding path program 16 times [2022-04-27 21:56:58,252 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:58,252 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145825310] [2022-04-27 21:56:58,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:58,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:58,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:58,884 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:58,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:58,891 INFO L290 TraceCheckUtils]: 0: Hoare triple {9419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-27 21:56:58,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:58,891 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:58,892 INFO L272 TraceCheckUtils]: 0: Hoare triple {9396#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:58,892 INFO L290 TraceCheckUtils]: 1: Hoare triple {9419#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-27 21:56:58,892 INFO L290 TraceCheckUtils]: 2: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:58,892 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:58,892 INFO L272 TraceCheckUtils]: 4: Hoare triple {9396#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:58,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {9396#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:56:58,893 INFO L290 TraceCheckUtils]: 6: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9402#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:56:58,894 INFO L290 TraceCheckUtils]: 7: Hoare triple {9402#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9403#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:56:58,895 INFO L290 TraceCheckUtils]: 8: Hoare triple {9403#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9404#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-27 21:56:58,896 INFO L290 TraceCheckUtils]: 9: Hoare triple {9404#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9405#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 21:56:58,896 INFO L290 TraceCheckUtils]: 10: Hoare triple {9405#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9406#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-27 21:56:58,897 INFO L290 TraceCheckUtils]: 11: Hoare triple {9406#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9407#(and (<= main_~x~0 (+ 4294967289 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-27 21:56:58,899 INFO L290 TraceCheckUtils]: 12: Hoare triple {9407#(and (<= main_~x~0 (+ 4294967289 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9408#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-27 21:56:58,899 INFO L290 TraceCheckUtils]: 13: Hoare triple {9408#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-27 21:56:58,900 INFO L290 TraceCheckUtils]: 14: Hoare triple {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-27 21:56:58,901 INFO L290 TraceCheckUtils]: 15: Hoare triple {9409#(and (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296)) main_~x~0) (<= main_~n~0 (+ 7 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9410#(and (<= (+ (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 6)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:56:58,902 INFO L290 TraceCheckUtils]: 16: Hoare triple {9410#(and (<= (+ (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 6)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9411#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ 5 main_~x~0)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0))} is VALID [2022-04-27 21:56:58,903 INFO L290 TraceCheckUtils]: 17: Hoare triple {9411#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ 5 main_~x~0)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9412#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:58,904 INFO L290 TraceCheckUtils]: 18: Hoare triple {9412#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 3) main_~x~0) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9413#(and (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 21:56:58,905 INFO L290 TraceCheckUtils]: 19: Hoare triple {9413#(and (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 4) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9414#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:56:58,906 INFO L290 TraceCheckUtils]: 20: Hoare triple {9414#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 5) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9415#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 21:56:58,908 INFO L290 TraceCheckUtils]: 21: Hoare triple {9415#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:56:58,908 INFO L290 TraceCheckUtils]: 22: Hoare triple {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:56:58,909 INFO L272 TraceCheckUtils]: 23: Hoare triple {9416#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {9417#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:56:58,909 INFO L290 TraceCheckUtils]: 24: Hoare triple {9417#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9418#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:56:58,909 INFO L290 TraceCheckUtils]: 25: Hoare triple {9418#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-27 21:56:58,909 INFO L290 TraceCheckUtils]: 26: Hoare triple {9397#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-27 21:56:58,909 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:58,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:58,910 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145825310] [2022-04-27 21:56:58,910 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [145825310] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:58,910 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1872019519] [2022-04-27 21:56:58,910 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:56:58,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:58,910 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:58,911 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:58,912 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 21:56:58,962 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:56:58,962 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:56:58,963 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 21:56:58,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:58,970 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:56:59,228 INFO L272 TraceCheckUtils]: 0: Hoare triple {9396#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {9396#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-27 21:56:59,228 INFO L290 TraceCheckUtils]: 2: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,228 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {9396#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {9396#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:56:59,229 INFO L290 TraceCheckUtils]: 6: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 21:56:59,230 INFO L290 TraceCheckUtils]: 7: Hoare triple {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 21:56:59,230 INFO L290 TraceCheckUtils]: 8: Hoare triple {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 21:56:59,231 INFO L290 TraceCheckUtils]: 9: Hoare triple {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 21:56:59,231 INFO L290 TraceCheckUtils]: 10: Hoare triple {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} is VALID [2022-04-27 21:56:59,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} is VALID [2022-04-27 21:56:59,232 INFO L290 TraceCheckUtils]: 12: Hoare triple {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} is VALID [2022-04-27 21:56:59,233 INFO L290 TraceCheckUtils]: 13: Hoare triple {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} is VALID [2022-04-27 21:56:59,233 INFO L290 TraceCheckUtils]: 14: Hoare triple {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} is VALID [2022-04-27 21:56:59,233 INFO L290 TraceCheckUtils]: 15: Hoare triple {9465#(= (+ main_~n~0 (- 3)) (+ main_~x~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} is VALID [2022-04-27 21:56:59,234 INFO L290 TraceCheckUtils]: 16: Hoare triple {9461#(= (+ main_~n~0 (- 3)) (+ main_~x~0 3))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} is VALID [2022-04-27 21:56:59,234 INFO L290 TraceCheckUtils]: 17: Hoare triple {9457#(= (+ main_~n~0 (- 3)) (+ main_~x~0 2))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 21:56:59,235 INFO L290 TraceCheckUtils]: 18: Hoare triple {9453#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 21:56:59,235 INFO L290 TraceCheckUtils]: 19: Hoare triple {9449#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 21:56:59,236 INFO L290 TraceCheckUtils]: 20: Hoare triple {9445#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 21:56:59,236 INFO L290 TraceCheckUtils]: 21: Hoare triple {9441#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:56:59,237 INFO L290 TraceCheckUtils]: 22: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 21:56:59,237 INFO L272 TraceCheckUtils]: 23: Hoare triple {9401#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:56:59,238 INFO L290 TraceCheckUtils]: 24: Hoare triple {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9503#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:56:59,238 INFO L290 TraceCheckUtils]: 25: Hoare triple {9503#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-27 21:56:59,238 INFO L290 TraceCheckUtils]: 26: Hoare triple {9397#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-27 21:56:59,238 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:59,238 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:56:59,616 INFO L290 TraceCheckUtils]: 26: Hoare triple {9397#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-27 21:56:59,616 INFO L290 TraceCheckUtils]: 25: Hoare triple {9503#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {9397#false} is VALID [2022-04-27 21:56:59,616 INFO L290 TraceCheckUtils]: 24: Hoare triple {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9503#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:56:59,617 INFO L272 TraceCheckUtils]: 23: Hoare triple {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {9499#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:56:59,617 INFO L290 TraceCheckUtils]: 22: Hoare triple {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:56:59,618 INFO L290 TraceCheckUtils]: 21: Hoare triple {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:56:59,618 INFO L290 TraceCheckUtils]: 20: Hoare triple {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:56:59,619 INFO L290 TraceCheckUtils]: 19: Hoare triple {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:56:59,620 INFO L290 TraceCheckUtils]: 18: Hoare triple {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:56:59,621 INFO L290 TraceCheckUtils]: 17: Hoare triple {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:56:59,621 INFO L290 TraceCheckUtils]: 16: Hoare triple {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:56:59,622 INFO L290 TraceCheckUtils]: 15: Hoare triple {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 21:56:59,622 INFO L290 TraceCheckUtils]: 14: Hoare triple {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 21:56:59,623 INFO L290 TraceCheckUtils]: 13: Hoare triple {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 21:56:59,623 INFO L290 TraceCheckUtils]: 12: Hoare triple {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9550#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 21:56:59,624 INFO L290 TraceCheckUtils]: 11: Hoare triple {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9546#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 21:56:59,625 INFO L290 TraceCheckUtils]: 10: Hoare triple {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9542#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 21:56:59,625 INFO L290 TraceCheckUtils]: 9: Hoare triple {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9538#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 21:56:59,626 INFO L290 TraceCheckUtils]: 8: Hoare triple {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9534#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 21:56:59,627 INFO L290 TraceCheckUtils]: 7: Hoare triple {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9530#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 21:56:59,627 INFO L290 TraceCheckUtils]: 6: Hoare triple {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9526#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 21:56:59,628 INFO L290 TraceCheckUtils]: 5: Hoare triple {9396#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9519#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 21:56:59,628 INFO L272 TraceCheckUtils]: 4: Hoare triple {9396#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,628 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9396#true} {9396#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,628 INFO L290 TraceCheckUtils]: 2: Hoare triple {9396#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,628 INFO L290 TraceCheckUtils]: 1: Hoare triple {9396#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9396#true} is VALID [2022-04-27 21:56:59,628 INFO L272 TraceCheckUtils]: 0: Hoare triple {9396#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9396#true} is VALID [2022-04-27 21:56:59,628 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:59,628 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1872019519] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:56:59,629 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:56:59,629 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 12, 12] total 38 [2022-04-27 21:56:59,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581753769] [2022-04-27 21:56:59,629 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:56:59,629 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:56:59,629 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:59,629 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:59,691 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:59,691 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 21:56:59,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:59,692 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 21:56:59,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=1286, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 21:56:59,692 INFO L87 Difference]: Start difference. First operand 88 states and 115 transitions. Second operand has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:02,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:02,834 INFO L93 Difference]: Finished difference Result 100 states and 127 transitions. [2022-04-27 21:57:02,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-27 21:57:02,834 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:57:02,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:57:02,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:02,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 46 transitions. [2022-04-27 21:57:02,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:02,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 46 transitions. [2022-04-27 21:57:02,836 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 46 transitions. [2022-04-27 21:57:02,889 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:02,891 INFO L225 Difference]: With dead ends: 100 [2022-04-27 21:57:02,891 INFO L226 Difference]: Without dead ends: 95 [2022-04-27 21:57:02,892 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 33 SyntacticMatches, 6 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 671 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=237, Invalid=2733, Unknown=0, NotChecked=0, Total=2970 [2022-04-27 21:57:02,893 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 660 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 683 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 660 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-27 21:57:02,893 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 119 Invalid, 683 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 660 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-27 21:57:02,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2022-04-27 21:57:03,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 82. [2022-04-27 21:57:03,752 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:57:03,752 INFO L82 GeneralOperation]: Start isEquivalent. First operand 95 states. Second operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:03,752 INFO L74 IsIncluded]: Start isIncluded. First operand 95 states. Second operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:03,752 INFO L87 Difference]: Start difference. First operand 95 states. Second operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:03,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:03,754 INFO L93 Difference]: Finished difference Result 95 states and 122 transitions. [2022-04-27 21:57:03,754 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 122 transitions. [2022-04-27 21:57:03,754 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:03,754 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:03,754 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-27 21:57:03,754 INFO L87 Difference]: Start difference. First operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 95 states. [2022-04-27 21:57:03,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:03,755 INFO L93 Difference]: Finished difference Result 95 states and 122 transitions. [2022-04-27 21:57:03,755 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 122 transitions. [2022-04-27 21:57:03,755 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:03,756 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:03,756 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:57:03,756 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:57:03,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.3636363636363635) internal successors, (105), 77 states have internal predecessors, (105), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:03,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 109 transitions. [2022-04-27 21:57:03,757 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 109 transitions. Word has length 27 [2022-04-27 21:57:03,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:57:03,757 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 109 transitions. [2022-04-27 21:57:03,757 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.605263157894737) internal successors, (61), 35 states have internal predecessors, (61), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:03,758 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 109 transitions. [2022-04-27 21:57:03,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 21:57:03,758 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:57:03,758 INFO L195 NwaCegarLoop]: trace histogram [9, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:57:03,784 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-27 21:57:03,958 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:03,959 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:57:03,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:57:03,959 INFO L85 PathProgramCache]: Analyzing trace with hash 1931429451, now seen corresponding path program 17 times [2022-04-27 21:57:03,959 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:57:03,959 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844752436] [2022-04-27 21:57:03,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:57:03,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:57:03,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:04,189 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:57:04,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:04,192 INFO L290 TraceCheckUtils]: 0: Hoare triple {10170#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-27 21:57:04,192 INFO L290 TraceCheckUtils]: 1: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,192 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,193 INFO L272 TraceCheckUtils]: 0: Hoare triple {10149#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10170#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:57:04,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {10170#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-27 21:57:04,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,193 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,193 INFO L272 TraceCheckUtils]: 4: Hoare triple {10149#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,193 INFO L290 TraceCheckUtils]: 5: Hoare triple {10149#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10154#(= main_~y~0 0)} is VALID [2022-04-27 21:57:04,194 INFO L290 TraceCheckUtils]: 6: Hoare triple {10154#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:04,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:04,195 INFO L290 TraceCheckUtils]: 8: Hoare triple {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:04,195 INFO L290 TraceCheckUtils]: 9: Hoare triple {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:04,196 INFO L290 TraceCheckUtils]: 10: Hoare triple {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:57:04,196 INFO L290 TraceCheckUtils]: 11: Hoare triple {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:57:04,197 INFO L290 TraceCheckUtils]: 12: Hoare triple {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:57:04,197 INFO L290 TraceCheckUtils]: 13: Hoare triple {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 21:57:04,198 INFO L290 TraceCheckUtils]: 14: Hoare triple {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:57:04,198 INFO L290 TraceCheckUtils]: 15: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:57:04,199 INFO L290 TraceCheckUtils]: 16: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 21:57:04,199 INFO L290 TraceCheckUtils]: 17: Hoare triple {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 21:57:04,200 INFO L290 TraceCheckUtils]: 18: Hoare triple {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 21:57:04,200 INFO L290 TraceCheckUtils]: 19: Hoare triple {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:57:04,201 INFO L290 TraceCheckUtils]: 20: Hoare triple {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:57:04,201 INFO L290 TraceCheckUtils]: 21: Hoare triple {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10169#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:57:04,202 INFO L290 TraceCheckUtils]: 22: Hoare triple {10169#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:04,202 INFO L272 TraceCheckUtils]: 23: Hoare triple {10150#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10150#false} is VALID [2022-04-27 21:57:04,202 INFO L290 TraceCheckUtils]: 24: Hoare triple {10150#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10150#false} is VALID [2022-04-27 21:57:04,202 INFO L290 TraceCheckUtils]: 25: Hoare triple {10150#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:04,202 INFO L290 TraceCheckUtils]: 26: Hoare triple {10150#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:04,202 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:04,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:57:04,202 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844752436] [2022-04-27 21:57:04,202 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1844752436] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:57:04,202 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [664253770] [2022-04-27 21:57:04,202 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:57:04,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:04,203 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:57:04,203 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:57:04,205 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 21:57:04,383 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2022-04-27 21:57:04,383 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:57:04,384 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 33 conjunts are in the unsatisfiable core [2022-04-27 21:57:04,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:04,392 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:57:04,668 INFO L272 TraceCheckUtils]: 0: Hoare triple {10149#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {10149#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-27 21:57:04,668 INFO L290 TraceCheckUtils]: 2: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,668 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,668 INFO L272 TraceCheckUtils]: 4: Hoare triple {10149#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:04,668 INFO L290 TraceCheckUtils]: 5: Hoare triple {10149#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10154#(= main_~y~0 0)} is VALID [2022-04-27 21:57:04,669 INFO L290 TraceCheckUtils]: 6: Hoare triple {10154#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:04,669 INFO L290 TraceCheckUtils]: 7: Hoare triple {10155#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:04,670 INFO L290 TraceCheckUtils]: 8: Hoare triple {10156#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:04,670 INFO L290 TraceCheckUtils]: 9: Hoare triple {10157#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:04,671 INFO L290 TraceCheckUtils]: 10: Hoare triple {10158#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:57:04,671 INFO L290 TraceCheckUtils]: 11: Hoare triple {10159#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:57:04,672 INFO L290 TraceCheckUtils]: 12: Hoare triple {10160#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:57:04,672 INFO L290 TraceCheckUtils]: 13: Hoare triple {10161#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 21:57:04,673 INFO L290 TraceCheckUtils]: 14: Hoare triple {10162#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:57:04,673 INFO L290 TraceCheckUtils]: 15: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:57:04,674 INFO L290 TraceCheckUtils]: 16: Hoare triple {10163#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 21:57:04,674 INFO L290 TraceCheckUtils]: 17: Hoare triple {10164#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 21:57:04,675 INFO L290 TraceCheckUtils]: 18: Hoare triple {10165#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 21:57:04,675 INFO L290 TraceCheckUtils]: 19: Hoare triple {10166#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:57:04,676 INFO L290 TraceCheckUtils]: 20: Hoare triple {10167#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:57:04,676 INFO L290 TraceCheckUtils]: 21: Hoare triple {10168#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10237#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:57:04,677 INFO L290 TraceCheckUtils]: 22: Hoare triple {10237#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:04,677 INFO L272 TraceCheckUtils]: 23: Hoare triple {10150#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10150#false} is VALID [2022-04-27 21:57:04,677 INFO L290 TraceCheckUtils]: 24: Hoare triple {10150#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10150#false} is VALID [2022-04-27 21:57:04,677 INFO L290 TraceCheckUtils]: 25: Hoare triple {10150#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:04,677 INFO L290 TraceCheckUtils]: 26: Hoare triple {10150#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:04,677 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:04,677 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:57:05,086 INFO L290 TraceCheckUtils]: 26: Hoare triple {10150#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:05,086 INFO L290 TraceCheckUtils]: 25: Hoare triple {10150#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:05,087 INFO L290 TraceCheckUtils]: 24: Hoare triple {10150#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10150#false} is VALID [2022-04-27 21:57:05,087 INFO L272 TraceCheckUtils]: 23: Hoare triple {10150#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10150#false} is VALID [2022-04-27 21:57:05,087 INFO L290 TraceCheckUtils]: 22: Hoare triple {10265#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {10150#false} is VALID [2022-04-27 21:57:05,088 INFO L290 TraceCheckUtils]: 21: Hoare triple {10269#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10265#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:57:05,089 INFO L290 TraceCheckUtils]: 20: Hoare triple {10273#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10269#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:57:05,090 INFO L290 TraceCheckUtils]: 19: Hoare triple {10277#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10273#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:57:05,091 INFO L290 TraceCheckUtils]: 18: Hoare triple {10281#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10277#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 21:57:05,091 INFO L290 TraceCheckUtils]: 17: Hoare triple {10285#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10281#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 21:57:05,092 INFO L290 TraceCheckUtils]: 16: Hoare triple {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10285#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 21:57:05,092 INFO L290 TraceCheckUtils]: 15: Hoare triple {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 21:57:05,093 INFO L290 TraceCheckUtils]: 14: Hoare triple {10296#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10289#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 21:57:05,094 INFO L290 TraceCheckUtils]: 13: Hoare triple {10300#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10296#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 21:57:05,095 INFO L290 TraceCheckUtils]: 12: Hoare triple {10304#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10300#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:57:05,095 INFO L290 TraceCheckUtils]: 11: Hoare triple {10308#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10304#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:57:05,096 INFO L290 TraceCheckUtils]: 10: Hoare triple {10312#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10308#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:57:05,097 INFO L290 TraceCheckUtils]: 9: Hoare triple {10316#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10312#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:57:05,098 INFO L290 TraceCheckUtils]: 8: Hoare triple {10320#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10316#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:57:05,099 INFO L290 TraceCheckUtils]: 7: Hoare triple {10324#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10320#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:57:05,100 INFO L290 TraceCheckUtils]: 6: Hoare triple {10328#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10324#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:57:05,100 INFO L290 TraceCheckUtils]: 5: Hoare triple {10149#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10328#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 21:57:05,100 INFO L272 TraceCheckUtils]: 4: Hoare triple {10149#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:05,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10149#true} {10149#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:05,101 INFO L290 TraceCheckUtils]: 2: Hoare triple {10149#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:05,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {10149#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10149#true} is VALID [2022-04-27 21:57:05,101 INFO L272 TraceCheckUtils]: 0: Hoare triple {10149#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10149#true} is VALID [2022-04-27 21:57:05,101 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:05,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [664253770] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:57:05,101 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:57:05,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 18, 18] total 36 [2022-04-27 21:57:05,102 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156970225] [2022-04-27 21:57:05,102 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:57:05,102 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:57:05,102 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:57:05,103 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:05,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:05,137 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-27 21:57:05,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:57:05,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-27 21:57:05,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=1053, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 21:57:05,138 INFO L87 Difference]: Start difference. First operand 82 states and 109 transitions. Second operand has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:27,824 WARN L232 SmtUtils]: Spent 5.28s on a formula simplification that was a NOOP. DAG size: 63 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:58:35,802 WARN L232 SmtUtils]: Spent 5.26s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 21:58:56,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:56,817 INFO L93 Difference]: Finished difference Result 197 states and 273 transitions. [2022-04-27 21:58:56,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 139 states. [2022-04-27 21:58:56,818 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:58:56,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:58:56,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:56,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 250 transitions. [2022-04-27 21:58:56,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:56,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 250 transitions. [2022-04-27 21:58:56,824 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 139 states and 250 transitions. [2022-04-27 21:58:57,729 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 250 edges. 250 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:58:57,732 INFO L225 Difference]: With dead ends: 197 [2022-04-27 21:58:57,732 INFO L226 Difference]: Without dead ends: 192 [2022-04-27 21:58:57,734 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 170 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10110 ImplicationChecksByTransitivity, 103.8s TimeCoverageRelationStatistics Valid=6000, Invalid=23412, Unknown=0, NotChecked=0, Total=29412 [2022-04-27 21:58:57,735 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 405 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 783 mSolverCounterSat, 839 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 405 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 1622 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 839 IncrementalHoareTripleChecker+Valid, 783 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:58:57,735 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [405 Valid, 106 Invalid, 1622 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [839 Valid, 783 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2022-04-27 21:58:57,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2022-04-27 21:58:58,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 91. [2022-04-27 21:58:58,929 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:58:58,929 INFO L82 GeneralOperation]: Start isEquivalent. First operand 192 states. Second operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,930 INFO L74 IsIncluded]: Start isIncluded. First operand 192 states. Second operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,930 INFO L87 Difference]: Start difference. First operand 192 states. Second operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:58,932 INFO L93 Difference]: Finished difference Result 192 states and 242 transitions. [2022-04-27 21:58:58,933 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 242 transitions. [2022-04-27 21:58:58,933 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:58:58,933 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:58:58,933 INFO L74 IsIncluded]: Start isIncluded. First operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 192 states. [2022-04-27 21:58:58,933 INFO L87 Difference]: Start difference. First operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 192 states. [2022-04-27 21:58:58,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:58,936 INFO L93 Difference]: Finished difference Result 192 states and 242 transitions. [2022-04-27 21:58:58,936 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 242 transitions. [2022-04-27 21:58:58,936 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:58:58,936 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:58:58,936 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:58:58,936 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:58:58,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 86 states have (on average 1.372093023255814) internal successors, (118), 86 states have internal predecessors, (118), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 122 transitions. [2022-04-27 21:58:58,938 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 122 transitions. Word has length 27 [2022-04-27 21:58:58,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:58:58,938 INFO L495 AbstractCegarLoop]: Abstraction has 91 states and 122 transitions. [2022-04-27 21:58:58,938 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.2222222222222223) internal successors, (44), 35 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,938 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 122 transitions. [2022-04-27 21:58:58,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 21:58:58,938 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:58:58,938 INFO L195 NwaCegarLoop]: trace histogram [9, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:58:58,943 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 21:58:59,143 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:58:59,144 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:58:59,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:58:59,144 INFO L85 PathProgramCache]: Analyzing trace with hash -1312423940, now seen corresponding path program 18 times [2022-04-27 21:58:59,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:58:59,144 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333685932] [2022-04-27 21:58:59,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:58:59,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:58:59,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:59,344 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:58:59,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:59,348 INFO L290 TraceCheckUtils]: 0: Hoare triple {11558#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-27 21:58:59,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,349 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,349 INFO L272 TraceCheckUtils]: 0: Hoare triple {11539#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11558#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:58:59,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {11558#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-27 21:58:59,349 INFO L290 TraceCheckUtils]: 2: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,349 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,349 INFO L272 TraceCheckUtils]: 4: Hoare triple {11539#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,350 INFO L290 TraceCheckUtils]: 5: Hoare triple {11539#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11544#(= main_~y~0 0)} is VALID [2022-04-27 21:58:59,350 INFO L290 TraceCheckUtils]: 6: Hoare triple {11544#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:58:59,351 INFO L290 TraceCheckUtils]: 7: Hoare triple {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:58:59,351 INFO L290 TraceCheckUtils]: 8: Hoare triple {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:58:59,352 INFO L290 TraceCheckUtils]: 9: Hoare triple {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:58:59,352 INFO L290 TraceCheckUtils]: 10: Hoare triple {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:58:59,353 INFO L290 TraceCheckUtils]: 11: Hoare triple {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:59,353 INFO L290 TraceCheckUtils]: 12: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:59,353 INFO L290 TraceCheckUtils]: 13: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:58:59,354 INFO L290 TraceCheckUtils]: 14: Hoare triple {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:58:59,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:58:59,355 INFO L290 TraceCheckUtils]: 16: Hoare triple {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:58:59,356 INFO L290 TraceCheckUtils]: 17: Hoare triple {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:58:59,356 INFO L290 TraceCheckUtils]: 18: Hoare triple {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:58:59,357 INFO L290 TraceCheckUtils]: 19: Hoare triple {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:58:59,357 INFO L290 TraceCheckUtils]: 20: Hoare triple {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11540#false} is VALID [2022-04-27 21:58:59,357 INFO L290 TraceCheckUtils]: 21: Hoare triple {11540#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11540#false} is VALID [2022-04-27 21:58:59,357 INFO L290 TraceCheckUtils]: 22: Hoare triple {11540#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11540#false} is VALID [2022-04-27 21:58:59,357 INFO L290 TraceCheckUtils]: 23: Hoare triple {11540#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:58:59,357 INFO L272 TraceCheckUtils]: 24: Hoare triple {11540#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11540#false} is VALID [2022-04-27 21:58:59,358 INFO L290 TraceCheckUtils]: 25: Hoare triple {11540#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11540#false} is VALID [2022-04-27 21:58:59,358 INFO L290 TraceCheckUtils]: 26: Hoare triple {11540#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:58:59,358 INFO L290 TraceCheckUtils]: 27: Hoare triple {11540#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:58:59,358 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 21:58:59,358 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:58:59,358 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333685932] [2022-04-27 21:58:59,358 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1333685932] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:58:59,358 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [646980864] [2022-04-27 21:58:59,358 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:58:59,358 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:58:59,358 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:58:59,359 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:58:59,360 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 21:58:59,424 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-04-27 21:58:59,424 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:58:59,425 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-27 21:58:59,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:59,432 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:58:59,729 INFO L272 TraceCheckUtils]: 0: Hoare triple {11539#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,729 INFO L290 TraceCheckUtils]: 1: Hoare triple {11539#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-27 21:58:59,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,730 INFO L272 TraceCheckUtils]: 4: Hoare triple {11539#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:58:59,730 INFO L290 TraceCheckUtils]: 5: Hoare triple {11539#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11544#(= main_~y~0 0)} is VALID [2022-04-27 21:58:59,730 INFO L290 TraceCheckUtils]: 6: Hoare triple {11544#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:58:59,731 INFO L290 TraceCheckUtils]: 7: Hoare triple {11545#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:58:59,731 INFO L290 TraceCheckUtils]: 8: Hoare triple {11546#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:58:59,732 INFO L290 TraceCheckUtils]: 9: Hoare triple {11547#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:58:59,732 INFO L290 TraceCheckUtils]: 10: Hoare triple {11548#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:58:59,733 INFO L290 TraceCheckUtils]: 11: Hoare triple {11549#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:59,733 INFO L290 TraceCheckUtils]: 12: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:59,734 INFO L290 TraceCheckUtils]: 13: Hoare triple {11550#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:58:59,734 INFO L290 TraceCheckUtils]: 14: Hoare triple {11551#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:58:59,735 INFO L290 TraceCheckUtils]: 15: Hoare triple {11552#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:58:59,735 INFO L290 TraceCheckUtils]: 16: Hoare triple {11553#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:58:59,736 INFO L290 TraceCheckUtils]: 17: Hoare triple {11554#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:58:59,736 INFO L290 TraceCheckUtils]: 18: Hoare triple {11555#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:58:59,737 INFO L290 TraceCheckUtils]: 19: Hoare triple {11556#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 21:58:59,737 INFO L290 TraceCheckUtils]: 20: Hoare triple {11557#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11622#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:58:59,738 INFO L290 TraceCheckUtils]: 21: Hoare triple {11622#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11626#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} is VALID [2022-04-27 21:58:59,738 INFO L290 TraceCheckUtils]: 22: Hoare triple {11626#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11630#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} is VALID [2022-04-27 21:58:59,739 INFO L290 TraceCheckUtils]: 23: Hoare triple {11630#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:58:59,739 INFO L272 TraceCheckUtils]: 24: Hoare triple {11540#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11540#false} is VALID [2022-04-27 21:58:59,739 INFO L290 TraceCheckUtils]: 25: Hoare triple {11540#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11540#false} is VALID [2022-04-27 21:58:59,739 INFO L290 TraceCheckUtils]: 26: Hoare triple {11540#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:58:59,739 INFO L290 TraceCheckUtils]: 27: Hoare triple {11540#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:58:59,739 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:58:59,739 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:59:00,206 INFO L290 TraceCheckUtils]: 27: Hoare triple {11540#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:59:00,206 INFO L290 TraceCheckUtils]: 26: Hoare triple {11540#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:59:00,206 INFO L290 TraceCheckUtils]: 25: Hoare triple {11540#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11540#false} is VALID [2022-04-27 21:59:00,206 INFO L272 TraceCheckUtils]: 24: Hoare triple {11540#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11540#false} is VALID [2022-04-27 21:59:00,206 INFO L290 TraceCheckUtils]: 23: Hoare triple {11658#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {11540#false} is VALID [2022-04-27 21:59:00,207 INFO L290 TraceCheckUtils]: 22: Hoare triple {11662#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11658#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:59:00,208 INFO L290 TraceCheckUtils]: 21: Hoare triple {11666#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11662#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:59:00,209 INFO L290 TraceCheckUtils]: 20: Hoare triple {11670#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11666#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 21:59:00,209 INFO L290 TraceCheckUtils]: 19: Hoare triple {11674#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11670#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 21:59:00,210 INFO L290 TraceCheckUtils]: 18: Hoare triple {11678#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11674#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 21:59:00,211 INFO L290 TraceCheckUtils]: 17: Hoare triple {11682#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11678#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 21:59:00,211 INFO L290 TraceCheckUtils]: 16: Hoare triple {11686#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11682#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-27 21:59:00,212 INFO L290 TraceCheckUtils]: 15: Hoare triple {11690#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11686#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-27 21:59:00,213 INFO L290 TraceCheckUtils]: 14: Hoare triple {11694#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11690#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-27 21:59:00,213 INFO L290 TraceCheckUtils]: 13: Hoare triple {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11694#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} is VALID [2022-04-27 21:59:00,213 INFO L290 TraceCheckUtils]: 12: Hoare triple {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-27 21:59:00,214 INFO L290 TraceCheckUtils]: 11: Hoare triple {11705#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11698#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-27 21:59:00,215 INFO L290 TraceCheckUtils]: 10: Hoare triple {11709#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11705#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 21:59:00,215 INFO L290 TraceCheckUtils]: 9: Hoare triple {11713#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11709#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 21:59:00,216 INFO L290 TraceCheckUtils]: 8: Hoare triple {11717#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11713#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 21:59:00,217 INFO L290 TraceCheckUtils]: 7: Hoare triple {11721#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11717#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 21:59:00,217 INFO L290 TraceCheckUtils]: 6: Hoare triple {11725#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11721#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 21:59:00,218 INFO L290 TraceCheckUtils]: 5: Hoare triple {11539#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11725#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 21:59:00,218 INFO L272 TraceCheckUtils]: 4: Hoare triple {11539#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:59:00,218 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11539#true} {11539#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:59:00,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {11539#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:59:00,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {11539#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11539#true} is VALID [2022-04-27 21:59:00,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {11539#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11539#true} is VALID [2022-04-27 21:59:00,218 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:59:00,219 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [646980864] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:59:00,219 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:59:00,219 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19, 19] total 37 [2022-04-27 21:59:00,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923522653] [2022-04-27 21:59:00,219 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:59:00,219 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 21:59:00,219 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:59:00,220 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:59:00,262 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:59:00,262 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-27 21:59:00,262 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:59:00,262 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-27 21:59:00,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=1123, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 21:59:00,263 INFO L87 Difference]: Start difference. First operand 91 states and 122 transitions. Second operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:59:56,973 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.67s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:00:12,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:12,774 INFO L93 Difference]: Finished difference Result 176 states and 229 transitions. [2022-04-27 22:00:12,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2022-04-27 22:00:12,774 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:00:12,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:12,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:12,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2022-04-27 22:00:12,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:12,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2022-04-27 22:00:12,781 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 101 states and 162 transitions. [2022-04-27 22:00:13,294 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 162 edges. 162 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:13,296 INFO L225 Difference]: With dead ends: 176 [2022-04-27 22:00:13,296 INFO L226 Difference]: Without dead ends: 160 [2022-04-27 22:00:13,297 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4792 ImplicationChecksByTransitivity, 38.7s TimeCoverageRelationStatistics Valid=2094, Invalid=15996, Unknown=0, NotChecked=0, Total=18090 [2022-04-27 22:00:13,297 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 151 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 796 mSolverCounterSat, 413 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 16.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 1209 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 413 IncrementalHoareTripleChecker+Valid, 796 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 16.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:13,298 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 109 Invalid, 1209 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [413 Valid, 796 Invalid, 0 Unknown, 0 Unchecked, 16.4s Time] [2022-04-27 22:00:13,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2022-04-27 22:00:14,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 103. [2022-04-27 22:00:14,457 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:14,457 INFO L82 GeneralOperation]: Start isEquivalent. First operand 160 states. Second operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,457 INFO L74 IsIncluded]: Start isIncluded. First operand 160 states. Second operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,457 INFO L87 Difference]: Start difference. First operand 160 states. Second operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:14,460 INFO L93 Difference]: Finished difference Result 160 states and 205 transitions. [2022-04-27 22:00:14,460 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 205 transitions. [2022-04-27 22:00:14,461 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:14,461 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:14,461 INFO L74 IsIncluded]: Start isIncluded. First operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 160 states. [2022-04-27 22:00:14,461 INFO L87 Difference]: Start difference. First operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 160 states. [2022-04-27 22:00:14,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:14,463 INFO L93 Difference]: Finished difference Result 160 states and 205 transitions. [2022-04-27 22:00:14,463 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 205 transitions. [2022-04-27 22:00:14,464 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:14,464 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:14,464 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:14,464 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:14,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 98 states have (on average 1.316326530612245) internal successors, (129), 98 states have internal predecessors, (129), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 133 transitions. [2022-04-27 22:00:14,466 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 133 transitions. Word has length 28 [2022-04-27 22:00:14,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:14,466 INFO L495 AbstractCegarLoop]: Abstraction has 103 states and 133 transitions. [2022-04-27 22:00:14,466 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,466 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 133 transitions. [2022-04-27 22:00:14,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 22:00:14,467 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:14,467 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:14,485 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-04-27 22:00:14,682 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-27 22:00:14,683 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:14,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:14,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1865987861, now seen corresponding path program 19 times [2022-04-27 22:00:14,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:14,683 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863951004] [2022-04-27 22:00:14,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:14,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:14,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:15,291 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:15,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:15,294 INFO L290 TraceCheckUtils]: 0: Hoare triple {12804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-27 22:00:15,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,294 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,294 INFO L272 TraceCheckUtils]: 0: Hoare triple {12779#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:15,294 INFO L290 TraceCheckUtils]: 1: Hoare triple {12804#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-27 22:00:15,294 INFO L290 TraceCheckUtils]: 2: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,295 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,295 INFO L272 TraceCheckUtils]: 4: Hoare triple {12779#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,295 INFO L290 TraceCheckUtils]: 5: Hoare triple {12779#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:00:15,296 INFO L290 TraceCheckUtils]: 6: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12785#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:00:15,297 INFO L290 TraceCheckUtils]: 7: Hoare triple {12785#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12786#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:00:15,297 INFO L290 TraceCheckUtils]: 8: Hoare triple {12786#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293)) (<= main_~n~0 (+ main_~x~0 2)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12787#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-27 22:00:15,298 INFO L290 TraceCheckUtils]: 9: Hoare triple {12787#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)) (<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12788#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:00:15,299 INFO L290 TraceCheckUtils]: 10: Hoare triple {12788#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ main_~x~0 4) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12789#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} is VALID [2022-04-27 22:00:15,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {12789#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296)))))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12790#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} is VALID [2022-04-27 22:00:15,303 INFO L290 TraceCheckUtils]: 12: Hoare triple {12790#(and (<= main_~n~0 (+ 4294967295 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ main_~x~0 6) main_~n~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12791#(and (<= (+ 7 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-27 22:00:15,306 INFO L290 TraceCheckUtils]: 13: Hoare triple {12791#(and (<= (+ 7 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967288 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~n~0 (+ 7 main_~x~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12792#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 8)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:00:15,306 INFO L290 TraceCheckUtils]: 14: Hoare triple {12792#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= main_~n~0 (+ main_~x~0 8)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:00:15,307 INFO L290 TraceCheckUtils]: 15: Hoare triple {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:00:15,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {12793#(and (<= main_~n~0 (+ main_~x~0 8)) (<= main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (<= (* (div (+ 4294967303 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12794#(and (<= (+ 1 (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296))) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= main_~n~0 (+ 7 main_~x~0)))} is VALID [2022-04-27 22:00:15,309 INFO L290 TraceCheckUtils]: 17: Hoare triple {12794#(and (<= (+ 1 (* 4294967296 (div (+ 4294967302 main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296))) main_~x~0) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 1)) (<= main_~n~0 (+ 7 main_~x~0)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12795#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ 2 (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0))} is VALID [2022-04-27 22:00:15,310 INFO L290 TraceCheckUtils]: 18: Hoare triple {12795#(and (<= main_~x~0 (+ 2 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 6)) (<= (+ 2 (* (div (+ main_~x~0 4294967301 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12796#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:00:15,311 INFO L290 TraceCheckUtils]: 19: Hoare triple {12796#(and (<= main_~n~0 (+ 5 main_~x~0)) (<= main_~x~0 (+ 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967300 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12797#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 4) main_~x~0))} is VALID [2022-04-27 22:00:15,313 INFO L290 TraceCheckUtils]: 20: Hoare triple {12797#(and (<= main_~n~0 (+ main_~x~0 4)) (<= main_~x~0 (+ (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) 4) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12798#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 5) main_~x~0))} is VALID [2022-04-27 22:00:15,314 INFO L290 TraceCheckUtils]: 21: Hoare triple {12798#(and (<= main_~x~0 (+ 5 (* (div main_~n~0 4294967296) 4294967296))) (<= main_~n~0 (+ main_~x~0 3)) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 5) main_~x~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12799#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:00:15,315 INFO L290 TraceCheckUtils]: 22: Hoare triple {12799#(and (<= main_~x~0 (+ 6 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 6) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12800#(and (<= main_~x~0 (+ 7 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ 7 (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:00:15,316 INFO L290 TraceCheckUtils]: 23: Hoare triple {12800#(and (<= main_~x~0 (+ 7 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ 7 (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296)) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:00:15,317 INFO L290 TraceCheckUtils]: 24: Hoare triple {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:00:15,318 INFO L272 TraceCheckUtils]: 25: Hoare triple {12801#(and (<= (div main_~x~0 4294967296) (div main_~n~0 4294967296)) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {12802#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:00:15,318 INFO L290 TraceCheckUtils]: 26: Hoare triple {12802#(not (= |__VERIFIER_assert_#in~cond| 0))} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12803#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:00:15,318 INFO L290 TraceCheckUtils]: 27: Hoare triple {12803#(not (= __VERIFIER_assert_~cond 0))} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-27 22:00:15,319 INFO L290 TraceCheckUtils]: 28: Hoare triple {12780#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-27 22:00:15,319 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:15,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:15,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863951004] [2022-04-27 22:00:15,319 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [863951004] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:15,319 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [941008201] [2022-04-27 22:00:15,319 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:00:15,319 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:15,319 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:15,320 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:15,321 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 22:00:15,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:15,360 INFO L263 TraceCheckSpWp]: Trace formula consists of 138 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-27 22:00:15,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:15,367 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:15,730 INFO L272 TraceCheckUtils]: 0: Hoare triple {12779#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,731 INFO L290 TraceCheckUtils]: 1: Hoare triple {12779#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-27 22:00:15,731 INFO L290 TraceCheckUtils]: 2: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,731 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,731 INFO L272 TraceCheckUtils]: 4: Hoare triple {12779#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:15,744 INFO L290 TraceCheckUtils]: 5: Hoare triple {12779#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:00:15,744 INFO L290 TraceCheckUtils]: 6: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:00:15,745 INFO L290 TraceCheckUtils]: 7: Hoare triple {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} is VALID [2022-04-27 22:00:15,746 INFO L290 TraceCheckUtils]: 8: Hoare triple {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 22:00:15,746 INFO L290 TraceCheckUtils]: 9: Hoare triple {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 22:00:15,747 INFO L290 TraceCheckUtils]: 10: Hoare triple {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,747 INFO L290 TraceCheckUtils]: 11: Hoare triple {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,748 INFO L290 TraceCheckUtils]: 12: Hoare triple {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,748 INFO L290 TraceCheckUtils]: 13: Hoare triple {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,749 INFO L290 TraceCheckUtils]: 14: Hoare triple {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,749 INFO L290 TraceCheckUtils]: 15: Hoare triple {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,749 INFO L290 TraceCheckUtils]: 16: Hoare triple {12854#(= (+ main_~x~0 4) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,750 INFO L290 TraceCheckUtils]: 17: Hoare triple {12850#(= (+ main_~x~0 3) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,750 INFO L290 TraceCheckUtils]: 18: Hoare triple {12846#(= (+ main_~x~0 2) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:00:15,751 INFO L290 TraceCheckUtils]: 19: Hoare triple {12842#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 22:00:15,751 INFO L290 TraceCheckUtils]: 20: Hoare triple {12838#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 22:00:15,752 INFO L290 TraceCheckUtils]: 21: Hoare triple {12834#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} is VALID [2022-04-27 22:00:15,752 INFO L290 TraceCheckUtils]: 22: Hoare triple {12830#(= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:00:15,753 INFO L290 TraceCheckUtils]: 23: Hoare triple {12826#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:00:15,753 INFO L290 TraceCheckUtils]: 24: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:00:15,753 INFO L272 TraceCheckUtils]: 25: Hoare triple {12784#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:00:15,754 INFO L290 TraceCheckUtils]: 26: Hoare triple {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12895#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:00:15,754 INFO L290 TraceCheckUtils]: 27: Hoare triple {12895#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-27 22:00:15,754 INFO L290 TraceCheckUtils]: 28: Hoare triple {12780#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-27 22:00:15,754 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:15,754 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:00:16,221 INFO L290 TraceCheckUtils]: 28: Hoare triple {12780#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-27 22:00:16,222 INFO L290 TraceCheckUtils]: 27: Hoare triple {12895#(<= 1 __VERIFIER_assert_~cond)} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {12780#false} is VALID [2022-04-27 22:00:16,222 INFO L290 TraceCheckUtils]: 26: Hoare triple {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12895#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:00:16,222 INFO L272 TraceCheckUtils]: 25: Hoare triple {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {12891#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:00:16,223 INFO L290 TraceCheckUtils]: 24: Hoare triple {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:00:16,224 INFO L290 TraceCheckUtils]: 23: Hoare triple {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:00:16,225 INFO L290 TraceCheckUtils]: 22: Hoare triple {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:00:16,225 INFO L290 TraceCheckUtils]: 21: Hoare triple {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:00:16,226 INFO L290 TraceCheckUtils]: 20: Hoare triple {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 22:00:16,227 INFO L290 TraceCheckUtils]: 19: Hoare triple {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:00:16,228 INFO L290 TraceCheckUtils]: 18: Hoare triple {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:00:16,229 INFO L290 TraceCheckUtils]: 17: Hoare triple {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:00:16,229 INFO L290 TraceCheckUtils]: 16: Hoare triple {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:00:16,230 INFO L290 TraceCheckUtils]: 15: Hoare triple {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:00:16,230 INFO L290 TraceCheckUtils]: 14: Hoare triple {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:00:16,231 INFO L290 TraceCheckUtils]: 13: Hoare triple {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12946#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 8) 4294967296))} is VALID [2022-04-27 22:00:16,231 INFO L290 TraceCheckUtils]: 12: Hoare triple {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12942#(= (mod main_~n~0 4294967296) (mod (+ 7 main_~x~0) 4294967296))} is VALID [2022-04-27 22:00:16,232 INFO L290 TraceCheckUtils]: 11: Hoare triple {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12938#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 6) 4294967296))} is VALID [2022-04-27 22:00:16,233 INFO L290 TraceCheckUtils]: 10: Hoare triple {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12934#(= (mod main_~n~0 4294967296) (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:00:16,234 INFO L290 TraceCheckUtils]: 9: Hoare triple {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12930#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:00:16,235 INFO L290 TraceCheckUtils]: 8: Hoare triple {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12926#(= (mod (+ main_~x~0 3) 4294967296) (mod main_~n~0 4294967296))} is VALID [2022-04-27 22:00:16,235 INFO L290 TraceCheckUtils]: 7: Hoare triple {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12922#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:00:16,236 INFO L290 TraceCheckUtils]: 6: Hoare triple {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12918#(= (mod main_~n~0 4294967296) (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:00:16,237 INFO L290 TraceCheckUtils]: 5: Hoare triple {12779#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12911#(= (mod main_~n~0 4294967296) (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:00:16,237 INFO L272 TraceCheckUtils]: 4: Hoare triple {12779#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:16,237 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12779#true} {12779#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:16,237 INFO L290 TraceCheckUtils]: 2: Hoare triple {12779#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:16,237 INFO L290 TraceCheckUtils]: 1: Hoare triple {12779#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12779#true} is VALID [2022-04-27 22:00:16,237 INFO L272 TraceCheckUtils]: 0: Hoare triple {12779#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12779#true} is VALID [2022-04-27 22:00:16,237 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:16,237 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [941008201] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:00:16,237 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:00:16,237 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 13, 13] total 42 [2022-04-27 22:00:16,238 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642989630] [2022-04-27 22:00:16,238 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:00:16,238 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:00:16,238 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:16,238 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:16,313 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 74 edges. 74 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:16,313 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-27 22:00:16,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:16,313 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-27 22:00:16,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1588, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:00:16,314 INFO L87 Difference]: Start difference. First operand 103 states and 133 transitions. Second operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:21,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:21,042 INFO L93 Difference]: Finished difference Result 126 states and 156 transitions. [2022-04-27 22:00:21,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-27 22:00:21,043 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:00:21,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:21,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:21,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 49 transitions. [2022-04-27 22:00:21,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:21,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 49 transitions. [2022-04-27 22:00:21,044 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 49 transitions. [2022-04-27 22:00:21,093 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:21,097 INFO L225 Difference]: With dead ends: 126 [2022-04-27 22:00:21,098 INFO L226 Difference]: Without dead ends: 121 [2022-04-27 22:00:21,105 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 34 SyntacticMatches, 7 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 849 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=265, Invalid=3395, Unknown=0, NotChecked=0, Total=3660 [2022-04-27 22:00:21,105 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 23 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 124 SdHoareTripleChecker+Invalid, 782 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:21,113 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 124 Invalid, 782 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-04-27 22:00:21,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2022-04-27 22:00:22,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 104. [2022-04-27 22:00:22,838 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:22,839 INFO L82 GeneralOperation]: Start isEquivalent. First operand 121 states. Second operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:22,839 INFO L74 IsIncluded]: Start isIncluded. First operand 121 states. Second operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:22,839 INFO L87 Difference]: Start difference. First operand 121 states. Second operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:22,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:22,840 INFO L93 Difference]: Finished difference Result 121 states and 151 transitions. [2022-04-27 22:00:22,840 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 151 transitions. [2022-04-27 22:00:22,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:22,840 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:22,840 INFO L74 IsIncluded]: Start isIncluded. First operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-27 22:00:22,841 INFO L87 Difference]: Start difference. First operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 121 states. [2022-04-27 22:00:22,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:22,842 INFO L93 Difference]: Finished difference Result 121 states and 151 transitions. [2022-04-27 22:00:22,842 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 151 transitions. [2022-04-27 22:00:22,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:22,842 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:22,842 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:22,842 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:22,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 99 states have (on average 1.3131313131313131) internal successors, (130), 99 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:22,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 134 transitions. [2022-04-27 22:00:22,843 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 134 transitions. Word has length 29 [2022-04-27 22:00:22,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:22,843 INFO L495 AbstractCegarLoop]: Abstraction has 104 states and 134 transitions. [2022-04-27 22:00:22,843 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 39 states have internal predecessors, (67), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:22,844 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 134 transitions. [2022-04-27 22:00:22,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 22:00:22,850 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:22,850 INFO L195 NwaCegarLoop]: trace histogram [10, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:22,867 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-27 22:00:23,066 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-27 22:00:23,066 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:23,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:23,066 INFO L85 PathProgramCache]: Analyzing trace with hash 163949148, now seen corresponding path program 20 times [2022-04-27 22:00:23,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:23,066 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636520068] [2022-04-27 22:00:23,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:23,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:23,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:23,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:23,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:23,316 INFO L290 TraceCheckUtils]: 0: Hoare triple {13718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-27 22:00:23,316 INFO L290 TraceCheckUtils]: 1: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,316 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,317 INFO L272 TraceCheckUtils]: 0: Hoare triple {13697#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:23,317 INFO L290 TraceCheckUtils]: 1: Hoare triple {13718#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-27 22:00:23,317 INFO L290 TraceCheckUtils]: 2: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,317 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,317 INFO L272 TraceCheckUtils]: 4: Hoare triple {13697#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,317 INFO L290 TraceCheckUtils]: 5: Hoare triple {13697#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13702#(= main_~y~0 0)} is VALID [2022-04-27 22:00:23,318 INFO L290 TraceCheckUtils]: 6: Hoare triple {13702#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:23,318 INFO L290 TraceCheckUtils]: 7: Hoare triple {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:00:23,319 INFO L290 TraceCheckUtils]: 8: Hoare triple {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:00:23,319 INFO L290 TraceCheckUtils]: 9: Hoare triple {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:00:23,320 INFO L290 TraceCheckUtils]: 10: Hoare triple {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:23,320 INFO L290 TraceCheckUtils]: 11: Hoare triple {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:00:23,321 INFO L290 TraceCheckUtils]: 12: Hoare triple {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:00:23,321 INFO L290 TraceCheckUtils]: 13: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:00:23,322 INFO L290 TraceCheckUtils]: 14: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:00:23,322 INFO L290 TraceCheckUtils]: 15: Hoare triple {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:00:23,323 INFO L290 TraceCheckUtils]: 16: Hoare triple {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:00:23,323 INFO L290 TraceCheckUtils]: 17: Hoare triple {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:00:23,324 INFO L290 TraceCheckUtils]: 18: Hoare triple {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:00:23,324 INFO L290 TraceCheckUtils]: 19: Hoare triple {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:00:23,325 INFO L290 TraceCheckUtils]: 20: Hoare triple {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:00:23,325 INFO L290 TraceCheckUtils]: 21: Hoare triple {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 22: Hoare triple {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 23: Hoare triple {13698#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 24: Hoare triple {13698#false} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 25: Hoare triple {13698#false} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L272 TraceCheckUtils]: 26: Hoare triple {13698#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 27: Hoare triple {13698#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 28: Hoare triple {13698#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L290 TraceCheckUtils]: 29: Hoare triple {13698#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:23,326 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:00:23,327 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:23,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [636520068] [2022-04-27 22:00:23,327 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [636520068] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:23,327 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [361133972] [2022-04-27 22:00:23,327 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:00:23,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:23,327 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:23,340 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:23,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 22:00:23,466 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:00:23,466 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:00:23,467 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-27 22:00:23,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:23,474 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:23,775 INFO L272 TraceCheckUtils]: 0: Hoare triple {13697#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,775 INFO L290 TraceCheckUtils]: 1: Hoare triple {13697#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-27 22:00:23,775 INFO L290 TraceCheckUtils]: 2: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,775 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,775 INFO L272 TraceCheckUtils]: 4: Hoare triple {13697#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:23,776 INFO L290 TraceCheckUtils]: 5: Hoare triple {13697#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13702#(= main_~y~0 0)} is VALID [2022-04-27 22:00:23,776 INFO L290 TraceCheckUtils]: 6: Hoare triple {13702#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:23,777 INFO L290 TraceCheckUtils]: 7: Hoare triple {13703#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:00:23,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {13704#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:00:23,778 INFO L290 TraceCheckUtils]: 9: Hoare triple {13705#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:00:23,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {13706#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:23,779 INFO L290 TraceCheckUtils]: 11: Hoare triple {13707#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:00:23,779 INFO L290 TraceCheckUtils]: 12: Hoare triple {13708#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:00:23,780 INFO L290 TraceCheckUtils]: 13: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:00:23,780 INFO L290 TraceCheckUtils]: 14: Hoare triple {13709#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:00:23,780 INFO L290 TraceCheckUtils]: 15: Hoare triple {13710#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:00:23,781 INFO L290 TraceCheckUtils]: 16: Hoare triple {13711#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:00:23,781 INFO L290 TraceCheckUtils]: 17: Hoare triple {13712#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:00:23,782 INFO L290 TraceCheckUtils]: 18: Hoare triple {13713#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:00:23,783 INFO L290 TraceCheckUtils]: 19: Hoare triple {13714#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:00:23,783 INFO L290 TraceCheckUtils]: 20: Hoare triple {13715#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:00:23,784 INFO L290 TraceCheckUtils]: 21: Hoare triple {13716#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:00:23,784 INFO L290 TraceCheckUtils]: 22: Hoare triple {13717#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13788#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:00:23,785 INFO L290 TraceCheckUtils]: 23: Hoare triple {13788#(and (<= (+ main_~z~0 1) 0) (<= 0 (+ main_~z~0 1)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13792#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} is VALID [2022-04-27 22:00:23,785 INFO L290 TraceCheckUtils]: 24: Hoare triple {13792#(and (<= (+ main_~z~0 2) 0) (<= 0 (+ main_~z~0 2)))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13796#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} is VALID [2022-04-27 22:00:23,786 INFO L290 TraceCheckUtils]: 25: Hoare triple {13796#(and (<= 0 (+ main_~z~0 3)) (<= (+ main_~z~0 3) 0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:23,786 INFO L272 TraceCheckUtils]: 26: Hoare triple {13698#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13698#false} is VALID [2022-04-27 22:00:23,786 INFO L290 TraceCheckUtils]: 27: Hoare triple {13698#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13698#false} is VALID [2022-04-27 22:00:23,786 INFO L290 TraceCheckUtils]: 28: Hoare triple {13698#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:23,786 INFO L290 TraceCheckUtils]: 29: Hoare triple {13698#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:23,786 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:23,786 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:00:24,333 INFO L290 TraceCheckUtils]: 29: Hoare triple {13698#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:24,334 INFO L290 TraceCheckUtils]: 28: Hoare triple {13698#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:24,334 INFO L290 TraceCheckUtils]: 27: Hoare triple {13698#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13698#false} is VALID [2022-04-27 22:00:24,334 INFO L272 TraceCheckUtils]: 26: Hoare triple {13698#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13698#false} is VALID [2022-04-27 22:00:24,334 INFO L290 TraceCheckUtils]: 25: Hoare triple {13824#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {13698#false} is VALID [2022-04-27 22:00:24,335 INFO L290 TraceCheckUtils]: 24: Hoare triple {13828#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13824#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:00:24,335 INFO L290 TraceCheckUtils]: 23: Hoare triple {13832#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13828#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:00:24,336 INFO L290 TraceCheckUtils]: 22: Hoare triple {13836#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13832#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:00:24,337 INFO L290 TraceCheckUtils]: 21: Hoare triple {13840#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13836#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 22:00:24,337 INFO L290 TraceCheckUtils]: 20: Hoare triple {13844#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13840#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 22:00:24,338 INFO L290 TraceCheckUtils]: 19: Hoare triple {13848#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13844#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 22:00:24,339 INFO L290 TraceCheckUtils]: 18: Hoare triple {13852#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13848#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-27 22:00:24,339 INFO L290 TraceCheckUtils]: 17: Hoare triple {13856#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13852#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-27 22:00:24,340 INFO L290 TraceCheckUtils]: 16: Hoare triple {13860#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13856#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-27 22:00:24,341 INFO L290 TraceCheckUtils]: 15: Hoare triple {13864#(< 0 (mod (+ main_~z~0 4294967286) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13860#(< 0 (mod (+ main_~z~0 4294967287) 4294967296))} is VALID [2022-04-27 22:00:24,341 INFO L290 TraceCheckUtils]: 14: Hoare triple {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13864#(< 0 (mod (+ main_~z~0 4294967286) 4294967296))} is VALID [2022-04-27 22:00:24,341 INFO L290 TraceCheckUtils]: 13: Hoare triple {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} is VALID [2022-04-27 22:00:24,342 INFO L290 TraceCheckUtils]: 12: Hoare triple {13875#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13868#(< 0 (mod (+ main_~y~0 4294967286) 4294967296))} is VALID [2022-04-27 22:00:24,343 INFO L290 TraceCheckUtils]: 11: Hoare triple {13879#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13875#(< 0 (mod (+ main_~y~0 4294967287) 4294967296))} is VALID [2022-04-27 22:00:24,343 INFO L290 TraceCheckUtils]: 10: Hoare triple {13883#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13879#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 22:00:24,344 INFO L290 TraceCheckUtils]: 9: Hoare triple {13887#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13883#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 22:00:24,345 INFO L290 TraceCheckUtils]: 8: Hoare triple {13891#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13887#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:00:24,345 INFO L290 TraceCheckUtils]: 7: Hoare triple {13895#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13891#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:00:24,346 INFO L290 TraceCheckUtils]: 6: Hoare triple {13899#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13895#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:00:24,346 INFO L290 TraceCheckUtils]: 5: Hoare triple {13697#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13899#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:00:24,346 INFO L272 TraceCheckUtils]: 4: Hoare triple {13697#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:24,354 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13697#true} {13697#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:24,354 INFO L290 TraceCheckUtils]: 2: Hoare triple {13697#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:24,356 INFO L290 TraceCheckUtils]: 1: Hoare triple {13697#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13697#true} is VALID [2022-04-27 22:00:24,356 INFO L272 TraceCheckUtils]: 0: Hoare triple {13697#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13697#true} is VALID [2022-04-27 22:00:24,356 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:24,357 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [361133972] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:00:24,357 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:00:24,357 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21, 21] total 41 [2022-04-27 22:00:24,357 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671355588] [2022-04-27 22:00:24,357 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:00:24,357 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:00:24,357 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:24,357 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:24,394 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:24,394 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-04-27 22:00:24,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:24,395 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-04-27 22:00:24,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=1389, Unknown=0, NotChecked=0, Total=1640 [2022-04-27 22:00:24,395 INFO L87 Difference]: Start difference. First operand 104 states and 134 transitions. Second operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:37,942 WARN L232 SmtUtils]: Spent 6.08s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:01:59,715 WARN L232 SmtUtils]: Spent 7.56s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:02:11,446 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.03s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:02:29,339 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.47s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:02:35,584 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.74s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:02:37,252 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.43s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:03:09,738 WARN L232 SmtUtils]: Spent 5.24s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:18,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:18,896 INFO L93 Difference]: Finished difference Result 192 states and 250 transitions. [2022-04-27 22:03:18,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 123 states. [2022-04-27 22:03:18,896 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:03:18,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:18,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 194 transitions. [2022-04-27 22:03:18,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 194 transitions. [2022-04-27 22:03:18,900 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 123 states and 194 transitions. [2022-04-27 22:03:19,750 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 194 edges. 194 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:19,752 INFO L225 Difference]: With dead ends: 192 [2022-04-27 22:03:19,752 INFO L226 Difference]: Without dead ends: 175 [2022-04-27 22:03:19,753 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7207 ImplicationChecksByTransitivity, 96.2s TimeCoverageRelationStatistics Valid=2894, Invalid=22866, Unknown=0, NotChecked=0, Total=25760 [2022-04-27 22:03:19,754 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 186 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1018 mSolverCounterSat, 507 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 36.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 186 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 1525 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 507 IncrementalHoareTripleChecker+Valid, 1018 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 36.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:19,754 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [186 Valid, 131 Invalid, 1525 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [507 Valid, 1018 Invalid, 0 Unknown, 0 Unchecked, 36.4s Time] [2022-04-27 22:03:19,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2022-04-27 22:03:21,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 106. [2022-04-27 22:03:21,484 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:21,484 INFO L82 GeneralOperation]: Start isEquivalent. First operand 175 states. Second operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,484 INFO L74 IsIncluded]: Start isIncluded. First operand 175 states. Second operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,484 INFO L87 Difference]: Start difference. First operand 175 states. Second operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:21,486 INFO L93 Difference]: Finished difference Result 175 states and 223 transitions. [2022-04-27 22:03:21,486 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 223 transitions. [2022-04-27 22:03:21,486 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:21,486 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:21,487 INFO L74 IsIncluded]: Start isIncluded. First operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 175 states. [2022-04-27 22:03:21,487 INFO L87 Difference]: Start difference. First operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 175 states. [2022-04-27 22:03:21,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:21,488 INFO L93 Difference]: Finished difference Result 175 states and 223 transitions. [2022-04-27 22:03:21,488 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 223 transitions. [2022-04-27 22:03:21,489 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:21,489 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:21,489 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:21,489 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:21,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 101 states have (on average 1.297029702970297) internal successors, (131), 101 states have internal predecessors, (131), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 135 transitions. [2022-04-27 22:03:21,490 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 135 transitions. Word has length 30 [2022-04-27 22:03:21,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:21,490 INFO L495 AbstractCegarLoop]: Abstraction has 106 states and 135 transitions. [2022-04-27 22:03:21,490 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 1.2439024390243902) internal successors, (51), 40 states have internal predecessors, (51), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,490 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 135 transitions. [2022-04-27 22:03:21,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 22:03:21,491 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:21,491 INFO L195 NwaCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:21,494 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2022-04-27 22:03:21,694 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:21,694 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:21,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:21,695 INFO L85 PathProgramCache]: Analyzing trace with hash -1790751268, now seen corresponding path program 21 times [2022-04-27 22:03:21,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:21,695 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111416101] [2022-04-27 22:03:21,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:21,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:21,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:21,986 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:21,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:21,994 INFO L290 TraceCheckUtils]: 0: Hoare triple {15089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-27 22:03:21,994 INFO L290 TraceCheckUtils]: 1: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:21,994 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:21,994 INFO L272 TraceCheckUtils]: 0: Hoare triple {15065#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:21,995 INFO L290 TraceCheckUtils]: 1: Hoare triple {15089#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-27 22:03:21,995 INFO L290 TraceCheckUtils]: 2: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:21,995 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:21,995 INFO L272 TraceCheckUtils]: 4: Hoare triple {15065#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:21,995 INFO L290 TraceCheckUtils]: 5: Hoare triple {15065#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15070#(= main_~y~0 0)} is VALID [2022-04-27 22:03:21,995 INFO L290 TraceCheckUtils]: 6: Hoare triple {15070#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:21,996 INFO L290 TraceCheckUtils]: 7: Hoare triple {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:21,996 INFO L290 TraceCheckUtils]: 8: Hoare triple {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:21,997 INFO L290 TraceCheckUtils]: 9: Hoare triple {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:03:21,997 INFO L290 TraceCheckUtils]: 10: Hoare triple {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:03:21,998 INFO L290 TraceCheckUtils]: 11: Hoare triple {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:03:21,998 INFO L290 TraceCheckUtils]: 12: Hoare triple {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:03:21,999 INFO L290 TraceCheckUtils]: 13: Hoare triple {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:03:21,999 INFO L290 TraceCheckUtils]: 14: Hoare triple {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:03:21,999 INFO L290 TraceCheckUtils]: 15: Hoare triple {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:03:22,000 INFO L290 TraceCheckUtils]: 16: Hoare triple {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:03:22,000 INFO L290 TraceCheckUtils]: 17: Hoare triple {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:03:22,001 INFO L290 TraceCheckUtils]: 18: Hoare triple {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:03:22,001 INFO L290 TraceCheckUtils]: 19: Hoare triple {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:03:22,002 INFO L290 TraceCheckUtils]: 20: Hoare triple {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:03:22,002 INFO L290 TraceCheckUtils]: 21: Hoare triple {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-27 22:03:22,002 INFO L290 TraceCheckUtils]: 22: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-27 22:03:22,003 INFO L290 TraceCheckUtils]: 23: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} is VALID [2022-04-27 22:03:22,003 INFO L290 TraceCheckUtils]: 24: Hoare triple {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15088#(and (<= (div main_~z~0 4294967296) 0) (<= 15 main_~z~0))} is VALID [2022-04-27 22:03:22,003 INFO L290 TraceCheckUtils]: 25: Hoare triple {15088#(and (<= (div main_~z~0 4294967296) 0) (<= 15 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:22,004 INFO L272 TraceCheckUtils]: 26: Hoare triple {15066#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {15066#false} is VALID [2022-04-27 22:03:22,004 INFO L290 TraceCheckUtils]: 27: Hoare triple {15066#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15066#false} is VALID [2022-04-27 22:03:22,004 INFO L290 TraceCheckUtils]: 28: Hoare triple {15066#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:22,004 INFO L290 TraceCheckUtils]: 29: Hoare triple {15066#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:22,004 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:22,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:22,004 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111416101] [2022-04-27 22:03:22,004 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2111416101] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:22,004 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2052444739] [2022-04-27 22:03:22,004 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:03:22,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:22,005 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:22,005 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:22,006 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 22:03:22,237 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-27 22:03:22,237 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:22,239 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-27 22:03:22,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:22,244 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:22,508 INFO L272 TraceCheckUtils]: 0: Hoare triple {15065#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:22,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {15065#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-27 22:03:22,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:22,508 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:22,508 INFO L272 TraceCheckUtils]: 4: Hoare triple {15065#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:22,508 INFO L290 TraceCheckUtils]: 5: Hoare triple {15065#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15070#(= main_~y~0 0)} is VALID [2022-04-27 22:03:22,509 INFO L290 TraceCheckUtils]: 6: Hoare triple {15070#(= main_~y~0 0)} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:22,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {15071#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:22,510 INFO L290 TraceCheckUtils]: 8: Hoare triple {15072#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:22,510 INFO L290 TraceCheckUtils]: 9: Hoare triple {15073#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:03:22,511 INFO L290 TraceCheckUtils]: 10: Hoare triple {15074#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:03:22,511 INFO L290 TraceCheckUtils]: 11: Hoare triple {15075#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:03:22,512 INFO L290 TraceCheckUtils]: 12: Hoare triple {15076#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:03:22,512 INFO L290 TraceCheckUtils]: 13: Hoare triple {15077#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:03:22,513 INFO L290 TraceCheckUtils]: 14: Hoare triple {15078#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:03:22,514 INFO L290 TraceCheckUtils]: 15: Hoare triple {15079#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:03:22,514 INFO L290 TraceCheckUtils]: 16: Hoare triple {15080#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:03:22,515 INFO L290 TraceCheckUtils]: 17: Hoare triple {15081#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:03:22,515 INFO L290 TraceCheckUtils]: 18: Hoare triple {15082#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:03:22,516 INFO L290 TraceCheckUtils]: 19: Hoare triple {15083#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:03:22,516 INFO L290 TraceCheckUtils]: 20: Hoare triple {15084#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:03:22,517 INFO L290 TraceCheckUtils]: 21: Hoare triple {15085#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-27 22:03:22,517 INFO L290 TraceCheckUtils]: 22: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} is VALID [2022-04-27 22:03:22,517 INFO L290 TraceCheckUtils]: 23: Hoare triple {15086#(and (<= 16 main_~y~0) (<= main_~y~0 16))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} is VALID [2022-04-27 22:03:22,518 INFO L290 TraceCheckUtils]: 24: Hoare triple {15087#(and (<= 16 main_~z~0) (<= main_~z~0 16))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15165#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:03:22,518 INFO L290 TraceCheckUtils]: 25: Hoare triple {15165#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:22,518 INFO L272 TraceCheckUtils]: 26: Hoare triple {15066#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {15066#false} is VALID [2022-04-27 22:03:22,518 INFO L290 TraceCheckUtils]: 27: Hoare triple {15066#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15066#false} is VALID [2022-04-27 22:03:22,519 INFO L290 TraceCheckUtils]: 28: Hoare triple {15066#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:22,519 INFO L290 TraceCheckUtils]: 29: Hoare triple {15066#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:22,519 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:22,519 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:23,093 INFO L290 TraceCheckUtils]: 29: Hoare triple {15066#false} [72] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:23,093 INFO L290 TraceCheckUtils]: 28: Hoare triple {15066#false} [70] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:23,093 INFO L290 TraceCheckUtils]: 27: Hoare triple {15066#false} [68] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15066#false} is VALID [2022-04-27 22:03:23,093 INFO L272 TraceCheckUtils]: 26: Hoare triple {15066#false} [66] L23-3-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_8 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0)) InVars {main_~x~0=v_main_~x~0_8, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {15066#false} is VALID [2022-04-27 22:03:23,093 INFO L290 TraceCheckUtils]: 25: Hoare triple {15193#(< 0 (mod main_~z~0 4294967296))} [64] L23-2-->L23-3: Formula: (not (< 0 (mod v_main_~z~0_2 4294967296))) InVars {main_~z~0=v_main_~z~0_2} OutVars{main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[] {15066#false} is VALID [2022-04-27 22:03:23,095 INFO L290 TraceCheckUtils]: 24: Hoare triple {15197#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [65] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_4 4294967296)) (= (+ v_main_~x~0_3 1) v_main_~x~0_2) (= (+ v_main_~z~0_3 1) v_main_~z~0_4)) InVars {main_~x~0=v_main_~x~0_3, main_~z~0=v_main_~z~0_4} OutVars{main_~x~0=v_main_~x~0_2, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_3, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15193#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:03:23,096 INFO L290 TraceCheckUtils]: 23: Hoare triple {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [62] L16-3-->L23-2: Formula: (= v_main_~y~0_4 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {15197#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:23,096 INFO L290 TraceCheckUtils]: 22: Hoare triple {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [60] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4} OutVars{main_~x~0=v_main_~x~0_4} AuxVars[] AssignedVars[] {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:23,097 INFO L290 TraceCheckUtils]: 21: Hoare triple {15208#(< 0 (mod main_~y~0 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15201#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:23,097 INFO L290 TraceCheckUtils]: 20: Hoare triple {15212#(< 0 (mod (+ main_~y~0 1) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15208#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:03:23,098 INFO L290 TraceCheckUtils]: 19: Hoare triple {15216#(< 0 (mod (+ main_~y~0 2) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15212#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:03:23,099 INFO L290 TraceCheckUtils]: 18: Hoare triple {15220#(< 0 (mod (+ main_~y~0 3) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15216#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:03:23,099 INFO L290 TraceCheckUtils]: 17: Hoare triple {15224#(< 0 (mod (+ main_~y~0 4) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15220#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:03:23,100 INFO L290 TraceCheckUtils]: 16: Hoare triple {15228#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15224#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:03:23,101 INFO L290 TraceCheckUtils]: 15: Hoare triple {15232#(< 0 (mod (+ main_~y~0 6) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15228#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:03:23,101 INFO L290 TraceCheckUtils]: 14: Hoare triple {15236#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15232#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:03:23,102 INFO L290 TraceCheckUtils]: 13: Hoare triple {15240#(< 0 (mod (+ main_~y~0 8) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15236#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:03:23,103 INFO L290 TraceCheckUtils]: 12: Hoare triple {15244#(< 0 (mod (+ main_~y~0 9) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15240#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:03:23,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {15248#(< 0 (mod (+ main_~y~0 10) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15244#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:03:23,104 INFO L290 TraceCheckUtils]: 10: Hoare triple {15252#(< 0 (mod (+ main_~y~0 11) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15248#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:03:23,105 INFO L290 TraceCheckUtils]: 9: Hoare triple {15256#(< 0 (mod (+ main_~y~0 12) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15252#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:03:23,105 INFO L290 TraceCheckUtils]: 8: Hoare triple {15260#(< 0 (mod (+ main_~y~0 13) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15256#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:03:23,106 INFO L290 TraceCheckUtils]: 7: Hoare triple {15264#(< 0 (mod (+ main_~y~0 14) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15260#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:03:23,107 INFO L290 TraceCheckUtils]: 6: Hoare triple {15268#(< 0 (mod (+ main_~y~0 15) 4294967296))} [61] L16-2-->L16-2: Formula: (and (< 0 (mod v_main_~x~0_6 4294967296)) (= v_main_~x~0_6 (+ v_main_~x~0_5 1)) (= v_main_~y~0_2 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_3} OutVars{main_~y~0=v_main_~y~0_2, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_5, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15264#(< 0 (mod (+ main_~y~0 14) 4294967296))} is VALID [2022-04-27 22:03:23,107 INFO L290 TraceCheckUtils]: 5: Hoare triple {15065#true} [57] mainENTRY-->L16-2: Formula: (and (= v_main_~y~0_1 0) (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_1, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15268#(< 0 (mod (+ main_~y~0 15) 4294967296))} is VALID [2022-04-27 22:03:23,107 INFO L272 TraceCheckUtils]: 4: Hoare triple {15065#true} [54] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:23,107 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15065#true} {15065#true} [75] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:23,107 INFO L290 TraceCheckUtils]: 2: Hoare triple {15065#true} [58] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:23,107 INFO L290 TraceCheckUtils]: 1: Hoare triple {15065#true} [55] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15065#true} is VALID [2022-04-27 22:03:23,107 INFO L272 TraceCheckUtils]: 0: Hoare triple {15065#true} [53] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15065#true} is VALID [2022-04-27 22:03:23,107 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:23,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2052444739] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:23,108 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:23,108 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-27 22:03:23,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733793802] [2022-04-27 22:03:23,108 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:23,108 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:03:23,108 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:23,109 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:23,141 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:23,142 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-27 22:03:23,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:23,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-27 22:03:23,142 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=376, Invalid=1346, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:03:23,142 INFO L87 Difference]: Start difference. First operand 106 states and 135 transitions. Second operand has 42 states, 42 states have (on average 1.1904761904761905) internal successors, (50), 41 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:49,952 WARN L232 SmtUtils]: Spent 14.43s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:04:06,683 WARN L232 SmtUtils]: Spent 9.90s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:04:38,445 WARN L232 SmtUtils]: Spent 19.92s on a formula simplification that was a NOOP. DAG size: 82 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:04:51,254 WARN L232 SmtUtils]: Spent 7.31s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:05:22,738 WARN L232 SmtUtils]: Spent 22.81s on a formula simplification that was a NOOP. DAG size: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:05:42,137 WARN L232 SmtUtils]: Spent 12.57s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:05:54,382 WARN L232 SmtUtils]: Spent 7.79s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:14,054 WARN L232 SmtUtils]: Spent 9.87s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:33,697 WARN L232 SmtUtils]: Spent 11.39s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:56,042 WARN L232 SmtUtils]: Spent 10.07s on a formula simplification that was a NOOP. DAG size: 80 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:11,654 WARN L232 SmtUtils]: Spent 9.34s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:22,297 WARN L232 SmtUtils]: Spent 6.99s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:47,659 WARN L232 SmtUtils]: Spent 8.38s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:08:23,300 WARN L232 SmtUtils]: Spent 5.03s on a formula simplification that was a NOOP. DAG size: 63 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)