/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de31.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 21:56:29,937 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 21:56:29,938 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 21:56:29,976 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 21:56:29,976 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 21:56:29,977 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 21:56:29,977 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 21:56:29,979 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 21:56:29,982 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 21:56:29,986 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 21:56:29,987 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 21:56:29,988 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 21:56:29,988 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 21:56:29,990 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 21:56:29,991 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 21:56:29,992 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 21:56:29,992 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 21:56:29,993 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 21:56:29,998 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 21:56:30,001 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 21:56:30,003 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 21:56:30,004 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 21:56:30,004 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 21:56:30,006 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 21:56:30,008 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 21:56:30,013 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 21:56:30,018 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 21:56:30,019 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 21:56:30,020 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 21:56:30,020 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 21:56:30,037 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 21:56:30,038 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 21:56:30,038 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 21:56:30,039 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 21:56:30,039 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 21:56:30,039 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 21:56:30,039 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 21:56:30,039 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 21:56:30,040 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 21:56:30,040 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 21:56:30,040 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 21:56:30,040 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 21:56:30,040 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 21:56:30,041 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:56:30,041 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 21:56:30,041 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 21:56:30,042 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 21:56:30,042 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 21:56:30,042 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 21:56:30,042 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 21:56:30,042 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 21:56:30,042 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 21:56:30,043 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 21:56:30,043 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 21:56:30,210 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 21:56:30,231 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 21:56:30,232 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 21:56:30,233 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 21:56:30,233 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 21:56:30,234 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de31.c [2022-04-27 21:56:30,278 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a81902581/b2b2f07a5a654432b788acaf1b1d4bda/FLAGf18574497 [2022-04-27 21:56:30,619 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 21:56:30,619 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c [2022-04-27 21:56:30,623 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a81902581/b2b2f07a5a654432b788acaf1b1d4bda/FLAGf18574497 [2022-04-27 21:56:30,634 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a81902581/b2b2f07a5a654432b788acaf1b1d4bda [2022-04-27 21:56:30,636 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 21:56:30,637 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 21:56:30,639 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 21:56:30,639 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 21:56:30,641 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 21:56:30,644 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,644 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b37200 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30, skipping insertion in model container [2022-04-27 21:56:30,645 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,649 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 21:56:30,657 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 21:56:30,789 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c[368,381] [2022-04-27 21:56:30,825 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:56:30,832 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 21:56:30,840 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de31.c[368,381] [2022-04-27 21:56:30,849 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 21:56:30,860 INFO L208 MainTranslator]: Completed translation [2022-04-27 21:56:30,861 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30 WrapperNode [2022-04-27 21:56:30,862 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 21:56:30,863 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 21:56:30,863 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 21:56:30,863 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 21:56:30,870 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,870 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,874 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,875 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,883 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,888 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,891 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,893 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 21:56:30,894 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 21:56:30,894 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 21:56:30,894 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 21:56:30,895 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (1/1) ... [2022-04-27 21:56:30,900 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 21:56:30,906 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:30,916 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 21:56:30,939 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 21:56:30,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 21:56:30,947 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 21:56:30,947 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 21:56:30,947 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 21:56:30,947 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 21:56:30,947 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 21:56:30,947 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 21:56:30,947 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 21:56:30,947 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 21:56:30,947 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 21:56:30,948 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 21:56:30,986 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 21:56:30,987 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 21:56:31,115 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 21:56:31,119 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 21:56:31,120 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-27 21:56:31,121 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:56:31 BoogieIcfgContainer [2022-04-27 21:56:31,121 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 21:56:31,121 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 21:56:31,121 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 21:56:31,122 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 21:56:31,126 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:56:31" (1/1) ... [2022-04-27 21:56:31,127 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 21:56:31,141 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:56:31 BasicIcfg [2022-04-27 21:56:31,141 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 21:56:31,142 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 21:56:31,142 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 21:56:31,144 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 21:56:31,144 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 09:56:30" (1/4) ... [2022-04-27 21:56:31,144 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c8f381a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:56:31, skipping insertion in model container [2022-04-27 21:56:31,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 09:56:30" (2/4) ... [2022-04-27 21:56:31,145 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c8f381a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 09:56:31, skipping insertion in model container [2022-04-27 21:56:31,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 09:56:31" (3/4) ... [2022-04-27 21:56:31,145 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c8f381a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 09:56:31, skipping insertion in model container [2022-04-27 21:56:31,145 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 09:56:31" (4/4) ... [2022-04-27 21:56:31,146 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de31.cqvasr [2022-04-27 21:56:31,155 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 21:56:31,155 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 21:56:31,194 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 21:56:31,200 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@7f639abc, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4fdf1345 [2022-04-27 21:56:31,200 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 21:56:31,205 INFO L276 IsEmpty]: Start isEmpty. Operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 21:56:31,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 21:56:31,210 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:31,211 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:31,212 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:31,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:31,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1909530012, now seen corresponding path program 1 times [2022-04-27 21:56:31,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:31,223 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049921227] [2022-04-27 21:56:31,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:31,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:31,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:31,362 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:31,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:31,383 INFO L290 TraceCheckUtils]: 0: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-27 21:56:31,383 INFO L290 TraceCheckUtils]: 1: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 21:56:31,384 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 21:56:31,385 INFO L272 TraceCheckUtils]: 0: Hoare triple {25#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:31,386 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-27 21:56:31,386 INFO L290 TraceCheckUtils]: 2: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 21:56:31,387 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 21:56:31,387 INFO L272 TraceCheckUtils]: 4: Hoare triple {25#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 21:56:31,387 INFO L290 TraceCheckUtils]: 5: Hoare triple {25#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25#true} is VALID [2022-04-27 21:56:31,388 INFO L290 TraceCheckUtils]: 6: Hoare triple {25#true} [70] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 21:56:31,388 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#false} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {26#false} is VALID [2022-04-27 21:56:31,388 INFO L290 TraceCheckUtils]: 8: Hoare triple {26#false} [74] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 21:56:31,389 INFO L290 TraceCheckUtils]: 9: Hoare triple {26#false} [77] L29-1-->L29-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 21:56:31,389 INFO L272 TraceCheckUtils]: 10: Hoare triple {26#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {26#false} is VALID [2022-04-27 21:56:31,390 INFO L290 TraceCheckUtils]: 11: Hoare triple {26#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26#false} is VALID [2022-04-27 21:56:31,390 INFO L290 TraceCheckUtils]: 12: Hoare triple {26#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 21:56:31,390 INFO L290 TraceCheckUtils]: 13: Hoare triple {26#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 21:56:31,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:31,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:31,391 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049921227] [2022-04-27 21:56:31,392 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2049921227] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:56:31,392 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:56:31,392 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 21:56:31,393 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469727439] [2022-04-27 21:56:31,393 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:56:31,397 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:56:31,398 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:31,400 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,423 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:31,424 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 21:56:31,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:31,437 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 21:56:31,438 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:56:31,439 INFO L87 Difference]: Start difference. First operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:31,491 INFO L93 Difference]: Finished difference Result 37 states and 48 transitions. [2022-04-27 21:56:31,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 21:56:31,492 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:56:31,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:31,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-27 21:56:31,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-27 21:56:31,508 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 48 transitions. [2022-04-27 21:56:31,564 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:31,569 INFO L225 Difference]: With dead ends: 37 [2022-04-27 21:56:31,569 INFO L226 Difference]: Without dead ends: 15 [2022-04-27 21:56:31,571 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 21:56:31,573 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:31,573 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 26 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 21:56:31,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-27 21:56:31,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-27 21:56:31,591 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:31,591 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,592 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,592 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:31,594 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 21:56:31,594 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 21:56:31,594 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:31,594 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:31,594 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 21:56:31,595 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 21:56:31,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:31,596 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 21:56:31,596 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 21:56:31,597 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:31,597 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:31,597 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:31,597 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:31,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-04-27 21:56:31,599 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 14 [2022-04-27 21:56:31,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:31,599 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-04-27 21:56:31,600 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,600 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 21:56:31,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 21:56:31,600 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:31,600 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:31,600 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 21:56:31,601 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:31,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:31,601 INFO L85 PathProgramCache]: Analyzing trace with hash -137167005, now seen corresponding path program 1 times [2022-04-27 21:56:31,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:31,601 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916072360] [2022-04-27 21:56:31,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:31,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:31,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:31,804 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:31,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:31,811 INFO L290 TraceCheckUtils]: 0: Hoare triple {144#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-27 21:56:31,811 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 21:56:31,811 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 21:56:31,812 INFO L272 TraceCheckUtils]: 0: Hoare triple {134#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {144#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:31,812 INFO L290 TraceCheckUtils]: 1: Hoare triple {144#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-27 21:56:31,812 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 21:56:31,813 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 21:56:31,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 21:56:31,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {139#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:56:31,814 INFO L290 TraceCheckUtils]: 6: Hoare triple {139#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {140#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} is VALID [2022-04-27 21:56:31,815 INFO L290 TraceCheckUtils]: 7: Hoare triple {140#(and (<= main_~n~0 (* (div main_~n~0 4294967296) 4294967296)) (= main_~y~0 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:56:31,816 INFO L290 TraceCheckUtils]: 8: Hoare triple {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:56:31,816 INFO L290 TraceCheckUtils]: 9: Hoare triple {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 21:56:31,817 INFO L272 TraceCheckUtils]: 10: Hoare triple {141#(and (= main_~z~0 0) (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {142#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:56:31,818 INFO L290 TraceCheckUtils]: 11: Hoare triple {142#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {143#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:56:31,818 INFO L290 TraceCheckUtils]: 12: Hoare triple {143#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-27 21:56:31,818 INFO L290 TraceCheckUtils]: 13: Hoare triple {135#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-27 21:56:31,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:31,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:31,819 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916072360] [2022-04-27 21:56:31,819 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1916072360] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 21:56:31,819 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 21:56:31,819 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-27 21:56:31,819 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739944099] [2022-04-27 21:56:31,819 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 21:56:31,820 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:56:31,821 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:31,821 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:31,833 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:31,833 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 21:56:31,833 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:31,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 21:56:31,833 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2022-04-27 21:56:31,834 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:32,063 INFO L93 Difference]: Finished difference Result 29 states and 35 transitions. [2022-04-27 21:56:32,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 21:56:32,063 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 21:56:32,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:32,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 35 transitions. [2022-04-27 21:56:32,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 35 transitions. [2022-04-27 21:56:32,071 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 35 transitions. [2022-04-27 21:56:32,097 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:32,099 INFO L225 Difference]: With dead ends: 29 [2022-04-27 21:56:32,099 INFO L226 Difference]: Without dead ends: 16 [2022-04-27 21:56:32,102 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-27 21:56:32,105 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 24 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:32,105 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 38 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:56:32,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-27 21:56:32,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-27 21:56:32,114 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:32,114 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,114 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,114 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:32,115 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2022-04-27 21:56:32,115 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-27 21:56:32,116 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:32,116 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:32,116 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 21:56:32,116 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 21:56:32,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:32,117 INFO L93 Difference]: Finished difference Result 16 states and 18 transitions. [2022-04-27 21:56:32,118 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-27 21:56:32,118 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:32,119 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:32,119 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:32,119 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:32,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.2727272727272727) internal successors, (14), 11 states have internal predecessors, (14), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2022-04-27 21:56:32,123 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 18 transitions. Word has length 14 [2022-04-27 21:56:32,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:32,123 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 18 transitions. [2022-04-27 21:56:32,123 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 1.25) internal successors, (10), 6 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,123 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 18 transitions. [2022-04-27 21:56:32,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 21:56:32,124 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:32,124 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:32,124 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 21:56:32,124 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:32,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:32,125 INFO L85 PathProgramCache]: Analyzing trace with hash 1476846263, now seen corresponding path program 1 times [2022-04-27 21:56:32,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:32,125 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255988588] [2022-04-27 21:56:32,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:32,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:32,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:32,211 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:32,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:32,217 INFO L290 TraceCheckUtils]: 0: Hoare triple {266#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-27 21:56:32,217 INFO L290 TraceCheckUtils]: 1: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,217 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,218 INFO L272 TraceCheckUtils]: 0: Hoare triple {258#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {266#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:32,218 INFO L290 TraceCheckUtils]: 1: Hoare triple {266#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-27 21:56:32,218 INFO L290 TraceCheckUtils]: 2: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,218 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,218 INFO L272 TraceCheckUtils]: 4: Hoare triple {258#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {258#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {263#(= main_~y~0 0)} is VALID [2022-04-27 21:56:32,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {263#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:32,233 INFO L290 TraceCheckUtils]: 7: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:32,233 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {265#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 21:56:32,234 INFO L290 TraceCheckUtils]: 9: Hoare triple {265#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {259#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,234 INFO L272 TraceCheckUtils]: 11: Hoare triple {259#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {259#false} is VALID [2022-04-27 21:56:32,234 INFO L290 TraceCheckUtils]: 12: Hoare triple {259#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {259#false} is VALID [2022-04-27 21:56:32,234 INFO L290 TraceCheckUtils]: 13: Hoare triple {259#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,235 INFO L290 TraceCheckUtils]: 14: Hoare triple {259#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,235 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:32,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:32,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255988588] [2022-04-27 21:56:32,236 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1255988588] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:32,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [415996877] [2022-04-27 21:56:32,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:32,236 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:32,236 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:32,240 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:32,265 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 21:56:32,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:32,288 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 21:56:32,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:32,311 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:56:32,544 INFO L272 TraceCheckUtils]: 0: Hoare triple {258#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,545 INFO L290 TraceCheckUtils]: 1: Hoare triple {258#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-27 21:56:32,545 INFO L290 TraceCheckUtils]: 2: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,546 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,547 INFO L272 TraceCheckUtils]: 4: Hoare triple {258#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,547 INFO L290 TraceCheckUtils]: 5: Hoare triple {258#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {263#(= main_~y~0 0)} is VALID [2022-04-27 21:56:32,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {263#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:32,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:32,549 INFO L290 TraceCheckUtils]: 8: Hoare triple {264#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {294#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 21:56:32,549 INFO L290 TraceCheckUtils]: 9: Hoare triple {294#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,549 INFO L290 TraceCheckUtils]: 10: Hoare triple {259#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,549 INFO L272 TraceCheckUtils]: 11: Hoare triple {259#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {259#false} is VALID [2022-04-27 21:56:32,550 INFO L290 TraceCheckUtils]: 12: Hoare triple {259#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {259#false} is VALID [2022-04-27 21:56:32,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {259#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {259#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,550 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:32,550 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:56:32,637 INFO L290 TraceCheckUtils]: 14: Hoare triple {259#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,638 INFO L290 TraceCheckUtils]: 13: Hoare triple {259#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,638 INFO L290 TraceCheckUtils]: 12: Hoare triple {259#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {259#false} is VALID [2022-04-27 21:56:32,638 INFO L272 TraceCheckUtils]: 11: Hoare triple {259#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {259#false} is VALID [2022-04-27 21:56:32,639 INFO L290 TraceCheckUtils]: 10: Hoare triple {259#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,639 INFO L290 TraceCheckUtils]: 9: Hoare triple {328#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {259#false} is VALID [2022-04-27 21:56:32,640 INFO L290 TraceCheckUtils]: 8: Hoare triple {332#(< 0 (mod main_~y~0 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {328#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:56:32,642 INFO L290 TraceCheckUtils]: 7: Hoare triple {332#(< 0 (mod main_~y~0 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {332#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:56:32,643 INFO L290 TraceCheckUtils]: 6: Hoare triple {339#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {332#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:56:32,644 INFO L290 TraceCheckUtils]: 5: Hoare triple {258#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {339#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:56:32,644 INFO L272 TraceCheckUtils]: 4: Hoare triple {258#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,644 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258#true} {258#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,644 INFO L290 TraceCheckUtils]: 2: Hoare triple {258#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,645 INFO L290 TraceCheckUtils]: 1: Hoare triple {258#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {258#true} is VALID [2022-04-27 21:56:32,645 INFO L272 TraceCheckUtils]: 0: Hoare triple {258#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {258#true} is VALID [2022-04-27 21:56:32,646 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:32,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [415996877] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:56:32,649 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:56:32,649 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-27 21:56:32,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075026434] [2022-04-27 21:56:32,649 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:56:32,650 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:56:32,650 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:32,650 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,665 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:32,665 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 21:56:32,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:32,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 21:56:32,667 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-27 21:56:32,668 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. Second operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:32,959 INFO L93 Difference]: Finished difference Result 40 states and 56 transitions. [2022-04-27 21:56:32,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 21:56:32,960 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 21:56:32,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:32,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 56 transitions. [2022-04-27 21:56:32,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:32,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 56 transitions. [2022-04-27 21:56:32,963 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 56 transitions. [2022-04-27 21:56:33,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:33,012 INFO L225 Difference]: With dead ends: 40 [2022-04-27 21:56:33,013 INFO L226 Difference]: Without dead ends: 34 [2022-04-27 21:56:33,013 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-27 21:56:33,015 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 48 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 67 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 48 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 67 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:33,016 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [48 Valid, 34 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 67 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:56:33,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-27 21:56:33,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 28. [2022-04-27 21:56:33,033 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:33,034 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:33,034 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:33,034 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:33,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:33,040 INFO L93 Difference]: Finished difference Result 34 states and 43 transitions. [2022-04-27 21:56:33,040 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 43 transitions. [2022-04-27 21:56:33,040 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:33,041 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:33,041 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 21:56:33,041 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 21:56:33,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:33,043 INFO L93 Difference]: Finished difference Result 34 states and 43 transitions. [2022-04-27 21:56:33,043 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 43 transitions. [2022-04-27 21:56:33,044 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:33,044 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:33,044 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:33,044 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:33,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.3478260869565217) internal successors, (31), 23 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:33,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 35 transitions. [2022-04-27 21:56:33,048 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 35 transitions. Word has length 15 [2022-04-27 21:56:33,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:33,049 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 35 transitions. [2022-04-27 21:56:33,049 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:33,049 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 35 transitions. [2022-04-27 21:56:33,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 21:56:33,051 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:33,051 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:33,069 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 21:56:33,265 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:33,266 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:33,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:33,266 INFO L85 PathProgramCache]: Analyzing trace with hash 957906802, now seen corresponding path program 1 times [2022-04-27 21:56:33,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:33,266 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258993462] [2022-04-27 21:56:33,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:33,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:33,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:33,562 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:33,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:33,573 INFO L290 TraceCheckUtils]: 0: Hoare triple {562#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-27 21:56:33,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,573 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,574 INFO L272 TraceCheckUtils]: 0: Hoare triple {549#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {562#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:33,574 INFO L290 TraceCheckUtils]: 1: Hoare triple {562#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-27 21:56:33,574 INFO L290 TraceCheckUtils]: 2: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,574 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,574 INFO L272 TraceCheckUtils]: 4: Hoare triple {549#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,576 INFO L290 TraceCheckUtils]: 5: Hoare triple {549#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:56:33,580 INFO L290 TraceCheckUtils]: 6: Hoare triple {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {555#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 21:56:33,581 INFO L290 TraceCheckUtils]: 7: Hoare triple {555#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {556#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-27 21:56:33,585 INFO L290 TraceCheckUtils]: 8: Hoare triple {556#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {557#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) main_~z~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:33,588 INFO L290 TraceCheckUtils]: 9: Hoare triple {557#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) main_~z~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~z~0 (* (div (+ main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:33,589 INFO L290 TraceCheckUtils]: 10: Hoare triple {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:33,591 INFO L290 TraceCheckUtils]: 11: Hoare triple {558#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) main_~z~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ main_~z~0 (* (div (+ (- 1) main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:33,592 INFO L290 TraceCheckUtils]: 12: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:33,593 INFO L272 TraceCheckUtils]: 13: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {560#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:56:33,593 INFO L290 TraceCheckUtils]: 14: Hoare triple {560#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {561#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:56:33,594 INFO L290 TraceCheckUtils]: 15: Hoare triple {561#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-27 21:56:33,594 INFO L290 TraceCheckUtils]: 16: Hoare triple {550#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-27 21:56:33,594 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:33,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:33,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258993462] [2022-04-27 21:56:33,595 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [258993462] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:33,595 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1357404860] [2022-04-27 21:56:33,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:33,595 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:33,596 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:33,599 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:33,600 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 21:56:33,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:33,634 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 21:56:33,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:33,646 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:56:33,998 INFO L272 TraceCheckUtils]: 0: Hoare triple {549#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,998 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-27 21:56:33,998 INFO L290 TraceCheckUtils]: 2: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,999 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:33,999 INFO L272 TraceCheckUtils]: 4: Hoare triple {549#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:34,000 INFO L290 TraceCheckUtils]: 5: Hoare triple {549#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:56:34,001 INFO L290 TraceCheckUtils]: 6: Hoare triple {554#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {584#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} is VALID [2022-04-27 21:56:34,002 INFO L290 TraceCheckUtils]: 7: Hoare triple {584#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {588#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 21:56:34,002 INFO L290 TraceCheckUtils]: 8: Hoare triple {588#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 21:56:34,007 INFO L290 TraceCheckUtils]: 9: Hoare triple {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} is VALID [2022-04-27 21:56:34,008 INFO L290 TraceCheckUtils]: 10: Hoare triple {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} is VALID [2022-04-27 21:56:34,009 INFO L290 TraceCheckUtils]: 11: Hoare triple {596#(and (<= (mod (+ main_~n~0 4294967295) 4294967296) 0) (= (+ main_~z~0 1) 1))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 21:56:34,010 INFO L290 TraceCheckUtils]: 12: Hoare triple {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 21:56:34,011 INFO L272 TraceCheckUtils]: 13: Hoare triple {592#(and (= main_~z~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {609#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:56:34,012 INFO L290 TraceCheckUtils]: 14: Hoare triple {609#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {613#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:56:34,013 INFO L290 TraceCheckUtils]: 15: Hoare triple {613#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-27 21:56:34,013 INFO L290 TraceCheckUtils]: 16: Hoare triple {550#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-27 21:56:34,013 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:34,013 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:56:34,472 INFO L290 TraceCheckUtils]: 16: Hoare triple {550#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-27 21:56:34,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {613#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {550#false} is VALID [2022-04-27 21:56:34,480 INFO L290 TraceCheckUtils]: 14: Hoare triple {609#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {613#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:56:34,481 INFO L272 TraceCheckUtils]: 13: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {609#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:56:34,482 INFO L290 TraceCheckUtils]: 12: Hoare triple {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:34,482 INFO L290 TraceCheckUtils]: 11: Hoare triple {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {559#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:34,483 INFO L290 TraceCheckUtils]: 10: Hoare triple {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:34,485 INFO L290 TraceCheckUtils]: 9: Hoare triple {642#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {635#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:34,485 INFO L290 TraceCheckUtils]: 8: Hoare triple {646#(or (not (< 0 (mod main_~y~0 4294967296))) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {642#(or (and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)))) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 21:56:34,486 INFO L290 TraceCheckUtils]: 7: Hoare triple {650#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {646#(or (not (< 0 (mod main_~y~0 4294967296))) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:56:34,488 INFO L290 TraceCheckUtils]: 6: Hoare triple {654#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {650#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:56:34,489 INFO L290 TraceCheckUtils]: 5: Hoare triple {549#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {654#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:56:34,489 INFO L272 TraceCheckUtils]: 4: Hoare triple {549#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:34,489 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {549#true} {549#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:34,489 INFO L290 TraceCheckUtils]: 2: Hoare triple {549#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:34,490 INFO L290 TraceCheckUtils]: 1: Hoare triple {549#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {549#true} is VALID [2022-04-27 21:56:34,490 INFO L272 TraceCheckUtils]: 0: Hoare triple {549#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {549#true} is VALID [2022-04-27 21:56:34,490 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:34,490 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1357404860] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:56:34,490 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:56:34,490 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 22 [2022-04-27 21:56:34,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2081824241] [2022-04-27 21:56:34,491 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:56:34,491 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:56:34,491 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:34,492 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:34,540 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:34,540 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 21:56:34,540 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:34,541 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 21:56:34,541 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=394, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:56:34,541 INFO L87 Difference]: Start difference. First operand 28 states and 35 transitions. Second operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:36,743 INFO L93 Difference]: Finished difference Result 56 states and 71 transitions. [2022-04-27 21:56:36,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-04-27 21:56:36,743 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 21:56:36,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:36,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 71 transitions. [2022-04-27 21:56:36,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 71 transitions. [2022-04-27 21:56:36,746 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 29 states and 71 transitions. [2022-04-27 21:56:36,880 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:36,881 INFO L225 Difference]: With dead ends: 56 [2022-04-27 21:56:36,881 INFO L226 Difference]: Without dead ends: 39 [2022-04-27 21:56:36,882 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 22 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=388, Invalid=1868, Unknown=0, NotChecked=0, Total=2256 [2022-04-27 21:56:36,882 INFO L413 NwaCegarLoop]: 10 mSDtfsCounter, 91 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 79 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 79 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:36,882 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [91 Valid, 62 Invalid, 265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [79 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 21:56:36,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2022-04-27 21:56:36,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 25. [2022-04-27 21:56:36,926 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:36,926 INFO L82 GeneralOperation]: Start isEquivalent. First operand 39 states. Second operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,926 INFO L74 IsIncluded]: Start isIncluded. First operand 39 states. Second operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,926 INFO L87 Difference]: Start difference. First operand 39 states. Second operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:36,928 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2022-04-27 21:56:36,928 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-27 21:56:36,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:36,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:36,928 INFO L74 IsIncluded]: Start isIncluded. First operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-27 21:56:36,928 INFO L87 Difference]: Start difference. First operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 39 states. [2022-04-27 21:56:36,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:36,929 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2022-04-27 21:56:36,929 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-27 21:56:36,930 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:36,930 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:36,930 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:36,930 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:36,930 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.35) internal successors, (27), 20 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 31 transitions. [2022-04-27 21:56:36,931 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 31 transitions. Word has length 17 [2022-04-27 21:56:36,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:36,931 INFO L495 AbstractCegarLoop]: Abstraction has 25 states and 31 transitions. [2022-04-27 21:56:36,931 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 19 states have internal predecessors, (30), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:36,931 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 31 transitions. [2022-04-27 21:56:36,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 21:56:36,931 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:36,931 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:36,951 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-04-27 21:56:37,147 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-04-27 21:56:37,147 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:37,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:37,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1465594979, now seen corresponding path program 2 times [2022-04-27 21:56:37,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:37,148 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527753766] [2022-04-27 21:56:37,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:37,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:37,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:37,235 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:37,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:37,243 INFO L290 TraceCheckUtils]: 0: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-27 21:56:37,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,243 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,244 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:37,244 INFO L290 TraceCheckUtils]: 1: Hoare triple {942#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-27 21:56:37,244 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,244 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,244 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,245 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {936#(= main_~y~0 0)} is VALID [2022-04-27 21:56:37,245 INFO L290 TraceCheckUtils]: 6: Hoare triple {936#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:37,246 INFO L290 TraceCheckUtils]: 7: Hoare triple {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:37,246 INFO L290 TraceCheckUtils]: 8: Hoare triple {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:56:37,247 INFO L290 TraceCheckUtils]: 9: Hoare triple {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:56:37,247 INFO L290 TraceCheckUtils]: 10: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:56:37,247 INFO L290 TraceCheckUtils]: 11: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {941#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:56:37,248 INFO L290 TraceCheckUtils]: 12: Hoare triple {941#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,248 INFO L290 TraceCheckUtils]: 13: Hoare triple {932#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,248 INFO L272 TraceCheckUtils]: 14: Hoare triple {932#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {932#false} is VALID [2022-04-27 21:56:37,248 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {932#false} is VALID [2022-04-27 21:56:37,248 INFO L290 TraceCheckUtils]: 16: Hoare triple {932#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,248 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,249 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:37,249 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:37,249 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527753766] [2022-04-27 21:56:37,249 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [527753766] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:37,249 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1658678609] [2022-04-27 21:56:37,249 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:56:37,249 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:37,249 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:37,250 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:37,251 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 21:56:37,281 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:56:37,281 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:56:37,282 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 21:56:37,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:37,292 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:56:37,454 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,455 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-27 21:56:37,455 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,455 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,455 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,455 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {936#(= main_~y~0 0)} is VALID [2022-04-27 21:56:37,456 INFO L290 TraceCheckUtils]: 6: Hoare triple {936#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:37,456 INFO L290 TraceCheckUtils]: 7: Hoare triple {937#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:37,457 INFO L290 TraceCheckUtils]: 8: Hoare triple {938#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:56:37,457 INFO L290 TraceCheckUtils]: 9: Hoare triple {939#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:56:37,458 INFO L290 TraceCheckUtils]: 10: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:56:37,458 INFO L290 TraceCheckUtils]: 11: Hoare triple {940#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {979#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:56:37,458 INFO L290 TraceCheckUtils]: 12: Hoare triple {979#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,459 INFO L290 TraceCheckUtils]: 13: Hoare triple {932#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,459 INFO L272 TraceCheckUtils]: 14: Hoare triple {932#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {932#false} is VALID [2022-04-27 21:56:37,459 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {932#false} is VALID [2022-04-27 21:56:37,459 INFO L290 TraceCheckUtils]: 16: Hoare triple {932#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,459 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,459 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:37,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:56:37,568 INFO L290 TraceCheckUtils]: 17: Hoare triple {932#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,568 INFO L290 TraceCheckUtils]: 16: Hoare triple {932#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,569 INFO L290 TraceCheckUtils]: 15: Hoare triple {932#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {932#false} is VALID [2022-04-27 21:56:37,569 INFO L272 TraceCheckUtils]: 14: Hoare triple {932#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {932#false} is VALID [2022-04-27 21:56:37,569 INFO L290 TraceCheckUtils]: 13: Hoare triple {932#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,569 INFO L290 TraceCheckUtils]: 12: Hoare triple {1013#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {932#false} is VALID [2022-04-27 21:56:37,569 INFO L290 TraceCheckUtils]: 11: Hoare triple {1017#(< 0 (mod main_~y~0 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1013#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:56:37,570 INFO L290 TraceCheckUtils]: 10: Hoare triple {1017#(< 0 (mod main_~y~0 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1017#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:56:37,570 INFO L290 TraceCheckUtils]: 9: Hoare triple {1024#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1017#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:56:37,571 INFO L290 TraceCheckUtils]: 8: Hoare triple {1028#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1024#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:56:37,571 INFO L290 TraceCheckUtils]: 7: Hoare triple {1032#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1028#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:56:37,572 INFO L290 TraceCheckUtils]: 6: Hoare triple {1036#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1032#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:56:37,572 INFO L290 TraceCheckUtils]: 5: Hoare triple {931#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1036#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 21:56:37,572 INFO L272 TraceCheckUtils]: 4: Hoare triple {931#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,573 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {931#true} {931#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {931#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {931#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {931#true} is VALID [2022-04-27 21:56:37,573 INFO L272 TraceCheckUtils]: 0: Hoare triple {931#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {931#true} is VALID [2022-04-27 21:56:37,573 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:37,573 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1658678609] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:56:37,573 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:56:37,573 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-27 21:56:37,573 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890120193] [2022-04-27 21:56:37,573 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:56:37,574 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 21:56:37,574 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:37,574 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:37,589 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:37,589 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 21:56:37,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:37,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 21:56:37,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-27 21:56:37,590 INFO L87 Difference]: Start difference. First operand 25 states and 31 transitions. Second operand has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:38,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:38,822 INFO L93 Difference]: Finished difference Result 78 states and 119 transitions. [2022-04-27 21:56:38,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-27 21:56:38,822 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 21:56:38,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:38,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:38,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 110 transitions. [2022-04-27 21:56:38,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:38,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 110 transitions. [2022-04-27 21:56:38,826 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 110 transitions. [2022-04-27 21:56:38,983 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:38,987 INFO L225 Difference]: With dead ends: 78 [2022-04-27 21:56:38,987 INFO L226 Difference]: Without dead ends: 72 [2022-04-27 21:56:38,988 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=391, Invalid=1091, Unknown=0, NotChecked=0, Total=1482 [2022-04-27 21:56:38,988 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 150 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 239 mSolverCounterSat, 126 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 365 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 126 IncrementalHoareTripleChecker+Valid, 239 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:38,989 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 58 Invalid, 365 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [126 Valid, 239 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 21:56:38,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-04-27 21:56:39,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 44. [2022-04-27 21:56:39,064 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:39,064 INFO L82 GeneralOperation]: Start isEquivalent. First operand 72 states. Second operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:39,064 INFO L74 IsIncluded]: Start isIncluded. First operand 72 states. Second operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:39,064 INFO L87 Difference]: Start difference. First operand 72 states. Second operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:39,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:39,067 INFO L93 Difference]: Finished difference Result 72 states and 96 transitions. [2022-04-27 21:56:39,067 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 96 transitions. [2022-04-27 21:56:39,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:39,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:39,069 INFO L74 IsIncluded]: Start isIncluded. First operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 72 states. [2022-04-27 21:56:39,069 INFO L87 Difference]: Start difference. First operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 72 states. [2022-04-27 21:56:39,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:39,071 INFO L93 Difference]: Finished difference Result 72 states and 96 transitions. [2022-04-27 21:56:39,071 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 96 transitions. [2022-04-27 21:56:39,071 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:39,071 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:39,071 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:39,072 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:39,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 39 states have (on average 1.3846153846153846) internal successors, (54), 39 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:39,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 58 transitions. [2022-04-27 21:56:39,073 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 58 transitions. Word has length 18 [2022-04-27 21:56:39,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:39,073 INFO L495 AbstractCegarLoop]: Abstraction has 44 states and 58 transitions. [2022-04-27 21:56:39,073 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.5625) internal successors, (25), 15 states have internal predecessors, (25), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:39,073 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 58 transitions. [2022-04-27 21:56:39,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 21:56:39,074 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:39,074 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:39,093 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 21:56:39,287 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:39,287 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:39,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:39,288 INFO L85 PathProgramCache]: Analyzing trace with hash 2109292951, now seen corresponding path program 2 times [2022-04-27 21:56:39,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:39,288 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629955749] [2022-04-27 21:56:39,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:39,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:39,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:39,365 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:39,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:39,372 INFO L290 TraceCheckUtils]: 0: Hoare triple {1446#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-27 21:56:39,372 INFO L290 TraceCheckUtils]: 1: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,372 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,372 INFO L272 TraceCheckUtils]: 0: Hoare triple {1436#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1446#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:39,373 INFO L290 TraceCheckUtils]: 1: Hoare triple {1446#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-27 21:56:39,373 INFO L290 TraceCheckUtils]: 2: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,373 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,375 INFO L272 TraceCheckUtils]: 4: Hoare triple {1436#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,377 INFO L290 TraceCheckUtils]: 5: Hoare triple {1436#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1441#(= main_~y~0 0)} is VALID [2022-04-27 21:56:39,377 INFO L290 TraceCheckUtils]: 6: Hoare triple {1441#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:39,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:39,378 INFO L290 TraceCheckUtils]: 8: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:39,378 INFO L290 TraceCheckUtils]: 9: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1444#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:56:39,379 INFO L290 TraceCheckUtils]: 10: Hoare triple {1444#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1445#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 21:56:39,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {1445#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,379 INFO L290 TraceCheckUtils]: 12: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-27 21:56:39,379 INFO L290 TraceCheckUtils]: 13: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-27 21:56:39,379 INFO L290 TraceCheckUtils]: 14: Hoare triple {1437#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,380 INFO L272 TraceCheckUtils]: 15: Hoare triple {1437#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1437#false} is VALID [2022-04-27 21:56:39,380 INFO L290 TraceCheckUtils]: 16: Hoare triple {1437#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1437#false} is VALID [2022-04-27 21:56:39,380 INFO L290 TraceCheckUtils]: 17: Hoare triple {1437#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,380 INFO L290 TraceCheckUtils]: 18: Hoare triple {1437#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,380 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 21:56:39,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:39,380 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629955749] [2022-04-27 21:56:39,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1629955749] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:39,382 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [420538001] [2022-04-27 21:56:39,382 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:56:39,382 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:39,383 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:39,383 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:39,384 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 21:56:39,416 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:56:39,416 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:56:39,417 INFO L263 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 21:56:39,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:39,425 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:56:39,500 INFO L272 TraceCheckUtils]: 0: Hoare triple {1436#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,501 INFO L290 TraceCheckUtils]: 1: Hoare triple {1436#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-27 21:56:39,501 INFO L290 TraceCheckUtils]: 2: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,501 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,501 INFO L272 TraceCheckUtils]: 4: Hoare triple {1436#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,501 INFO L290 TraceCheckUtils]: 5: Hoare triple {1436#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1441#(= main_~y~0 0)} is VALID [2022-04-27 21:56:39,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {1441#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:39,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {1442#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:39,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:39,503 INFO L290 TraceCheckUtils]: 9: Hoare triple {1443#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1477#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:39,503 INFO L290 TraceCheckUtils]: 10: Hoare triple {1477#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1481#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 11: Hoare triple {1481#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 12: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 13: Hoare triple {1437#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 14: Hoare triple {1437#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L272 TraceCheckUtils]: 15: Hoare triple {1437#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 16: Hoare triple {1437#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 17: Hoare triple {1437#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L290 TraceCheckUtils]: 18: Hoare triple {1437#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,504 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 21:56:39,505 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:56:39,594 INFO L290 TraceCheckUtils]: 18: Hoare triple {1437#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,594 INFO L290 TraceCheckUtils]: 17: Hoare triple {1437#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,595 INFO L290 TraceCheckUtils]: 16: Hoare triple {1437#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1437#false} is VALID [2022-04-27 21:56:39,595 INFO L272 TraceCheckUtils]: 15: Hoare triple {1437#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1437#false} is VALID [2022-04-27 21:56:39,595 INFO L290 TraceCheckUtils]: 14: Hoare triple {1437#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1437#false} is VALID [2022-04-27 21:56:39,595 INFO L290 TraceCheckUtils]: 13: Hoare triple {1521#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1437#false} is VALID [2022-04-27 21:56:39,596 INFO L290 TraceCheckUtils]: 12: Hoare triple {1525#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1521#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 21:56:39,597 INFO L290 TraceCheckUtils]: 11: Hoare triple {1529#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1525#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:56:39,601 INFO L290 TraceCheckUtils]: 10: Hoare triple {1533#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1529#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 21:56:39,602 INFO L290 TraceCheckUtils]: 9: Hoare triple {1436#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1533#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 21:56:39,602 INFO L290 TraceCheckUtils]: 8: Hoare triple {1436#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,603 INFO L290 TraceCheckUtils]: 7: Hoare triple {1436#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1436#true} is VALID [2022-04-27 21:56:39,605 INFO L290 TraceCheckUtils]: 6: Hoare triple {1436#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1436#true} is VALID [2022-04-27 21:56:39,606 INFO L290 TraceCheckUtils]: 5: Hoare triple {1436#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1436#true} is VALID [2022-04-27 21:56:39,607 INFO L272 TraceCheckUtils]: 4: Hoare triple {1436#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,607 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1436#true} {1436#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {1436#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,607 INFO L290 TraceCheckUtils]: 1: Hoare triple {1436#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1436#true} is VALID [2022-04-27 21:56:39,608 INFO L272 TraceCheckUtils]: 0: Hoare triple {1436#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1436#true} is VALID [2022-04-27 21:56:39,608 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 21:56:39,608 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [420538001] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:56:39,608 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:56:39,609 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-27 21:56:39,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160815183] [2022-04-27 21:56:39,609 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:56:39,610 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 21:56:39,610 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:56:39,610 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:39,631 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:39,631 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 21:56:39,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:56:39,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 21:56:39,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-27 21:56:39,633 INFO L87 Difference]: Start difference. First operand 44 states and 58 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:40,170 INFO L93 Difference]: Finished difference Result 72 states and 96 transitions. [2022-04-27 21:56:40,170 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 21:56:40,170 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 21:56:40,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:56:40,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 52 transitions. [2022-04-27 21:56:40,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 52 transitions. [2022-04-27 21:56:40,172 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 52 transitions. [2022-04-27 21:56:40,209 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:56:40,210 INFO L225 Difference]: With dead ends: 72 [2022-04-27 21:56:40,210 INFO L226 Difference]: Without dead ends: 61 [2022-04-27 21:56:40,210 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2022-04-27 21:56:40,211 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 27 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:56:40,211 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [27 Valid, 39 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 21:56:40,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-04-27 21:56:40,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 51. [2022-04-27 21:56:40,322 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:56:40,322 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,322 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,322 INFO L87 Difference]: Start difference. First operand 61 states. Second operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:40,324 INFO L93 Difference]: Finished difference Result 61 states and 80 transitions. [2022-04-27 21:56:40,324 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 80 transitions. [2022-04-27 21:56:40,324 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:40,324 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:40,324 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-27 21:56:40,324 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-27 21:56:40,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:56:40,326 INFO L93 Difference]: Finished difference Result 61 states and 80 transitions. [2022-04-27 21:56:40,326 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 80 transitions. [2022-04-27 21:56:40,326 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:56:40,327 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:56:40,327 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:56:40,327 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:56:40,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.4130434782608696) internal successors, (65), 46 states have internal predecessors, (65), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 69 transitions. [2022-04-27 21:56:40,328 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 69 transitions. Word has length 19 [2022-04-27 21:56:40,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:56:40,329 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 69 transitions. [2022-04-27 21:56:40,329 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 13 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:56:40,329 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 69 transitions. [2022-04-27 21:56:40,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 21:56:40,329 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:56:40,329 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:56:40,358 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 21:56:40,533 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:40,534 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:56:40,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:56:40,534 INFO L85 PathProgramCache]: Analyzing trace with hash 801531459, now seen corresponding path program 3 times [2022-04-27 21:56:40,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:56:40,534 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [463193834] [2022-04-27 21:56:40,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:56:40,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:56:40,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:40,815 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:56:40,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:40,822 INFO L290 TraceCheckUtils]: 0: Hoare triple {1925#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-27 21:56:40,822 INFO L290 TraceCheckUtils]: 1: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:56:40,823 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:56:40,825 INFO L272 TraceCheckUtils]: 0: Hoare triple {1910#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1925#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:56:40,825 INFO L290 TraceCheckUtils]: 1: Hoare triple {1925#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-27 21:56:40,825 INFO L290 TraceCheckUtils]: 2: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:56:40,826 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:56:40,826 INFO L272 TraceCheckUtils]: 4: Hoare triple {1910#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:56:40,826 INFO L290 TraceCheckUtils]: 5: Hoare triple {1910#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:56:40,827 INFO L290 TraceCheckUtils]: 6: Hoare triple {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1916#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:56:40,832 INFO L290 TraceCheckUtils]: 7: Hoare triple {1916#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1917#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 21:56:40,833 INFO L290 TraceCheckUtils]: 8: Hoare triple {1917#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:56:40,833 INFO L290 TraceCheckUtils]: 9: Hoare triple {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:56:40,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-27 21:56:40,835 INFO L290 TraceCheckUtils]: 11: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-27 21:56:40,836 INFO L290 TraceCheckUtils]: 12: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-27 21:56:40,836 INFO L290 TraceCheckUtils]: 13: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-27 21:56:40,838 INFO L290 TraceCheckUtils]: 14: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:40,838 INFO L290 TraceCheckUtils]: 15: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:56:40,839 INFO L272 TraceCheckUtils]: 16: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1923#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:56:40,839 INFO L290 TraceCheckUtils]: 17: Hoare triple {1923#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1924#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:56:40,840 INFO L290 TraceCheckUtils]: 18: Hoare triple {1924#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-27 21:56:40,840 INFO L290 TraceCheckUtils]: 19: Hoare triple {1911#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-27 21:56:40,840 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:56:40,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:56:40,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [463193834] [2022-04-27 21:56:40,840 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [463193834] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:56:40,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1028468227] [2022-04-27 21:56:40,840 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:56:40,840 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:56:40,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:56:40,841 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:56:40,842 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 21:56:40,906 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 21:56:40,906 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:56:40,907 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-27 21:56:40,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:56:40,915 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:57:03,773 INFO L272 TraceCheckUtils]: 0: Hoare triple {1910#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:03,774 INFO L290 TraceCheckUtils]: 1: Hoare triple {1910#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-27 21:57:03,774 INFO L290 TraceCheckUtils]: 2: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:03,774 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:03,774 INFO L272 TraceCheckUtils]: 4: Hoare triple {1910#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:03,774 INFO L290 TraceCheckUtils]: 5: Hoare triple {1910#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:57:03,775 INFO L290 TraceCheckUtils]: 6: Hoare triple {1915#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1947#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-27 21:57:03,776 INFO L290 TraceCheckUtils]: 7: Hoare triple {1947#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1951#(and (= (+ (- 2) main_~y~0) 0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} is VALID [2022-04-27 21:57:03,777 INFO L290 TraceCheckUtils]: 8: Hoare triple {1951#(and (= (+ (- 2) main_~y~0) 0) (< 0 (mod (+ main_~n~0 4294967295) 4294967296)) (= (+ main_~x~0 1) (+ (- 1) main_~n~0)))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:03,777 INFO L290 TraceCheckUtils]: 9: Hoare triple {1918#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:57:03,778 INFO L290 TraceCheckUtils]: 10: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-27 21:57:03,779 INFO L290 TraceCheckUtils]: 11: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-27 21:57:03,781 INFO L290 TraceCheckUtils]: 12: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} is VALID [2022-04-27 21:57:03,782 INFO L290 TraceCheckUtils]: 13: Hoare triple {1921#(and (<= main_~z~0 0) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} is VALID [2022-04-27 21:57:03,783 INFO L290 TraceCheckUtils]: 14: Hoare triple {1920#(and (<= main_~z~0 1) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 2) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:57:03,784 INFO L290 TraceCheckUtils]: 15: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:57:03,785 INFO L272 TraceCheckUtils]: 16: Hoare triple {1919#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 2) main_~n~0) (<= main_~z~0 2))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:57:03,786 INFO L290 TraceCheckUtils]: 17: Hoare triple {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1983#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:57:03,786 INFO L290 TraceCheckUtils]: 18: Hoare triple {1983#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-27 21:57:03,786 INFO L290 TraceCheckUtils]: 19: Hoare triple {1911#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-27 21:57:03,792 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:03,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:57:04,350 INFO L290 TraceCheckUtils]: 19: Hoare triple {1911#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-27 21:57:04,351 INFO L290 TraceCheckUtils]: 18: Hoare triple {1983#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1911#false} is VALID [2022-04-27 21:57:04,351 INFO L290 TraceCheckUtils]: 17: Hoare triple {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1983#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:57:04,352 INFO L272 TraceCheckUtils]: 16: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {1979#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:57:04,352 INFO L290 TraceCheckUtils]: 15: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:04,353 INFO L290 TraceCheckUtils]: 14: Hoare triple {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:04,354 INFO L290 TraceCheckUtils]: 13: Hoare triple {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:04,355 INFO L290 TraceCheckUtils]: 12: Hoare triple {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:57:04,356 INFO L290 TraceCheckUtils]: 11: Hoare triple {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2009#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:57:04,357 INFO L290 TraceCheckUtils]: 10: Hoare triple {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2005#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:04,357 INFO L290 TraceCheckUtils]: 9: Hoare triple {2022#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {1922#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:04,358 INFO L290 TraceCheckUtils]: 8: Hoare triple {2026#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2022#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:57:04,359 INFO L290 TraceCheckUtils]: 7: Hoare triple {2030#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2026#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:57:04,360 INFO L290 TraceCheckUtils]: 6: Hoare triple {2034#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2030#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:57:04,361 INFO L290 TraceCheckUtils]: 5: Hoare triple {1910#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2034#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:57:04,361 INFO L272 TraceCheckUtils]: 4: Hoare triple {1910#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:04,361 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1910#true} {1910#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:04,361 INFO L290 TraceCheckUtils]: 2: Hoare triple {1910#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:04,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {1910#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1910#true} is VALID [2022-04-27 21:57:04,361 INFO L272 TraceCheckUtils]: 0: Hoare triple {1910#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1910#true} is VALID [2022-04-27 21:57:04,362 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:04,362 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1028468227] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:57:04,362 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:57:04,362 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11, 11] total 23 [2022-04-27 21:57:04,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195141610] [2022-04-27 21:57:04,362 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:57:04,364 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 21:57:04,365 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:57:04,366 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:04,414 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:04,414 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 21:57:04,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:57:04,415 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 21:57:04,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 [2022-04-27 21:57:04,418 INFO L87 Difference]: Start difference. First operand 51 states and 69 transitions. Second operand has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:10,187 INFO L93 Difference]: Finished difference Result 93 states and 119 transitions. [2022-04-27 21:57:10,187 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-27 21:57:10,187 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 21:57:10,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:57:10,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 73 transitions. [2022-04-27 21:57:10,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 73 transitions. [2022-04-27 21:57:10,190 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 73 transitions. [2022-04-27 21:57:10,634 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:10,635 INFO L225 Difference]: With dead ends: 93 [2022-04-27 21:57:10,635 INFO L226 Difference]: Without dead ends: 69 [2022-04-27 21:57:10,636 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 444 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=311, Invalid=1945, Unknown=0, NotChecked=0, Total=2256 [2022-04-27 21:57:10,636 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 66 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 271 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 60 SdHoareTripleChecker+Invalid, 322 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 271 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 21:57:10,637 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 60 Invalid, 322 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 271 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 21:57:10,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2022-04-27 21:57:10,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 51. [2022-04-27 21:57:10,778 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:57:10,778 INFO L82 GeneralOperation]: Start isEquivalent. First operand 69 states. Second operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,779 INFO L74 IsIncluded]: Start isIncluded. First operand 69 states. Second operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,779 INFO L87 Difference]: Start difference. First operand 69 states. Second operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:10,783 INFO L93 Difference]: Finished difference Result 69 states and 91 transitions. [2022-04-27 21:57:10,783 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 91 transitions. [2022-04-27 21:57:10,785 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:10,785 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:10,785 INFO L74 IsIncluded]: Start isIncluded. First operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-27 21:57:10,785 INFO L87 Difference]: Start difference. First operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 69 states. [2022-04-27 21:57:10,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:10,786 INFO L93 Difference]: Finished difference Result 69 states and 91 transitions. [2022-04-27 21:57:10,786 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 91 transitions. [2022-04-27 21:57:10,787 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:10,787 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:10,787 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:57:10,787 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:57:10,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 46 states have (on average 1.391304347826087) internal successors, (64), 46 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 68 transitions. [2022-04-27 21:57:10,788 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 68 transitions. Word has length 20 [2022-04-27 21:57:10,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:57:10,788 INFO L495 AbstractCegarLoop]: Abstraction has 51 states and 68 transitions. [2022-04-27 21:57:10,788 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.4782608695652173) internal successors, (34), 20 states have internal predecessors, (34), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:10,788 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 68 transitions. [2022-04-27 21:57:10,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 21:57:10,789 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:57:10,789 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:57:10,807 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2022-04-27 21:57:11,007 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:11,007 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:57:11,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:57:11,008 INFO L85 PathProgramCache]: Analyzing trace with hash 465015230, now seen corresponding path program 4 times [2022-04-27 21:57:11,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:57:11,008 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714938431] [2022-04-27 21:57:11,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:57:11,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:57:11,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:11,123 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:57:11,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:11,130 INFO L290 TraceCheckUtils]: 0: Hoare triple {2480#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-27 21:57:11,130 INFO L290 TraceCheckUtils]: 1: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,130 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,131 INFO L272 TraceCheckUtils]: 0: Hoare triple {2468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2480#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:57:11,131 INFO L290 TraceCheckUtils]: 1: Hoare triple {2480#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-27 21:57:11,131 INFO L290 TraceCheckUtils]: 2: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,131 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,131 INFO L272 TraceCheckUtils]: 4: Hoare triple {2468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,131 INFO L290 TraceCheckUtils]: 5: Hoare triple {2468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2473#(= main_~y~0 0)} is VALID [2022-04-27 21:57:11,132 INFO L290 TraceCheckUtils]: 6: Hoare triple {2473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:11,133 INFO L290 TraceCheckUtils]: 7: Hoare triple {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:11,133 INFO L290 TraceCheckUtils]: 8: Hoare triple {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:11,134 INFO L290 TraceCheckUtils]: 9: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:11,134 INFO L290 TraceCheckUtils]: 10: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2477#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:57:11,135 INFO L290 TraceCheckUtils]: 11: Hoare triple {2477#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2478#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:57:11,135 INFO L290 TraceCheckUtils]: 12: Hoare triple {2478#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2479#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 13: Hoare triple {2479#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 14: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 15: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 16: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 17: Hoare triple {2469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L272 TraceCheckUtils]: 18: Hoare triple {2469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 19: Hoare triple {2469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 20: Hoare triple {2469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,136 INFO L290 TraceCheckUtils]: 21: Hoare triple {2469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,137 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 21:57:11,137 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:57:11,137 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1714938431] [2022-04-27 21:57:11,137 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1714938431] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:57:11,137 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1411567082] [2022-04-27 21:57:11,137 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 21:57:11,137 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:11,137 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:57:11,138 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:57:11,139 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 21:57:11,171 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 21:57:11,171 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:57:11,172 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 21:57:11,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:11,177 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:57:11,303 INFO L272 TraceCheckUtils]: 0: Hoare triple {2468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,303 INFO L290 TraceCheckUtils]: 1: Hoare triple {2468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-27 21:57:11,303 INFO L290 TraceCheckUtils]: 2: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {2468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,304 INFO L290 TraceCheckUtils]: 5: Hoare triple {2468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2473#(= main_~y~0 0)} is VALID [2022-04-27 21:57:11,304 INFO L290 TraceCheckUtils]: 6: Hoare triple {2473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:11,305 INFO L290 TraceCheckUtils]: 7: Hoare triple {2474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:11,305 INFO L290 TraceCheckUtils]: 8: Hoare triple {2475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:11,306 INFO L290 TraceCheckUtils]: 9: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:11,306 INFO L290 TraceCheckUtils]: 10: Hoare triple {2476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2514#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:11,306 INFO L290 TraceCheckUtils]: 11: Hoare triple {2514#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2518#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:57:11,307 INFO L290 TraceCheckUtils]: 12: Hoare triple {2518#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2522#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-27 21:57:11,307 INFO L290 TraceCheckUtils]: 13: Hoare triple {2522#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 14: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 15: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 16: Hoare triple {2469#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 17: Hoare triple {2469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L272 TraceCheckUtils]: 18: Hoare triple {2469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 19: Hoare triple {2469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 20: Hoare triple {2469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L290 TraceCheckUtils]: 21: Hoare triple {2469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,308 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 21:57:11,308 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:57:11,445 INFO L290 TraceCheckUtils]: 21: Hoare triple {2469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,445 INFO L290 TraceCheckUtils]: 20: Hoare triple {2469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,445 INFO L290 TraceCheckUtils]: 19: Hoare triple {2469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2469#false} is VALID [2022-04-27 21:57:11,445 INFO L272 TraceCheckUtils]: 18: Hoare triple {2469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {2469#false} is VALID [2022-04-27 21:57:11,445 INFO L290 TraceCheckUtils]: 17: Hoare triple {2469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2469#false} is VALID [2022-04-27 21:57:11,446 INFO L290 TraceCheckUtils]: 16: Hoare triple {2565#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2469#false} is VALID [2022-04-27 21:57:11,447 INFO L290 TraceCheckUtils]: 15: Hoare triple {2569#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2565#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 21:57:11,447 INFO L290 TraceCheckUtils]: 14: Hoare triple {2573#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2569#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:57:11,448 INFO L290 TraceCheckUtils]: 13: Hoare triple {2577#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2573#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:57:11,449 INFO L290 TraceCheckUtils]: 12: Hoare triple {2581#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2577#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 11: Hoare triple {2585#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2581#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 10: Hoare triple {2468#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {2585#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 9: Hoare triple {2468#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 8: Hoare triple {2468#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2468#true} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 7: Hoare triple {2468#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2468#true} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 6: Hoare triple {2468#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2468#true} is VALID [2022-04-27 21:57:11,450 INFO L290 TraceCheckUtils]: 5: Hoare triple {2468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2468#true} is VALID [2022-04-27 21:57:11,450 INFO L272 TraceCheckUtils]: 4: Hoare triple {2468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,451 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2468#true} {2468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,451 INFO L290 TraceCheckUtils]: 2: Hoare triple {2468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,451 INFO L290 TraceCheckUtils]: 1: Hoare triple {2468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2468#true} is VALID [2022-04-27 21:57:11,451 INFO L272 TraceCheckUtils]: 0: Hoare triple {2468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2468#true} is VALID [2022-04-27 21:57:11,451 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 21:57:11,451 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1411567082] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:57:11,451 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:57:11,451 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-27 21:57:11,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1608698770] [2022-04-27 21:57:11,451 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:57:11,452 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:57:11,452 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:57:11,452 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:11,476 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:11,476 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 21:57:11,476 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:57:11,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 21:57:11,477 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-27 21:57:11,477 INFO L87 Difference]: Start difference. First operand 51 states and 68 transitions. Second operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:12,383 INFO L93 Difference]: Finished difference Result 84 states and 112 transitions. [2022-04-27 21:57:12,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-04-27 21:57:12,383 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:57:12,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:57:12,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 61 transitions. [2022-04-27 21:57:12,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 61 transitions. [2022-04-27 21:57:12,385 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 21 states and 61 transitions. [2022-04-27 21:57:12,448 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:12,449 INFO L225 Difference]: With dead ends: 84 [2022-04-27 21:57:12,449 INFO L226 Difference]: Without dead ends: 68 [2022-04-27 21:57:12,449 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=215, Invalid=1117, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 21:57:12,450 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 197 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 246 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 21:57:12,450 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 51 Invalid, 246 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 197 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 21:57:12,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-04-27 21:57:12,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 56. [2022-04-27 21:57:12,619 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:57:12,619 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,620 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,620 INFO L87 Difference]: Start difference. First operand 68 states. Second operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:12,621 INFO L93 Difference]: Finished difference Result 68 states and 87 transitions. [2022-04-27 21:57:12,621 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 87 transitions. [2022-04-27 21:57:12,621 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:12,621 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:12,622 INFO L74 IsIncluded]: Start isIncluded. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-27 21:57:12,622 INFO L87 Difference]: Start difference. First operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-27 21:57:12,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:12,623 INFO L93 Difference]: Finished difference Result 68 states and 87 transitions. [2022-04-27 21:57:12,623 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 87 transitions. [2022-04-27 21:57:12,623 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:12,623 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:12,623 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:57:12,623 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:57:12,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 51 states have (on average 1.3725490196078431) internal successors, (70), 51 states have internal predecessors, (70), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 74 transitions. [2022-04-27 21:57:12,625 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 74 transitions. Word has length 22 [2022-04-27 21:57:12,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:57:12,625 INFO L495 AbstractCegarLoop]: Abstraction has 56 states and 74 transitions. [2022-04-27 21:57:12,625 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:12,625 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 74 transitions. [2022-04-27 21:57:12,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 21:57:12,625 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:57:12,625 INFO L195 NwaCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:57:12,641 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-27 21:57:12,834 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:12,834 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:57:12,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:57:12,834 INFO L85 PathProgramCache]: Analyzing trace with hash -1245601634, now seen corresponding path program 5 times [2022-04-27 21:57:12,834 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:57:12,834 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480806397] [2022-04-27 21:57:12,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:57:12,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:57:12,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:12,942 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:57:12,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:12,954 INFO L290 TraceCheckUtils]: 0: Hoare triple {3033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-27 21:57:12,954 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:12,954 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:12,954 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:57:12,955 INFO L290 TraceCheckUtils]: 1: Hoare triple {3033#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-27 21:57:12,955 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:12,955 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:12,955 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:12,955 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3024#(= main_~y~0 0)} is VALID [2022-04-27 21:57:12,956 INFO L290 TraceCheckUtils]: 6: Hoare triple {3024#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:12,956 INFO L290 TraceCheckUtils]: 7: Hoare triple {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:12,957 INFO L290 TraceCheckUtils]: 8: Hoare triple {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:12,957 INFO L290 TraceCheckUtils]: 9: Hoare triple {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:12,958 INFO L290 TraceCheckUtils]: 10: Hoare triple {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:57:12,958 INFO L290 TraceCheckUtils]: 11: Hoare triple {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:57:12,959 INFO L290 TraceCheckUtils]: 12: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:57:12,959 INFO L290 TraceCheckUtils]: 13: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:57:12,960 INFO L290 TraceCheckUtils]: 14: Hoare triple {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3032#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:57:12,963 INFO L290 TraceCheckUtils]: 15: Hoare triple {3032#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L272 TraceCheckUtils]: 18: Hoare triple {3020#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L290 TraceCheckUtils]: 19: Hoare triple {3020#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L290 TraceCheckUtils]: 20: Hoare triple {3020#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L290 TraceCheckUtils]: 21: Hoare triple {3020#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:12,963 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:57:12,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:57:12,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [480806397] [2022-04-27 21:57:12,964 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [480806397] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:57:12,964 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [43218702] [2022-04-27 21:57:12,964 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 21:57:12,964 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:12,964 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:57:12,965 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:57:12,965 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 21:57:13,040 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 21:57:13,040 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:57:13,040 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 19 conjunts are in the unsatisfiable core [2022-04-27 21:57:13,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:13,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:57:13,208 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-27 21:57:13,209 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,209 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,209 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,209 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3024#(= main_~y~0 0)} is VALID [2022-04-27 21:57:13,209 INFO L290 TraceCheckUtils]: 6: Hoare triple {3024#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:13,210 INFO L290 TraceCheckUtils]: 7: Hoare triple {3025#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:13,211 INFO L290 TraceCheckUtils]: 8: Hoare triple {3026#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:13,211 INFO L290 TraceCheckUtils]: 9: Hoare triple {3027#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:13,212 INFO L290 TraceCheckUtils]: 10: Hoare triple {3028#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:57:13,212 INFO L290 TraceCheckUtils]: 11: Hoare triple {3029#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:57:13,212 INFO L290 TraceCheckUtils]: 12: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:57:13,213 INFO L290 TraceCheckUtils]: 13: Hoare triple {3030#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:57:13,213 INFO L290 TraceCheckUtils]: 14: Hoare triple {3031#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3079#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:57:13,214 INFO L290 TraceCheckUtils]: 15: Hoare triple {3079#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L272 TraceCheckUtils]: 18: Hoare triple {3020#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L290 TraceCheckUtils]: 19: Hoare triple {3020#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L290 TraceCheckUtils]: 20: Hoare triple {3020#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L290 TraceCheckUtils]: 21: Hoare triple {3020#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,214 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:57:13,214 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:57:13,393 INFO L290 TraceCheckUtils]: 21: Hoare triple {3020#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,393 INFO L290 TraceCheckUtils]: 20: Hoare triple {3020#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,393 INFO L290 TraceCheckUtils]: 19: Hoare triple {3020#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3020#false} is VALID [2022-04-27 21:57:13,394 INFO L272 TraceCheckUtils]: 18: Hoare triple {3020#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3020#false} is VALID [2022-04-27 21:57:13,394 INFO L290 TraceCheckUtils]: 17: Hoare triple {3020#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,394 INFO L290 TraceCheckUtils]: 16: Hoare triple {3020#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3020#false} is VALID [2022-04-27 21:57:13,394 INFO L290 TraceCheckUtils]: 15: Hoare triple {3119#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3020#false} is VALID [2022-04-27 21:57:13,395 INFO L290 TraceCheckUtils]: 14: Hoare triple {3123#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3119#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:57:13,395 INFO L290 TraceCheckUtils]: 13: Hoare triple {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3123#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 21:57:13,396 INFO L290 TraceCheckUtils]: 12: Hoare triple {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:57:13,396 INFO L290 TraceCheckUtils]: 11: Hoare triple {3134#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3127#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:57:13,397 INFO L290 TraceCheckUtils]: 10: Hoare triple {3138#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3134#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:57:13,398 INFO L290 TraceCheckUtils]: 9: Hoare triple {3142#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3138#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:57:13,398 INFO L290 TraceCheckUtils]: 8: Hoare triple {3146#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3142#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:57:13,399 INFO L290 TraceCheckUtils]: 7: Hoare triple {3150#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3146#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:57:13,399 INFO L290 TraceCheckUtils]: 6: Hoare triple {3154#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3150#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 21:57:13,400 INFO L290 TraceCheckUtils]: 5: Hoare triple {3019#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3154#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 21:57:13,400 INFO L272 TraceCheckUtils]: 4: Hoare triple {3019#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,400 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3019#true} {3019#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {3019#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {3019#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3019#true} is VALID [2022-04-27 21:57:13,400 INFO L272 TraceCheckUtils]: 0: Hoare triple {3019#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3019#true} is VALID [2022-04-27 21:57:13,400 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 21:57:13,400 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [43218702] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:57:13,401 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:57:13,401 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 22 [2022-04-27 21:57:13,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1991178879] [2022-04-27 21:57:13,401 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:57:13,401 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:57:13,401 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:57:13,401 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:13,427 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:13,427 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 21:57:13,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:57:13,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 21:57:13,427 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2022-04-27 21:57:13,427 INFO L87 Difference]: Start difference. First operand 56 states and 74 transitions. Second operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:18,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:18,997 INFO L93 Difference]: Finished difference Result 154 states and 223 transitions. [2022-04-27 21:57:18,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2022-04-27 21:57:18,998 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 21:57:18,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:57:18,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 169 transitions. [2022-04-27 21:57:19,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 169 transitions. [2022-04-27 21:57:19,002 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 65 states and 169 transitions. [2022-04-27 21:57:19,294 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 169 edges. 169 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:19,296 INFO L225 Difference]: With dead ends: 154 [2022-04-27 21:57:19,296 INFO L226 Difference]: Without dead ends: 144 [2022-04-27 21:57:19,298 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2347 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=1701, Invalid=5271, Unknown=0, NotChecked=0, Total=6972 [2022-04-27 21:57:19,298 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 242 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 407 mSolverCounterSat, 316 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 242 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 723 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 316 IncrementalHoareTripleChecker+Valid, 407 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 21:57:19,298 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [242 Valid, 71 Invalid, 723 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [316 Valid, 407 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 21:57:19,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-04-27 21:57:19,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 76. [2022-04-27 21:57:19,551 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:57:19,551 INFO L82 GeneralOperation]: Start isEquivalent. First operand 144 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,551 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,551 INFO L87 Difference]: Start difference. First operand 144 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:19,554 INFO L93 Difference]: Finished difference Result 144 states and 186 transitions. [2022-04-27 21:57:19,554 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2022-04-27 21:57:19,555 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:19,555 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:19,555 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-27 21:57:19,555 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-27 21:57:19,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:19,560 INFO L93 Difference]: Finished difference Result 144 states and 186 transitions. [2022-04-27 21:57:19,560 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2022-04-27 21:57:19,561 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:19,561 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:19,561 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:57:19,561 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:57:19,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 103 transitions. [2022-04-27 21:57:19,581 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 103 transitions. Word has length 22 [2022-04-27 21:57:19,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:57:19,581 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 103 transitions. [2022-04-27 21:57:19,581 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.4545454545454546) internal successors, (32), 21 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:19,581 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 103 transitions. [2022-04-27 21:57:19,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 21:57:19,582 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:57:19,582 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:57:19,598 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 21:57:19,782 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:19,782 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:57:19,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:57:19,783 INFO L85 PathProgramCache]: Analyzing trace with hash 660626, now seen corresponding path program 6 times [2022-04-27 21:57:19,783 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:57:19,783 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984267298] [2022-04-27 21:57:19,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:57:19,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:57:19,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:20,175 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:57:20,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:20,179 INFO L290 TraceCheckUtils]: 0: Hoare triple {3964#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-27 21:57:20,179 INFO L290 TraceCheckUtils]: 1: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:20,179 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:20,180 INFO L272 TraceCheckUtils]: 0: Hoare triple {3947#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3964#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:57:20,180 INFO L290 TraceCheckUtils]: 1: Hoare triple {3964#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-27 21:57:20,180 INFO L290 TraceCheckUtils]: 2: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:20,180 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:20,180 INFO L272 TraceCheckUtils]: 4: Hoare triple {3947#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:20,181 INFO L290 TraceCheckUtils]: 5: Hoare triple {3947#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:57:20,182 INFO L290 TraceCheckUtils]: 6: Hoare triple {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3953#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:20,248 INFO L290 TraceCheckUtils]: 7: Hoare triple {3953#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3954#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:57:20,959 INFO L290 TraceCheckUtils]: 8: Hoare triple {3954#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3955#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-27 21:57:20,962 INFO L290 TraceCheckUtils]: 9: Hoare triple {3955#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 3) main_~n~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3956#(and (<= main_~y~0 3) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-27 21:57:20,962 INFO L290 TraceCheckUtils]: 10: Hoare triple {3956#(and (<= main_~y~0 3) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 3) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-27 21:57:20,963 INFO L290 TraceCheckUtils]: 11: Hoare triple {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:57:20,964 INFO L290 TraceCheckUtils]: 12: Hoare triple {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} is VALID [2022-04-27 21:57:20,965 INFO L290 TraceCheckUtils]: 13: Hoare triple {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 21:57:20,965 INFO L290 TraceCheckUtils]: 14: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 21:57:20,966 INFO L290 TraceCheckUtils]: 15: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} is VALID [2022-04-27 21:57:20,967 INFO L290 TraceCheckUtils]: 16: Hoare triple {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:57:20,969 INFO L290 TraceCheckUtils]: 17: Hoare triple {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:20,970 INFO L290 TraceCheckUtils]: 18: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:20,970 INFO L272 TraceCheckUtils]: 19: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {3962#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:57:20,971 INFO L290 TraceCheckUtils]: 20: Hoare triple {3962#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3963#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:57:20,971 INFO L290 TraceCheckUtils]: 21: Hoare triple {3963#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-27 21:57:20,971 INFO L290 TraceCheckUtils]: 22: Hoare triple {3948#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-27 21:57:20,971 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:20,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:57:20,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984267298] [2022-04-27 21:57:20,972 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984267298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:57:20,972 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [864910708] [2022-04-27 21:57:20,972 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 21:57:20,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:20,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:57:20,973 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:57:20,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 21:57:21,034 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-27 21:57:21,034 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:57:21,035 INFO L263 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 40 conjunts are in the unsatisfiable core [2022-04-27 21:57:21,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:21,046 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:57:43,974 INFO L272 TraceCheckUtils]: 0: Hoare triple {3947#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:43,986 INFO L290 TraceCheckUtils]: 1: Hoare triple {3947#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-27 21:57:43,986 INFO L290 TraceCheckUtils]: 2: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:43,986 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:43,986 INFO L272 TraceCheckUtils]: 4: Hoare triple {3947#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:43,988 INFO L290 TraceCheckUtils]: 5: Hoare triple {3947#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:57:43,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {3952#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3986#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-27 21:57:43,989 INFO L290 TraceCheckUtils]: 7: Hoare triple {3986#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3990#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:57:43,990 INFO L290 TraceCheckUtils]: 8: Hoare triple {3990#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3994#(and (= (+ main_~x~0 3) main_~n~0) (= (+ main_~y~0 (- 3)) 0))} is VALID [2022-04-27 21:57:43,990 INFO L290 TraceCheckUtils]: 9: Hoare triple {3994#(and (= (+ main_~x~0 3) main_~n~0) (= (+ main_~y~0 (- 3)) 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3998#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= (+ main_~y~0 (- 3)) 0))} is VALID [2022-04-27 21:57:43,991 INFO L290 TraceCheckUtils]: 10: Hoare triple {3998#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= (+ main_~y~0 (- 3)) 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4002#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= 0 (+ main_~z~0 (- 3))))} is VALID [2022-04-27 21:57:43,992 INFO L290 TraceCheckUtils]: 11: Hoare triple {4002#(and (= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (= 0 (+ main_~z~0 (- 3))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4006#(and (= 3 (+ main_~z~0 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 21:57:43,993 INFO L290 TraceCheckUtils]: 12: Hoare triple {4006#(and (= 3 (+ main_~z~0 1)) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (= main_~n~0 (+ main_~x~0 2)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4010#(and (= main_~x~0 (+ (- 1) main_~n~0)) (= 3 (+ main_~z~0 2)) (not (< 0 (mod (+ main_~n~0 4294967293) 4294967296))))} is VALID [2022-04-27 21:57:43,994 INFO L290 TraceCheckUtils]: 13: Hoare triple {4010#(and (= main_~x~0 (+ (- 1) main_~n~0)) (= 3 (+ main_~z~0 2)) (not (< 0 (mod (+ main_~n~0 4294967293) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 21:57:43,994 INFO L290 TraceCheckUtils]: 14: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 21:57:43,995 INFO L290 TraceCheckUtils]: 15: Hoare triple {3960#(and (<= main_~z~0 0) (<= (+ 3 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} is VALID [2022-04-27 21:57:43,996 INFO L290 TraceCheckUtils]: 16: Hoare triple {3959#(and (<= main_~z~0 1) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 3) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 21:57:43,997 INFO L290 TraceCheckUtils]: 17: Hoare triple {3958#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 3) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-27 21:57:43,997 INFO L290 TraceCheckUtils]: 18: Hoare triple {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} is VALID [2022-04-27 21:57:44,000 INFO L272 TraceCheckUtils]: 19: Hoare triple {3957#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 3) main_~n~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:57:44,000 INFO L290 TraceCheckUtils]: 20: Hoare triple {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4036#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:57:44,000 INFO L290 TraceCheckUtils]: 21: Hoare triple {4036#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-27 21:57:44,001 INFO L290 TraceCheckUtils]: 22: Hoare triple {3948#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-27 21:57:44,002 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:44,002 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:57:44,685 INFO L290 TraceCheckUtils]: 22: Hoare triple {3948#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-27 21:57:44,686 INFO L290 TraceCheckUtils]: 21: Hoare triple {4036#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3948#false} is VALID [2022-04-27 21:57:44,686 INFO L290 TraceCheckUtils]: 20: Hoare triple {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4036#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:57:44,687 INFO L272 TraceCheckUtils]: 19: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4032#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:57:44,688 INFO L290 TraceCheckUtils]: 18: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,689 INFO L290 TraceCheckUtils]: 17: Hoare triple {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,700 INFO L290 TraceCheckUtils]: 16: Hoare triple {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,701 INFO L290 TraceCheckUtils]: 15: Hoare triple {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:57:44,701 INFO L290 TraceCheckUtils]: 14: Hoare triple {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,702 INFO L290 TraceCheckUtils]: 13: Hoare triple {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4066#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,703 INFO L290 TraceCheckUtils]: 12: Hoare triple {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4062#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:57:44,704 INFO L290 TraceCheckUtils]: 11: Hoare triple {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4058#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,705 INFO L290 TraceCheckUtils]: 10: Hoare triple {4082#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {3961#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:44,706 INFO L290 TraceCheckUtils]: 9: Hoare triple {4086#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4082#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:57:44,707 INFO L290 TraceCheckUtils]: 8: Hoare triple {4090#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4086#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:57:44,708 INFO L290 TraceCheckUtils]: 7: Hoare triple {4094#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4090#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:57:44,710 INFO L290 TraceCheckUtils]: 6: Hoare triple {4098#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4094#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:57:44,711 INFO L290 TraceCheckUtils]: 5: Hoare triple {3947#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4098#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:57:44,711 INFO L272 TraceCheckUtils]: 4: Hoare triple {3947#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:44,711 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3947#true} {3947#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:44,711 INFO L290 TraceCheckUtils]: 2: Hoare triple {3947#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:44,711 INFO L290 TraceCheckUtils]: 1: Hoare triple {3947#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3947#true} is VALID [2022-04-27 21:57:44,711 INFO L272 TraceCheckUtils]: 0: Hoare triple {3947#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3947#true} is VALID [2022-04-27 21:57:44,712 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:44,712 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [864910708] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:57:44,712 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:57:44,712 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16, 13] total 32 [2022-04-27 21:57:44,712 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958220951] [2022-04-27 21:57:44,712 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:57:44,714 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 21:57:44,714 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:57:44,714 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:44,770 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:44,770 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-04-27 21:57:44,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:57:44,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-04-27 21:57:44,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=871, Unknown=0, NotChecked=0, Total=992 [2022-04-27 21:57:44,771 INFO L87 Difference]: Start difference. First operand 76 states and 103 transitions. Second operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:49,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:49,111 INFO L93 Difference]: Finished difference Result 126 states and 161 transitions. [2022-04-27 21:57:49,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-27 21:57:49,111 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 21:57:49,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:57:49,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:49,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 77 transitions. [2022-04-27 21:57:49,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:49,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 77 transitions. [2022-04-27 21:57:49,113 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 77 transitions. [2022-04-27 21:57:51,262 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 76 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:51,264 INFO L225 Difference]: With dead ends: 126 [2022-04-27 21:57:51,264 INFO L226 Difference]: Without dead ends: 98 [2022-04-27 21:57:51,265 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 865 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=456, Invalid=3450, Unknown=0, NotChecked=0, Total=3906 [2022-04-27 21:57:51,266 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 69 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 526 mSolverCounterSat, 71 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 69 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 597 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 71 IncrementalHoareTripleChecker+Valid, 526 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-27 21:57:51,266 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [69 Valid, 101 Invalid, 597 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [71 Valid, 526 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-27 21:57:51,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2022-04-27 21:57:51,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 75. [2022-04-27 21:57:51,523 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:57:51,524 INFO L82 GeneralOperation]: Start isEquivalent. First operand 98 states. Second operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:51,524 INFO L74 IsIncluded]: Start isIncluded. First operand 98 states. Second operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:51,524 INFO L87 Difference]: Start difference. First operand 98 states. Second operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:51,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:51,532 INFO L93 Difference]: Finished difference Result 98 states and 129 transitions. [2022-04-27 21:57:51,532 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 129 transitions. [2022-04-27 21:57:51,532 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:51,532 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:51,532 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-27 21:57:51,533 INFO L87 Difference]: Start difference. First operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 98 states. [2022-04-27 21:57:51,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:51,534 INFO L93 Difference]: Finished difference Result 98 states and 129 transitions. [2022-04-27 21:57:51,534 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 129 transitions. [2022-04-27 21:57:51,534 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:51,534 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:51,534 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:57:51,534 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:57:51,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 70 states have (on average 1.3714285714285714) internal successors, (96), 70 states have internal predecessors, (96), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:51,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 100 transitions. [2022-04-27 21:57:51,536 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 100 transitions. Word has length 23 [2022-04-27 21:57:51,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:57:51,536 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 100 transitions. [2022-04-27 21:57:51,536 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 1.40625) internal successors, (45), 29 states have internal predecessors, (45), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:51,536 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 100 transitions. [2022-04-27 21:57:51,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 21:57:51,536 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:57:51,536 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:57:51,554 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 21:57:51,751 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-27 21:57:51,751 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:57:51,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:57:51,752 INFO L85 PathProgramCache]: Analyzing trace with hash -1529937545, now seen corresponding path program 7 times [2022-04-27 21:57:51,752 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:57:51,752 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733961318] [2022-04-27 21:57:51,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:57:51,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:57:51,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:51,873 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:57:51,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:51,876 INFO L290 TraceCheckUtils]: 0: Hoare triple {4709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-27 21:57:51,876 INFO L290 TraceCheckUtils]: 1: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:51,876 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:51,877 INFO L272 TraceCheckUtils]: 0: Hoare triple {4695#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:57:51,877 INFO L290 TraceCheckUtils]: 1: Hoare triple {4709#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-27 21:57:51,877 INFO L290 TraceCheckUtils]: 2: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:51,877 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:51,877 INFO L272 TraceCheckUtils]: 4: Hoare triple {4695#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:51,878 INFO L290 TraceCheckUtils]: 5: Hoare triple {4695#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4700#(= main_~y~0 0)} is VALID [2022-04-27 21:57:51,878 INFO L290 TraceCheckUtils]: 6: Hoare triple {4700#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:51,879 INFO L290 TraceCheckUtils]: 7: Hoare triple {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:51,879 INFO L290 TraceCheckUtils]: 8: Hoare triple {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:51,880 INFO L290 TraceCheckUtils]: 9: Hoare triple {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:51,880 INFO L290 TraceCheckUtils]: 10: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:51,880 INFO L290 TraceCheckUtils]: 11: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4705#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:57:51,881 INFO L290 TraceCheckUtils]: 12: Hoare triple {4705#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4706#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 21:57:51,881 INFO L290 TraceCheckUtils]: 13: Hoare triple {4706#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4707#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 21:57:51,882 INFO L290 TraceCheckUtils]: 14: Hoare triple {4707#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4708#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 21:57:51,882 INFO L290 TraceCheckUtils]: 15: Hoare triple {4708#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:51,882 INFO L290 TraceCheckUtils]: 16: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 17: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 20: Hoare triple {4696#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L272 TraceCheckUtils]: 21: Hoare triple {4696#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 22: Hoare triple {4696#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 23: Hoare triple {4696#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L290 TraceCheckUtils]: 24: Hoare triple {4696#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:51,883 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 21:57:51,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:57:51,883 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [733961318] [2022-04-27 21:57:51,883 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [733961318] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:57:51,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1771047695] [2022-04-27 21:57:51,884 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 21:57:51,884 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:51,884 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:57:51,885 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:57:51,885 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 21:57:51,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:51,920 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-27 21:57:51,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:51,926 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:57:52,088 INFO L272 TraceCheckUtils]: 0: Hoare triple {4695#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,088 INFO L290 TraceCheckUtils]: 1: Hoare triple {4695#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-27 21:57:52,088 INFO L290 TraceCheckUtils]: 2: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,088 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,088 INFO L272 TraceCheckUtils]: 4: Hoare triple {4695#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,088 INFO L290 TraceCheckUtils]: 5: Hoare triple {4695#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4700#(= main_~y~0 0)} is VALID [2022-04-27 21:57:52,089 INFO L290 TraceCheckUtils]: 6: Hoare triple {4700#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:52,089 INFO L290 TraceCheckUtils]: 7: Hoare triple {4701#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:57:52,090 INFO L290 TraceCheckUtils]: 8: Hoare triple {4702#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:57:52,090 INFO L290 TraceCheckUtils]: 9: Hoare triple {4703#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:52,091 INFO L290 TraceCheckUtils]: 10: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:52,091 INFO L290 TraceCheckUtils]: 11: Hoare triple {4704#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4746#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:52,091 INFO L290 TraceCheckUtils]: 12: Hoare triple {4746#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4750#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 21:57:52,092 INFO L290 TraceCheckUtils]: 13: Hoare triple {4750#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4754#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 14: Hoare triple {4754#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4758#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 15: Hoare triple {4758#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 16: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 17: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 18: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 19: Hoare triple {4696#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:52,093 INFO L290 TraceCheckUtils]: 20: Hoare triple {4696#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,094 INFO L272 TraceCheckUtils]: 21: Hoare triple {4696#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4696#false} is VALID [2022-04-27 21:57:52,094 INFO L290 TraceCheckUtils]: 22: Hoare triple {4696#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4696#false} is VALID [2022-04-27 21:57:52,094 INFO L290 TraceCheckUtils]: 23: Hoare triple {4696#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,094 INFO L290 TraceCheckUtils]: 24: Hoare triple {4696#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,094 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 21:57:52,094 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:57:52,300 INFO L290 TraceCheckUtils]: 24: Hoare triple {4696#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,300 INFO L290 TraceCheckUtils]: 23: Hoare triple {4696#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,300 INFO L290 TraceCheckUtils]: 22: Hoare triple {4696#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4696#false} is VALID [2022-04-27 21:57:52,300 INFO L272 TraceCheckUtils]: 21: Hoare triple {4696#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {4696#false} is VALID [2022-04-27 21:57:52,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {4696#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4696#false} is VALID [2022-04-27 21:57:52,307 INFO L290 TraceCheckUtils]: 19: Hoare triple {4804#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4696#false} is VALID [2022-04-27 21:57:52,308 INFO L290 TraceCheckUtils]: 18: Hoare triple {4808#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4804#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 21:57:52,309 INFO L290 TraceCheckUtils]: 17: Hoare triple {4812#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4808#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:57:52,310 INFO L290 TraceCheckUtils]: 16: Hoare triple {4816#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4812#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:57:52,310 INFO L290 TraceCheckUtils]: 15: Hoare triple {4820#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4816#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:57:52,311 INFO L290 TraceCheckUtils]: 14: Hoare triple {4824#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4820#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-27 21:57:52,312 INFO L290 TraceCheckUtils]: 13: Hoare triple {4828#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4824#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 21:57:52,313 INFO L290 TraceCheckUtils]: 12: Hoare triple {4832#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4828#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 11: Hoare triple {4695#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {4832#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 10: Hoare triple {4695#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 9: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 8: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {4695#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 5: Hoare triple {4695#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L272 TraceCheckUtils]: 4: Hoare triple {4695#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4695#true} {4695#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {4695#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L290 TraceCheckUtils]: 1: Hoare triple {4695#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4695#true} is VALID [2022-04-27 21:57:52,314 INFO L272 TraceCheckUtils]: 0: Hoare triple {4695#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4695#true} is VALID [2022-04-27 21:57:52,315 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 21:57:52,315 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1771047695] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:57:52,315 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:57:52,315 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 24 [2022-04-27 21:57:52,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1083115324] [2022-04-27 21:57:52,315 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:57:52,315 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:57:52,316 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:57:52,316 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:52,342 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:52,342 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-27 21:57:52,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:57:52,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-27 21:57:52,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=457, Unknown=0, NotChecked=0, Total=552 [2022-04-27 21:57:52,342 INFO L87 Difference]: Start difference. First operand 75 states and 100 transitions. Second operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:53,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:53,902 INFO L93 Difference]: Finished difference Result 119 states and 160 transitions. [2022-04-27 21:57:53,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-27 21:57:53,902 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 21:57:53,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:57:53,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:53,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 70 transitions. [2022-04-27 21:57:53,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:53,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 70 transitions. [2022-04-27 21:57:53,904 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 70 transitions. [2022-04-27 21:57:53,974 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:57:53,975 INFO L225 Difference]: With dead ends: 119 [2022-04-27 21:57:53,975 INFO L226 Difference]: Without dead ends: 100 [2022-04-27 21:57:53,976 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=304, Invalid=1858, Unknown=0, NotChecked=0, Total=2162 [2022-04-27 21:57:53,976 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 29 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 401 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 21:57:53,976 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [29 Valid, 74 Invalid, 401 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 21:57:53,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2022-04-27 21:57:54,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 82. [2022-04-27 21:57:54,298 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:57:54,298 INFO L82 GeneralOperation]: Start isEquivalent. First operand 100 states. Second operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:54,298 INFO L74 IsIncluded]: Start isIncluded. First operand 100 states. Second operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:54,298 INFO L87 Difference]: Start difference. First operand 100 states. Second operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:54,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:54,300 INFO L93 Difference]: Finished difference Result 100 states and 129 transitions. [2022-04-27 21:57:54,300 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 129 transitions. [2022-04-27 21:57:54,300 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:54,300 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:54,300 INFO L74 IsIncluded]: Start isIncluded. First operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-27 21:57:54,300 INFO L87 Difference]: Start difference. First operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 100 states. [2022-04-27 21:57:54,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:57:54,302 INFO L93 Difference]: Finished difference Result 100 states and 129 transitions. [2022-04-27 21:57:54,302 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 129 transitions. [2022-04-27 21:57:54,302 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:57:54,302 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:57:54,302 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:57:54,302 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:57:54,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 77 states have (on average 1.3766233766233766) internal successors, (106), 77 states have internal predecessors, (106), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:54,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 110 transitions. [2022-04-27 21:57:54,303 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 110 transitions. Word has length 25 [2022-04-27 21:57:54,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:57:54,303 INFO L495 AbstractCegarLoop]: Abstraction has 82 states and 110 transitions. [2022-04-27 21:57:54,303 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:57:54,303 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 110 transitions. [2022-04-27 21:57:54,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 21:57:54,304 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:57:54,304 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:57:54,321 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-27 21:57:54,519 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:54,519 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:57:54,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:57:54,520 INFO L85 PathProgramCache]: Analyzing trace with hash -1167600349, now seen corresponding path program 8 times [2022-04-27 21:57:54,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:57:54,520 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597049745] [2022-04-27 21:57:54,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:57:54,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:57:54,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:54,961 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:57:54,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:54,967 INFO L290 TraceCheckUtils]: 0: Hoare triple {5464#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-27 21:57:54,967 INFO L290 TraceCheckUtils]: 1: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:57:54,967 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:57:54,969 INFO L272 TraceCheckUtils]: 0: Hoare triple {5445#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5464#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:57:54,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {5464#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-27 21:57:54,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:57:54,969 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:57:54,969 INFO L272 TraceCheckUtils]: 4: Hoare triple {5445#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:57:54,969 INFO L290 TraceCheckUtils]: 5: Hoare triple {5445#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:57:54,971 INFO L290 TraceCheckUtils]: 6: Hoare triple {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:57:54,978 INFO L290 TraceCheckUtils]: 7: Hoare triple {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:57:55,005 INFO L290 TraceCheckUtils]: 8: Hoare triple {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5453#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:55,039 INFO L290 TraceCheckUtils]: 9: Hoare triple {5453#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5454#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 4 main_~y~0))} is VALID [2022-04-27 21:57:55,040 INFO L290 TraceCheckUtils]: 10: Hoare triple {5454#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5455#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4))} is VALID [2022-04-27 21:57:55,041 INFO L290 TraceCheckUtils]: 11: Hoare triple {5455#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4) main_~n~0) (<= main_~y~0 4))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:57:55,042 INFO L290 TraceCheckUtils]: 12: Hoare triple {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,044 INFO L290 TraceCheckUtils]: 13: Hoare triple {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,045 INFO L290 TraceCheckUtils]: 14: Hoare triple {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,046 INFO L290 TraceCheckUtils]: 15: Hoare triple {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,046 INFO L290 TraceCheckUtils]: 16: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,047 INFO L290 TraceCheckUtils]: 17: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,048 INFO L290 TraceCheckUtils]: 18: Hoare triple {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,048 INFO L290 TraceCheckUtils]: 19: Hoare triple {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:57:55,050 INFO L290 TraceCheckUtils]: 20: Hoare triple {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:55,050 INFO L290 TraceCheckUtils]: 21: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:57:55,051 INFO L272 TraceCheckUtils]: 22: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5462#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 21:57:55,052 INFO L290 TraceCheckUtils]: 23: Hoare triple {5462#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5463#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 21:57:55,052 INFO L290 TraceCheckUtils]: 24: Hoare triple {5463#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-27 21:57:55,052 INFO L290 TraceCheckUtils]: 25: Hoare triple {5446#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-27 21:57:55,052 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:57:55,052 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:57:55,052 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597049745] [2022-04-27 21:57:55,052 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [597049745] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:57:55,053 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1901038819] [2022-04-27 21:57:55,053 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 21:57:55,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:57:55,053 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:57:55,053 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:57:55,056 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 21:57:55,136 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 21:57:55,136 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:57:55,137 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-27 21:57:55,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:57:55,153 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:58:29,507 INFO L272 TraceCheckUtils]: 0: Hoare triple {5445#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:29,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {5445#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-27 21:58:29,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:29,508 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:29,508 INFO L272 TraceCheckUtils]: 4: Hoare triple {5445#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:29,508 INFO L290 TraceCheckUtils]: 5: Hoare triple {5445#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 21:58:29,511 INFO L290 TraceCheckUtils]: 6: Hoare triple {5450#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:58:29,523 INFO L290 TraceCheckUtils]: 7: Hoare triple {5451#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:58:29,526 INFO L290 TraceCheckUtils]: 8: Hoare triple {5452#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5492#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:29,528 INFO L290 TraceCheckUtils]: 9: Hoare triple {5492#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5496#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:58:29,528 INFO L290 TraceCheckUtils]: 10: Hoare triple {5496#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5500#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:58:29,529 INFO L290 TraceCheckUtils]: 11: Hoare triple {5500#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5504#(and (<= 4 main_~z~0) (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967291)) (<= main_~z~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:58:29,532 INFO L290 TraceCheckUtils]: 12: Hoare triple {5504#(and (<= 4 main_~z~0) (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967291)) (<= main_~z~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5508#(and (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)) (<= main_~z~0 3) (<= 3 main_~z~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:58:29,534 INFO L290 TraceCheckUtils]: 13: Hoare triple {5508#(and (<= main_~x~0 (+ (* (div (+ main_~z~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)) (<= main_~z~0 3) (<= 3 main_~z~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= (+ main_~z~0 main_~x~0) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5512#(and (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~z~0 2) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~z~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)) (<= (+ main_~z~0 main_~x~0) main_~n~0) (<= 2 main_~z~0))} is VALID [2022-04-27 21:58:29,536 INFO L290 TraceCheckUtils]: 14: Hoare triple {5512#(and (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~z~0 2) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~z~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)) (<= (+ main_~z~0 main_~x~0) main_~n~0) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5516#(and (<= main_~z~0 1) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~x~0 (+ 4294967294 (* (div (+ main_~z~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 1 main_~z~0) (<= (+ main_~z~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 21:58:29,549 INFO L290 TraceCheckUtils]: 15: Hoare triple {5516#(and (<= main_~z~0 1) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~x~0 (+ 4294967294 (* (div (+ main_~z~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 1 main_~z~0) (<= (+ main_~z~0 main_~x~0) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:58:29,550 INFO L290 TraceCheckUtils]: 16: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:58:29,550 INFO L290 TraceCheckUtils]: 17: Hoare triple {5460#(and (<= main_~z~0 0) (<= (+ (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:58:29,551 INFO L290 TraceCheckUtils]: 18: Hoare triple {5459#(and (<= main_~z~0 1) (<= (+ (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} is VALID [2022-04-27 21:58:29,552 INFO L290 TraceCheckUtils]: 19: Hoare triple {5458#(and (<= main_~z~0 2) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} is VALID [2022-04-27 21:58:29,553 INFO L290 TraceCheckUtils]: 20: Hoare triple {5457#(and (<= main_~z~0 3) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 4) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:58:29,554 INFO L290 TraceCheckUtils]: 21: Hoare triple {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:58:29,555 INFO L272 TraceCheckUtils]: 22: Hoare triple {5456#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 4) main_~n~0) (<= main_~z~0 4))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:58:29,555 INFO L290 TraceCheckUtils]: 23: Hoare triple {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5545#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:58:29,556 INFO L290 TraceCheckUtils]: 24: Hoare triple {5545#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-27 21:58:29,556 INFO L290 TraceCheckUtils]: 25: Hoare triple {5446#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-27 21:58:29,556 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:58:29,556 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:58:30,564 INFO L290 TraceCheckUtils]: 25: Hoare triple {5446#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-27 21:58:30,564 INFO L290 TraceCheckUtils]: 24: Hoare triple {5545#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5446#false} is VALID [2022-04-27 21:58:30,565 INFO L290 TraceCheckUtils]: 23: Hoare triple {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5545#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 21:58:30,565 INFO L272 TraceCheckUtils]: 22: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {5541#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 21:58:30,566 INFO L290 TraceCheckUtils]: 21: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,567 INFO L290 TraceCheckUtils]: 20: Hoare triple {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,568 INFO L290 TraceCheckUtils]: 19: Hoare triple {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,568 INFO L290 TraceCheckUtils]: 18: Hoare triple {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:58:30,569 INFO L290 TraceCheckUtils]: 17: Hoare triple {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,570 INFO L290 TraceCheckUtils]: 16: Hoare triple {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:58:30,571 INFO L290 TraceCheckUtils]: 15: Hoare triple {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5579#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:58:30,571 INFO L290 TraceCheckUtils]: 14: Hoare triple {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5575#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,572 INFO L290 TraceCheckUtils]: 13: Hoare triple {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5571#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:58:30,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5567#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,574 INFO L290 TraceCheckUtils]: 11: Hoare triple {5598#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {5461#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 21:58:30,574 INFO L290 TraceCheckUtils]: 10: Hoare triple {5602#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5598#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 21:58:30,576 INFO L290 TraceCheckUtils]: 9: Hoare triple {5606#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5602#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 21:58:30,577 INFO L290 TraceCheckUtils]: 8: Hoare triple {5610#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5606#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 21:58:30,578 INFO L290 TraceCheckUtils]: 7: Hoare triple {5614#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5610#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:58:30,580 INFO L290 TraceCheckUtils]: 6: Hoare triple {5618#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5614#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 21:58:30,581 INFO L290 TraceCheckUtils]: 5: Hoare triple {5445#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5618#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 21:58:30,581 INFO L272 TraceCheckUtils]: 4: Hoare triple {5445#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:30,581 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5445#true} {5445#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:30,581 INFO L290 TraceCheckUtils]: 2: Hoare triple {5445#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:30,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {5445#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5445#true} is VALID [2022-04-27 21:58:30,581 INFO L272 TraceCheckUtils]: 0: Hoare triple {5445#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5445#true} is VALID [2022-04-27 21:58:30,581 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:58:30,581 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1901038819] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:58:30,581 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:58:30,581 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19, 15] total 36 [2022-04-27 21:58:30,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894355951] [2022-04-27 21:58:30,582 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:58:30,582 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 21:58:30,582 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:58:30,582 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:30,701 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:58:30,701 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-27 21:58:30,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:58:30,702 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-27 21:58:30,702 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=145, Invalid=1115, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 21:58:30,702 INFO L87 Difference]: Start difference. First operand 82 states and 110 transitions. Second operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:33,320 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.53s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:58:35,974 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:58:40,110 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.00s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 21:58:53,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:53,157 INFO L93 Difference]: Finished difference Result 140 states and 178 transitions. [2022-04-27 21:58:53,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2022-04-27 21:58:53,157 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 21:58:53,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:58:53,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:53,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 87 transitions. [2022-04-27 21:58:53,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:53,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 87 transitions. [2022-04-27 21:58:53,159 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 40 states and 87 transitions. [2022-04-27 21:58:54,359 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 87 edges. 87 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:58:54,360 INFO L225 Difference]: With dead ends: 140 [2022-04-27 21:58:54,360 INFO L226 Difference]: Without dead ends: 105 [2022-04-27 21:58:54,361 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 32 SyntacticMatches, 6 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1178 ImplicationChecksByTransitivity, 13.9s TimeCoverageRelationStatistics Valid=557, Invalid=4696, Unknown=3, NotChecked=0, Total=5256 [2022-04-27 21:58:54,362 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 84 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 636 mSolverCounterSat, 100 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 98 SdHoareTripleChecker+Invalid, 737 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 100 IncrementalHoareTripleChecker+Valid, 636 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.1s IncrementalHoareTripleChecker+Time [2022-04-27 21:58:54,362 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [84 Valid, 98 Invalid, 737 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [100 Valid, 636 Invalid, 1 Unknown, 0 Unchecked, 7.1s Time] [2022-04-27 21:58:54,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2022-04-27 21:58:54,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 76. [2022-04-27 21:58:54,647 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:58:54,648 INFO L82 GeneralOperation]: Start isEquivalent. First operand 105 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:54,648 INFO L74 IsIncluded]: Start isIncluded. First operand 105 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:54,648 INFO L87 Difference]: Start difference. First operand 105 states. Second operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:54,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:54,649 INFO L93 Difference]: Finished difference Result 105 states and 138 transitions. [2022-04-27 21:58:54,649 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 138 transitions. [2022-04-27 21:58:54,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:58:54,650 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:58:54,650 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 105 states. [2022-04-27 21:58:54,650 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 105 states. [2022-04-27 21:58:54,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:54,651 INFO L93 Difference]: Finished difference Result 105 states and 138 transitions. [2022-04-27 21:58:54,651 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 138 transitions. [2022-04-27 21:58:54,652 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:58:54,652 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:58:54,652 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:58:54,652 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:58:54,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.3943661971830985) internal successors, (99), 71 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:54,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 103 transitions. [2022-04-27 21:58:54,653 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 103 transitions. Word has length 26 [2022-04-27 21:58:54,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:58:54,653 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 103 transitions. [2022-04-27 21:58:54,653 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.4166666666666667) internal successors, (51), 33 states have internal predecessors, (51), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:54,653 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 103 transitions. [2022-04-27 21:58:54,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 21:58:54,654 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:58:54,654 INFO L195 NwaCegarLoop]: trace histogram [7, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:58:54,669 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 21:58:54,867 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-27 21:58:54,868 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:58:54,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:58:54,868 INFO L85 PathProgramCache]: Analyzing trace with hash -1028834537, now seen corresponding path program 9 times [2022-04-27 21:58:54,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:58:54,868 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687295069] [2022-04-27 21:58:54,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:58:54,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:58:54,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:55,041 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:58:55,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:55,046 INFO L290 TraceCheckUtils]: 0: Hoare triple {6283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6265#true} is VALID [2022-04-27 21:58:55,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {6265#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,046 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6265#true} {6265#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,047 INFO L272 TraceCheckUtils]: 0: Hoare triple {6265#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:58:55,047 INFO L290 TraceCheckUtils]: 1: Hoare triple {6283#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6265#true} is VALID [2022-04-27 21:58:55,047 INFO L290 TraceCheckUtils]: 2: Hoare triple {6265#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,047 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6265#true} {6265#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,047 INFO L272 TraceCheckUtils]: 4: Hoare triple {6265#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,047 INFO L290 TraceCheckUtils]: 5: Hoare triple {6265#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6270#(= main_~y~0 0)} is VALID [2022-04-27 21:58:55,048 INFO L290 TraceCheckUtils]: 6: Hoare triple {6270#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6271#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:58:55,048 INFO L290 TraceCheckUtils]: 7: Hoare triple {6271#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6272#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:58:55,049 INFO L290 TraceCheckUtils]: 8: Hoare triple {6272#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6273#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:58:55,049 INFO L290 TraceCheckUtils]: 9: Hoare triple {6273#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6274#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:58:55,050 INFO L290 TraceCheckUtils]: 10: Hoare triple {6274#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6275#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:58:55,050 INFO L290 TraceCheckUtils]: 11: Hoare triple {6275#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6276#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:55,051 INFO L290 TraceCheckUtils]: 12: Hoare triple {6276#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6277#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:58:55,051 INFO L290 TraceCheckUtils]: 13: Hoare triple {6277#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6277#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:58:55,052 INFO L290 TraceCheckUtils]: 14: Hoare triple {6277#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6278#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 21:58:55,052 INFO L290 TraceCheckUtils]: 15: Hoare triple {6278#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6279#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 21:58:55,053 INFO L290 TraceCheckUtils]: 16: Hoare triple {6279#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6280#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 21:58:55,064 INFO L290 TraceCheckUtils]: 17: Hoare triple {6280#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6281#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 21:58:55,065 INFO L290 TraceCheckUtils]: 18: Hoare triple {6281#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6282#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:58:55,065 INFO L290 TraceCheckUtils]: 19: Hoare triple {6282#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,065 INFO L290 TraceCheckUtils]: 20: Hoare triple {6266#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6266#false} is VALID [2022-04-27 21:58:55,065 INFO L290 TraceCheckUtils]: 21: Hoare triple {6266#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6266#false} is VALID [2022-04-27 21:58:55,065 INFO L290 TraceCheckUtils]: 22: Hoare triple {6266#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,066 INFO L272 TraceCheckUtils]: 23: Hoare triple {6266#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6266#false} is VALID [2022-04-27 21:58:55,066 INFO L290 TraceCheckUtils]: 24: Hoare triple {6266#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6266#false} is VALID [2022-04-27 21:58:55,066 INFO L290 TraceCheckUtils]: 25: Hoare triple {6266#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,066 INFO L290 TraceCheckUtils]: 26: Hoare triple {6266#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,066 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 21:58:55,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:58:55,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [687295069] [2022-04-27 21:58:55,066 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [687295069] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:58:55,066 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1388355217] [2022-04-27 21:58:55,066 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:58:55,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:58:55,066 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:58:55,067 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:58:55,068 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 21:58:55,112 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 21:58:55,112 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:58:55,113 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 21:58:55,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:55,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:58:55,252 INFO L272 TraceCheckUtils]: 0: Hoare triple {6265#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {6265#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L290 TraceCheckUtils]: 2: Hoare triple {6265#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6265#true} {6265#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {6265#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {6265#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L290 TraceCheckUtils]: 6: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L290 TraceCheckUtils]: 7: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,252 INFO L290 TraceCheckUtils]: 8: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 9: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 10: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 11: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 12: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 13: Hoare triple {6265#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 14: Hoare triple {6265#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6329#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 21:58:55,253 INFO L290 TraceCheckUtils]: 15: Hoare triple {6329#(= main_~z~0 main_~y~0)} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6333#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-27 21:58:55,254 INFO L290 TraceCheckUtils]: 16: Hoare triple {6333#(= main_~y~0 (+ main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6337#(= (+ main_~z~0 1) (+ (- 1) main_~y~0))} is VALID [2022-04-27 21:58:55,255 INFO L290 TraceCheckUtils]: 17: Hoare triple {6337#(= (+ main_~z~0 1) (+ (- 1) main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:58:55,259 INFO L290 TraceCheckUtils]: 18: Hoare triple {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:58:55,259 INFO L290 TraceCheckUtils]: 19: Hoare triple {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:58:55,260 INFO L290 TraceCheckUtils]: 20: Hoare triple {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6351#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:58:55,261 INFO L290 TraceCheckUtils]: 21: Hoare triple {6351#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6355#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:58:55,261 INFO L290 TraceCheckUtils]: 22: Hoare triple {6355#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,261 INFO L272 TraceCheckUtils]: 23: Hoare triple {6266#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6266#false} is VALID [2022-04-27 21:58:55,261 INFO L290 TraceCheckUtils]: 24: Hoare triple {6266#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6266#false} is VALID [2022-04-27 21:58:55,261 INFO L290 TraceCheckUtils]: 25: Hoare triple {6266#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,262 INFO L290 TraceCheckUtils]: 26: Hoare triple {6266#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,262 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-27 21:58:55,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:58:55,397 INFO L290 TraceCheckUtils]: 26: Hoare triple {6266#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,397 INFO L290 TraceCheckUtils]: 25: Hoare triple {6266#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,397 INFO L290 TraceCheckUtils]: 24: Hoare triple {6266#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6266#false} is VALID [2022-04-27 21:58:55,397 INFO L272 TraceCheckUtils]: 23: Hoare triple {6266#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {6266#false} is VALID [2022-04-27 21:58:55,398 INFO L290 TraceCheckUtils]: 22: Hoare triple {6355#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6266#false} is VALID [2022-04-27 21:58:55,398 INFO L290 TraceCheckUtils]: 21: Hoare triple {6351#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6355#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:58:55,399 INFO L290 TraceCheckUtils]: 20: Hoare triple {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6351#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 21:58:55,399 INFO L290 TraceCheckUtils]: 19: Hoare triple {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:58:55,400 INFO L290 TraceCheckUtils]: 18: Hoare triple {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:58:55,400 INFO L290 TraceCheckUtils]: 17: Hoare triple {6398#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6341#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 21:58:55,401 INFO L290 TraceCheckUtils]: 16: Hoare triple {6402#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6398#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 15: Hoare triple {6406#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6402#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 14: Hoare triple {6265#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {6406#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 13: Hoare triple {6265#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 12: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 11: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 10: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 9: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,402 INFO L290 TraceCheckUtils]: 8: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L290 TraceCheckUtils]: 7: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L290 TraceCheckUtils]: 6: Hoare triple {6265#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L290 TraceCheckUtils]: 5: Hoare triple {6265#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {6265#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6265#true} {6265#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L290 TraceCheckUtils]: 2: Hoare triple {6265#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {6265#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L272 TraceCheckUtils]: 0: Hoare triple {6265#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6265#true} is VALID [2022-04-27 21:58:55,403 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2022-04-27 21:58:55,403 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1388355217] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:58:55,403 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:58:55,403 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8] total 25 [2022-04-27 21:58:55,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110393339] [2022-04-27 21:58:55,404 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:58:55,404 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:58:55,404 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:58:55,404 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:55,431 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:58:55,431 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-27 21:58:55,431 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:58:55,431 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-27 21:58:55,431 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=501, Unknown=0, NotChecked=0, Total=600 [2022-04-27 21:58:55,431 INFO L87 Difference]: Start difference. First operand 76 states and 103 transitions. Second operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:57,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:57,778 INFO L93 Difference]: Finished difference Result 129 states and 173 transitions. [2022-04-27 21:58:57,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-04-27 21:58:57,779 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:58:57,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 21:58:57,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:57,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 106 transitions. [2022-04-27 21:58:57,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:57,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 106 transitions. [2022-04-27 21:58:57,781 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 39 states and 106 transitions. [2022-04-27 21:58:57,884 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 106 edges. 106 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:58:57,886 INFO L225 Difference]: With dead ends: 129 [2022-04-27 21:58:57,886 INFO L226 Difference]: Without dead ends: 115 [2022-04-27 21:58:57,887 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 696 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=649, Invalid=3011, Unknown=0, NotChecked=0, Total=3660 [2022-04-27 21:58:57,888 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 106 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 608 mSolverCounterSat, 184 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 106 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 792 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 184 IncrementalHoareTripleChecker+Valid, 608 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 21:58:57,890 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [106 Valid, 69 Invalid, 792 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [184 Valid, 608 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 21:58:57,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2022-04-27 21:58:58,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 83. [2022-04-27 21:58:58,252 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 21:58:58,253 INFO L82 GeneralOperation]: Start isEquivalent. First operand 115 states. Second operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,253 INFO L74 IsIncluded]: Start isIncluded. First operand 115 states. Second operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,253 INFO L87 Difference]: Start difference. First operand 115 states. Second operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:58,255 INFO L93 Difference]: Finished difference Result 115 states and 144 transitions. [2022-04-27 21:58:58,255 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 144 transitions. [2022-04-27 21:58:58,255 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:58:58,255 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:58:58,255 INFO L74 IsIncluded]: Start isIncluded. First operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 115 states. [2022-04-27 21:58:58,255 INFO L87 Difference]: Start difference. First operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 115 states. [2022-04-27 21:58:58,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 21:58:58,257 INFO L93 Difference]: Finished difference Result 115 states and 144 transitions. [2022-04-27 21:58:58,257 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 144 transitions. [2022-04-27 21:58:58,257 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 21:58:58,257 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 21:58:58,257 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 21:58:58,257 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 21:58:58,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 78 states have (on average 1.294871794871795) internal successors, (101), 78 states have internal predecessors, (101), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 105 transitions. [2022-04-27 21:58:58,258 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 105 transitions. Word has length 27 [2022-04-27 21:58:58,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 21:58:58,258 INFO L495 AbstractCegarLoop]: Abstraction has 83 states and 105 transitions. [2022-04-27 21:58:58,258 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:58,258 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 105 transitions. [2022-04-27 21:58:58,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 21:58:58,259 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 21:58:58,259 INFO L195 NwaCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 21:58:58,275 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-27 21:58:58,465 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 21:58:58,465 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 21:58:58,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 21:58:58,465 INFO L85 PathProgramCache]: Analyzing trace with hash 1035576247, now seen corresponding path program 3 times [2022-04-27 21:58:58,465 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 21:58:58,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047786070] [2022-04-27 21:58:58,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 21:58:58,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 21:58:58,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:58,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 21:58:58,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:58,719 INFO L290 TraceCheckUtils]: 0: Hoare triple {7117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7097#true} is VALID [2022-04-27 21:58:58,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {7097#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:58,720 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7097#true} {7097#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:58,720 INFO L272 TraceCheckUtils]: 0: Hoare triple {7097#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 21:58:58,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {7117#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7097#true} is VALID [2022-04-27 21:58:58,720 INFO L290 TraceCheckUtils]: 2: Hoare triple {7097#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:58,720 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7097#true} {7097#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:58,720 INFO L272 TraceCheckUtils]: 4: Hoare triple {7097#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:58,721 INFO L290 TraceCheckUtils]: 5: Hoare triple {7097#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7102#(= main_~y~0 0)} is VALID [2022-04-27 21:58:58,721 INFO L290 TraceCheckUtils]: 6: Hoare triple {7102#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7103#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:58:58,722 INFO L290 TraceCheckUtils]: 7: Hoare triple {7103#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7104#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:58:58,722 INFO L290 TraceCheckUtils]: 8: Hoare triple {7104#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7105#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:58:58,723 INFO L290 TraceCheckUtils]: 9: Hoare triple {7105#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7106#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:58:58,723 INFO L290 TraceCheckUtils]: 10: Hoare triple {7106#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7107#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:58:58,724 INFO L290 TraceCheckUtils]: 11: Hoare triple {7107#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7108#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:58,724 INFO L290 TraceCheckUtils]: 12: Hoare triple {7108#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7109#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:58:58,725 INFO L290 TraceCheckUtils]: 13: Hoare triple {7109#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7110#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 21:58:58,725 INFO L290 TraceCheckUtils]: 14: Hoare triple {7110#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7111#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:58:58,726 INFO L290 TraceCheckUtils]: 15: Hoare triple {7111#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7112#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 21:58:58,726 INFO L290 TraceCheckUtils]: 16: Hoare triple {7112#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7113#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 21:58:58,727 INFO L290 TraceCheckUtils]: 17: Hoare triple {7113#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7114#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 21:58:58,727 INFO L290 TraceCheckUtils]: 18: Hoare triple {7114#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 21:58:58,727 INFO L290 TraceCheckUtils]: 19: Hoare triple {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 21:58:58,728 INFO L290 TraceCheckUtils]: 20: Hoare triple {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7116#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 21:58:58,728 INFO L290 TraceCheckUtils]: 21: Hoare triple {7116#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:58,728 INFO L290 TraceCheckUtils]: 22: Hoare triple {7098#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:58,728 INFO L272 TraceCheckUtils]: 23: Hoare triple {7098#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7098#false} is VALID [2022-04-27 21:58:58,728 INFO L290 TraceCheckUtils]: 24: Hoare triple {7098#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7098#false} is VALID [2022-04-27 21:58:58,729 INFO L290 TraceCheckUtils]: 25: Hoare triple {7098#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:58,729 INFO L290 TraceCheckUtils]: 26: Hoare triple {7098#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:58,729 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:58:58,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 21:58:58,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047786070] [2022-04-27 21:58:58,729 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2047786070] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 21:58:58,729 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1100677717] [2022-04-27 21:58:58,729 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 21:58:58,729 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 21:58:58,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 21:58:58,730 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 21:58:58,731 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 21:58:58,857 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-04-27 21:58:58,857 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 21:58:58,858 INFO L263 TraceCheckSpWp]: Trace formula consists of 124 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-27 21:58:58,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 21:58:58,864 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 21:58:59,092 INFO L272 TraceCheckUtils]: 0: Hoare triple {7097#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,092 INFO L290 TraceCheckUtils]: 1: Hoare triple {7097#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7097#true} is VALID [2022-04-27 21:58:59,092 INFO L290 TraceCheckUtils]: 2: Hoare triple {7097#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,092 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7097#true} {7097#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,092 INFO L272 TraceCheckUtils]: 4: Hoare triple {7097#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,093 INFO L290 TraceCheckUtils]: 5: Hoare triple {7097#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7102#(= main_~y~0 0)} is VALID [2022-04-27 21:58:59,093 INFO L290 TraceCheckUtils]: 6: Hoare triple {7102#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7103#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 21:58:59,093 INFO L290 TraceCheckUtils]: 7: Hoare triple {7103#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7104#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 21:58:59,094 INFO L290 TraceCheckUtils]: 8: Hoare triple {7104#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7105#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 21:58:59,094 INFO L290 TraceCheckUtils]: 9: Hoare triple {7105#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7106#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 21:58:59,095 INFO L290 TraceCheckUtils]: 10: Hoare triple {7106#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7107#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 21:58:59,095 INFO L290 TraceCheckUtils]: 11: Hoare triple {7107#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7108#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 21:58:59,096 INFO L290 TraceCheckUtils]: 12: Hoare triple {7108#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7109#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 21:58:59,096 INFO L290 TraceCheckUtils]: 13: Hoare triple {7109#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7110#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 21:58:59,097 INFO L290 TraceCheckUtils]: 14: Hoare triple {7110#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7111#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 21:58:59,097 INFO L290 TraceCheckUtils]: 15: Hoare triple {7111#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7112#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 21:58:59,098 INFO L290 TraceCheckUtils]: 16: Hoare triple {7112#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7113#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 21:58:59,098 INFO L290 TraceCheckUtils]: 17: Hoare triple {7113#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7114#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 21:58:59,099 INFO L290 TraceCheckUtils]: 18: Hoare triple {7114#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 21:58:59,099 INFO L290 TraceCheckUtils]: 19: Hoare triple {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 21:58:59,100 INFO L290 TraceCheckUtils]: 20: Hoare triple {7115#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7181#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 21:58:59,100 INFO L290 TraceCheckUtils]: 21: Hoare triple {7181#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,100 INFO L290 TraceCheckUtils]: 22: Hoare triple {7098#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,100 INFO L272 TraceCheckUtils]: 23: Hoare triple {7098#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7098#false} is VALID [2022-04-27 21:58:59,100 INFO L290 TraceCheckUtils]: 24: Hoare triple {7098#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7098#false} is VALID [2022-04-27 21:58:59,100 INFO L290 TraceCheckUtils]: 25: Hoare triple {7098#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,100 INFO L290 TraceCheckUtils]: 26: Hoare triple {7098#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,101 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:58:59,101 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 21:58:59,505 INFO L290 TraceCheckUtils]: 26: Hoare triple {7098#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,505 INFO L290 TraceCheckUtils]: 25: Hoare triple {7098#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,505 INFO L290 TraceCheckUtils]: 24: Hoare triple {7098#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7098#false} is VALID [2022-04-27 21:58:59,505 INFO L272 TraceCheckUtils]: 23: Hoare triple {7098#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {7098#false} is VALID [2022-04-27 21:58:59,506 INFO L290 TraceCheckUtils]: 22: Hoare triple {7098#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,506 INFO L290 TraceCheckUtils]: 21: Hoare triple {7215#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7098#false} is VALID [2022-04-27 21:58:59,506 INFO L290 TraceCheckUtils]: 20: Hoare triple {7219#(< 0 (mod main_~y~0 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {7215#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 21:58:59,506 INFO L290 TraceCheckUtils]: 19: Hoare triple {7219#(< 0 (mod main_~y~0 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7219#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:58:59,507 INFO L290 TraceCheckUtils]: 18: Hoare triple {7226#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7219#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 21:58:59,508 INFO L290 TraceCheckUtils]: 17: Hoare triple {7230#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7226#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 21:58:59,508 INFO L290 TraceCheckUtils]: 16: Hoare triple {7234#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7230#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 21:58:59,509 INFO L290 TraceCheckUtils]: 15: Hoare triple {7238#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7234#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 21:58:59,510 INFO L290 TraceCheckUtils]: 14: Hoare triple {7242#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7238#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 21:58:59,511 INFO L290 TraceCheckUtils]: 13: Hoare triple {7246#(< 0 (mod (+ main_~y~0 6) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7242#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 21:58:59,511 INFO L290 TraceCheckUtils]: 12: Hoare triple {7250#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7246#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 21:58:59,512 INFO L290 TraceCheckUtils]: 11: Hoare triple {7254#(< 0 (mod (+ main_~y~0 8) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7250#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 21:58:59,512 INFO L290 TraceCheckUtils]: 10: Hoare triple {7258#(< 0 (mod (+ main_~y~0 9) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7254#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 21:58:59,513 INFO L290 TraceCheckUtils]: 9: Hoare triple {7262#(< 0 (mod (+ main_~y~0 10) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7258#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 21:58:59,514 INFO L290 TraceCheckUtils]: 8: Hoare triple {7266#(< 0 (mod (+ main_~y~0 11) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7262#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 21:58:59,514 INFO L290 TraceCheckUtils]: 7: Hoare triple {7270#(< 0 (mod (+ main_~y~0 12) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7266#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 21:58:59,515 INFO L290 TraceCheckUtils]: 6: Hoare triple {7274#(< 0 (mod (+ main_~y~0 13) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7270#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 21:58:59,515 INFO L290 TraceCheckUtils]: 5: Hoare triple {7097#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7274#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 21:58:59,515 INFO L272 TraceCheckUtils]: 4: Hoare triple {7097#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,515 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7097#true} {7097#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,515 INFO L290 TraceCheckUtils]: 2: Hoare triple {7097#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,516 INFO L290 TraceCheckUtils]: 1: Hoare triple {7097#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7097#true} is VALID [2022-04-27 21:58:59,516 INFO L272 TraceCheckUtils]: 0: Hoare triple {7097#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7097#true} is VALID [2022-04-27 21:58:59,516 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 21:58:59,516 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1100677717] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 21:58:59,516 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 21:58:59,516 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-27 21:58:59,516 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660875188] [2022-04-27 21:58:59,516 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 21:58:59,517 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 21:58:59,517 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 21:58:59,517 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:58:59,546 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 21:58:59,547 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 21:58:59,547 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 21:58:59,547 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 21:58:59,547 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=859, Unknown=0, NotChecked=0, Total=1122 [2022-04-27 21:58:59,548 INFO L87 Difference]: Start difference. First operand 83 states and 105 transitions. Second operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 21:59:12,370 WARN L232 SmtUtils]: Spent 6.37s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:00:08,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:08,790 INFO L93 Difference]: Finished difference Result 397 states and 539 transitions. [2022-04-27 22:00:08,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2022-04-27 22:00:08,791 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:00:08,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:08,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:08,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 249 transitions. [2022-04-27 22:00:08,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:08,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 249 transitions. [2022-04-27 22:00:08,795 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 68 states and 249 transitions. [2022-04-27 22:00:09,990 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 249 edges. 249 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:10,014 INFO L225 Difference]: With dead ends: 397 [2022-04-27 22:00:10,014 INFO L226 Difference]: Without dead ends: 365 [2022-04-27 22:00:10,017 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2586 ImplicationChecksByTransitivity, 62.7s TimeCoverageRelationStatistics Valid=2476, Invalid=7226, Unknown=0, NotChecked=0, Total=9702 [2022-04-27 22:00:10,017 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 952 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 1066 mSolverCounterSat, 727 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 952 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 1793 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 727 IncrementalHoareTripleChecker+Valid, 1066 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:10,017 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [952 Valid, 105 Invalid, 1793 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [727 Valid, 1066 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2022-04-27 22:00:10,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-04-27 22:00:10,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 122. [2022-04-27 22:00:10,679 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:10,679 INFO L82 GeneralOperation]: Start isEquivalent. First operand 365 states. Second operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:10,680 INFO L74 IsIncluded]: Start isIncluded. First operand 365 states. Second operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:10,680 INFO L87 Difference]: Start difference. First operand 365 states. Second operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:10,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:10,686 INFO L93 Difference]: Finished difference Result 365 states and 471 transitions. [2022-04-27 22:00:10,686 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 471 transitions. [2022-04-27 22:00:10,686 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:10,686 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:10,686 INFO L74 IsIncluded]: Start isIncluded. First operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-27 22:00:10,686 INFO L87 Difference]: Start difference. First operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-27 22:00:10,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:10,692 INFO L93 Difference]: Finished difference Result 365 states and 471 transitions. [2022-04-27 22:00:10,692 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 471 transitions. [2022-04-27 22:00:10,693 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:10,693 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:10,693 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:10,693 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:10,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 122 states, 117 states have (on average 1.3418803418803418) internal successors, (157), 117 states have internal predecessors, (157), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:10,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 161 transitions. [2022-04-27 22:00:10,695 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 161 transitions. Word has length 27 [2022-04-27 22:00:10,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:10,695 INFO L495 AbstractCegarLoop]: Abstraction has 122 states and 161 transitions. [2022-04-27 22:00:10,695 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.2647058823529411) internal successors, (43), 33 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:10,695 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 161 transitions. [2022-04-27 22:00:10,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:00:10,695 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:10,696 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:10,701 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2022-04-27 22:00:10,899 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 22:00:10,900 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:10,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:10,900 INFO L85 PathProgramCache]: Analyzing trace with hash 627420638, now seen corresponding path program 10 times [2022-04-27 22:00:10,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:10,900 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941510017] [2022-04-27 22:00:10,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:10,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:10,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:11,113 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:11,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:11,118 INFO L290 TraceCheckUtils]: 0: Hoare triple {8937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8921#true} is VALID [2022-04-27 22:00:11,118 INFO L290 TraceCheckUtils]: 1: Hoare triple {8921#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,118 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8921#true} {8921#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,118 INFO L272 TraceCheckUtils]: 0: Hoare triple {8921#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:11,119 INFO L290 TraceCheckUtils]: 1: Hoare triple {8937#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8921#true} is VALID [2022-04-27 22:00:11,119 INFO L290 TraceCheckUtils]: 2: Hoare triple {8921#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,119 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8921#true} {8921#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,119 INFO L272 TraceCheckUtils]: 4: Hoare triple {8921#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,119 INFO L290 TraceCheckUtils]: 5: Hoare triple {8921#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8926#(= main_~y~0 0)} is VALID [2022-04-27 22:00:11,120 INFO L290 TraceCheckUtils]: 6: Hoare triple {8926#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8927#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:11,121 INFO L290 TraceCheckUtils]: 7: Hoare triple {8927#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8928#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:00:11,121 INFO L290 TraceCheckUtils]: 8: Hoare triple {8928#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8929#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:00:11,122 INFO L290 TraceCheckUtils]: 9: Hoare triple {8929#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8930#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:00:11,123 INFO L290 TraceCheckUtils]: 10: Hoare triple {8930#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,123 INFO L290 TraceCheckUtils]: 11: Hoare triple {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,124 INFO L290 TraceCheckUtils]: 12: Hoare triple {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8932#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:00:11,124 INFO L290 TraceCheckUtils]: 13: Hoare triple {8932#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8933#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:00:11,125 INFO L290 TraceCheckUtils]: 14: Hoare triple {8933#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8934#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:00:11,126 INFO L290 TraceCheckUtils]: 15: Hoare triple {8934#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8935#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:00:11,126 INFO L290 TraceCheckUtils]: 16: Hoare triple {8935#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8936#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:00:11,127 INFO L290 TraceCheckUtils]: 17: Hoare triple {8936#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,127 INFO L290 TraceCheckUtils]: 18: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,127 INFO L290 TraceCheckUtils]: 19: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,127 INFO L290 TraceCheckUtils]: 20: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,127 INFO L290 TraceCheckUtils]: 21: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L290 TraceCheckUtils]: 22: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L290 TraceCheckUtils]: 23: Hoare triple {8922#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L272 TraceCheckUtils]: 24: Hoare triple {8922#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L290 TraceCheckUtils]: 25: Hoare triple {8922#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L290 TraceCheckUtils]: 26: Hoare triple {8922#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L290 TraceCheckUtils]: 27: Hoare triple {8922#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,128 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:00:11,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:11,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941510017] [2022-04-27 22:00:11,129 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941510017] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:11,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1760012784] [2022-04-27 22:00:11,129 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:00:11,129 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:11,129 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:11,132 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:11,151 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 22:00:11,179 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:00:11,179 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:00:11,180 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-27 22:00:11,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:11,188 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:11,389 INFO L272 TraceCheckUtils]: 0: Hoare triple {8921#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {8921#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8921#true} is VALID [2022-04-27 22:00:11,390 INFO L290 TraceCheckUtils]: 2: Hoare triple {8921#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,390 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8921#true} {8921#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,390 INFO L272 TraceCheckUtils]: 4: Hoare triple {8921#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,390 INFO L290 TraceCheckUtils]: 5: Hoare triple {8921#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8926#(= main_~y~0 0)} is VALID [2022-04-27 22:00:11,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {8926#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8927#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:11,391 INFO L290 TraceCheckUtils]: 7: Hoare triple {8927#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8928#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:00:11,398 INFO L290 TraceCheckUtils]: 8: Hoare triple {8928#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8929#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:00:11,398 INFO L290 TraceCheckUtils]: 9: Hoare triple {8929#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8930#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:00:11,399 INFO L290 TraceCheckUtils]: 10: Hoare triple {8930#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,399 INFO L290 TraceCheckUtils]: 11: Hoare triple {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,400 INFO L290 TraceCheckUtils]: 12: Hoare triple {8931#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {8977#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,400 INFO L290 TraceCheckUtils]: 13: Hoare triple {8977#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8981#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:00:11,401 INFO L290 TraceCheckUtils]: 14: Hoare triple {8981#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8985#(and (= main_~y~0 (+ main_~z~0 2)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,402 INFO L290 TraceCheckUtils]: 15: Hoare triple {8985#(and (= main_~y~0 (+ main_~z~0 2)) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8989#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 3)) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,402 INFO L290 TraceCheckUtils]: 16: Hoare triple {8989#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 3)) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8993#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 4)) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:11,403 INFO L290 TraceCheckUtils]: 17: Hoare triple {8993#(and (<= 5 main_~y~0) (= main_~y~0 (+ main_~z~0 4)) (<= main_~y~0 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,403 INFO L290 TraceCheckUtils]: 18: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,403 INFO L290 TraceCheckUtils]: 19: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,403 INFO L290 TraceCheckUtils]: 20: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,403 INFO L290 TraceCheckUtils]: 21: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L290 TraceCheckUtils]: 22: Hoare triple {8922#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L290 TraceCheckUtils]: 23: Hoare triple {8922#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L272 TraceCheckUtils]: 24: Hoare triple {8922#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L290 TraceCheckUtils]: 25: Hoare triple {8922#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L290 TraceCheckUtils]: 26: Hoare triple {8922#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L290 TraceCheckUtils]: 27: Hoare triple {8922#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,404 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:00:11,404 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:00:11,703 INFO L290 TraceCheckUtils]: 27: Hoare triple {8922#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,703 INFO L290 TraceCheckUtils]: 26: Hoare triple {8922#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,703 INFO L290 TraceCheckUtils]: 25: Hoare triple {8922#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8922#false} is VALID [2022-04-27 22:00:11,704 INFO L272 TraceCheckUtils]: 24: Hoare triple {8922#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {8922#false} is VALID [2022-04-27 22:00:11,704 INFO L290 TraceCheckUtils]: 23: Hoare triple {8922#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8922#false} is VALID [2022-04-27 22:00:11,704 INFO L290 TraceCheckUtils]: 22: Hoare triple {9042#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8922#false} is VALID [2022-04-27 22:00:11,706 INFO L290 TraceCheckUtils]: 21: Hoare triple {9046#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9042#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:00:11,707 INFO L290 TraceCheckUtils]: 20: Hoare triple {9050#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9046#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:00:11,707 INFO L290 TraceCheckUtils]: 19: Hoare triple {9054#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9050#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:00:11,708 INFO L290 TraceCheckUtils]: 18: Hoare triple {9058#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9054#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:00:11,709 INFO L290 TraceCheckUtils]: 17: Hoare triple {9062#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {9058#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:00:11,710 INFO L290 TraceCheckUtils]: 16: Hoare triple {9066#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9062#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:00:11,711 INFO L290 TraceCheckUtils]: 15: Hoare triple {9070#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9066#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:00:11,712 INFO L290 TraceCheckUtils]: 14: Hoare triple {9074#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9070#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 13: Hoare triple {9078#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9074#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 12: Hoare triple {8921#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {9078#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 11: Hoare triple {8921#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 10: Hoare triple {8921#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8921#true} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 9: Hoare triple {8921#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8921#true} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 8: Hoare triple {8921#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8921#true} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 7: Hoare triple {8921#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8921#true} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 6: Hoare triple {8921#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8921#true} is VALID [2022-04-27 22:00:11,713 INFO L290 TraceCheckUtils]: 5: Hoare triple {8921#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8921#true} is VALID [2022-04-27 22:00:11,714 INFO L272 TraceCheckUtils]: 4: Hoare triple {8921#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,714 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8921#true} {8921#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {8921#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {8921#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8921#true} is VALID [2022-04-27 22:00:11,714 INFO L272 TraceCheckUtils]: 0: Hoare triple {8921#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8921#true} is VALID [2022-04-27 22:00:11,714 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:00:11,714 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1760012784] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:00:11,714 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:00:11,714 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 12] total 29 [2022-04-27 22:00:11,714 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517081404] [2022-04-27 22:00:11,715 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:00:11,715 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:00:11,715 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:11,715 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:11,749 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:11,749 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 22:00:11,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:11,749 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 22:00:11,750 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=685, Unknown=0, NotChecked=0, Total=812 [2022-04-27 22:00:11,750 INFO L87 Difference]: Start difference. First operand 122 states and 161 transitions. Second operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:14,565 INFO L93 Difference]: Finished difference Result 209 states and 264 transitions. [2022-04-27 22:00:14,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-27 22:00:14,566 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:00:14,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:14,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 76 transitions. [2022-04-27 22:00:14,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:14,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 76 transitions. [2022-04-27 22:00:14,569 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 76 transitions. [2022-04-27 22:00:14,659 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:14,661 INFO L225 Difference]: With dead ends: 209 [2022-04-27 22:00:14,661 INFO L226 Difference]: Without dead ends: 159 [2022-04-27 22:00:14,662 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 49 SyntacticMatches, 1 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 600 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=405, Invalid=2787, Unknown=0, NotChecked=0, Total=3192 [2022-04-27 22:00:14,663 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 31 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 472 mSolverCounterSat, 66 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 538 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 66 IncrementalHoareTripleChecker+Valid, 472 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:14,663 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [31 Valid, 89 Invalid, 538 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [66 Valid, 472 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:00:14,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2022-04-27 22:00:15,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 136. [2022-04-27 22:00:15,485 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:15,487 INFO L82 GeneralOperation]: Start isEquivalent. First operand 159 states. Second operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:15,487 INFO L74 IsIncluded]: Start isIncluded. First operand 159 states. Second operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:15,487 INFO L87 Difference]: Start difference. First operand 159 states. Second operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:15,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:15,490 INFO L93 Difference]: Finished difference Result 159 states and 200 transitions. [2022-04-27 22:00:15,490 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 200 transitions. [2022-04-27 22:00:15,490 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:15,490 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:15,491 INFO L74 IsIncluded]: Start isIncluded. First operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 159 states. [2022-04-27 22:00:15,491 INFO L87 Difference]: Start difference. First operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 159 states. [2022-04-27 22:00:15,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:15,493 INFO L93 Difference]: Finished difference Result 159 states and 200 transitions. [2022-04-27 22:00:15,493 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 200 transitions. [2022-04-27 22:00:15,493 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:15,493 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:15,493 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:15,493 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:15,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 131 states have (on average 1.3206106870229009) internal successors, (173), 131 states have internal predecessors, (173), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:15,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 177 transitions. [2022-04-27 22:00:15,495 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 177 transitions. Word has length 28 [2022-04-27 22:00:15,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:15,495 INFO L495 AbstractCegarLoop]: Abstraction has 136 states and 177 transitions. [2022-04-27 22:00:15,495 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:15,496 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 177 transitions. [2022-04-27 22:00:15,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 22:00:15,496 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:15,496 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:15,519 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 22:00:15,711 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 22:00:15,711 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:15,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:15,712 INFO L85 PathProgramCache]: Analyzing trace with hash 1023844786, now seen corresponding path program 11 times [2022-04-27 22:00:15,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:15,712 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615873470] [2022-04-27 22:00:15,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:15,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:15,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:16,266 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:16,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:16,270 INFO L290 TraceCheckUtils]: 0: Hoare triple {10072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10051#true} is VALID [2022-04-27 22:00:16,270 INFO L290 TraceCheckUtils]: 1: Hoare triple {10051#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:16,270 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10051#true} {10051#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:16,271 INFO L272 TraceCheckUtils]: 0: Hoare triple {10051#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:16,271 INFO L290 TraceCheckUtils]: 1: Hoare triple {10072#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10051#true} is VALID [2022-04-27 22:00:16,271 INFO L290 TraceCheckUtils]: 2: Hoare triple {10051#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:16,271 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10051#true} {10051#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:16,271 INFO L272 TraceCheckUtils]: 4: Hoare triple {10051#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:16,272 INFO L290 TraceCheckUtils]: 5: Hoare triple {10051#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10056#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:00:16,273 INFO L290 TraceCheckUtils]: 6: Hoare triple {10056#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10057#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:16,279 INFO L290 TraceCheckUtils]: 7: Hoare triple {10057#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10058#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 22:00:16,286 INFO L290 TraceCheckUtils]: 8: Hoare triple {10058#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10059#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:16,288 INFO L290 TraceCheckUtils]: 9: Hoare triple {10059#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10060#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 22:00:16,291 INFO L290 TraceCheckUtils]: 10: Hoare triple {10060#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10061#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 5) main_~n~0) (<= 5 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:16,292 INFO L290 TraceCheckUtils]: 11: Hoare triple {10061#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 5) main_~n~0) (<= 5 main_~y~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10062#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-27 22:00:16,292 INFO L290 TraceCheckUtils]: 12: Hoare triple {10062#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-27 22:00:16,293 INFO L290 TraceCheckUtils]: 13: Hoare triple {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-27 22:00:16,294 INFO L290 TraceCheckUtils]: 14: Hoare triple {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-27 22:00:16,295 INFO L290 TraceCheckUtils]: 15: Hoare triple {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 22:00:16,296 INFO L290 TraceCheckUtils]: 16: Hoare triple {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:16,298 INFO L290 TraceCheckUtils]: 17: Hoare triple {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:16,299 INFO L290 TraceCheckUtils]: 18: Hoare triple {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:16,300 INFO L290 TraceCheckUtils]: 19: Hoare triple {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:16,300 INFO L290 TraceCheckUtils]: 20: Hoare triple {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 22:00:16,301 INFO L290 TraceCheckUtils]: 21: Hoare triple {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-27 22:00:16,302 INFO L290 TraceCheckUtils]: 22: Hoare triple {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-27 22:00:16,304 INFO L290 TraceCheckUtils]: 23: Hoare triple {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:16,304 INFO L290 TraceCheckUtils]: 24: Hoare triple {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:16,305 INFO L272 TraceCheckUtils]: 25: Hoare triple {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10070#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:00:16,320 INFO L290 TraceCheckUtils]: 26: Hoare triple {10070#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10071#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:00:16,320 INFO L290 TraceCheckUtils]: 27: Hoare triple {10071#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10052#false} is VALID [2022-04-27 22:00:16,321 INFO L290 TraceCheckUtils]: 28: Hoare triple {10052#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10052#false} is VALID [2022-04-27 22:00:16,321 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:16,321 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:16,321 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615873470] [2022-04-27 22:00:16,321 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [615873470] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:16,322 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1504773813] [2022-04-27 22:00:16,322 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:00:16,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:16,322 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:16,337 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:16,337 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 22:00:16,564 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:00:16,564 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:00:16,565 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 51 conjunts are in the unsatisfiable core [2022-04-27 22:00:16,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:16,575 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:41,654 INFO L272 TraceCheckUtils]: 0: Hoare triple {10051#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:41,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {10051#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10051#true} is VALID [2022-04-27 22:00:41,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {10051#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:41,654 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10051#true} {10051#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:41,654 INFO L272 TraceCheckUtils]: 4: Hoare triple {10051#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:41,655 INFO L290 TraceCheckUtils]: 5: Hoare triple {10051#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10056#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:00:41,656 INFO L290 TraceCheckUtils]: 6: Hoare triple {10056#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10057#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:41,658 INFO L290 TraceCheckUtils]: 7: Hoare triple {10057#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10097#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:00:41,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {10097#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10101#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:41,661 INFO L290 TraceCheckUtils]: 9: Hoare triple {10101#(and (<= main_~y~0 3) (<= 3 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10105#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 22:00:41,663 INFO L290 TraceCheckUtils]: 10: Hoare triple {10105#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10109#(and (<= 5 main_~y~0) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:00:41,665 INFO L290 TraceCheckUtils]: 11: Hoare triple {10109#(and (<= 5 main_~y~0) (<= main_~x~0 (+ 4294967290 (* (div (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10062#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-27 22:00:41,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {10062#(and (<= main_~y~0 5) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 5) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-27 22:00:41,667 INFO L290 TraceCheckUtils]: 13: Hoare triple {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-27 22:00:41,668 INFO L290 TraceCheckUtils]: 14: Hoare triple {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-27 22:00:41,669 INFO L290 TraceCheckUtils]: 15: Hoare triple {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 22:00:41,670 INFO L290 TraceCheckUtils]: 16: Hoare triple {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:41,671 INFO L290 TraceCheckUtils]: 17: Hoare triple {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:41,671 INFO L290 TraceCheckUtils]: 18: Hoare triple {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:41,672 INFO L290 TraceCheckUtils]: 19: Hoare triple {10068#(and (<= main_~z~0 0) (<= (+ 5 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:00:41,673 INFO L290 TraceCheckUtils]: 20: Hoare triple {10067#(and (<= main_~z~0 1) (<= (+ 5 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} is VALID [2022-04-27 22:00:41,674 INFO L290 TraceCheckUtils]: 21: Hoare triple {10066#(and (<= (+ 5 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 2))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} is VALID [2022-04-27 22:00:41,674 INFO L290 TraceCheckUtils]: 22: Hoare triple {10065#(and (<= main_~z~0 3) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} is VALID [2022-04-27 22:00:41,675 INFO L290 TraceCheckUtils]: 23: Hoare triple {10064#(and (<= main_~z~0 4) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 5) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-27 22:00:41,676 INFO L290 TraceCheckUtils]: 24: Hoare triple {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} is VALID [2022-04-27 22:00:41,677 INFO L272 TraceCheckUtils]: 25: Hoare triple {10063#(and (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 5) main_~n~0) (<= main_~z~0 5))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10155#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:00:41,678 INFO L290 TraceCheckUtils]: 26: Hoare triple {10155#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10159#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:00:41,678 INFO L290 TraceCheckUtils]: 27: Hoare triple {10159#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10052#false} is VALID [2022-04-27 22:00:41,678 INFO L290 TraceCheckUtils]: 28: Hoare triple {10052#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10052#false} is VALID [2022-04-27 22:00:41,678 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:41,678 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:00:43,325 INFO L290 TraceCheckUtils]: 28: Hoare triple {10052#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10052#false} is VALID [2022-04-27 22:00:43,326 INFO L290 TraceCheckUtils]: 27: Hoare triple {10159#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10052#false} is VALID [2022-04-27 22:00:43,326 INFO L290 TraceCheckUtils]: 26: Hoare triple {10155#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10159#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:00:43,327 INFO L272 TraceCheckUtils]: 25: Hoare triple {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {10155#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:00:43,328 INFO L290 TraceCheckUtils]: 24: Hoare triple {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,329 INFO L290 TraceCheckUtils]: 23: Hoare triple {10181#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,329 INFO L290 TraceCheckUtils]: 22: Hoare triple {10185#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10181#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,330 INFO L290 TraceCheckUtils]: 21: Hoare triple {10189#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10185#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:00:43,331 INFO L290 TraceCheckUtils]: 20: Hoare triple {10193#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10189#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,332 INFO L290 TraceCheckUtils]: 19: Hoare triple {10197#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10193#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:00:43,333 INFO L290 TraceCheckUtils]: 18: Hoare triple {10197#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10197#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,334 INFO L290 TraceCheckUtils]: 17: Hoare triple {10193#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10197#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,335 INFO L290 TraceCheckUtils]: 16: Hoare triple {10189#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10193#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:00:43,335 INFO L290 TraceCheckUtils]: 15: Hoare triple {10185#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10189#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,336 INFO L290 TraceCheckUtils]: 14: Hoare triple {10181#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10185#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:00:43,337 INFO L290 TraceCheckUtils]: 13: Hoare triple {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10181#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,338 INFO L290 TraceCheckUtils]: 12: Hoare triple {10219#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {10069#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:00:43,338 INFO L290 TraceCheckUtils]: 11: Hoare triple {10223#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10219#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:00:43,340 INFO L290 TraceCheckUtils]: 10: Hoare triple {10227#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10223#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:00:43,341 INFO L290 TraceCheckUtils]: 9: Hoare triple {10231#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10227#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:00:43,343 INFO L290 TraceCheckUtils]: 8: Hoare triple {10235#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10231#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:00:43,344 INFO L290 TraceCheckUtils]: 7: Hoare triple {10239#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10235#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:00:43,345 INFO L290 TraceCheckUtils]: 6: Hoare triple {10243#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10239#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:00:43,346 INFO L290 TraceCheckUtils]: 5: Hoare triple {10051#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10243#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:00:43,346 INFO L272 TraceCheckUtils]: 4: Hoare triple {10051#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:43,347 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10051#true} {10051#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:43,347 INFO L290 TraceCheckUtils]: 2: Hoare triple {10051#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:43,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {10051#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10051#true} is VALID [2022-04-27 22:00:43,347 INFO L272 TraceCheckUtils]: 0: Hoare triple {10051#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10051#true} is VALID [2022-04-27 22:00:43,347 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:43,347 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1504773813] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:00:43,347 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:00:43,347 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17] total 37 [2022-04-27 22:00:43,347 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [984436493] [2022-04-27 22:00:43,347 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:00:43,348 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:00:43,348 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:43,348 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:43,442 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:43,442 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-27 22:00:43,442 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:43,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-27 22:00:43,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1191, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 22:00:43,443 INFO L87 Difference]: Start difference. First operand 136 states and 177 transitions. Second operand has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:48,522 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.99s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:00:56,282 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:01:20,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:20,168 INFO L93 Difference]: Finished difference Result 211 states and 257 transitions. [2022-04-27 22:01:20,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-04-27 22:01:20,169 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:01:20,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:20,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:20,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 84 transitions. [2022-04-27 22:01:20,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:20,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 84 transitions. [2022-04-27 22:01:20,172 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 45 states and 84 transitions. [2022-04-27 22:01:24,571 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 84 edges. 82 inductive. 0 not inductive. 2 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:24,573 INFO L225 Difference]: With dead ends: 211 [2022-04-27 22:01:24,573 INFO L226 Difference]: Without dead ends: 179 [2022-04-27 22:01:24,575 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 41 SyntacticMatches, 5 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1169 ImplicationChecksByTransitivity, 27.2s TimeCoverageRelationStatistics Valid=630, Invalid=5530, Unknown=2, NotChecked=0, Total=6162 [2022-04-27 22:01:24,575 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 88 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 559 mSolverCounterSat, 121 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 88 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 681 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 121 IncrementalHoareTripleChecker+Valid, 559 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:24,575 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [88 Valid, 99 Invalid, 681 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [121 Valid, 559 Invalid, 1 Unknown, 0 Unchecked, 7.2s Time] [2022-04-27 22:01:24,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-04-27 22:01:25,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 124. [2022-04-27 22:01:25,342 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:25,342 INFO L82 GeneralOperation]: Start isEquivalent. First operand 179 states. Second operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,342 INFO L74 IsIncluded]: Start isIncluded. First operand 179 states. Second operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,343 INFO L87 Difference]: Start difference. First operand 179 states. Second operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:25,350 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-27 22:01:25,350 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-27 22:01:25,351 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:25,351 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:25,351 INFO L74 IsIncluded]: Start isIncluded. First operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-27 22:01:25,355 INFO L87 Difference]: Start difference. First operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-27 22:01:25,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:25,357 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-27 22:01:25,357 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-27 22:01:25,357 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:25,357 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:25,357 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:25,357 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:25,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 124 states, 119 states have (on average 1.3277310924369747) internal successors, (158), 119 states have internal predecessors, (158), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 162 transitions. [2022-04-27 22:01:25,359 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 162 transitions. Word has length 29 [2022-04-27 22:01:25,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:25,359 INFO L495 AbstractCegarLoop]: Abstraction has 124 states and 162 transitions. [2022-04-27 22:01:25,359 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 34 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,359 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 162 transitions. [2022-04-27 22:01:25,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 22:01:25,360 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:25,360 INFO L195 NwaCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:25,364 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:25,564 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:25,564 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:25,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:25,564 INFO L85 PathProgramCache]: Analyzing trace with hash -1406825826, now seen corresponding path program 12 times [2022-04-27 22:01:25,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:25,565 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114588442] [2022-04-27 22:01:25,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:25,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:25,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:25,830 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:25,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:25,839 INFO L290 TraceCheckUtils]: 0: Hoare triple {11265#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11243#true} is VALID [2022-04-27 22:01:25,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {11243#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:25,840 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11243#true} {11243#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:25,840 INFO L272 TraceCheckUtils]: 0: Hoare triple {11243#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11265#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:25,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {11265#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11243#true} is VALID [2022-04-27 22:01:25,840 INFO L290 TraceCheckUtils]: 2: Hoare triple {11243#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:25,840 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11243#true} {11243#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:25,841 INFO L272 TraceCheckUtils]: 4: Hoare triple {11243#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:25,841 INFO L290 TraceCheckUtils]: 5: Hoare triple {11243#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11248#(= main_~y~0 0)} is VALID [2022-04-27 22:01:25,841 INFO L290 TraceCheckUtils]: 6: Hoare triple {11248#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11249#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:25,842 INFO L290 TraceCheckUtils]: 7: Hoare triple {11249#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11250#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:25,842 INFO L290 TraceCheckUtils]: 8: Hoare triple {11250#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11251#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:25,843 INFO L290 TraceCheckUtils]: 9: Hoare triple {11251#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11252#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:25,844 INFO L290 TraceCheckUtils]: 10: Hoare triple {11252#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11253#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:25,844 INFO L290 TraceCheckUtils]: 11: Hoare triple {11253#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11254#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:25,845 INFO L290 TraceCheckUtils]: 12: Hoare triple {11254#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11255#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:25,845 INFO L290 TraceCheckUtils]: 13: Hoare triple {11255#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11256#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:25,846 INFO L290 TraceCheckUtils]: 14: Hoare triple {11256#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11257#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:25,846 INFO L290 TraceCheckUtils]: 15: Hoare triple {11257#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11258#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:01:25,847 INFO L290 TraceCheckUtils]: 16: Hoare triple {11258#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11259#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:01:25,847 INFO L290 TraceCheckUtils]: 17: Hoare triple {11259#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11260#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:01:25,848 INFO L290 TraceCheckUtils]: 18: Hoare triple {11260#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11261#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:01:25,849 INFO L290 TraceCheckUtils]: 19: Hoare triple {11261#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:01:25,849 INFO L290 TraceCheckUtils]: 20: Hoare triple {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:01:25,849 INFO L290 TraceCheckUtils]: 21: Hoare triple {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11263#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:01:25,850 INFO L290 TraceCheckUtils]: 22: Hoare triple {11263#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11264#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:01:25,850 INFO L290 TraceCheckUtils]: 23: Hoare triple {11264#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:25,850 INFO L290 TraceCheckUtils]: 24: Hoare triple {11244#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11244#false} is VALID [2022-04-27 22:01:25,850 INFO L290 TraceCheckUtils]: 25: Hoare triple {11244#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:25,850 INFO L272 TraceCheckUtils]: 26: Hoare triple {11244#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11244#false} is VALID [2022-04-27 22:01:25,851 INFO L290 TraceCheckUtils]: 27: Hoare triple {11244#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11244#false} is VALID [2022-04-27 22:01:25,851 INFO L290 TraceCheckUtils]: 28: Hoare triple {11244#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:25,851 INFO L290 TraceCheckUtils]: 29: Hoare triple {11244#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:25,851 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:01:25,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:25,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114588442] [2022-04-27 22:01:25,851 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [114588442] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:25,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [293924284] [2022-04-27 22:01:25,851 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:01:25,851 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:25,852 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:25,852 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:25,854 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 22:01:26,014 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-04-27 22:01:26,014 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:26,016 INFO L263 TraceCheckSpWp]: Trace formula consists of 139 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-27 22:01:26,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:26,023 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:26,276 INFO L272 TraceCheckUtils]: 0: Hoare triple {11243#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,276 INFO L290 TraceCheckUtils]: 1: Hoare triple {11243#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11243#true} is VALID [2022-04-27 22:01:26,276 INFO L290 TraceCheckUtils]: 2: Hoare triple {11243#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,276 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11243#true} {11243#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,276 INFO L272 TraceCheckUtils]: 4: Hoare triple {11243#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,276 INFO L290 TraceCheckUtils]: 5: Hoare triple {11243#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11248#(= main_~y~0 0)} is VALID [2022-04-27 22:01:26,277 INFO L290 TraceCheckUtils]: 6: Hoare triple {11248#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11249#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:26,277 INFO L290 TraceCheckUtils]: 7: Hoare triple {11249#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11250#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:26,278 INFO L290 TraceCheckUtils]: 8: Hoare triple {11250#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11251#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:26,279 INFO L290 TraceCheckUtils]: 9: Hoare triple {11251#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11252#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:26,279 INFO L290 TraceCheckUtils]: 10: Hoare triple {11252#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11253#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:26,280 INFO L290 TraceCheckUtils]: 11: Hoare triple {11253#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11254#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:26,280 INFO L290 TraceCheckUtils]: 12: Hoare triple {11254#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11255#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:26,281 INFO L290 TraceCheckUtils]: 13: Hoare triple {11255#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11256#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:26,281 INFO L290 TraceCheckUtils]: 14: Hoare triple {11256#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11257#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:26,282 INFO L290 TraceCheckUtils]: 15: Hoare triple {11257#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11258#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:01:26,282 INFO L290 TraceCheckUtils]: 16: Hoare triple {11258#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11259#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:01:26,283 INFO L290 TraceCheckUtils]: 17: Hoare triple {11259#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11260#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:01:26,284 INFO L290 TraceCheckUtils]: 18: Hoare triple {11260#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11261#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:01:26,284 INFO L290 TraceCheckUtils]: 19: Hoare triple {11261#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:01:26,284 INFO L290 TraceCheckUtils]: 20: Hoare triple {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:01:26,285 INFO L290 TraceCheckUtils]: 21: Hoare triple {11262#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11263#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:01:26,285 INFO L290 TraceCheckUtils]: 22: Hoare triple {11263#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11335#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:01:26,286 INFO L290 TraceCheckUtils]: 23: Hoare triple {11335#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,286 INFO L290 TraceCheckUtils]: 24: Hoare triple {11244#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11244#false} is VALID [2022-04-27 22:01:26,286 INFO L290 TraceCheckUtils]: 25: Hoare triple {11244#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,286 INFO L272 TraceCheckUtils]: 26: Hoare triple {11244#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11244#false} is VALID [2022-04-27 22:01:26,286 INFO L290 TraceCheckUtils]: 27: Hoare triple {11244#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11244#false} is VALID [2022-04-27 22:01:26,286 INFO L290 TraceCheckUtils]: 28: Hoare triple {11244#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,286 INFO L290 TraceCheckUtils]: 29: Hoare triple {11244#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,287 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:01:26,287 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:26,800 INFO L290 TraceCheckUtils]: 29: Hoare triple {11244#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,800 INFO L290 TraceCheckUtils]: 28: Hoare triple {11244#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,800 INFO L290 TraceCheckUtils]: 27: Hoare triple {11244#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11244#false} is VALID [2022-04-27 22:01:26,800 INFO L272 TraceCheckUtils]: 26: Hoare triple {11244#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {11244#false} is VALID [2022-04-27 22:01:26,800 INFO L290 TraceCheckUtils]: 25: Hoare triple {11244#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,800 INFO L290 TraceCheckUtils]: 24: Hoare triple {11244#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11244#false} is VALID [2022-04-27 22:01:26,801 INFO L290 TraceCheckUtils]: 23: Hoare triple {11375#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11244#false} is VALID [2022-04-27 22:01:26,802 INFO L290 TraceCheckUtils]: 22: Hoare triple {11379#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11375#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:01:26,802 INFO L290 TraceCheckUtils]: 21: Hoare triple {11383#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {11379#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:26,803 INFO L290 TraceCheckUtils]: 20: Hoare triple {11383#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11383#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:26,803 INFO L290 TraceCheckUtils]: 19: Hoare triple {11390#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11383#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:26,804 INFO L290 TraceCheckUtils]: 18: Hoare triple {11394#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11390#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:26,805 INFO L290 TraceCheckUtils]: 17: Hoare triple {11398#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11394#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:01:26,805 INFO L290 TraceCheckUtils]: 16: Hoare triple {11402#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11398#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:01:26,806 INFO L290 TraceCheckUtils]: 15: Hoare triple {11406#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11402#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:01:26,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {11410#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11406#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:01:26,808 INFO L290 TraceCheckUtils]: 13: Hoare triple {11414#(< 0 (mod (+ main_~y~0 6) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11410#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:26,808 INFO L290 TraceCheckUtils]: 12: Hoare triple {11418#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11414#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:01:26,809 INFO L290 TraceCheckUtils]: 11: Hoare triple {11422#(< 0 (mod (+ main_~y~0 8) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11418#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:26,810 INFO L290 TraceCheckUtils]: 10: Hoare triple {11426#(< 0 (mod (+ main_~y~0 9) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11422#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:01:26,810 INFO L290 TraceCheckUtils]: 9: Hoare triple {11430#(< 0 (mod (+ main_~y~0 10) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11426#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:01:26,811 INFO L290 TraceCheckUtils]: 8: Hoare triple {11434#(< 0 (mod (+ main_~y~0 11) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11430#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:01:26,812 INFO L290 TraceCheckUtils]: 7: Hoare triple {11438#(< 0 (mod (+ main_~y~0 12) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11434#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:01:26,812 INFO L290 TraceCheckUtils]: 6: Hoare triple {11442#(< 0 (mod (+ main_~y~0 13) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11438#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:01:26,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {11243#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11442#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:01:26,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {11243#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,813 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11243#true} {11243#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,813 INFO L290 TraceCheckUtils]: 2: Hoare triple {11243#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {11243#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11243#true} is VALID [2022-04-27 22:01:26,813 INFO L272 TraceCheckUtils]: 0: Hoare triple {11243#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11243#true} is VALID [2022-04-27 22:01:26,813 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:01:26,813 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [293924284] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:26,814 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:26,814 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 38 [2022-04-27 22:01:26,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426565427] [2022-04-27 22:01:26,814 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:26,814 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:01:26,816 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:26,816 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:26,852 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 53 edges. 53 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:26,853 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 22:01:26,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:26,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 22:01:26,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=1102, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 22:01:26,854 INFO L87 Difference]: Start difference. First operand 124 states and 162 transitions. Second operand has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:42,117 WARN L232 SmtUtils]: Spent 6.75s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:01:53,228 WARN L232 SmtUtils]: Spent 5.81s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:02:05,321 WARN L232 SmtUtils]: Spent 9.18s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:02:24,468 WARN L232 SmtUtils]: Spent 6.88s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:02:36,654 WARN L232 SmtUtils]: Spent 6.29s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:02:57,305 WARN L232 SmtUtils]: Spent 5.69s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:05,262 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~z~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-27 22:05:19,838 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.09s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:05:19,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:19,955 INFO L93 Difference]: Finished difference Result 462 states and 609 transitions. [2022-04-27 22:05:19,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 136 states. [2022-04-27 22:05:19,955 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:05:19,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:19,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 313 transitions. [2022-04-27 22:05:19,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:19,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 313 transitions. [2022-04-27 22:05:19,962 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 136 states and 313 transitions. [2022-04-27 22:05:24,888 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 313 edges. 313 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:24,901 INFO L225 Difference]: With dead ends: 462 [2022-04-27 22:05:24,902 INFO L226 Difference]: Without dead ends: 444 [2022-04-27 22:05:24,905 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 169 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 10610 ImplicationChecksByTransitivity, 213.2s TimeCoverageRelationStatistics Valid=6922, Invalid=21811, Unknown=1, NotChecked=336, Total=29070 [2022-04-27 22:05:24,905 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 792 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 1425 mSolverCounterSat, 928 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 792 SdHoareTripleChecker+Valid, 131 SdHoareTripleChecker+Invalid, 2354 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 928 IncrementalHoareTripleChecker+Valid, 1425 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1 IncrementalHoareTripleChecker+Unchecked, 9.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:24,905 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [792 Valid, 131 Invalid, 2354 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [928 Valid, 1425 Invalid, 0 Unknown, 1 Unchecked, 9.0s Time] [2022-04-27 22:05:24,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 444 states. [2022-04-27 22:05:25,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 444 to 137. [2022-04-27 22:05:25,803 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:25,804 INFO L82 GeneralOperation]: Start isEquivalent. First operand 444 states. Second operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,804 INFO L74 IsIncluded]: Start isIncluded. First operand 444 states. Second operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,804 INFO L87 Difference]: Start difference. First operand 444 states. Second operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:25,813 INFO L93 Difference]: Finished difference Result 444 states and 558 transitions. [2022-04-27 22:05:25,813 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 558 transitions. [2022-04-27 22:05:25,813 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:25,813 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:25,814 INFO L74 IsIncluded]: Start isIncluded. First operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 444 states. [2022-04-27 22:05:25,814 INFO L87 Difference]: Start difference. First operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 444 states. [2022-04-27 22:05:25,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:25,823 INFO L93 Difference]: Finished difference Result 444 states and 558 transitions. [2022-04-27 22:05:25,823 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 558 transitions. [2022-04-27 22:05:25,823 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:25,823 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:25,823 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:25,823 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:25,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 132 states have (on average 1.3257575757575757) internal successors, (175), 132 states have internal predecessors, (175), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 179 transitions. [2022-04-27 22:05:25,826 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 179 transitions. Word has length 30 [2022-04-27 22:05:25,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:25,826 INFO L495 AbstractCegarLoop]: Abstraction has 137 states and 179 transitions. [2022-04-27 22:05:25,826 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.263157894736842) internal successors, (48), 37 states have internal predecessors, (48), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:25,826 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 179 transitions. [2022-04-27 22:05:25,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:05:25,826 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:25,826 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:25,843 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:26,030 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 22:05:26,031 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:26,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:26,031 INFO L85 PathProgramCache]: Analyzing trace with hash 389024087, now seen corresponding path program 13 times [2022-04-27 22:05:26,031 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:26,031 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078777135] [2022-04-27 22:05:26,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:26,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:26,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,248 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:26,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,251 INFO L290 TraceCheckUtils]: 0: Hoare triple {13525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13507#true} is VALID [2022-04-27 22:05:26,251 INFO L290 TraceCheckUtils]: 1: Hoare triple {13507#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,251 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13507#true} {13507#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,252 INFO L272 TraceCheckUtils]: 0: Hoare triple {13507#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:26,252 INFO L290 TraceCheckUtils]: 1: Hoare triple {13525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13507#true} is VALID [2022-04-27 22:05:26,252 INFO L290 TraceCheckUtils]: 2: Hoare triple {13507#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,252 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13507#true} {13507#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,252 INFO L272 TraceCheckUtils]: 4: Hoare triple {13507#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,252 INFO L290 TraceCheckUtils]: 5: Hoare triple {13507#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13512#(= main_~y~0 0)} is VALID [2022-04-27 22:05:26,253 INFO L290 TraceCheckUtils]: 6: Hoare triple {13512#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13513#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:26,253 INFO L290 TraceCheckUtils]: 7: Hoare triple {13513#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13514#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:26,254 INFO L290 TraceCheckUtils]: 8: Hoare triple {13514#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13515#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:26,254 INFO L290 TraceCheckUtils]: 9: Hoare triple {13515#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13516#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:26,255 INFO L290 TraceCheckUtils]: 10: Hoare triple {13516#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13517#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:26,255 INFO L290 TraceCheckUtils]: 11: Hoare triple {13517#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,256 INFO L290 TraceCheckUtils]: 12: Hoare triple {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,256 INFO L290 TraceCheckUtils]: 13: Hoare triple {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13519#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:05:26,257 INFO L290 TraceCheckUtils]: 14: Hoare triple {13519#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13520#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:26,257 INFO L290 TraceCheckUtils]: 15: Hoare triple {13520#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13521#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:26,258 INFO L290 TraceCheckUtils]: 16: Hoare triple {13521#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13522#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:26,258 INFO L290 TraceCheckUtils]: 17: Hoare triple {13522#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13523#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:26,259 INFO L290 TraceCheckUtils]: 18: Hoare triple {13523#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13524#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:26,259 INFO L290 TraceCheckUtils]: 19: Hoare triple {13524#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,259 INFO L290 TraceCheckUtils]: 20: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,259 INFO L290 TraceCheckUtils]: 21: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 22: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 23: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 24: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 25: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 26: Hoare triple {13508#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L272 TraceCheckUtils]: 27: Hoare triple {13508#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 28: Hoare triple {13508#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 29: Hoare triple {13508#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L290 TraceCheckUtils]: 30: Hoare triple {13508#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,260 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:05:26,260 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:26,260 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078777135] [2022-04-27 22:05:26,261 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078777135] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:26,261 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1077742661] [2022-04-27 22:05:26,261 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:05:26,261 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:26,261 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:26,262 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:26,262 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 22:05:26,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,300 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 38 conjunts are in the unsatisfiable core [2022-04-27 22:05:26,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,308 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:26,549 INFO L272 TraceCheckUtils]: 0: Hoare triple {13507#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,549 INFO L290 TraceCheckUtils]: 1: Hoare triple {13507#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13507#true} is VALID [2022-04-27 22:05:26,549 INFO L290 TraceCheckUtils]: 2: Hoare triple {13507#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,549 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13507#true} {13507#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,549 INFO L272 TraceCheckUtils]: 4: Hoare triple {13507#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,549 INFO L290 TraceCheckUtils]: 5: Hoare triple {13507#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13512#(= main_~y~0 0)} is VALID [2022-04-27 22:05:26,550 INFO L290 TraceCheckUtils]: 6: Hoare triple {13512#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13513#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:26,550 INFO L290 TraceCheckUtils]: 7: Hoare triple {13513#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13514#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:26,551 INFO L290 TraceCheckUtils]: 8: Hoare triple {13514#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13515#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:26,551 INFO L290 TraceCheckUtils]: 9: Hoare triple {13515#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13516#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:26,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {13516#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13517#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:26,553 INFO L290 TraceCheckUtils]: 11: Hoare triple {13517#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,553 INFO L290 TraceCheckUtils]: 12: Hoare triple {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,553 INFO L290 TraceCheckUtils]: 13: Hoare triple {13518#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13568#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,554 INFO L290 TraceCheckUtils]: 14: Hoare triple {13568#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13572#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:05:26,554 INFO L290 TraceCheckUtils]: 15: Hoare triple {13572#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13576#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,555 INFO L290 TraceCheckUtils]: 16: Hoare triple {13576#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13580#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,555 INFO L290 TraceCheckUtils]: 17: Hoare triple {13580#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13584#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,556 INFO L290 TraceCheckUtils]: 18: Hoare triple {13584#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13588#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:26,556 INFO L290 TraceCheckUtils]: 19: Hoare triple {13588#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 20: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 21: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 22: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 23: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 24: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 25: Hoare triple {13508#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 26: Hoare triple {13508#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L272 TraceCheckUtils]: 27: Hoare triple {13508#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 28: Hoare triple {13508#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 29: Hoare triple {13508#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,557 INFO L290 TraceCheckUtils]: 30: Hoare triple {13508#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,558 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:05:26,558 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:26,891 INFO L290 TraceCheckUtils]: 30: Hoare triple {13508#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,891 INFO L290 TraceCheckUtils]: 29: Hoare triple {13508#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,891 INFO L290 TraceCheckUtils]: 28: Hoare triple {13508#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13508#false} is VALID [2022-04-27 22:05:26,891 INFO L272 TraceCheckUtils]: 27: Hoare triple {13508#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {13508#false} is VALID [2022-04-27 22:05:26,891 INFO L290 TraceCheckUtils]: 26: Hoare triple {13508#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13508#false} is VALID [2022-04-27 22:05:26,891 INFO L290 TraceCheckUtils]: 25: Hoare triple {13640#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13508#false} is VALID [2022-04-27 22:05:26,892 INFO L290 TraceCheckUtils]: 24: Hoare triple {13644#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13640#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:26,893 INFO L290 TraceCheckUtils]: 23: Hoare triple {13648#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13644#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:05:26,894 INFO L290 TraceCheckUtils]: 22: Hoare triple {13652#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13648#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:05:26,894 INFO L290 TraceCheckUtils]: 21: Hoare triple {13656#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13652#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:05:26,895 INFO L290 TraceCheckUtils]: 20: Hoare triple {13660#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13656#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:05:26,895 INFO L290 TraceCheckUtils]: 19: Hoare triple {13664#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13660#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:05:26,896 INFO L290 TraceCheckUtils]: 18: Hoare triple {13668#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13664#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:05:26,897 INFO L290 TraceCheckUtils]: 17: Hoare triple {13672#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13668#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:05:26,898 INFO L290 TraceCheckUtils]: 16: Hoare triple {13676#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13672#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:05:26,898 INFO L290 TraceCheckUtils]: 15: Hoare triple {13680#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13676#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:05:26,899 INFO L290 TraceCheckUtils]: 14: Hoare triple {13684#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13680#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-27 22:05:26,899 INFO L290 TraceCheckUtils]: 13: Hoare triple {13507#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {13684#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} is VALID [2022-04-27 22:05:26,899 INFO L290 TraceCheckUtils]: 12: Hoare triple {13507#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 11: Hoare triple {13507#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 10: Hoare triple {13507#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 9: Hoare triple {13507#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 8: Hoare triple {13507#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 7: Hoare triple {13507#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 6: Hoare triple {13507#true} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 5: Hoare triple {13507#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L272 TraceCheckUtils]: 4: Hoare triple {13507#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13507#true} {13507#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 2: Hoare triple {13507#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L290 TraceCheckUtils]: 1: Hoare triple {13507#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13507#true} is VALID [2022-04-27 22:05:26,900 INFO L272 TraceCheckUtils]: 0: Hoare triple {13507#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13507#true} is VALID [2022-04-27 22:05:26,901 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:05:26,901 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1077742661] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:26,901 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:26,901 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 14] total 34 [2022-04-27 22:05:26,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352020606] [2022-04-27 22:05:26,901 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:26,901 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:05:26,902 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:26,902 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,949 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:26,949 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 22:05:26,949 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:26,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 22:05:26,950 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=959, Unknown=0, NotChecked=0, Total=1122 [2022-04-27 22:05:26,950 INFO L87 Difference]: Start difference. First operand 137 states and 179 transitions. Second operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:31,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:31,073 INFO L93 Difference]: Finished difference Result 242 states and 303 transitions. [2022-04-27 22:05:31,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2022-04-27 22:05:31,073 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:05:31,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:31,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:31,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 85 transitions. [2022-04-27 22:05:31,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:31,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 85 transitions. [2022-04-27 22:05:31,076 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 36 states and 85 transitions. [2022-04-27 22:05:31,245 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:31,247 INFO L225 Difference]: With dead ends: 242 [2022-04-27 22:05:31,247 INFO L226 Difference]: Without dead ends: 179 [2022-04-27 22:05:31,248 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 851 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=518, Invalid=3904, Unknown=0, NotChecked=0, Total=4422 [2022-04-27 22:05:31,248 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 32 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 588 mSolverCounterSat, 90 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 678 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 90 IncrementalHoareTripleChecker+Valid, 588 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:31,248 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [32 Valid, 94 Invalid, 678 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [90 Valid, 588 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 22:05:31,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-04-27 22:05:32,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 153. [2022-04-27 22:05:32,319 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:32,319 INFO L82 GeneralOperation]: Start isEquivalent. First operand 179 states. Second operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,319 INFO L74 IsIncluded]: Start isIncluded. First operand 179 states. Second operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,319 INFO L87 Difference]: Start difference. First operand 179 states. Second operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:32,322 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-27 22:05:32,322 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-27 22:05:32,322 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:32,322 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:32,323 INFO L74 IsIncluded]: Start isIncluded. First operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-27 22:05:32,323 INFO L87 Difference]: Start difference. First operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 179 states. [2022-04-27 22:05:32,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:32,325 INFO L93 Difference]: Finished difference Result 179 states and 223 transitions. [2022-04-27 22:05:32,325 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 223 transitions. [2022-04-27 22:05:32,326 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:32,326 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:32,326 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:32,326 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:32,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 148 states have (on average 1.304054054054054) internal successors, (193), 148 states have internal predecessors, (193), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 197 transitions. [2022-04-27 22:05:32,328 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 197 transitions. Word has length 31 [2022-04-27 22:05:32,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:32,328 INFO L495 AbstractCegarLoop]: Abstraction has 153 states and 197 transitions. [2022-04-27 22:05:32,328 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.3529411764705883) internal successors, (46), 33 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,328 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 197 transitions. [2022-04-27 22:05:32,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:05:32,329 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:32,329 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:32,345 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:32,543 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 22:05:32,543 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:32,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:32,544 INFO L85 PathProgramCache]: Analyzing trace with hash -1608168445, now seen corresponding path program 14 times [2022-04-27 22:05:32,544 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:32,544 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415201812] [2022-04-27 22:05:32,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:32,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:32,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:33,180 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:33,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:33,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {14814#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14791#true} is VALID [2022-04-27 22:05:33,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {14791#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:33,188 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14791#true} {14791#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:33,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {14791#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14814#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:33,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {14814#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14791#true} is VALID [2022-04-27 22:05:33,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {14791#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:33,189 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14791#true} {14791#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:33,189 INFO L272 TraceCheckUtils]: 4: Hoare triple {14791#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:33,189 INFO L290 TraceCheckUtils]: 5: Hoare triple {14791#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14796#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:05:33,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {14796#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14797#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:33,203 INFO L290 TraceCheckUtils]: 7: Hoare triple {14797#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14798#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 22:05:33,205 INFO L290 TraceCheckUtils]: 8: Hoare triple {14798#(and (<= 2 main_~y~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14799#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:33,213 INFO L290 TraceCheckUtils]: 9: Hoare triple {14799#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14800#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} is VALID [2022-04-27 22:05:33,219 INFO L290 TraceCheckUtils]: 10: Hoare triple {14800#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= 4 main_~y~0) (<= (+ main_~y~0 main_~x~0) main_~n~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14801#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:33,466 INFO L290 TraceCheckUtils]: 11: Hoare triple {14801#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~y~0 5) (<= main_~x~0 (+ 4294967290 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14802#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 6) main_~n~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:33,467 INFO L290 TraceCheckUtils]: 12: Hoare triple {14802#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 6) main_~n~0) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14803#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,468 INFO L290 TraceCheckUtils]: 13: Hoare triple {14803#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,469 INFO L290 TraceCheckUtils]: 14: Hoare triple {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,470 INFO L290 TraceCheckUtils]: 15: Hoare triple {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,471 INFO L290 TraceCheckUtils]: 16: Hoare triple {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:33,472 INFO L290 TraceCheckUtils]: 17: Hoare triple {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:33,473 INFO L290 TraceCheckUtils]: 18: Hoare triple {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-27 22:05:33,473 INFO L290 TraceCheckUtils]: 19: Hoare triple {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,474 INFO L290 TraceCheckUtils]: 20: Hoare triple {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,475 INFO L290 TraceCheckUtils]: 21: Hoare triple {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-27 22:05:33,476 INFO L290 TraceCheckUtils]: 22: Hoare triple {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:33,477 INFO L290 TraceCheckUtils]: 23: Hoare triple {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:33,477 INFO L290 TraceCheckUtils]: 24: Hoare triple {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,478 INFO L290 TraceCheckUtils]: 25: Hoare triple {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:33,480 INFO L290 TraceCheckUtils]: 26: Hoare triple {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:33,480 INFO L290 TraceCheckUtils]: 27: Hoare triple {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:33,481 INFO L272 TraceCheckUtils]: 28: Hoare triple {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {14812#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:05:33,481 INFO L290 TraceCheckUtils]: 29: Hoare triple {14812#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14813#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:05:33,482 INFO L290 TraceCheckUtils]: 30: Hoare triple {14813#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14792#false} is VALID [2022-04-27 22:05:33,482 INFO L290 TraceCheckUtils]: 31: Hoare triple {14792#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14792#false} is VALID [2022-04-27 22:05:33,482 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:33,482 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:33,482 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415201812] [2022-04-27 22:05:33,482 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [415201812] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:33,482 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1677125344] [2022-04-27 22:05:33,482 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:33,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:33,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:33,484 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:33,484 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 22:05:33,656 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:33,656 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:33,657 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 59 conjunts are in the unsatisfiable core [2022-04-27 22:05:33,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:33,669 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:57,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {14791#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:57,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {14791#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14791#true} is VALID [2022-04-27 22:05:57,729 INFO L290 TraceCheckUtils]: 2: Hoare triple {14791#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:57,729 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14791#true} {14791#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:57,729 INFO L272 TraceCheckUtils]: 4: Hoare triple {14791#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:57,729 INFO L290 TraceCheckUtils]: 5: Hoare triple {14791#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14796#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:05:57,730 INFO L290 TraceCheckUtils]: 6: Hoare triple {14796#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14836#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= main_~y~0 1))} is VALID [2022-04-27 22:05:57,730 INFO L290 TraceCheckUtils]: 7: Hoare triple {14836#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14840#(and (= main_~y~0 2) (= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0))} is VALID [2022-04-27 22:05:57,731 INFO L290 TraceCheckUtils]: 8: Hoare triple {14840#(and (= main_~y~0 2) (= (+ main_~x~0 2 (* (- 1) main_~n~0)) 0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14844#(and (= 2 (+ (- 1) main_~y~0)) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} is VALID [2022-04-27 22:05:57,731 INFO L290 TraceCheckUtils]: 9: Hoare triple {14844#(and (= 2 (+ (- 1) main_~y~0)) (= (+ (- 2) main_~n~0) (+ main_~x~0 1)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14848#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (= main_~y~0 4))} is VALID [2022-04-27 22:05:57,732 INFO L290 TraceCheckUtils]: 10: Hoare triple {14848#(and (= (+ (- 2) main_~n~0) (+ main_~x~0 2)) (= main_~y~0 4))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14852#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 4))) (= (+ (- 1) main_~y~0) 4))} is VALID [2022-04-27 22:05:57,733 INFO L290 TraceCheckUtils]: 11: Hoare triple {14852#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 4))) (= (+ (- 1) main_~y~0) 4))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14856#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 5))) (< 0 (mod (+ 4294967291 main_~n~0) 4294967296)) (= (+ (- 2) main_~y~0) 4))} is VALID [2022-04-27 22:05:57,733 INFO L290 TraceCheckUtils]: 12: Hoare triple {14856#(and (= (+ main_~x~0 1) (+ main_~n~0 (- 5))) (< 0 (mod (+ 4294967291 main_~n~0) 4294967296)) (= (+ (- 2) main_~y~0) 4))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14803#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,734 INFO L290 TraceCheckUtils]: 13: Hoare triple {14803#(and (<= main_~y~0 6) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 6) main_~n~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,735 INFO L290 TraceCheckUtils]: 14: Hoare triple {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,736 INFO L290 TraceCheckUtils]: 15: Hoare triple {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,737 INFO L290 TraceCheckUtils]: 16: Hoare triple {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:57,738 INFO L290 TraceCheckUtils]: 17: Hoare triple {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:57,739 INFO L290 TraceCheckUtils]: 18: Hoare triple {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-27 22:05:57,740 INFO L290 TraceCheckUtils]: 19: Hoare triple {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,740 INFO L290 TraceCheckUtils]: 20: Hoare triple {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,741 INFO L290 TraceCheckUtils]: 21: Hoare triple {14810#(and (<= main_~z~0 0) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967289) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} is VALID [2022-04-27 22:05:57,742 INFO L290 TraceCheckUtils]: 22: Hoare triple {14809#(and (<= (+ 6 (* (div (+ 4294967290 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0) (<= main_~z~0 1))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:57,743 INFO L290 TraceCheckUtils]: 23: Hoare triple {14808#(and (<= main_~z~0 2) (<= (+ 6 (* (div (+ 4294967291 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} is VALID [2022-04-27 22:05:57,744 INFO L290 TraceCheckUtils]: 24: Hoare triple {14807#(and (<= main_~z~0 3) (<= (+ 6 (* (div (+ 4294967292 main_~n~0 (* (- 1) main_~z~0)) 4294967296) 4294967296)) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,745 INFO L290 TraceCheckUtils]: 25: Hoare triple {14806#(and (<= main_~z~0 4) (<= (+ (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967293) 4294967296)) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,745 INFO L290 TraceCheckUtils]: 26: Hoare triple {14805#(and (<= main_~z~0 5) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967294) 4294967296) 4294967296) 6) main_~n~0))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,746 INFO L290 TraceCheckUtils]: 27: Hoare triple {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} is VALID [2022-04-27 22:05:57,747 INFO L272 TraceCheckUtils]: 28: Hoare triple {14804#(and (<= main_~z~0 6) (<= (+ (* (div (+ main_~n~0 (* (- 1) main_~z~0) 4294967295) 4294967296) 4294967296) 6) main_~n~0))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {14908#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:57,748 INFO L290 TraceCheckUtils]: 29: Hoare triple {14908#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14912#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:57,748 INFO L290 TraceCheckUtils]: 30: Hoare triple {14912#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14792#false} is VALID [2022-04-27 22:05:57,748 INFO L290 TraceCheckUtils]: 31: Hoare triple {14792#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14792#false} is VALID [2022-04-27 22:05:57,748 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:57,748 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:59,510 INFO L290 TraceCheckUtils]: 31: Hoare triple {14792#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14792#false} is VALID [2022-04-27 22:05:59,510 INFO L290 TraceCheckUtils]: 30: Hoare triple {14912#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {14792#false} is VALID [2022-04-27 22:05:59,511 INFO L290 TraceCheckUtils]: 29: Hoare triple {14908#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14912#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:59,511 INFO L272 TraceCheckUtils]: 28: Hoare triple {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {14908#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:59,512 INFO L290 TraceCheckUtils]: 27: Hoare triple {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,513 INFO L290 TraceCheckUtils]: 26: Hoare triple {14934#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,514 INFO L290 TraceCheckUtils]: 25: Hoare triple {14938#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14934#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,514 INFO L290 TraceCheckUtils]: 24: Hoare triple {14942#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14938#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,515 INFO L290 TraceCheckUtils]: 23: Hoare triple {14946#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14942#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,516 INFO L290 TraceCheckUtils]: 22: Hoare triple {14950#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14946#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,517 INFO L290 TraceCheckUtils]: 21: Hoare triple {14954#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14950#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,518 INFO L290 TraceCheckUtils]: 20: Hoare triple {14954#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14954#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,518 INFO L290 TraceCheckUtils]: 19: Hoare triple {14950#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14954#(and (< (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0) (+ 7 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 6) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,519 INFO L290 TraceCheckUtils]: 18: Hoare triple {14946#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14950#(and (<= (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ 5 main_~z~0) 4294967296) 4294967296)) (+ main_~z~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,520 INFO L290 TraceCheckUtils]: 17: Hoare triple {14942#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14946#(and (< (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~z~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~z~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,521 INFO L290 TraceCheckUtils]: 16: Hoare triple {14938#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14942#(and (< (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~z~0 3) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,522 INFO L290 TraceCheckUtils]: 15: Hoare triple {14934#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14938#(and (< (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~z~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~z~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,523 INFO L290 TraceCheckUtils]: 14: Hoare triple {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14934#(and (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~z~0 1) 4294967296) 4294967296)) (+ main_~z~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,523 INFO L290 TraceCheckUtils]: 13: Hoare triple {14979#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {14811#(and (< (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296)) (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~z~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div main_~z~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:59,524 INFO L290 TraceCheckUtils]: 12: Hoare triple {14983#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14979#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:59,525 INFO L290 TraceCheckUtils]: 11: Hoare triple {14987#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14983#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:05:59,526 INFO L290 TraceCheckUtils]: 10: Hoare triple {14991#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14987#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:05:59,528 INFO L290 TraceCheckUtils]: 9: Hoare triple {14995#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14991#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:05:59,529 INFO L290 TraceCheckUtils]: 8: Hoare triple {14999#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14995#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:05:59,530 INFO L290 TraceCheckUtils]: 7: Hoare triple {15003#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14999#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:59,531 INFO L290 TraceCheckUtils]: 6: Hoare triple {15007#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15003#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:05:59,532 INFO L290 TraceCheckUtils]: 5: Hoare triple {14791#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15007#(or (and (< (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)) (+ 7 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 6) 4294967296) 4294967296)))) (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:59,532 INFO L272 TraceCheckUtils]: 4: Hoare triple {14791#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:59,532 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14791#true} {14791#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:59,532 INFO L290 TraceCheckUtils]: 2: Hoare triple {14791#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:59,532 INFO L290 TraceCheckUtils]: 1: Hoare triple {14791#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14791#true} is VALID [2022-04-27 22:05:59,532 INFO L272 TraceCheckUtils]: 0: Hoare triple {14791#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14791#true} is VALID [2022-04-27 22:05:59,533 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:59,533 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1677125344] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:59,533 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:59,533 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 19] total 43 [2022-04-27 22:05:59,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398356495] [2022-04-27 22:05:59,533 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:59,534 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:05:59,539 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:59,539 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,665 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:59,666 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-04-27 22:05:59,666 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:59,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-04-27 22:05:59,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=1620, Unknown=0, NotChecked=0, Total=1806 [2022-04-27 22:05:59,666 INFO L87 Difference]: Start difference. First operand 153 states and 197 transitions. Second operand has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:36,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:36,710 INFO L93 Difference]: Finished difference Result 246 states and 296 transitions. [2022-04-27 22:06:36,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-04-27 22:06:36,710 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:06:36,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:36,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:36,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 91 transitions. [2022-04-27 22:06:36,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:36,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 91 transitions. [2022-04-27 22:06:36,713 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 51 states and 91 transitions. [2022-04-27 22:06:37,397 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 91 edges. 91 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:37,400 INFO L225 Difference]: With dead ends: 246 [2022-04-27 22:06:37,400 INFO L226 Difference]: Without dead ends: 210 [2022-04-27 22:06:37,404 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 45 SyntacticMatches, 4 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1528 ImplicationChecksByTransitivity, 28.5s TimeCoverageRelationStatistics Valid=780, Invalid=7410, Unknown=0, NotChecked=0, Total=8190 [2022-04-27 22:06:37,404 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 106 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 911 mSolverCounterSat, 143 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 106 SdHoareTripleChecker+Valid, 149 SdHoareTripleChecker+Invalid, 1054 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 143 IncrementalHoareTripleChecker+Valid, 911 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:37,404 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [106 Valid, 149 Invalid, 1054 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [143 Valid, 911 Invalid, 0 Unknown, 0 Unchecked, 5.4s Time] [2022-04-27 22:06:37,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2022-04-27 22:06:38,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 139. [2022-04-27 22:06:38,378 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:38,378 INFO L82 GeneralOperation]: Start isEquivalent. First operand 210 states. Second operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:38,379 INFO L74 IsIncluded]: Start isIncluded. First operand 210 states. Second operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:38,379 INFO L87 Difference]: Start difference. First operand 210 states. Second operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:38,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:38,382 INFO L93 Difference]: Finished difference Result 210 states and 258 transitions. [2022-04-27 22:06:38,382 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 258 transitions. [2022-04-27 22:06:38,382 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:38,382 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:38,382 INFO L74 IsIncluded]: Start isIncluded. First operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 210 states. [2022-04-27 22:06:38,383 INFO L87 Difference]: Start difference. First operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 210 states. [2022-04-27 22:06:38,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:38,386 INFO L93 Difference]: Finished difference Result 210 states and 258 transitions. [2022-04-27 22:06:38,386 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 258 transitions. [2022-04-27 22:06:38,386 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:38,386 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:38,386 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:38,386 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:38,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 134 states have (on average 1.3134328358208955) internal successors, (176), 134 states have internal predecessors, (176), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:38,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 180 transitions. [2022-04-27 22:06:38,390 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 180 transitions. Word has length 32 [2022-04-27 22:06:38,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:38,393 INFO L495 AbstractCegarLoop]: Abstraction has 139 states and 180 transitions. [2022-04-27 22:06:38,393 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 43 states have (on average 1.441860465116279) internal successors, (62), 40 states have internal predecessors, (62), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:38,393 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 180 transitions. [2022-04-27 22:06:38,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 22:06:38,394 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:38,394 INFO L195 NwaCegarLoop]: trace histogram [15, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:38,413 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:38,607 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:38,607 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:38,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:38,608 INFO L85 PathProgramCache]: Analyzing trace with hash -894600297, now seen corresponding path program 15 times [2022-04-27 22:06:38,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:38,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38017570] [2022-04-27 22:06:38,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:38,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:38,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:38,905 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:38,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:38,916 INFO L290 TraceCheckUtils]: 0: Hoare triple {16184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16160#true} is VALID [2022-04-27 22:06:38,916 INFO L290 TraceCheckUtils]: 1: Hoare triple {16160#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:38,916 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16160#true} {16160#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:38,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {16160#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:38,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {16184#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16160#true} is VALID [2022-04-27 22:06:38,917 INFO L290 TraceCheckUtils]: 2: Hoare triple {16160#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:38,917 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16160#true} {16160#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:38,917 INFO L272 TraceCheckUtils]: 4: Hoare triple {16160#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:38,917 INFO L290 TraceCheckUtils]: 5: Hoare triple {16160#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16165#(= main_~y~0 0)} is VALID [2022-04-27 22:06:38,918 INFO L290 TraceCheckUtils]: 6: Hoare triple {16165#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16166#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:38,918 INFO L290 TraceCheckUtils]: 7: Hoare triple {16166#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16167#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:38,919 INFO L290 TraceCheckUtils]: 8: Hoare triple {16167#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16168#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:38,919 INFO L290 TraceCheckUtils]: 9: Hoare triple {16168#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16169#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:38,920 INFO L290 TraceCheckUtils]: 10: Hoare triple {16169#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16170#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:38,920 INFO L290 TraceCheckUtils]: 11: Hoare triple {16170#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16171#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:38,921 INFO L290 TraceCheckUtils]: 12: Hoare triple {16171#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16172#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:38,922 INFO L290 TraceCheckUtils]: 13: Hoare triple {16172#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16173#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:38,922 INFO L290 TraceCheckUtils]: 14: Hoare triple {16173#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16174#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:38,923 INFO L290 TraceCheckUtils]: 15: Hoare triple {16174#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16175#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:06:38,923 INFO L290 TraceCheckUtils]: 16: Hoare triple {16175#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16176#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:06:38,924 INFO L290 TraceCheckUtils]: 17: Hoare triple {16176#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16177#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:38,924 INFO L290 TraceCheckUtils]: 18: Hoare triple {16177#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16178#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:06:38,925 INFO L290 TraceCheckUtils]: 19: Hoare triple {16178#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16179#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:06:38,925 INFO L290 TraceCheckUtils]: 20: Hoare triple {16179#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:06:38,926 INFO L290 TraceCheckUtils]: 21: Hoare triple {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:06:38,926 INFO L290 TraceCheckUtils]: 22: Hoare triple {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16181#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:06:38,927 INFO L290 TraceCheckUtils]: 23: Hoare triple {16181#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16182#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:06:38,927 INFO L290 TraceCheckUtils]: 24: Hoare triple {16182#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16183#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 25: Hoare triple {16183#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 26: Hoare triple {16161#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 27: Hoare triple {16161#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 28: Hoare triple {16161#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L272 TraceCheckUtils]: 29: Hoare triple {16161#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 30: Hoare triple {16161#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 31: Hoare triple {16161#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L290 TraceCheckUtils]: 32: Hoare triple {16161#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:38,928 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:06:38,928 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:38,928 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38017570] [2022-04-27 22:06:38,929 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [38017570] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:38,929 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [327888127] [2022-04-27 22:06:38,929 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:06:38,929 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:38,929 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:38,930 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:38,932 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 22:06:39,304 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-04-27 22:06:39,304 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:39,305 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-27 22:06:39,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:39,313 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:39,572 INFO L272 TraceCheckUtils]: 0: Hoare triple {16160#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:39,573 INFO L290 TraceCheckUtils]: 1: Hoare triple {16160#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16160#true} is VALID [2022-04-27 22:06:39,573 INFO L290 TraceCheckUtils]: 2: Hoare triple {16160#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:39,573 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16160#true} {16160#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:39,573 INFO L272 TraceCheckUtils]: 4: Hoare triple {16160#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:39,573 INFO L290 TraceCheckUtils]: 5: Hoare triple {16160#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16165#(= main_~y~0 0)} is VALID [2022-04-27 22:06:39,574 INFO L290 TraceCheckUtils]: 6: Hoare triple {16165#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16166#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:39,574 INFO L290 TraceCheckUtils]: 7: Hoare triple {16166#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16167#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:39,575 INFO L290 TraceCheckUtils]: 8: Hoare triple {16167#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16168#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:39,575 INFO L290 TraceCheckUtils]: 9: Hoare triple {16168#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16169#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:39,576 INFO L290 TraceCheckUtils]: 10: Hoare triple {16169#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16170#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:39,576 INFO L290 TraceCheckUtils]: 11: Hoare triple {16170#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16171#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:39,577 INFO L290 TraceCheckUtils]: 12: Hoare triple {16171#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16172#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:39,577 INFO L290 TraceCheckUtils]: 13: Hoare triple {16172#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16173#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:39,578 INFO L290 TraceCheckUtils]: 14: Hoare triple {16173#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16174#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:39,578 INFO L290 TraceCheckUtils]: 15: Hoare triple {16174#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16175#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:06:39,579 INFO L290 TraceCheckUtils]: 16: Hoare triple {16175#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16176#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:06:39,579 INFO L290 TraceCheckUtils]: 17: Hoare triple {16176#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16177#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:39,580 INFO L290 TraceCheckUtils]: 18: Hoare triple {16177#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16178#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:06:39,580 INFO L290 TraceCheckUtils]: 19: Hoare triple {16178#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16179#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:06:39,581 INFO L290 TraceCheckUtils]: 20: Hoare triple {16179#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:06:39,581 INFO L290 TraceCheckUtils]: 21: Hoare triple {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:06:39,582 INFO L290 TraceCheckUtils]: 22: Hoare triple {16180#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16181#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:06:39,583 INFO L290 TraceCheckUtils]: 23: Hoare triple {16181#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16182#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:06:39,583 INFO L290 TraceCheckUtils]: 24: Hoare triple {16182#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16260#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 25: Hoare triple {16260#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 26: Hoare triple {16161#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 27: Hoare triple {16161#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 28: Hoare triple {16161#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L272 TraceCheckUtils]: 29: Hoare triple {16161#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 30: Hoare triple {16161#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 31: Hoare triple {16161#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L290 TraceCheckUtils]: 32: Hoare triple {16161#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:39,584 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:06:39,584 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:40,149 INFO L290 TraceCheckUtils]: 32: Hoare triple {16161#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:40,149 INFO L290 TraceCheckUtils]: 31: Hoare triple {16161#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:40,149 INFO L290 TraceCheckUtils]: 30: Hoare triple {16161#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16161#false} is VALID [2022-04-27 22:06:40,150 INFO L272 TraceCheckUtils]: 29: Hoare triple {16161#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~z~0_9 4294967296)) 1 0)) InVars {main_~z~0=v_main_~z~0_9, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~z~0, main_~n~0] {16161#false} is VALID [2022-04-27 22:06:40,150 INFO L290 TraceCheckUtils]: 28: Hoare triple {16161#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:40,150 INFO L290 TraceCheckUtils]: 27: Hoare triple {16161#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16161#false} is VALID [2022-04-27 22:06:40,150 INFO L290 TraceCheckUtils]: 26: Hoare triple {16161#false} [79] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16161#false} is VALID [2022-04-27 22:06:40,150 INFO L290 TraceCheckUtils]: 25: Hoare triple {16306#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16161#false} is VALID [2022-04-27 22:06:40,151 INFO L290 TraceCheckUtils]: 24: Hoare triple {16310#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16306#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:06:40,151 INFO L290 TraceCheckUtils]: 23: Hoare triple {16314#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296)) (= v_main_~x~0_5 (+ v_main_~x~0_6 1))) InVars {main_~x~0=v_main_~x~0_6, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_5, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16310#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:40,152 INFO L290 TraceCheckUtils]: 22: Hoare triple {16318#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_5) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[main_~z~0] {16314#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:40,152 INFO L290 TraceCheckUtils]: 21: Hoare triple {16318#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16318#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:40,153 INFO L290 TraceCheckUtils]: 20: Hoare triple {16325#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16318#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:06:40,153 INFO L290 TraceCheckUtils]: 19: Hoare triple {16329#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16325#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:40,154 INFO L290 TraceCheckUtils]: 18: Hoare triple {16333#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16329#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:06:40,155 INFO L290 TraceCheckUtils]: 17: Hoare triple {16337#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16333#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:06:40,155 INFO L290 TraceCheckUtils]: 16: Hoare triple {16341#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16337#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:06:40,156 INFO L290 TraceCheckUtils]: 15: Hoare triple {16345#(< 0 (mod (+ main_~y~0 4) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16341#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:06:40,157 INFO L290 TraceCheckUtils]: 14: Hoare triple {16349#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16345#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:06:40,157 INFO L290 TraceCheckUtils]: 13: Hoare triple {16353#(< 0 (mod (+ main_~y~0 6) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16349#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:40,158 INFO L290 TraceCheckUtils]: 12: Hoare triple {16357#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16353#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:06:40,159 INFO L290 TraceCheckUtils]: 11: Hoare triple {16361#(< 0 (mod (+ main_~y~0 8) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16357#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:40,159 INFO L290 TraceCheckUtils]: 10: Hoare triple {16365#(< 0 (mod (+ main_~y~0 9) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16361#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:06:40,160 INFO L290 TraceCheckUtils]: 9: Hoare triple {16369#(< 0 (mod (+ main_~y~0 10) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16365#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:06:40,161 INFO L290 TraceCheckUtils]: 8: Hoare triple {16373#(< 0 (mod (+ main_~y~0 11) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16369#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:06:40,161 INFO L290 TraceCheckUtils]: 7: Hoare triple {16377#(< 0 (mod (+ main_~y~0 12) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16373#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:06:40,162 INFO L290 TraceCheckUtils]: 6: Hoare triple {16381#(< 0 (mod (+ main_~y~0 13) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16377#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:06:40,162 INFO L290 TraceCheckUtils]: 5: Hoare triple {16160#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16381#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:06:40,162 INFO L272 TraceCheckUtils]: 4: Hoare triple {16160#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:40,162 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16160#true} {16160#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:40,162 INFO L290 TraceCheckUtils]: 2: Hoare triple {16160#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:40,163 INFO L290 TraceCheckUtils]: 1: Hoare triple {16160#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16160#true} is VALID [2022-04-27 22:06:40,163 INFO L272 TraceCheckUtils]: 0: Hoare triple {16160#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16160#true} is VALID [2022-04-27 22:06:40,163 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:06:40,163 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [327888127] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:40,163 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:40,163 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-27 22:06:40,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083953900] [2022-04-27 22:06:40,163 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:40,164 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:06:40,164 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:40,164 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:40,211 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:40,212 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-27 22:06:40,212 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:40,212 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-27 22:06:40,212 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1373, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:06:40,212 INFO L87 Difference]: Start difference. First operand 139 states and 180 transitions. Second operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:07:06,593 WARN L232 SmtUtils]: Spent 14.24s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:42,719 WARN L232 SmtUtils]: Spent 19.87s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:08:15,638 WARN L232 SmtUtils]: Spent 13.66s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:08:38,069 WARN L232 SmtUtils]: Spent 15.78s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:00,487 WARN L232 SmtUtils]: Spent 6.79s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:19,734 WARN L232 SmtUtils]: Spent 8.72s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:29,779 WARN L232 SmtUtils]: Spent 6.74s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:51,041 WARN L232 SmtUtils]: Spent 7.75s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:10:06,204 WARN L232 SmtUtils]: Spent 8.98s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:10:18,852 WARN L232 SmtUtils]: Spent 7.14s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:10:42,715 WARN L232 SmtUtils]: Spent 15.21s on a formula simplification that was a NOOP. DAG size: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)