/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de32.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 22:00:54,445 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 22:00:54,447 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 22:00:54,497 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 22:00:54,498 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 22:00:54,499 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 22:00:54,502 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 22:00:54,506 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 22:00:54,507 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 22:00:54,508 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 22:00:54,509 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 22:00:54,510 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 22:00:54,511 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 22:00:54,514 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 22:00:54,515 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 22:00:54,516 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 22:00:54,516 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 22:00:54,517 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 22:00:54,518 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 22:00:54,520 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 22:00:54,521 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 22:00:54,526 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 22:00:54,528 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 22:00:54,529 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 22:00:54,530 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 22:00:54,540 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 22:00:54,548 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 22:00:54,549 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 22:00:54,551 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 22:00:54,552 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 22:00:54,579 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 22:00:54,580 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 22:00:54,581 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 22:00:54,581 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 22:00:54,582 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 22:00:54,582 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 22:00:54,582 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 22:00:54,582 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 22:00:54,582 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 22:00:54,583 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 22:00:54,583 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 22:00:54,583 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 22:00:54,584 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 22:00:54,584 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 22:00:54,584 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 22:00:54,584 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 22:00:54,584 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 22:00:54,584 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 22:00:54,584 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 22:00:54,585 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:00:54,585 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 22:00:54,585 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 22:00:54,585 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 22:00:54,585 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 22:00:54,586 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 22:00:54,586 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 22:00:54,586 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 22:00:54,586 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 22:00:54,587 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 22:00:54,587 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 22:00:54,851 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 22:00:54,875 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 22:00:54,877 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 22:00:54,878 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 22:00:54,879 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 22:00:54,880 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de32.c [2022-04-27 22:00:54,942 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3eeada593/b3533b8940604124830f719e4381c20f/FLAGe68f21575 [2022-04-27 22:00:55,340 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 22:00:55,341 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c [2022-04-27 22:00:55,347 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3eeada593/b3533b8940604124830f719e4381c20f/FLAGe68f21575 [2022-04-27 22:00:55,753 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3eeada593/b3533b8940604124830f719e4381c20f [2022-04-27 22:00:55,755 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 22:00:55,756 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 22:00:55,757 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 22:00:55,757 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 22:00:55,761 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 22:00:55,765 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:55,766 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5e78cc06 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55, skipping insertion in model container [2022-04-27 22:00:55,767 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:55,772 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 22:00:55,782 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 22:00:55,912 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c[368,381] [2022-04-27 22:00:55,940 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:00:55,948 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 22:00:55,958 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de32.c[368,381] [2022-04-27 22:00:55,962 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:00:55,973 INFO L208 MainTranslator]: Completed translation [2022-04-27 22:00:55,973 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55 WrapperNode [2022-04-27 22:00:55,973 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 22:00:55,977 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 22:00:55,977 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 22:00:55,977 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 22:00:55,987 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:55,988 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:55,994 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:55,995 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:56,000 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:56,004 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:56,005 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:56,006 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 22:00:56,007 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 22:00:56,007 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 22:00:56,007 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 22:00:56,008 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (1/1) ... [2022-04-27 22:00:56,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:00:56,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:56,033 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 22:00:56,035 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 22:00:56,069 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 22:00:56,069 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 22:00:56,070 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 22:00:56,071 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 22:00:56,071 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 22:00:56,071 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 22:00:56,072 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 22:00:56,072 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 22:00:56,074 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 22:00:56,074 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 22:00:56,075 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 22:00:56,132 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 22:00:56,134 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 22:00:56,345 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 22:00:56,350 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 22:00:56,351 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-04-27 22:00:56,352 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:00:56 BoogieIcfgContainer [2022-04-27 22:00:56,352 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 22:00:56,353 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 22:00:56,353 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 22:00:56,354 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 22:00:56,357 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:00:56" (1/1) ... [2022-04-27 22:00:56,358 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 22:00:56,376 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:00:56 BasicIcfg [2022-04-27 22:00:56,376 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 22:00:56,377 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 22:00:56,377 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 22:00:56,380 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 22:00:56,381 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 10:00:55" (1/4) ... [2022-04-27 22:00:56,381 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22cdcb96 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:00:56, skipping insertion in model container [2022-04-27 22:00:56,381 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:00:55" (2/4) ... [2022-04-27 22:00:56,381 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22cdcb96 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:00:56, skipping insertion in model container [2022-04-27 22:00:56,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:00:56" (3/4) ... [2022-04-27 22:00:56,382 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22cdcb96 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 10:00:56, skipping insertion in model container [2022-04-27 22:00:56,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:00:56" (4/4) ... [2022-04-27 22:00:56,383 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de32.cqvasr [2022-04-27 22:00:56,395 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 22:00:56,395 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 22:00:56,456 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 22:00:56,464 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@d080f7e, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@79d47e37 [2022-04-27 22:00:56,464 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 22:00:56,471 INFO L276 IsEmpty]: Start isEmpty. Operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 22:00:56,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 22:00:56,479 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:56,480 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:56,481 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:56,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:56,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1909530012, now seen corresponding path program 1 times [2022-04-27 22:00:56,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:56,496 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103640990] [2022-04-27 22:00:56,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:56,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:56,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:56,669 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:56,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:56,696 INFO L290 TraceCheckUtils]: 0: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-27 22:00:56,697 INFO L290 TraceCheckUtils]: 1: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 22:00:56,697 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 22:00:56,699 INFO L272 TraceCheckUtils]: 0: Hoare triple {25#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:56,702 INFO L290 TraceCheckUtils]: 1: Hoare triple {30#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25#true} is VALID [2022-04-27 22:00:56,702 INFO L290 TraceCheckUtils]: 2: Hoare triple {25#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 22:00:56,702 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25#true} {25#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 22:00:56,703 INFO L272 TraceCheckUtils]: 4: Hoare triple {25#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25#true} is VALID [2022-04-27 22:00:56,703 INFO L290 TraceCheckUtils]: 5: Hoare triple {25#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25#true} is VALID [2022-04-27 22:00:56,704 INFO L290 TraceCheckUtils]: 6: Hoare triple {25#true} [70] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 22:00:56,704 INFO L290 TraceCheckUtils]: 7: Hoare triple {26#false} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {26#false} is VALID [2022-04-27 22:00:56,704 INFO L290 TraceCheckUtils]: 8: Hoare triple {26#false} [74] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 22:00:56,705 INFO L290 TraceCheckUtils]: 9: Hoare triple {26#false} [77] L29-1-->L29-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 22:00:56,705 INFO L272 TraceCheckUtils]: 10: Hoare triple {26#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {26#false} is VALID [2022-04-27 22:00:56,705 INFO L290 TraceCheckUtils]: 11: Hoare triple {26#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26#false} is VALID [2022-04-27 22:00:56,706 INFO L290 TraceCheckUtils]: 12: Hoare triple {26#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 22:00:56,707 INFO L290 TraceCheckUtils]: 13: Hoare triple {26#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#false} is VALID [2022-04-27 22:00:56,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:56,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:56,708 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103640990] [2022-04-27 22:00:56,708 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1103640990] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:00:56,708 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:00:56,709 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 22:00:56,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859530937] [2022-04-27 22:00:56,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:00:56,715 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 22:00:56,717 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:56,720 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,751 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:56,751 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 22:00:56,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:56,776 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 22:00:56,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:00:56,779 INFO L87 Difference]: Start difference. First operand has 22 states, 14 states have (on average 1.5714285714285714) internal successors, (22), 15 states have internal predecessors, (22), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:56,853 INFO L93 Difference]: Finished difference Result 37 states and 48 transitions. [2022-04-27 22:00:56,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 22:00:56,854 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 22:00:56,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:56,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-27 22:00:56,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 48 transitions. [2022-04-27 22:00:56,865 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 48 transitions. [2022-04-27 22:00:56,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:56,947 INFO L225 Difference]: With dead ends: 37 [2022-04-27 22:00:56,947 INFO L226 Difference]: Without dead ends: 15 [2022-04-27 22:00:56,950 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:00:56,952 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 15 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:56,953 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 26 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:00:56,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-04-27 22:00:56,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-04-27 22:00:56,974 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:56,975 INFO L82 GeneralOperation]: Start isEquivalent. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,975 INFO L74 IsIncluded]: Start isIncluded. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,976 INFO L87 Difference]: Start difference. First operand 15 states. Second operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:56,978 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 22:00:56,978 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 22:00:56,978 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:56,979 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:56,979 INFO L74 IsIncluded]: Start isIncluded. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 22:00:56,979 INFO L87 Difference]: Start difference. First operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 15 states. [2022-04-27 22:00:56,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:56,981 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2022-04-27 22:00:56,982 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 22:00:56,982 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:56,982 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:56,982 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:56,982 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:56,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2022-04-27 22:00:56,985 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 17 transitions. Word has length 14 [2022-04-27 22:00:56,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:56,986 INFO L495 AbstractCegarLoop]: Abstraction has 15 states and 17 transitions. [2022-04-27 22:00:56,986 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:56,986 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 17 transitions. [2022-04-27 22:00:56,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-04-27 22:00:56,987 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:56,987 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:56,987 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 22:00:56,987 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:56,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:56,988 INFO L85 PathProgramCache]: Analyzing trace with hash -137167005, now seen corresponding path program 1 times [2022-04-27 22:00:56,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:56,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730091403] [2022-04-27 22:00:56,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:56,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:57,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,097 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:57,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-27 22:00:57,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 22:00:57,117 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 22:00:57,121 INFO L272 TraceCheckUtils]: 0: Hoare triple {134#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:57,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {134#true} is VALID [2022-04-27 22:00:57,122 INFO L290 TraceCheckUtils]: 2: Hoare triple {134#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 22:00:57,122 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134#true} {134#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 22:00:57,122 INFO L272 TraceCheckUtils]: 4: Hoare triple {134#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {134#true} is VALID [2022-04-27 22:00:57,123 INFO L290 TraceCheckUtils]: 5: Hoare triple {134#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {134#true} is VALID [2022-04-27 22:00:57,124 INFO L290 TraceCheckUtils]: 6: Hoare triple {134#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 22:00:57,124 INFO L290 TraceCheckUtils]: 7: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 22:00:57,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 22:00:57,126 INFO L290 TraceCheckUtils]: 9: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} is VALID [2022-04-27 22:00:57,127 INFO L272 TraceCheckUtils]: 10: Hoare triple {139#(= (+ (* (- 4294967296) (div main_~x~0 4294967296)) main_~x~0) 0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {140#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:00:57,127 INFO L290 TraceCheckUtils]: 11: Hoare triple {140#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {141#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:00:57,128 INFO L290 TraceCheckUtils]: 12: Hoare triple {141#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-27 22:00:57,128 INFO L290 TraceCheckUtils]: 13: Hoare triple {135#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {135#false} is VALID [2022-04-27 22:00:57,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:57,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:57,129 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730091403] [2022-04-27 22:00:57,129 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [730091403] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:00:57,129 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:00:57,129 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 22:00:57,130 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583543446] [2022-04-27 22:00:57,130 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:00:57,131 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 22:00:57,131 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:57,132 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,155 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 14 edges. 14 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:57,155 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 22:00:57,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:57,156 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 22:00:57,156 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 22:00:57,156 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. Second operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,303 INFO L93 Difference]: Finished difference Result 22 states and 25 transitions. [2022-04-27 22:00:57,303 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 22:00:57,303 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 14 [2022-04-27 22:00:57,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:57,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2022-04-27 22:00:57,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 25 transitions. [2022-04-27 22:00:57,307 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 25 transitions. [2022-04-27 22:00:57,332 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:57,333 INFO L225 Difference]: With dead ends: 22 [2022-04-27 22:00:57,333 INFO L226 Difference]: Without dead ends: 17 [2022-04-27 22:00:57,334 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:00:57,335 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:57,336 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 31 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:00:57,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-27 22:00:57,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-27 22:00:57,339 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:57,341 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,341 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,342 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,344 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2022-04-27 22:00:57,344 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-27 22:00:57,344 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:57,345 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:57,345 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:00:57,345 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:00:57,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,347 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2022-04-27 22:00:57,347 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-27 22:00:57,348 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:57,348 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:57,348 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:57,348 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:57,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 12 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 20 transitions. [2022-04-27 22:00:57,352 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 20 transitions. Word has length 14 [2022-04-27 22:00:57,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:57,352 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 20 transitions. [2022-04-27 22:00:57,352 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 1.6666666666666667) internal successors, (10), 4 states have internal predecessors, (10), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,352 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 20 transitions. [2022-04-27 22:00:57,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 22:00:57,353 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:57,353 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:57,354 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 22:00:57,354 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:57,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:57,354 INFO L85 PathProgramCache]: Analyzing trace with hash 69510770, now seen corresponding path program 1 times [2022-04-27 22:00:57,355 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:57,355 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225269507] [2022-04-27 22:00:57,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:57,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:57,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,411 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:57,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,429 INFO L290 TraceCheckUtils]: 0: Hoare triple {250#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {244#true} is VALID [2022-04-27 22:00:57,429 INFO L290 TraceCheckUtils]: 1: Hoare triple {244#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-27 22:00:57,430 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {244#true} {244#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-27 22:00:57,431 INFO L272 TraceCheckUtils]: 0: Hoare triple {244#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {250#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:57,431 INFO L290 TraceCheckUtils]: 1: Hoare triple {250#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {244#true} is VALID [2022-04-27 22:00:57,431 INFO L290 TraceCheckUtils]: 2: Hoare triple {244#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-27 22:00:57,432 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {244#true} {244#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-27 22:00:57,433 INFO L272 TraceCheckUtils]: 4: Hoare triple {244#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {244#true} is VALID [2022-04-27 22:00:57,433 INFO L290 TraceCheckUtils]: 5: Hoare triple {244#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {249#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,434 INFO L290 TraceCheckUtils]: 6: Hoare triple {249#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {249#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,434 INFO L290 TraceCheckUtils]: 7: Hoare triple {249#(= main_~y~0 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {249#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,435 INFO L290 TraceCheckUtils]: 8: Hoare triple {249#(= main_~y~0 0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {249#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,436 INFO L290 TraceCheckUtils]: 9: Hoare triple {249#(= main_~y~0 0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {245#false} is VALID [2022-04-27 22:00:57,436 INFO L290 TraceCheckUtils]: 10: Hoare triple {245#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {245#false} is VALID [2022-04-27 22:00:57,436 INFO L272 TraceCheckUtils]: 11: Hoare triple {245#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {245#false} is VALID [2022-04-27 22:00:57,439 INFO L290 TraceCheckUtils]: 12: Hoare triple {245#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {245#false} is VALID [2022-04-27 22:00:57,439 INFO L290 TraceCheckUtils]: 13: Hoare triple {245#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {245#false} is VALID [2022-04-27 22:00:57,440 INFO L290 TraceCheckUtils]: 14: Hoare triple {245#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {245#false} is VALID [2022-04-27 22:00:57,440 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:57,440 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:57,440 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225269507] [2022-04-27 22:00:57,440 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1225269507] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:00:57,440 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:00:57,441 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 22:00:57,441 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1386859926] [2022-04-27 22:00:57,441 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:00:57,441 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:00:57,441 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:57,441 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,458 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:57,458 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:00:57,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:57,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:00:57,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 22:00:57,464 INFO L87 Difference]: Start difference. First operand 17 states and 20 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,537 INFO L93 Difference]: Finished difference Result 30 states and 37 transitions. [2022-04-27 22:00:57,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:00:57,538 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:00:57,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:57,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-27 22:00:57,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 31 transitions. [2022-04-27 22:00:57,544 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 31 transitions. [2022-04-27 22:00:57,570 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:57,572 INFO L225 Difference]: With dead ends: 30 [2022-04-27 22:00:57,572 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 22:00:57,578 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:00:57,581 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 18 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:57,582 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 21 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:00:57,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 22:00:57,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2022-04-27 22:00:57,590 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:57,592 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,593 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,593 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,594 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-27 22:00:57,595 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-27 22:00:57,595 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:57,595 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:57,595 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 22:00:57,596 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 22:00:57,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,597 INFO L93 Difference]: Finished difference Result 23 states and 28 transitions. [2022-04-27 22:00:57,598 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 28 transitions. [2022-04-27 22:00:57,598 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:57,598 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:57,599 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:57,599 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:57,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-04-27 22:00:57,600 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 15 [2022-04-27 22:00:57,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:57,600 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-04-27 22:00:57,601 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 3 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,601 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:00:57,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 22:00:57,602 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:57,602 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:57,602 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 22:00:57,603 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:57,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:57,603 INFO L85 PathProgramCache]: Analyzing trace with hash 842497847, now seen corresponding path program 1 times [2022-04-27 22:00:57,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:57,603 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378893406] [2022-04-27 22:00:57,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:57,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:57,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,650 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:57,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {380#true} is VALID [2022-04-27 22:00:57,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {380#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-27 22:00:57,658 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {380#true} {380#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-27 22:00:57,659 INFO L272 TraceCheckUtils]: 0: Hoare triple {380#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:57,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {387#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {380#true} is VALID [2022-04-27 22:00:57,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {380#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-27 22:00:57,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {380#true} {380#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-27 22:00:57,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {380#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {380#true} is VALID [2022-04-27 22:00:57,660 INFO L290 TraceCheckUtils]: 5: Hoare triple {380#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {385#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,660 INFO L290 TraceCheckUtils]: 6: Hoare triple {385#(= main_~y~0 0)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {385#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,661 INFO L290 TraceCheckUtils]: 7: Hoare triple {385#(= main_~y~0 0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {386#(= main_~z~0 0)} is VALID [2022-04-27 22:00:57,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {386#(= main_~z~0 0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {381#false} is VALID [2022-04-27 22:00:57,662 INFO L290 TraceCheckUtils]: 9: Hoare triple {381#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-27 22:00:57,662 INFO L290 TraceCheckUtils]: 10: Hoare triple {381#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-27 22:00:57,662 INFO L272 TraceCheckUtils]: 11: Hoare triple {381#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {381#false} is VALID [2022-04-27 22:00:57,662 INFO L290 TraceCheckUtils]: 12: Hoare triple {381#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {381#false} is VALID [2022-04-27 22:00:57,662 INFO L290 TraceCheckUtils]: 13: Hoare triple {381#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-27 22:00:57,663 INFO L290 TraceCheckUtils]: 14: Hoare triple {381#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {381#false} is VALID [2022-04-27 22:00:57,663 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:57,663 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:57,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378893406] [2022-04-27 22:00:57,663 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378893406] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:00:57,664 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:00:57,664 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 22:00:57,664 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041206370] [2022-04-27 22:00:57,664 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:00:57,664 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:00:57,665 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:57,665 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,677 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:57,677 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:00:57,677 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:57,678 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:00:57,678 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:00:57,678 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,779 INFO L93 Difference]: Finished difference Result 27 states and 31 transitions. [2022-04-27 22:00:57,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:00:57,780 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:00:57,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:57,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-27 22:00:57,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 28 transitions. [2022-04-27 22:00:57,785 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 28 transitions. [2022-04-27 22:00:57,812 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:57,818 INFO L225 Difference]: With dead ends: 27 [2022-04-27 22:00:57,818 INFO L226 Difference]: Without dead ends: 18 [2022-04-27 22:00:57,818 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:00:57,826 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:57,827 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 27 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:00:57,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-27 22:00:57,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-27 22:00:57,830 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:57,830 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,830 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,830 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,832 INFO L93 Difference]: Finished difference Result 18 states and 21 transitions. [2022-04-27 22:00:57,832 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-27 22:00:57,832 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:57,832 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:57,832 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 22:00:57,833 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 22:00:57,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:57,834 INFO L93 Difference]: Finished difference Result 18 states and 21 transitions. [2022-04-27 22:00:57,834 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-27 22:00:57,834 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:57,834 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:57,834 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:57,834 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:57,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.3076923076923077) internal successors, (17), 13 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 21 transitions. [2022-04-27 22:00:57,835 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 21 transitions. Word has length 15 [2022-04-27 22:00:57,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:57,836 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 21 transitions. [2022-04-27 22:00:57,836 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:57,836 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 21 transitions. [2022-04-27 22:00:57,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:00:57,836 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:57,837 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:57,837 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 22:00:57,837 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:57,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:57,837 INFO L85 PathProgramCache]: Analyzing trace with hash -1435685474, now seen corresponding path program 1 times [2022-04-27 22:00:57,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:57,838 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1848205147] [2022-04-27 22:00:57,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:57,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:57,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:57,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:57,977 INFO L290 TraceCheckUtils]: 0: Hoare triple {507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-27 22:00:57,978 INFO L290 TraceCheckUtils]: 1: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:57,978 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:57,978 INFO L272 TraceCheckUtils]: 0: Hoare triple {499#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:57,979 INFO L290 TraceCheckUtils]: 1: Hoare triple {507#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-27 22:00:57,979 INFO L290 TraceCheckUtils]: 2: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:57,979 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:57,979 INFO L272 TraceCheckUtils]: 4: Hoare triple {499#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:57,980 INFO L290 TraceCheckUtils]: 5: Hoare triple {499#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {504#(= main_~y~0 0)} is VALID [2022-04-27 22:00:57,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {504#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:57,981 INFO L290 TraceCheckUtils]: 7: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:57,982 INFO L290 TraceCheckUtils]: 8: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {506#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:00:57,982 INFO L290 TraceCheckUtils]: 9: Hoare triple {506#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:57,983 INFO L290 TraceCheckUtils]: 10: Hoare triple {500#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {500#false} is VALID [2022-04-27 22:00:57,983 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:57,983 INFO L272 TraceCheckUtils]: 12: Hoare triple {500#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {500#false} is VALID [2022-04-27 22:00:57,983 INFO L290 TraceCheckUtils]: 13: Hoare triple {500#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {500#false} is VALID [2022-04-27 22:00:57,984 INFO L290 TraceCheckUtils]: 14: Hoare triple {500#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:57,984 INFO L290 TraceCheckUtils]: 15: Hoare triple {500#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:57,984 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:57,984 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:57,984 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1848205147] [2022-04-27 22:00:57,985 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1848205147] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:57,985 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [740380167] [2022-04-27 22:00:57,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:57,985 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:57,985 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:57,987 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:57,988 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 22:00:58,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:58,033 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:00:58,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:58,043 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:58,151 INFO L272 TraceCheckUtils]: 0: Hoare triple {499#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,151 INFO L290 TraceCheckUtils]: 1: Hoare triple {499#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-27 22:00:58,152 INFO L290 TraceCheckUtils]: 2: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,152 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,152 INFO L272 TraceCheckUtils]: 4: Hoare triple {499#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,152 INFO L290 TraceCheckUtils]: 5: Hoare triple {499#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {504#(= main_~y~0 0)} is VALID [2022-04-27 22:00:58,153 INFO L290 TraceCheckUtils]: 6: Hoare triple {504#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:58,154 INFO L290 TraceCheckUtils]: 7: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:58,154 INFO L290 TraceCheckUtils]: 8: Hoare triple {505#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {535#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:00:58,171 INFO L290 TraceCheckUtils]: 9: Hoare triple {535#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,172 INFO L290 TraceCheckUtils]: 10: Hoare triple {500#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {500#false} is VALID [2022-04-27 22:00:58,172 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,172 INFO L272 TraceCheckUtils]: 12: Hoare triple {500#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {500#false} is VALID [2022-04-27 22:00:58,172 INFO L290 TraceCheckUtils]: 13: Hoare triple {500#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {500#false} is VALID [2022-04-27 22:00:58,172 INFO L290 TraceCheckUtils]: 14: Hoare triple {500#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,173 INFO L290 TraceCheckUtils]: 15: Hoare triple {500#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,173 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:58,173 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:00:58,299 INFO L290 TraceCheckUtils]: 15: Hoare triple {500#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,300 INFO L290 TraceCheckUtils]: 14: Hoare triple {500#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,300 INFO L290 TraceCheckUtils]: 13: Hoare triple {500#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {500#false} is VALID [2022-04-27 22:00:58,300 INFO L272 TraceCheckUtils]: 12: Hoare triple {500#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {500#false} is VALID [2022-04-27 22:00:58,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {500#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {500#false} is VALID [2022-04-27 22:00:58,301 INFO L290 TraceCheckUtils]: 10: Hoare triple {572#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {500#false} is VALID [2022-04-27 22:00:58,302 INFO L290 TraceCheckUtils]: 9: Hoare triple {576#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {572#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:00:58,302 INFO L290 TraceCheckUtils]: 8: Hoare triple {499#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {576#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:00:58,303 INFO L290 TraceCheckUtils]: 7: Hoare triple {499#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,303 INFO L290 TraceCheckUtils]: 6: Hoare triple {499#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {499#true} is VALID [2022-04-27 22:00:58,303 INFO L290 TraceCheckUtils]: 5: Hoare triple {499#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {499#true} is VALID [2022-04-27 22:00:58,303 INFO L272 TraceCheckUtils]: 4: Hoare triple {499#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,303 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {499#true} {499#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {499#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {499#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {499#true} is VALID [2022-04-27 22:00:58,304 INFO L272 TraceCheckUtils]: 0: Hoare triple {499#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {499#true} is VALID [2022-04-27 22:00:58,304 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:58,305 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [740380167] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:58,305 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-27 22:00:58,305 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6, 5] total 9 [2022-04-27 22:00:58,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [688429376] [2022-04-27 22:00:58,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:00:58,305 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:00:58,306 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:58,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,334 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:58,335 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:00:58,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:58,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:00:58,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:00:58,336 INFO L87 Difference]: Start difference. First operand 18 states and 21 transitions. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:58,386 INFO L93 Difference]: Finished difference Result 24 states and 27 transitions. [2022-04-27 22:00:58,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:00:58,386 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:00:58,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:58,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-27 22:00:58,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 27 transitions. [2022-04-27 22:00:58,389 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 27 transitions. [2022-04-27 22:00:58,410 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:58,411 INFO L225 Difference]: With dead ends: 24 [2022-04-27 22:00:58,411 INFO L226 Difference]: Without dead ends: 17 [2022-04-27 22:00:58,411 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 30 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:00:58,412 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 1 mSDsluCounter, 21 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:58,412 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 35 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:00:58,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-27 22:00:58,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-27 22:00:58,424 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:58,424 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,424 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,425 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:58,425 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-27 22:00:58,426 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-27 22:00:58,426 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:58,426 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:58,426 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:00:58,426 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:00:58,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:58,427 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2022-04-27 22:00:58,427 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-27 22:00:58,427 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:58,428 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:58,428 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:58,428 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:58,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.25) internal successors, (15), 12 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2022-04-27 22:00:58,429 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 16 [2022-04-27 22:00:58,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:58,429 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions. [2022-04-27 22:00:58,429 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:58,429 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions. [2022-04-27 22:00:58,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:00:58,430 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:58,430 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:58,457 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 22:00:58,633 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:58,634 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:58,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:58,635 INFO L85 PathProgramCache]: Analyzing trace with hash -662698397, now seen corresponding path program 1 times [2022-04-27 22:00:58,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:58,635 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704419656] [2022-04-27 22:00:58,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:58,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:58,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:58,729 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:58,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:58,749 INFO L290 TraceCheckUtils]: 0: Hoare triple {710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-27 22:00:58,749 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,749 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,750 INFO L272 TraceCheckUtils]: 0: Hoare triple {703#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:58,750 INFO L290 TraceCheckUtils]: 1: Hoare triple {710#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-27 22:00:58,750 INFO L290 TraceCheckUtils]: 2: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,751 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,751 INFO L272 TraceCheckUtils]: 4: Hoare triple {703#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,751 INFO L290 TraceCheckUtils]: 5: Hoare triple {703#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {708#(= main_~y~0 0)} is VALID [2022-04-27 22:00:58,752 INFO L290 TraceCheckUtils]: 6: Hoare triple {708#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:00:58,752 INFO L290 TraceCheckUtils]: 7: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:00:58,753 INFO L290 TraceCheckUtils]: 8: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:00:58,754 INFO L290 TraceCheckUtils]: 9: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:00:58,754 INFO L290 TraceCheckUtils]: 10: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:00:58,755 INFO L290 TraceCheckUtils]: 11: Hoare triple {709#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:58,755 INFO L272 TraceCheckUtils]: 12: Hoare triple {704#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {704#false} is VALID [2022-04-27 22:00:58,755 INFO L290 TraceCheckUtils]: 13: Hoare triple {704#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {704#false} is VALID [2022-04-27 22:00:58,755 INFO L290 TraceCheckUtils]: 14: Hoare triple {704#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:58,756 INFO L290 TraceCheckUtils]: 15: Hoare triple {704#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:58,756 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:58,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:58,756 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704419656] [2022-04-27 22:00:58,756 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1704419656] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:58,756 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [983966528] [2022-04-27 22:00:58,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:58,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:58,757 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:58,764 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:58,792 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 22:00:58,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:58,828 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:00:58,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:58,835 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:58,933 INFO L272 TraceCheckUtils]: 0: Hoare triple {703#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,933 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-27 22:00:58,934 INFO L290 TraceCheckUtils]: 2: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,934 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,937 INFO L272 TraceCheckUtils]: 4: Hoare triple {703#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:58,937 INFO L290 TraceCheckUtils]: 5: Hoare triple {703#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {708#(= main_~y~0 0)} is VALID [2022-04-27 22:00:58,938 INFO L290 TraceCheckUtils]: 6: Hoare triple {708#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {732#(= main_~y~0 1)} is VALID [2022-04-27 22:00:58,939 INFO L290 TraceCheckUtils]: 7: Hoare triple {732#(= main_~y~0 1)} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {732#(= main_~y~0 1)} is VALID [2022-04-27 22:00:58,940 INFO L290 TraceCheckUtils]: 8: Hoare triple {732#(= main_~y~0 1)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {739#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} is VALID [2022-04-27 22:00:58,940 INFO L290 TraceCheckUtils]: 9: Hoare triple {739#(and (= main_~z~0 main_~y~0) (= main_~y~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {732#(= main_~y~0 1)} is VALID [2022-04-27 22:00:58,940 INFO L290 TraceCheckUtils]: 10: Hoare triple {732#(= main_~y~0 1)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {732#(= main_~y~0 1)} is VALID [2022-04-27 22:00:58,941 INFO L290 TraceCheckUtils]: 11: Hoare triple {732#(= main_~y~0 1)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:58,941 INFO L272 TraceCheckUtils]: 12: Hoare triple {704#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {704#false} is VALID [2022-04-27 22:00:58,941 INFO L290 TraceCheckUtils]: 13: Hoare triple {704#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {704#false} is VALID [2022-04-27 22:00:58,942 INFO L290 TraceCheckUtils]: 14: Hoare triple {704#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:58,942 INFO L290 TraceCheckUtils]: 15: Hoare triple {704#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:58,942 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:00:58,942 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:00:59,040 INFO L290 TraceCheckUtils]: 15: Hoare triple {704#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:59,040 INFO L290 TraceCheckUtils]: 14: Hoare triple {704#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:59,040 INFO L290 TraceCheckUtils]: 13: Hoare triple {704#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {704#false} is VALID [2022-04-27 22:00:59,041 INFO L272 TraceCheckUtils]: 12: Hoare triple {704#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {704#false} is VALID [2022-04-27 22:00:59,041 INFO L290 TraceCheckUtils]: 11: Hoare triple {773#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {704#false} is VALID [2022-04-27 22:00:59,042 INFO L290 TraceCheckUtils]: 10: Hoare triple {773#(< 0 (mod main_~y~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {773#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:00:59,042 INFO L290 TraceCheckUtils]: 9: Hoare triple {780#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {773#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:00:59,043 INFO L290 TraceCheckUtils]: 8: Hoare triple {703#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {780#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:00:59,043 INFO L290 TraceCheckUtils]: 7: Hoare triple {703#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:59,043 INFO L290 TraceCheckUtils]: 6: Hoare triple {703#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {703#true} is VALID [2022-04-27 22:00:59,043 INFO L290 TraceCheckUtils]: 5: Hoare triple {703#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {703#true} is VALID [2022-04-27 22:00:59,043 INFO L272 TraceCheckUtils]: 4: Hoare triple {703#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:59,043 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {703#true} {703#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:59,043 INFO L290 TraceCheckUtils]: 2: Hoare triple {703#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:59,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {703#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {703#true} is VALID [2022-04-27 22:00:59,044 INFO L272 TraceCheckUtils]: 0: Hoare triple {703#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {703#true} is VALID [2022-04-27 22:00:59,044 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:59,044 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [983966528] provided 1 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:59,044 INFO L184 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2022-04-27 22:00:59,044 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5, 5] total 9 [2022-04-27 22:00:59,045 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [65925836] [2022-04-27 22:00:59,045 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:00:59,045 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:00:59,045 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:00:59,046 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,065 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:59,065 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:00:59,065 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:00:59,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:00:59,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:00:59,066 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:59,107 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2022-04-27 22:00:59,107 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:00:59,108 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:00:59,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:00:59,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 24 transitions. [2022-04-27 22:00:59,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 24 transitions. [2022-04-27 22:00:59,110 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 24 transitions. [2022-04-27 22:00:59,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:00:59,138 INFO L225 Difference]: With dead ends: 23 [2022-04-27 22:00:59,138 INFO L226 Difference]: Without dead ends: 18 [2022-04-27 22:00:59,138 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:00:59,141 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 1 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 36 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:00:59,142 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 36 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:00:59,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states. [2022-04-27 22:00:59,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2022-04-27 22:00:59,150 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:00:59,151 INFO L82 GeneralOperation]: Start isEquivalent. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,151 INFO L74 IsIncluded]: Start isIncluded. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,151 INFO L87 Difference]: Start difference. First operand 18 states. Second operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:59,156 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-04-27 22:00:59,156 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-27 22:00:59,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:59,159 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:59,159 INFO L74 IsIncluded]: Start isIncluded. First operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 22:00:59,159 INFO L87 Difference]: Start difference. First operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 18 states. [2022-04-27 22:00:59,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:00:59,165 INFO L93 Difference]: Finished difference Result 18 states and 20 transitions. [2022-04-27 22:00:59,165 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-27 22:00:59,166 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:00:59,166 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:00:59,166 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:00:59,166 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:00:59,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 13 states have (on average 1.2307692307692308) internal successors, (16), 13 states have internal predecessors, (16), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2022-04-27 22:00:59,167 INFO L78 Accepts]: Start accepts. Automaton has 18 states and 20 transitions. Word has length 16 [2022-04-27 22:00:59,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:00:59,167 INFO L495 AbstractCegarLoop]: Abstraction has 18 states and 20 transitions. [2022-04-27 22:00:59,167 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:00:59,168 INFO L276 IsEmpty]: Start isEmpty. Operand 18 states and 20 transitions. [2022-04-27 22:00:59,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:00:59,168 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:00:59,168 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:00:59,191 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 22:00:59,383 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-27 22:00:59,384 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:00:59,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:00:59,384 INFO L85 PathProgramCache]: Analyzing trace with hash 957906802, now seen corresponding path program 1 times [2022-04-27 22:00:59,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:00:59,384 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [574257593] [2022-04-27 22:00:59,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:59,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:00:59,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:59,489 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:00:59,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:59,503 INFO L290 TraceCheckUtils]: 0: Hoare triple {918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-27 22:00:59,503 INFO L290 TraceCheckUtils]: 1: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,503 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,504 INFO L272 TraceCheckUtils]: 0: Hoare triple {909#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:00:59,504 INFO L290 TraceCheckUtils]: 1: Hoare triple {918#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-27 22:00:59,504 INFO L290 TraceCheckUtils]: 2: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,505 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,505 INFO L272 TraceCheckUtils]: 4: Hoare triple {909#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,505 INFO L290 TraceCheckUtils]: 5: Hoare triple {909#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {909#true} is VALID [2022-04-27 22:00:59,505 INFO L290 TraceCheckUtils]: 6: Hoare triple {909#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {909#true} is VALID [2022-04-27 22:00:59,508 INFO L290 TraceCheckUtils]: 7: Hoare triple {909#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,510 INFO L290 TraceCheckUtils]: 8: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,511 INFO L290 TraceCheckUtils]: 9: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:00:59,515 INFO L290 TraceCheckUtils]: 10: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:00:59,516 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,516 INFO L290 TraceCheckUtils]: 12: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,517 INFO L272 TraceCheckUtils]: 13: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {916#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:00:59,518 INFO L290 TraceCheckUtils]: 14: Hoare triple {916#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {917#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:00:59,518 INFO L290 TraceCheckUtils]: 15: Hoare triple {917#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-27 22:00:59,519 INFO L290 TraceCheckUtils]: 16: Hoare triple {910#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-27 22:00:59,519 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:59,519 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:00:59,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [574257593] [2022-04-27 22:00:59,519 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [574257593] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:00:59,519 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [324239698] [2022-04-27 22:00:59,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:00:59,520 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:00:59,520 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:00:59,524 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:00:59,526 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 22:00:59,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:59,574 INFO L263 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 22:00:59,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:00:59,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:00:59,887 INFO L272 TraceCheckUtils]: 0: Hoare triple {909#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {909#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-27 22:00:59,888 INFO L290 TraceCheckUtils]: 2: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,888 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,888 INFO L272 TraceCheckUtils]: 4: Hoare triple {909#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:00:59,888 INFO L290 TraceCheckUtils]: 5: Hoare triple {909#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {909#true} is VALID [2022-04-27 22:00:59,889 INFO L290 TraceCheckUtils]: 6: Hoare triple {909#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {909#true} is VALID [2022-04-27 22:00:59,890 INFO L290 TraceCheckUtils]: 7: Hoare triple {909#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,895 INFO L290 TraceCheckUtils]: 9: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:00:59,896 INFO L290 TraceCheckUtils]: 10: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:00:59,898 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,898 INFO L290 TraceCheckUtils]: 12: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:00:59,899 INFO L272 TraceCheckUtils]: 13: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {961#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:00:59,900 INFO L290 TraceCheckUtils]: 14: Hoare triple {961#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {965#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:00:59,900 INFO L290 TraceCheckUtils]: 15: Hoare triple {965#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-27 22:00:59,900 INFO L290 TraceCheckUtils]: 16: Hoare triple {910#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-27 22:00:59,901 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:00:59,901 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:00,028 INFO L290 TraceCheckUtils]: 16: Hoare triple {910#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-27 22:01:00,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {965#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {910#false} is VALID [2022-04-27 22:01:00,029 INFO L290 TraceCheckUtils]: 14: Hoare triple {961#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {965#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:00,030 INFO L272 TraceCheckUtils]: 13: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {961#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:00,030 INFO L290 TraceCheckUtils]: 12: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:01:00,031 INFO L290 TraceCheckUtils]: 11: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:01:00,032 INFO L290 TraceCheckUtils]: 10: Hoare triple {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:01:00,033 INFO L290 TraceCheckUtils]: 9: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {915#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:01:00,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:01:00,034 INFO L290 TraceCheckUtils]: 7: Hoare triple {909#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {914#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:01:00,034 INFO L290 TraceCheckUtils]: 6: Hoare triple {909#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {909#true} is VALID [2022-04-27 22:01:00,034 INFO L290 TraceCheckUtils]: 5: Hoare triple {909#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {909#true} is VALID [2022-04-27 22:01:00,035 INFO L272 TraceCheckUtils]: 4: Hoare triple {909#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:01:00,035 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {909#true} {909#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:01:00,035 INFO L290 TraceCheckUtils]: 2: Hoare triple {909#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:01:00,035 INFO L290 TraceCheckUtils]: 1: Hoare triple {909#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {909#true} is VALID [2022-04-27 22:01:00,035 INFO L272 TraceCheckUtils]: 0: Hoare triple {909#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {909#true} is VALID [2022-04-27 22:01:00,035 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:01:00,036 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [324239698] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:00,036 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:00,036 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 9 [2022-04-27 22:01:00,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496535025] [2022-04-27 22:01:00,036 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:00,037 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:01:00,037 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:00,037 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,060 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:00,061 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-04-27 22:01:00,061 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:00,062 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-04-27 22:01:00,063 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:01:00,063 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. Second operand has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:00,316 INFO L93 Difference]: Finished difference Result 26 states and 29 transitions. [2022-04-27 22:01:00,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 22:01:00,316 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:01:00,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:00,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2022-04-27 22:01:00,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 27 transitions. [2022-04-27 22:01:00,319 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 27 transitions. [2022-04-27 22:01:00,345 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:00,346 INFO L225 Difference]: With dead ends: 26 [2022-04-27 22:01:00,346 INFO L226 Difference]: Without dead ends: 21 [2022-04-27 22:01:00,346 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 32 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:01:00,347 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:00,347 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 41 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:01:00,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2022-04-27 22:01:00,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2022-04-27 22:01:00,362 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:00,362 INFO L82 GeneralOperation]: Start isEquivalent. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,363 INFO L74 IsIncluded]: Start isIncluded. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,363 INFO L87 Difference]: Start difference. First operand 21 states. Second operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:00,364 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2022-04-27 22:01:00,364 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-27 22:01:00,364 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:00,364 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:00,364 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-27 22:01:00,365 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 21 states. [2022-04-27 22:01:00,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:00,366 INFO L93 Difference]: Finished difference Result 21 states and 24 transitions. [2022-04-27 22:01:00,366 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 24 transitions. [2022-04-27 22:01:00,384 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:00,384 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:00,384 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:00,384 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:00,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 15 states have internal predecessors, (19), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 23 transitions. [2022-04-27 22:01:00,386 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 23 transitions. Word has length 17 [2022-04-27 22:01:00,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:00,386 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 23 transitions. [2022-04-27 22:01:00,386 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 1.7777777777777777) internal successors, (16), 6 states have internal predecessors, (16), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:00,386 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 23 transitions. [2022-04-27 22:01:00,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 22:01:00,387 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:00,387 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:00,410 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:00,599 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:00,600 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:00,600 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:00,600 INFO L85 PathProgramCache]: Analyzing trace with hash -342939581, now seen corresponding path program 2 times [2022-04-27 22:01:00,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:00,600 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999676314] [2022-04-27 22:01:00,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:00,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:00,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:00,680 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:00,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:00,691 INFO L290 TraceCheckUtils]: 0: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-27 22:01:00,692 INFO L290 TraceCheckUtils]: 1: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,692 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,693 INFO L272 TraceCheckUtils]: 0: Hoare triple {1142#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:00,693 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-27 22:01:00,693 INFO L290 TraceCheckUtils]: 2: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,693 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,697 INFO L272 TraceCheckUtils]: 4: Hoare triple {1142#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,697 INFO L290 TraceCheckUtils]: 5: Hoare triple {1142#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1147#(= main_~y~0 0)} is VALID [2022-04-27 22:01:00,698 INFO L290 TraceCheckUtils]: 6: Hoare triple {1147#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,699 INFO L290 TraceCheckUtils]: 7: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,701 INFO L290 TraceCheckUtils]: 9: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,701 INFO L290 TraceCheckUtils]: 10: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,702 INFO L290 TraceCheckUtils]: 11: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1147#(= main_~y~0 0)} is VALID [2022-04-27 22:01:00,703 INFO L290 TraceCheckUtils]: 12: Hoare triple {1147#(= main_~y~0 0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1143#false} is VALID [2022-04-27 22:01:00,703 INFO L290 TraceCheckUtils]: 13: Hoare triple {1143#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:00,703 INFO L272 TraceCheckUtils]: 14: Hoare triple {1143#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1143#false} is VALID [2022-04-27 22:01:00,703 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1143#false} is VALID [2022-04-27 22:01:00,704 INFO L290 TraceCheckUtils]: 16: Hoare triple {1143#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:00,705 INFO L290 TraceCheckUtils]: 17: Hoare triple {1143#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:00,705 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:01:00,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:00,706 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999676314] [2022-04-27 22:01:00,706 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [999676314] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:00,706 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [805319545] [2022-04-27 22:01:00,706 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:01:00,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:00,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:00,707 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:00,709 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 22:01:00,748 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:01:00,748 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:00,749 INFO L263 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 22:01:00,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:00,766 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:00,902 INFO L272 TraceCheckUtils]: 0: Hoare triple {1142#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,902 INFO L290 TraceCheckUtils]: 1: Hoare triple {1142#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-27 22:01:00,903 INFO L290 TraceCheckUtils]: 2: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,903 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,903 INFO L272 TraceCheckUtils]: 4: Hoare triple {1142#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:00,907 INFO L290 TraceCheckUtils]: 5: Hoare triple {1142#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1147#(= main_~y~0 0)} is VALID [2022-04-27 22:01:00,909 INFO L290 TraceCheckUtils]: 6: Hoare triple {1147#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,909 INFO L290 TraceCheckUtils]: 7: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,914 INFO L290 TraceCheckUtils]: 8: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1177#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,915 INFO L290 TraceCheckUtils]: 9: Hoare triple {1177#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1181#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,915 INFO L290 TraceCheckUtils]: 10: Hoare triple {1181#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:00,916 INFO L290 TraceCheckUtils]: 11: Hoare triple {1148#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1147#(= main_~y~0 0)} is VALID [2022-04-27 22:01:00,916 INFO L290 TraceCheckUtils]: 12: Hoare triple {1147#(= main_~y~0 0)} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1143#false} is VALID [2022-04-27 22:01:00,917 INFO L290 TraceCheckUtils]: 13: Hoare triple {1143#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:00,917 INFO L272 TraceCheckUtils]: 14: Hoare triple {1143#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1143#false} is VALID [2022-04-27 22:01:00,917 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1143#false} is VALID [2022-04-27 22:01:00,917 INFO L290 TraceCheckUtils]: 16: Hoare triple {1143#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:00,917 INFO L290 TraceCheckUtils]: 17: Hoare triple {1143#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:00,918 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:01:00,918 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:01,039 INFO L290 TraceCheckUtils]: 17: Hoare triple {1143#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:01,040 INFO L290 TraceCheckUtils]: 16: Hoare triple {1143#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:01,040 INFO L290 TraceCheckUtils]: 15: Hoare triple {1143#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1143#false} is VALID [2022-04-27 22:01:01,040 INFO L272 TraceCheckUtils]: 14: Hoare triple {1143#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1143#false} is VALID [2022-04-27 22:01:01,040 INFO L290 TraceCheckUtils]: 13: Hoare triple {1143#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1143#false} is VALID [2022-04-27 22:01:01,041 INFO L290 TraceCheckUtils]: 12: Hoare triple {1221#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1143#false} is VALID [2022-04-27 22:01:01,042 INFO L290 TraceCheckUtils]: 11: Hoare triple {1225#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1221#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:01,043 INFO L290 TraceCheckUtils]: 10: Hoare triple {1229#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1225#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:01,044 INFO L290 TraceCheckUtils]: 9: Hoare triple {1233#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1229#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:01:01,045 INFO L290 TraceCheckUtils]: 8: Hoare triple {1142#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1233#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:01:01,045 INFO L290 TraceCheckUtils]: 7: Hoare triple {1142#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:01,045 INFO L290 TraceCheckUtils]: 6: Hoare triple {1142#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1142#true} is VALID [2022-04-27 22:01:01,045 INFO L290 TraceCheckUtils]: 5: Hoare triple {1142#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1142#true} is VALID [2022-04-27 22:01:01,045 INFO L272 TraceCheckUtils]: 4: Hoare triple {1142#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:01,046 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1142#true} {1142#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:01,046 INFO L290 TraceCheckUtils]: 2: Hoare triple {1142#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:01,046 INFO L290 TraceCheckUtils]: 1: Hoare triple {1142#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1142#true} is VALID [2022-04-27 22:01:01,046 INFO L272 TraceCheckUtils]: 0: Hoare triple {1142#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1142#true} is VALID [2022-04-27 22:01:01,047 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:01:01,047 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [805319545] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:01,047 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:01,047 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 6] total 11 [2022-04-27 22:01:01,047 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1783948592] [2022-04-27 22:01:01,047 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:01,048 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 22:01:01,048 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:01,049 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,074 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:01,074 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-27 22:01:01,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:01,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-27 22:01:01,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2022-04-27 22:01:01,075 INFO L87 Difference]: Start difference. First operand 20 states and 23 transitions. Second operand has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:01,392 INFO L93 Difference]: Finished difference Result 35 states and 41 transitions. [2022-04-27 22:01:01,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 22:01:01,393 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 22:01:01,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:01,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-27 22:01:01,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-27 22:01:01,395 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 40 transitions. [2022-04-27 22:01:01,433 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:01,434 INFO L225 Difference]: With dead ends: 35 [2022-04-27 22:01:01,434 INFO L226 Difference]: Without dead ends: 20 [2022-04-27 22:01:01,435 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 30 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2022-04-27 22:01:01,435 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 24 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 82 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:01,435 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 34 Invalid, 82 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:01:01,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2022-04-27 22:01:01,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2022-04-27 22:01:01,450 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:01,450 INFO L82 GeneralOperation]: Start isEquivalent. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,450 INFO L74 IsIncluded]: Start isIncluded. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,450 INFO L87 Difference]: Start difference. First operand 20 states. Second operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:01,451 INFO L93 Difference]: Finished difference Result 20 states and 22 transitions. [2022-04-27 22:01:01,451 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-04-27 22:01:01,452 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:01,452 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:01,452 INFO L74 IsIncluded]: Start isIncluded. First operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-27 22:01:01,452 INFO L87 Difference]: Start difference. First operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 20 states. [2022-04-27 22:01:01,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:01,453 INFO L93 Difference]: Finished difference Result 20 states and 22 transitions. [2022-04-27 22:01:01,453 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-04-27 22:01:01,453 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:01,453 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:01,453 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:01,453 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:01,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 15 states have (on average 1.2) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2022-04-27 22:01:01,454 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 22 transitions. Word has length 18 [2022-04-27 22:01:01,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:01,455 INFO L495 AbstractCegarLoop]: Abstraction has 20 states and 22 transitions. [2022-04-27 22:01:01,455 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 2.3636363636363638) internal successors, (26), 10 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:01,455 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 22 transitions. [2022-04-27 22:01:01,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:01:01,455 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:01,455 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:01,483 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:01,675 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:01,675 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:01,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:01,676 INFO L85 PathProgramCache]: Analyzing trace with hash 302088562, now seen corresponding path program 3 times [2022-04-27 22:01:01,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:01,676 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094484182] [2022-04-27 22:01:01,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:01,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:01,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:01,767 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:01,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:01,777 INFO L290 TraceCheckUtils]: 0: Hoare triple {1414#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-27 22:01:01,778 INFO L290 TraceCheckUtils]: 1: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:01,778 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:01,778 INFO L272 TraceCheckUtils]: 0: Hoare triple {1405#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1414#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:01,779 INFO L290 TraceCheckUtils]: 1: Hoare triple {1414#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-27 22:01:01,779 INFO L290 TraceCheckUtils]: 2: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:01,779 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:01,779 INFO L272 TraceCheckUtils]: 4: Hoare triple {1405#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:01,779 INFO L290 TraceCheckUtils]: 5: Hoare triple {1405#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1410#(= main_~y~0 0)} is VALID [2022-04-27 22:01:01,780 INFO L290 TraceCheckUtils]: 6: Hoare triple {1410#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:01,781 INFO L290 TraceCheckUtils]: 7: Hoare triple {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:01,781 INFO L290 TraceCheckUtils]: 8: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:01,781 INFO L290 TraceCheckUtils]: 9: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:01,782 INFO L290 TraceCheckUtils]: 10: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:01,782 INFO L290 TraceCheckUtils]: 11: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:01,783 INFO L290 TraceCheckUtils]: 12: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:01,784 INFO L290 TraceCheckUtils]: 13: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1413#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} is VALID [2022-04-27 22:01:01,785 INFO L290 TraceCheckUtils]: 14: Hoare triple {1413#(and (<= 1 main_~y~0) (<= (div main_~y~0 4294967296) 0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:01,786 INFO L272 TraceCheckUtils]: 15: Hoare triple {1406#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1406#false} is VALID [2022-04-27 22:01:01,786 INFO L290 TraceCheckUtils]: 16: Hoare triple {1406#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1406#false} is VALID [2022-04-27 22:01:01,786 INFO L290 TraceCheckUtils]: 17: Hoare triple {1406#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:01,786 INFO L290 TraceCheckUtils]: 18: Hoare triple {1406#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:01,786 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:01,786 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:01,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094484182] [2022-04-27 22:01:01,787 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1094484182] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:01,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [908448763] [2022-04-27 22:01:01,787 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:01:01,787 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:01,787 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:01,788 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:01,798 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 22:01:01,832 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 22:01:01,832 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:01,833 INFO L263 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:01:01,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:01,843 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:02,070 INFO L272 TraceCheckUtils]: 0: Hoare triple {1405#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,070 INFO L290 TraceCheckUtils]: 1: Hoare triple {1405#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-27 22:01:02,070 INFO L290 TraceCheckUtils]: 2: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,071 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,071 INFO L272 TraceCheckUtils]: 4: Hoare triple {1405#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,071 INFO L290 TraceCheckUtils]: 5: Hoare triple {1405#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1410#(= main_~y~0 0)} is VALID [2022-04-27 22:01:02,072 INFO L290 TraceCheckUtils]: 6: Hoare triple {1410#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:02,072 INFO L290 TraceCheckUtils]: 7: Hoare triple {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:02,073 INFO L290 TraceCheckUtils]: 8: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:02,073 INFO L290 TraceCheckUtils]: 9: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1445#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:02,074 INFO L290 TraceCheckUtils]: 10: Hoare triple {1445#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1449#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:02,074 INFO L290 TraceCheckUtils]: 11: Hoare triple {1449#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:02,074 INFO L290 TraceCheckUtils]: 12: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:02,075 INFO L290 TraceCheckUtils]: 13: Hoare triple {1412#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:02,076 INFO L290 TraceCheckUtils]: 14: Hoare triple {1411#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:02,076 INFO L272 TraceCheckUtils]: 15: Hoare triple {1406#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1406#false} is VALID [2022-04-27 22:01:02,076 INFO L290 TraceCheckUtils]: 16: Hoare triple {1406#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1406#false} is VALID [2022-04-27 22:01:02,076 INFO L290 TraceCheckUtils]: 17: Hoare triple {1406#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:02,076 INFO L290 TraceCheckUtils]: 18: Hoare triple {1406#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:02,076 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:01:02,076 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:02,213 INFO L290 TraceCheckUtils]: 18: Hoare triple {1406#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:02,213 INFO L290 TraceCheckUtils]: 17: Hoare triple {1406#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:02,214 INFO L290 TraceCheckUtils]: 16: Hoare triple {1406#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1406#false} is VALID [2022-04-27 22:01:02,214 INFO L272 TraceCheckUtils]: 15: Hoare triple {1406#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1406#false} is VALID [2022-04-27 22:01:02,214 INFO L290 TraceCheckUtils]: 14: Hoare triple {1486#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1406#false} is VALID [2022-04-27 22:01:02,215 INFO L290 TraceCheckUtils]: 13: Hoare triple {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1486#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:02,216 INFO L290 TraceCheckUtils]: 12: Hoare triple {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:02,216 INFO L290 TraceCheckUtils]: 11: Hoare triple {1497#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1490#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:02,218 INFO L290 TraceCheckUtils]: 10: Hoare triple {1501#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1497#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:01:02,218 INFO L290 TraceCheckUtils]: 9: Hoare triple {1405#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1501#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:02,219 INFO L290 TraceCheckUtils]: 8: Hoare triple {1405#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,219 INFO L290 TraceCheckUtils]: 7: Hoare triple {1405#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1405#true} is VALID [2022-04-27 22:01:02,219 INFO L290 TraceCheckUtils]: 6: Hoare triple {1405#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1405#true} is VALID [2022-04-27 22:01:02,219 INFO L290 TraceCheckUtils]: 5: Hoare triple {1405#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1405#true} is VALID [2022-04-27 22:01:02,219 INFO L272 TraceCheckUtils]: 4: Hoare triple {1405#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,219 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1405#true} {1405#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,219 INFO L290 TraceCheckUtils]: 2: Hoare triple {1405#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {1405#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1405#true} is VALID [2022-04-27 22:01:02,220 INFO L272 TraceCheckUtils]: 0: Hoare triple {1405#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1405#true} is VALID [2022-04-27 22:01:02,220 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:02,220 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [908448763] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:02,220 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:02,220 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 6] total 13 [2022-04-27 22:01:02,221 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1630968313] [2022-04-27 22:01:02,221 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:02,221 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:01:02,222 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:02,222 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,249 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:02,249 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:01:02,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:02,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:01:02,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:01:02,250 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. Second operand has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:02,744 INFO L93 Difference]: Finished difference Result 47 states and 58 transitions. [2022-04-27 22:01:02,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 22:01:02,744 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:01:02,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:02,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-27 22:01:02,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 54 transitions. [2022-04-27 22:01:02,748 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 54 transitions. [2022-04-27 22:01:02,826 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:02,827 INFO L225 Difference]: With dead ends: 47 [2022-04-27 22:01:02,827 INFO L226 Difference]: Without dead ends: 41 [2022-04-27 22:01:02,827 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=154, Invalid=398, Unknown=0, NotChecked=0, Total=552 [2022-04-27 22:01:02,828 INFO L413 NwaCegarLoop]: 12 mSDtfsCounter, 51 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:02,828 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 39 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 89 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:01:02,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-04-27 22:01:02,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 29. [2022-04-27 22:01:02,875 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:02,875 INFO L82 GeneralOperation]: Start isEquivalent. First operand 41 states. Second operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,875 INFO L74 IsIncluded]: Start isIncluded. First operand 41 states. Second operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,875 INFO L87 Difference]: Start difference. First operand 41 states. Second operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:02,877 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2022-04-27 22:01:02,877 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2022-04-27 22:01:02,877 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:02,877 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:02,878 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-27 22:01:02,878 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 41 states. [2022-04-27 22:01:02,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:02,879 INFO L93 Difference]: Finished difference Result 41 states and 48 transitions. [2022-04-27 22:01:02,879 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 48 transitions. [2022-04-27 22:01:02,879 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:02,879 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:02,880 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:02,880 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:02,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 24 states have internal predecessors, (29), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 33 transitions. [2022-04-27 22:01:02,881 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 33 transitions. Word has length 19 [2022-04-27 22:01:02,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:02,881 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 33 transitions. [2022-04-27 22:01:02,881 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.230769230769231) internal successors, (29), 12 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:02,881 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 33 transitions. [2022-04-27 22:01:02,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 22:01:02,882 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:02,882 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:02,909 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:03,106 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:03,106 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:03,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:03,107 INFO L85 PathProgramCache]: Analyzing trace with hash 801531459, now seen corresponding path program 4 times [2022-04-27 22:01:03,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:03,107 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478386462] [2022-04-27 22:01:03,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:03,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:03,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:03,225 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:03,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:03,230 INFO L290 TraceCheckUtils]: 0: Hoare triple {1771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-27 22:01:03,230 INFO L290 TraceCheckUtils]: 1: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,230 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,231 INFO L272 TraceCheckUtils]: 0: Hoare triple {1761#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:03,231 INFO L290 TraceCheckUtils]: 1: Hoare triple {1771#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-27 22:01:03,231 INFO L290 TraceCheckUtils]: 2: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,231 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,231 INFO L272 TraceCheckUtils]: 4: Hoare triple {1761#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,231 INFO L290 TraceCheckUtils]: 5: Hoare triple {1761#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1761#true} is VALID [2022-04-27 22:01:03,232 INFO L290 TraceCheckUtils]: 6: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-27 22:01:03,232 INFO L290 TraceCheckUtils]: 7: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-27 22:01:03,232 INFO L290 TraceCheckUtils]: 8: Hoare triple {1761#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,233 INFO L290 TraceCheckUtils]: 9: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,234 INFO L290 TraceCheckUtils]: 10: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:03,234 INFO L290 TraceCheckUtils]: 11: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:03,235 INFO L290 TraceCheckUtils]: 12: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:03,236 INFO L290 TraceCheckUtils]: 13: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:03,237 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,237 INFO L290 TraceCheckUtils]: 15: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,238 INFO L272 TraceCheckUtils]: 16: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1769#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:01:03,238 INFO L290 TraceCheckUtils]: 17: Hoare triple {1769#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1770#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:01:03,239 INFO L290 TraceCheckUtils]: 18: Hoare triple {1770#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-27 22:01:03,239 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-27 22:01:03,239 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:03,239 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:03,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478386462] [2022-04-27 22:01:03,239 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1478386462] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:03,239 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [123822817] [2022-04-27 22:01:03,240 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:01:03,240 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:03,240 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:03,244 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:03,254 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 22:01:03,291 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:01:03,291 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:03,292 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 22:01:03,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:03,301 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:03,530 INFO L272 TraceCheckUtils]: 0: Hoare triple {1761#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,530 INFO L290 TraceCheckUtils]: 1: Hoare triple {1761#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-27 22:01:03,530 INFO L290 TraceCheckUtils]: 2: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,530 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,531 INFO L272 TraceCheckUtils]: 4: Hoare triple {1761#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,531 INFO L290 TraceCheckUtils]: 5: Hoare triple {1761#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1761#true} is VALID [2022-04-27 22:01:03,531 INFO L290 TraceCheckUtils]: 6: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-27 22:01:03,533 INFO L290 TraceCheckUtils]: 7: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-27 22:01:03,534 INFO L290 TraceCheckUtils]: 8: Hoare triple {1761#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,534 INFO L290 TraceCheckUtils]: 9: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,540 INFO L290 TraceCheckUtils]: 10: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:03,542 INFO L290 TraceCheckUtils]: 11: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:03,542 INFO L290 TraceCheckUtils]: 12: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:03,544 INFO L290 TraceCheckUtils]: 13: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:03,545 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,546 INFO L290 TraceCheckUtils]: 15: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,546 INFO L272 TraceCheckUtils]: 16: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:03,547 INFO L290 TraceCheckUtils]: 17: Hoare triple {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1827#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:03,547 INFO L290 TraceCheckUtils]: 18: Hoare triple {1827#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-27 22:01:03,547 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-27 22:01:03,548 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:03,548 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:03,822 INFO L290 TraceCheckUtils]: 19: Hoare triple {1762#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-27 22:01:03,823 INFO L290 TraceCheckUtils]: 18: Hoare triple {1827#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {1762#false} is VALID [2022-04-27 22:01:03,823 INFO L290 TraceCheckUtils]: 17: Hoare triple {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1827#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:03,824 INFO L272 TraceCheckUtils]: 16: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {1823#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:03,825 INFO L290 TraceCheckUtils]: 15: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,826 INFO L290 TraceCheckUtils]: 14: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,827 INFO L290 TraceCheckUtils]: 13: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:03,827 INFO L290 TraceCheckUtils]: 12: Hoare triple {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:03,828 INFO L290 TraceCheckUtils]: 11: Hoare triple {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1768#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:03,829 INFO L290 TraceCheckUtils]: 10: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1767#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:03,829 INFO L290 TraceCheckUtils]: 9: Hoare triple {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {1761#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1766#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:03,830 INFO L290 TraceCheckUtils]: 7: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-27 22:01:03,830 INFO L290 TraceCheckUtils]: 6: Hoare triple {1761#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1761#true} is VALID [2022-04-27 22:01:03,830 INFO L290 TraceCheckUtils]: 5: Hoare triple {1761#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1761#true} is VALID [2022-04-27 22:01:03,830 INFO L272 TraceCheckUtils]: 4: Hoare triple {1761#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,830 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1761#true} {1761#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,830 INFO L290 TraceCheckUtils]: 2: Hoare triple {1761#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,831 INFO L290 TraceCheckUtils]: 1: Hoare triple {1761#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1761#true} is VALID [2022-04-27 22:01:03,831 INFO L272 TraceCheckUtils]: 0: Hoare triple {1761#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1761#true} is VALID [2022-04-27 22:01:03,831 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:03,831 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [123822817] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:03,831 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:03,831 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 10 [2022-04-27 22:01:03,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233748858] [2022-04-27 22:01:03,832 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:03,833 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:01:03,833 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:03,833 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:03,853 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:03,854 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 22:01:03,854 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:03,854 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 22:01:03,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2022-04-27 22:01:03,855 INFO L87 Difference]: Start difference. First operand 29 states and 33 transitions. Second operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:04,161 INFO L93 Difference]: Finished difference Result 42 states and 48 transitions. [2022-04-27 22:01:04,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 22:01:04,161 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:01:04,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:04,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 29 transitions. [2022-04-27 22:01:04,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 29 transitions. [2022-04-27 22:01:04,163 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 29 transitions. [2022-04-27 22:01:04,194 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 29 edges. 29 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:04,195 INFO L225 Difference]: With dead ends: 42 [2022-04-27 22:01:04,195 INFO L226 Difference]: Without dead ends: 34 [2022-04-27 22:01:04,195 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 39 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-04-27 22:01:04,196 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 16 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:04,196 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 46 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:01:04,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-27 22:01:04,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. [2022-04-27 22:01:04,227 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:04,227 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,228 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,228 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:04,229 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2022-04-27 22:01:04,229 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 39 transitions. [2022-04-27 22:01:04,229 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:04,229 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:04,229 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 22:01:04,230 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 22:01:04,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:04,231 INFO L93 Difference]: Finished difference Result 34 states and 39 transitions. [2022-04-27 22:01:04,231 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 39 transitions. [2022-04-27 22:01:04,231 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:04,231 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:04,231 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:04,231 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:04,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.2222222222222223) internal successors, (33), 27 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 37 transitions. [2022-04-27 22:01:04,232 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 37 transitions. Word has length 20 [2022-04-27 22:01:04,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:04,232 INFO L495 AbstractCegarLoop]: Abstraction has 32 states and 37 transitions. [2022-04-27 22:01:04,232 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 1.8) internal successors, (18), 7 states have internal predecessors, (18), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,233 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 37 transitions. [2022-04-27 22:01:04,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 22:01:04,233 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:04,233 INFO L195 NwaCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:04,261 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:04,455 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:04,456 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:04,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:04,456 INFO L85 PathProgramCache]: Analyzing trace with hash -1084369129, now seen corresponding path program 5 times [2022-04-27 22:01:04,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:04,456 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526840914] [2022-04-27 22:01:04,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:04,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:04,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:04,561 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:04,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:04,568 INFO L290 TraceCheckUtils]: 0: Hoare triple {2094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-27 22:01:04,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,568 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,569 INFO L272 TraceCheckUtils]: 0: Hoare triple {2083#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:04,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {2094#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-27 22:01:04,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,569 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,569 INFO L272 TraceCheckUtils]: 4: Hoare triple {2083#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {2083#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2088#(= main_~y~0 0)} is VALID [2022-04-27 22:01:04,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {2088#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:04,571 INFO L290 TraceCheckUtils]: 7: Hoare triple {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:04,571 INFO L290 TraceCheckUtils]: 8: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:04,572 INFO L290 TraceCheckUtils]: 9: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2091#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:04,572 INFO L290 TraceCheckUtils]: 10: Hoare triple {2091#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2092#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:01:04,573 INFO L290 TraceCheckUtils]: 11: Hoare triple {2092#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2093#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:01:04,574 INFO L290 TraceCheckUtils]: 12: Hoare triple {2093#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2084#false} is VALID [2022-04-27 22:01:04,574 INFO L290 TraceCheckUtils]: 13: Hoare triple {2084#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,574 INFO L290 TraceCheckUtils]: 14: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-27 22:01:04,574 INFO L290 TraceCheckUtils]: 15: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-27 22:01:04,574 INFO L290 TraceCheckUtils]: 16: Hoare triple {2084#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,574 INFO L272 TraceCheckUtils]: 17: Hoare triple {2084#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2084#false} is VALID [2022-04-27 22:01:04,575 INFO L290 TraceCheckUtils]: 18: Hoare triple {2084#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2084#false} is VALID [2022-04-27 22:01:04,576 INFO L290 TraceCheckUtils]: 19: Hoare triple {2084#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,576 INFO L290 TraceCheckUtils]: 20: Hoare triple {2084#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,576 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:04,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:04,576 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526840914] [2022-04-27 22:01:04,576 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1526840914] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:04,576 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [958125920] [2022-04-27 22:01:04,576 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:01:04,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:04,577 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:04,578 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:04,579 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 22:01:04,619 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-27 22:01:04,619 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:04,620 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:01:04,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:04,627 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:04,755 INFO L272 TraceCheckUtils]: 0: Hoare triple {2083#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,756 INFO L290 TraceCheckUtils]: 1: Hoare triple {2083#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-27 22:01:04,756 INFO L290 TraceCheckUtils]: 2: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,756 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,756 INFO L272 TraceCheckUtils]: 4: Hoare triple {2083#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,756 INFO L290 TraceCheckUtils]: 5: Hoare triple {2083#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2088#(= main_~y~0 0)} is VALID [2022-04-27 22:01:04,757 INFO L290 TraceCheckUtils]: 6: Hoare triple {2088#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:04,757 INFO L290 TraceCheckUtils]: 7: Hoare triple {2089#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:04,758 INFO L290 TraceCheckUtils]: 8: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:04,758 INFO L290 TraceCheckUtils]: 9: Hoare triple {2090#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2125#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:04,759 INFO L290 TraceCheckUtils]: 10: Hoare triple {2125#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2129#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:04,759 INFO L290 TraceCheckUtils]: 11: Hoare triple {2129#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2133#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-27 22:01:04,760 INFO L290 TraceCheckUtils]: 12: Hoare triple {2133#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2084#false} is VALID [2022-04-27 22:01:04,760 INFO L290 TraceCheckUtils]: 13: Hoare triple {2084#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,760 INFO L290 TraceCheckUtils]: 14: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-27 22:01:04,760 INFO L290 TraceCheckUtils]: 15: Hoare triple {2084#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2084#false} is VALID [2022-04-27 22:01:04,760 INFO L290 TraceCheckUtils]: 16: Hoare triple {2084#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,760 INFO L272 TraceCheckUtils]: 17: Hoare triple {2084#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2084#false} is VALID [2022-04-27 22:01:04,761 INFO L290 TraceCheckUtils]: 18: Hoare triple {2084#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2084#false} is VALID [2022-04-27 22:01:04,761 INFO L290 TraceCheckUtils]: 19: Hoare triple {2084#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,761 INFO L290 TraceCheckUtils]: 20: Hoare triple {2084#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,761 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:04,761 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:04,934 INFO L290 TraceCheckUtils]: 20: Hoare triple {2084#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,935 INFO L290 TraceCheckUtils]: 19: Hoare triple {2084#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,935 INFO L290 TraceCheckUtils]: 18: Hoare triple {2084#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2084#false} is VALID [2022-04-27 22:01:04,935 INFO L272 TraceCheckUtils]: 17: Hoare triple {2084#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2084#false} is VALID [2022-04-27 22:01:04,935 INFO L290 TraceCheckUtils]: 16: Hoare triple {2173#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2084#false} is VALID [2022-04-27 22:01:04,936 INFO L290 TraceCheckUtils]: 15: Hoare triple {2177#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2173#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:04,937 INFO L290 TraceCheckUtils]: 14: Hoare triple {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2177#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:04,938 INFO L290 TraceCheckUtils]: 13: Hoare triple {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:04,938 INFO L290 TraceCheckUtils]: 12: Hoare triple {2188#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2181#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:04,940 INFO L290 TraceCheckUtils]: 11: Hoare triple {2192#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2188#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:01:04,941 INFO L290 TraceCheckUtils]: 10: Hoare triple {2196#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2192#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:04,941 INFO L290 TraceCheckUtils]: 9: Hoare triple {2083#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2196#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:01:04,941 INFO L290 TraceCheckUtils]: 8: Hoare triple {2083#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,941 INFO L290 TraceCheckUtils]: 7: Hoare triple {2083#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L290 TraceCheckUtils]: 6: Hoare triple {2083#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L290 TraceCheckUtils]: 5: Hoare triple {2083#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L272 TraceCheckUtils]: 4: Hoare triple {2083#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2083#true} {2083#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L290 TraceCheckUtils]: 2: Hoare triple {2083#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L290 TraceCheckUtils]: 1: Hoare triple {2083#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L272 TraceCheckUtils]: 0: Hoare triple {2083#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2083#true} is VALID [2022-04-27 22:01:04,942 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:01:04,943 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [958125920] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:04,943 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:04,943 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 18 [2022-04-27 22:01:04,943 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939240729] [2022-04-27 22:01:04,943 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:04,944 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:01:04,944 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:04,944 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:04,974 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:04,974 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 22:01:04,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:04,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 22:01:04,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:01:04,975 INFO L87 Difference]: Start difference. First operand 32 states and 37 transitions. Second operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:05,825 INFO L93 Difference]: Finished difference Result 66 states and 79 transitions. [2022-04-27 22:01:05,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 22:01:05,826 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:01:05,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:05,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 58 transitions. [2022-04-27 22:01:05,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 58 transitions. [2022-04-27 22:01:05,828 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 58 transitions. [2022-04-27 22:01:05,896 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:05,897 INFO L225 Difference]: With dead ends: 66 [2022-04-27 22:01:05,897 INFO L226 Difference]: Without dead ends: 53 [2022-04-27 22:01:05,899 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=213, Invalid=843, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 22:01:05,899 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 66 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 153 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 153 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:05,900 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [66 Valid, 52 Invalid, 200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 153 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:01:05,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2022-04-27 22:01:05,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 23. [2022-04-27 22:01:05,933 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:05,933 INFO L82 GeneralOperation]: Start isEquivalent. First operand 53 states. Second operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,933 INFO L74 IsIncluded]: Start isIncluded. First operand 53 states. Second operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,934 INFO L87 Difference]: Start difference. First operand 53 states. Second operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:05,935 INFO L93 Difference]: Finished difference Result 53 states and 64 transitions. [2022-04-27 22:01:05,935 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 64 transitions. [2022-04-27 22:01:05,935 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:05,935 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:05,935 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-27 22:01:05,936 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 53 states. [2022-04-27 22:01:05,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:05,937 INFO L93 Difference]: Finished difference Result 53 states and 64 transitions. [2022-04-27 22:01:05,937 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 64 transitions. [2022-04-27 22:01:05,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:05,937 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:05,937 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:05,937 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:05,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.1666666666666667) internal successors, (21), 18 states have internal predecessors, (21), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2022-04-27 22:01:05,938 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 25 transitions. Word has length 21 [2022-04-27 22:01:05,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:05,938 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 25 transitions. [2022-04-27 22:01:05,939 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 17 states have internal predecessors, (32), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:05,939 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 25 transitions. [2022-04-27 22:01:05,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 22:01:05,939 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:05,939 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:05,964 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:06,140 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:06,140 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:06,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:06,140 INFO L85 PathProgramCache]: Analyzing trace with hash 465015230, now seen corresponding path program 6 times [2022-04-27 22:01:06,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:06,141 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272405399] [2022-04-27 22:01:06,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:06,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:06,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:06,276 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:06,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:06,281 INFO L290 TraceCheckUtils]: 0: Hoare triple {2516#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-27 22:01:06,281 INFO L290 TraceCheckUtils]: 1: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,282 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,282 INFO L272 TraceCheckUtils]: 0: Hoare triple {2504#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:06,282 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-27 22:01:06,282 INFO L290 TraceCheckUtils]: 2: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,283 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,283 INFO L272 TraceCheckUtils]: 4: Hoare triple {2504#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,283 INFO L290 TraceCheckUtils]: 5: Hoare triple {2504#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2509#(= main_~y~0 0)} is VALID [2022-04-27 22:01:06,284 INFO L290 TraceCheckUtils]: 6: Hoare triple {2509#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:06,284 INFO L290 TraceCheckUtils]: 7: Hoare triple {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:06,285 INFO L290 TraceCheckUtils]: 8: Hoare triple {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:06,285 INFO L290 TraceCheckUtils]: 9: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:06,286 INFO L290 TraceCheckUtils]: 10: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2513#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:06,287 INFO L290 TraceCheckUtils]: 11: Hoare triple {2513#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2514#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:06,287 INFO L290 TraceCheckUtils]: 12: Hoare triple {2514#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2515#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:01:06,288 INFO L290 TraceCheckUtils]: 13: Hoare triple {2515#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,288 INFO L290 TraceCheckUtils]: 14: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,288 INFO L290 TraceCheckUtils]: 15: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,288 INFO L290 TraceCheckUtils]: 16: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,288 INFO L290 TraceCheckUtils]: 17: Hoare triple {2505#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,289 INFO L272 TraceCheckUtils]: 18: Hoare triple {2505#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2505#false} is VALID [2022-04-27 22:01:06,289 INFO L290 TraceCheckUtils]: 19: Hoare triple {2505#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#false} is VALID [2022-04-27 22:01:06,289 INFO L290 TraceCheckUtils]: 20: Hoare triple {2505#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,289 INFO L290 TraceCheckUtils]: 21: Hoare triple {2505#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,289 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:01:06,289 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:06,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272405399] [2022-04-27 22:01:06,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [272405399] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:06,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [437824790] [2022-04-27 22:01:06,290 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:01:06,290 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:06,290 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:06,291 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:06,301 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 22:01:06,343 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-27 22:01:06,343 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:06,344 INFO L263 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:01:06,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:06,352 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:06,507 INFO L272 TraceCheckUtils]: 0: Hoare triple {2504#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {2504#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-27 22:01:06,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,508 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,508 INFO L272 TraceCheckUtils]: 4: Hoare triple {2504#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,509 INFO L290 TraceCheckUtils]: 5: Hoare triple {2504#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2509#(= main_~y~0 0)} is VALID [2022-04-27 22:01:06,509 INFO L290 TraceCheckUtils]: 6: Hoare triple {2509#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:06,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {2510#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:06,511 INFO L290 TraceCheckUtils]: 8: Hoare triple {2511#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:06,512 INFO L290 TraceCheckUtils]: 9: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:06,512 INFO L290 TraceCheckUtils]: 10: Hoare triple {2512#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2550#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:06,513 INFO L290 TraceCheckUtils]: 11: Hoare triple {2550#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2554#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:06,513 INFO L290 TraceCheckUtils]: 12: Hoare triple {2554#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2558#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:06,514 INFO L290 TraceCheckUtils]: 13: Hoare triple {2558#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,514 INFO L290 TraceCheckUtils]: 14: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,514 INFO L290 TraceCheckUtils]: 15: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,514 INFO L290 TraceCheckUtils]: 16: Hoare triple {2505#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,514 INFO L290 TraceCheckUtils]: 17: Hoare triple {2505#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,515 INFO L272 TraceCheckUtils]: 18: Hoare triple {2505#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2505#false} is VALID [2022-04-27 22:01:06,515 INFO L290 TraceCheckUtils]: 19: Hoare triple {2505#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#false} is VALID [2022-04-27 22:01:06,515 INFO L290 TraceCheckUtils]: 20: Hoare triple {2505#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,515 INFO L290 TraceCheckUtils]: 21: Hoare triple {2505#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,515 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:01:06,515 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:06,697 INFO L290 TraceCheckUtils]: 21: Hoare triple {2505#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,697 INFO L290 TraceCheckUtils]: 20: Hoare triple {2505#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,697 INFO L290 TraceCheckUtils]: 19: Hoare triple {2505#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2505#false} is VALID [2022-04-27 22:01:06,697 INFO L272 TraceCheckUtils]: 18: Hoare triple {2505#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2505#false} is VALID [2022-04-27 22:01:06,697 INFO L290 TraceCheckUtils]: 17: Hoare triple {2505#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2505#false} is VALID [2022-04-27 22:01:06,698 INFO L290 TraceCheckUtils]: 16: Hoare triple {2601#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2505#false} is VALID [2022-04-27 22:01:06,699 INFO L290 TraceCheckUtils]: 15: Hoare triple {2605#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2601#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:06,699 INFO L290 TraceCheckUtils]: 14: Hoare triple {2609#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2605#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:06,700 INFO L290 TraceCheckUtils]: 13: Hoare triple {2613#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2609#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:06,701 INFO L290 TraceCheckUtils]: 12: Hoare triple {2617#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2613#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:01:06,702 INFO L290 TraceCheckUtils]: 11: Hoare triple {2621#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2617#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:06,702 INFO L290 TraceCheckUtils]: 10: Hoare triple {2504#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2621#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 9: Hoare triple {2504#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 8: Hoare triple {2504#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 7: Hoare triple {2504#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 6: Hoare triple {2504#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 5: Hoare triple {2504#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L272 TraceCheckUtils]: 4: Hoare triple {2504#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2504#true} {2504#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 2: Hoare triple {2504#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,703 INFO L290 TraceCheckUtils]: 1: Hoare triple {2504#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2504#true} is VALID [2022-04-27 22:01:06,704 INFO L272 TraceCheckUtils]: 0: Hoare triple {2504#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2504#true} is VALID [2022-04-27 22:01:06,704 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:01:06,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [437824790] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:06,704 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:06,704 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-27 22:01:06,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352044789] [2022-04-27 22:01:06,704 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:06,705 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:01:06,705 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:06,705 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:06,734 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:06,734 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 22:01:06,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:06,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 22:01:06,735 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:01:06,735 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. Second operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:07,669 INFO L93 Difference]: Finished difference Result 50 states and 60 transitions. [2022-04-27 22:01:07,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-04-27 22:01:07,669 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:01:07,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:07,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 55 transitions. [2022-04-27 22:01:07,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 55 transitions. [2022-04-27 22:01:07,672 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 20 states and 55 transitions. [2022-04-27 22:01:07,725 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:07,726 INFO L225 Difference]: With dead ends: 50 [2022-04-27 22:01:07,726 INFO L226 Difference]: Without dead ends: 38 [2022-04-27 22:01:07,726 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=205, Invalid=1055, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 22:01:07,727 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 24 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:07,727 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 53 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:01:07,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-04-27 22:01:07,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2022-04-27 22:01:07,800 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:07,801 INFO L82 GeneralOperation]: Start isEquivalent. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,801 INFO L74 IsIncluded]: Start isIncluded. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,801 INFO L87 Difference]: Start difference. First operand 38 states. Second operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:07,802 INFO L93 Difference]: Finished difference Result 38 states and 43 transitions. [2022-04-27 22:01:07,802 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 43 transitions. [2022-04-27 22:01:07,802 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:07,802 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:07,802 INFO L74 IsIncluded]: Start isIncluded. First operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 22:01:07,803 INFO L87 Difference]: Start difference. First operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 38 states. [2022-04-27 22:01:07,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:07,804 INFO L93 Difference]: Finished difference Result 38 states and 43 transitions. [2022-04-27 22:01:07,804 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 43 transitions. [2022-04-27 22:01:07,804 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:07,804 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:07,804 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:07,804 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:07,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 32 states have (on average 1.1875) internal successors, (38), 32 states have internal predecessors, (38), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 42 transitions. [2022-04-27 22:01:07,805 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 42 transitions. Word has length 22 [2022-04-27 22:01:07,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:07,805 INFO L495 AbstractCegarLoop]: Abstraction has 37 states and 42 transitions. [2022-04-27 22:01:07,806 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.631578947368421) internal successors, (31), 18 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:07,806 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 42 transitions. [2022-04-27 22:01:07,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 22:01:07,806 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:07,806 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:07,828 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:08,019 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-27 22:01:08,020 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:08,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:08,020 INFO L85 PathProgramCache]: Analyzing trace with hash 660626, now seen corresponding path program 7 times [2022-04-27 22:01:08,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:08,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1926417493] [2022-04-27 22:01:08,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:08,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:08,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:08,146 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:08,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:08,156 INFO L290 TraceCheckUtils]: 0: Hoare triple {2916#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-27 22:01:08,157 INFO L290 TraceCheckUtils]: 1: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,157 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,157 INFO L272 TraceCheckUtils]: 0: Hoare triple {2905#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2916#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:08,158 INFO L290 TraceCheckUtils]: 1: Hoare triple {2916#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L290 TraceCheckUtils]: 2: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L272 TraceCheckUtils]: 4: Hoare triple {2905#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L290 TraceCheckUtils]: 5: Hoare triple {2905#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L290 TraceCheckUtils]: 6: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L290 TraceCheckUtils]: 7: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,158 INFO L290 TraceCheckUtils]: 8: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,159 INFO L290 TraceCheckUtils]: 9: Hoare triple {2905#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,159 INFO L290 TraceCheckUtils]: 10: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,160 INFO L290 TraceCheckUtils]: 11: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:08,161 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,161 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,162 INFO L290 TraceCheckUtils]: 14: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,163 INFO L290 TraceCheckUtils]: 15: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,163 INFO L290 TraceCheckUtils]: 16: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:08,164 INFO L290 TraceCheckUtils]: 17: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,165 INFO L290 TraceCheckUtils]: 18: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,165 INFO L272 TraceCheckUtils]: 19: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2914#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:01:08,166 INFO L290 TraceCheckUtils]: 20: Hoare triple {2914#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2915#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:01:08,166 INFO L290 TraceCheckUtils]: 21: Hoare triple {2915#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-27 22:01:08,166 INFO L290 TraceCheckUtils]: 22: Hoare triple {2906#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-27 22:01:08,166 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:01:08,167 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:08,167 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1926417493] [2022-04-27 22:01:08,167 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1926417493] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:08,167 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1723845549] [2022-04-27 22:01:08,167 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:01:08,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:08,167 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:08,168 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:08,195 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 22:01:08,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:08,218 INFO L263 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-27 22:01:08,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:08,229 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:08,475 INFO L272 TraceCheckUtils]: 0: Hoare triple {2905#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {2905#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L290 TraceCheckUtils]: 2: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L272 TraceCheckUtils]: 4: Hoare triple {2905#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L290 TraceCheckUtils]: 5: Hoare triple {2905#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L290 TraceCheckUtils]: 6: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L290 TraceCheckUtils]: 7: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,476 INFO L290 TraceCheckUtils]: 8: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,477 INFO L290 TraceCheckUtils]: 9: Hoare triple {2905#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,477 INFO L290 TraceCheckUtils]: 10: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,478 INFO L290 TraceCheckUtils]: 11: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:08,479 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,480 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,481 INFO L290 TraceCheckUtils]: 14: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,482 INFO L290 TraceCheckUtils]: 15: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,483 INFO L290 TraceCheckUtils]: 16: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:08,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,484 INFO L290 TraceCheckUtils]: 18: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,485 INFO L272 TraceCheckUtils]: 19: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:08,486 INFO L290 TraceCheckUtils]: 20: Hoare triple {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:08,486 INFO L290 TraceCheckUtils]: 21: Hoare triple {2981#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-27 22:01:08,486 INFO L290 TraceCheckUtils]: 22: Hoare triple {2906#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-27 22:01:08,486 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:01:08,487 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:08,630 INFO L290 TraceCheckUtils]: 22: Hoare triple {2906#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-27 22:01:08,631 INFO L290 TraceCheckUtils]: 21: Hoare triple {2981#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {2906#false} is VALID [2022-04-27 22:01:08,631 INFO L290 TraceCheckUtils]: 20: Hoare triple {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2981#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:08,632 INFO L272 TraceCheckUtils]: 19: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {2977#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:08,633 INFO L290 TraceCheckUtils]: 18: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,634 INFO L290 TraceCheckUtils]: 17: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,634 INFO L290 TraceCheckUtils]: 16: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:08,636 INFO L290 TraceCheckUtils]: 15: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,636 INFO L290 TraceCheckUtils]: 14: Hoare triple {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,637 INFO L290 TraceCheckUtils]: 13: Hoare triple {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2913#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,638 INFO L290 TraceCheckUtils]: 12: Hoare triple {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2912#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:08,639 INFO L290 TraceCheckUtils]: 11: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2911#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:08,640 INFO L290 TraceCheckUtils]: 10: Hoare triple {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,640 INFO L290 TraceCheckUtils]: 9: Hoare triple {2905#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2910#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:08,640 INFO L290 TraceCheckUtils]: 8: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,640 INFO L290 TraceCheckUtils]: 7: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,640 INFO L290 TraceCheckUtils]: 6: Hoare triple {2905#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L290 TraceCheckUtils]: 5: Hoare triple {2905#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L272 TraceCheckUtils]: 4: Hoare triple {2905#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2905#true} {2905#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L290 TraceCheckUtils]: 2: Hoare triple {2905#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L290 TraceCheckUtils]: 1: Hoare triple {2905#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L272 TraceCheckUtils]: 0: Hoare triple {2905#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2905#true} is VALID [2022-04-27 22:01:08,641 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:01:08,642 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1723845549] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:08,642 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:08,642 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 11 [2022-04-27 22:01:08,642 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449588528] [2022-04-27 22:01:08,642 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:08,645 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:01:08,645 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:08,645 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:08,669 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:08,670 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-04-27 22:01:08,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:08,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-04-27 22:01:08,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2022-04-27 22:01:08,671 INFO L87 Difference]: Start difference. First operand 37 states and 42 transitions. Second operand has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:09,085 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2022-04-27 22:01:09,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 22:01:09,086 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:01:09,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:09,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2022-04-27 22:01:09,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 31 transitions. [2022-04-27 22:01:09,088 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 31 transitions. [2022-04-27 22:01:09,117 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:09,118 INFO L225 Difference]: With dead ends: 51 [2022-04-27 22:01:09,118 INFO L226 Difference]: Without dead ends: 42 [2022-04-27 22:01:09,118 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 46 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2022-04-27 22:01:09,119 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 16 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:09,119 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 51 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:01:09,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2022-04-27 22:01:09,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 39. [2022-04-27 22:01:09,201 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:09,201 INFO L82 GeneralOperation]: Start isEquivalent. First operand 42 states. Second operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,201 INFO L74 IsIncluded]: Start isIncluded. First operand 42 states. Second operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,202 INFO L87 Difference]: Start difference. First operand 42 states. Second operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:09,203 INFO L93 Difference]: Finished difference Result 42 states and 47 transitions. [2022-04-27 22:01:09,203 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-04-27 22:01:09,203 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:09,203 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:09,203 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-27 22:01:09,203 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 42 states. [2022-04-27 22:01:09,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:09,204 INFO L93 Difference]: Finished difference Result 42 states and 47 transitions. [2022-04-27 22:01:09,204 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 47 transitions. [2022-04-27 22:01:09,204 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:09,204 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:09,205 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:09,205 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:09,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 34 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 44 transitions. [2022-04-27 22:01:09,205 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 44 transitions. Word has length 23 [2022-04-27 22:01:09,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:09,206 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 44 transitions. [2022-04-27 22:01:09,206 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 8 states have internal predecessors, (20), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:09,206 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 44 transitions. [2022-04-27 22:01:09,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 22:01:09,206 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:09,206 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:09,233 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:09,419 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 22:01:09,420 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:09,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:09,420 INFO L85 PathProgramCache]: Analyzing trace with hash -1529937545, now seen corresponding path program 8 times [2022-04-27 22:01:09,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:09,420 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444312084] [2022-04-27 22:01:09,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:09,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:09,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:09,562 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:09,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:09,567 INFO L290 TraceCheckUtils]: 0: Hoare triple {3304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-27 22:01:09,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,567 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,568 INFO L272 TraceCheckUtils]: 0: Hoare triple {3290#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:09,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {3304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-27 22:01:09,568 INFO L290 TraceCheckUtils]: 2: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,568 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,568 INFO L272 TraceCheckUtils]: 4: Hoare triple {3290#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,568 INFO L290 TraceCheckUtils]: 5: Hoare triple {3290#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3295#(= main_~y~0 0)} is VALID [2022-04-27 22:01:09,569 INFO L290 TraceCheckUtils]: 6: Hoare triple {3295#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:09,570 INFO L290 TraceCheckUtils]: 7: Hoare triple {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:09,570 INFO L290 TraceCheckUtils]: 8: Hoare triple {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:09,571 INFO L290 TraceCheckUtils]: 9: Hoare triple {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,571 INFO L290 TraceCheckUtils]: 10: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,572 INFO L290 TraceCheckUtils]: 11: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3300#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:09,572 INFO L290 TraceCheckUtils]: 12: Hoare triple {3300#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3301#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:09,573 INFO L290 TraceCheckUtils]: 13: Hoare triple {3301#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3302#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:09,574 INFO L290 TraceCheckUtils]: 14: Hoare triple {3302#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3303#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:01:09,574 INFO L290 TraceCheckUtils]: 15: Hoare triple {3303#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,574 INFO L290 TraceCheckUtils]: 16: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 17: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 18: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 19: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 20: Hoare triple {3291#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L272 TraceCheckUtils]: 21: Hoare triple {3291#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 22: Hoare triple {3291#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 23: Hoare triple {3291#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,575 INFO L290 TraceCheckUtils]: 24: Hoare triple {3291#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,576 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:09,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:09,576 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444312084] [2022-04-27 22:01:09,576 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [444312084] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:09,576 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [878336182] [2022-04-27 22:01:09,576 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:01:09,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:09,576 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:09,577 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:09,587 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 22:01:09,637 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:01:09,637 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:09,638 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 26 conjunts are in the unsatisfiable core [2022-04-27 22:01:09,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:09,653 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:09,827 INFO L272 TraceCheckUtils]: 0: Hoare triple {3290#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,827 INFO L290 TraceCheckUtils]: 1: Hoare triple {3290#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-27 22:01:09,827 INFO L290 TraceCheckUtils]: 2: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,828 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,828 INFO L272 TraceCheckUtils]: 4: Hoare triple {3290#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:09,828 INFO L290 TraceCheckUtils]: 5: Hoare triple {3290#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3295#(= main_~y~0 0)} is VALID [2022-04-27 22:01:09,829 INFO L290 TraceCheckUtils]: 6: Hoare triple {3295#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:09,829 INFO L290 TraceCheckUtils]: 7: Hoare triple {3296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:09,830 INFO L290 TraceCheckUtils]: 8: Hoare triple {3297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:09,830 INFO L290 TraceCheckUtils]: 9: Hoare triple {3298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,831 INFO L290 TraceCheckUtils]: 10: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,831 INFO L290 TraceCheckUtils]: 11: Hoare triple {3299#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3341#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,832 INFO L290 TraceCheckUtils]: 12: Hoare triple {3341#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3345#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:09,832 INFO L290 TraceCheckUtils]: 13: Hoare triple {3345#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3349#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,833 INFO L290 TraceCheckUtils]: 14: Hoare triple {3349#(and (<= main_~y~0 4) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 4 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3353#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 15: Hoare triple {3353#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 4) (<= 4 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 16: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 17: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 18: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 19: Hoare triple {3291#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 20: Hoare triple {3291#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L272 TraceCheckUtils]: 21: Hoare triple {3291#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 22: Hoare triple {3291#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3291#false} is VALID [2022-04-27 22:01:09,834 INFO L290 TraceCheckUtils]: 23: Hoare triple {3291#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,835 INFO L290 TraceCheckUtils]: 24: Hoare triple {3291#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:09,835 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:09,835 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:10,089 INFO L290 TraceCheckUtils]: 24: Hoare triple {3291#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:10,090 INFO L290 TraceCheckUtils]: 23: Hoare triple {3291#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:10,090 INFO L290 TraceCheckUtils]: 22: Hoare triple {3291#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3291#false} is VALID [2022-04-27 22:01:10,090 INFO L272 TraceCheckUtils]: 21: Hoare triple {3291#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3291#false} is VALID [2022-04-27 22:01:10,090 INFO L290 TraceCheckUtils]: 20: Hoare triple {3291#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3291#false} is VALID [2022-04-27 22:01:10,090 INFO L290 TraceCheckUtils]: 19: Hoare triple {3399#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3291#false} is VALID [2022-04-27 22:01:10,091 INFO L290 TraceCheckUtils]: 18: Hoare triple {3403#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3399#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:10,092 INFO L290 TraceCheckUtils]: 17: Hoare triple {3407#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3403#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:10,093 INFO L290 TraceCheckUtils]: 16: Hoare triple {3411#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3407#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:10,094 INFO L290 TraceCheckUtils]: 15: Hoare triple {3415#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3411#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:10,095 INFO L290 TraceCheckUtils]: 14: Hoare triple {3419#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3415#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-27 22:01:10,097 INFO L290 TraceCheckUtils]: 13: Hoare triple {3423#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3419#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:10,098 INFO L290 TraceCheckUtils]: 12: Hoare triple {3427#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3423#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-27 22:01:10,099 INFO L290 TraceCheckUtils]: 11: Hoare triple {3290#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3427#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:10,099 INFO L290 TraceCheckUtils]: 10: Hoare triple {3290#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:10,099 INFO L290 TraceCheckUtils]: 9: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-27 22:01:10,099 INFO L290 TraceCheckUtils]: 8: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L290 TraceCheckUtils]: 7: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L290 TraceCheckUtils]: 6: Hoare triple {3290#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L290 TraceCheckUtils]: 5: Hoare triple {3290#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L272 TraceCheckUtils]: 4: Hoare triple {3290#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3290#true} {3290#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L290 TraceCheckUtils]: 2: Hoare triple {3290#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L290 TraceCheckUtils]: 1: Hoare triple {3290#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3290#true} is VALID [2022-04-27 22:01:10,100 INFO L272 TraceCheckUtils]: 0: Hoare triple {3290#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3290#true} is VALID [2022-04-27 22:01:10,101 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:10,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [878336182] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:10,101 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:10,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 10] total 24 [2022-04-27 22:01:10,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112270011] [2022-04-27 22:01:10,101 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:10,102 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:01:10,102 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:10,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:10,137 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:10,137 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-27 22:01:10,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:10,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-27 22:01:10,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=457, Unknown=0, NotChecked=0, Total=552 [2022-04-27 22:01:10,138 INFO L87 Difference]: Start difference. First operand 39 states and 44 transitions. Second operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:11,614 INFO L93 Difference]: Finished difference Result 69 states and 83 transitions. [2022-04-27 22:01:11,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-04-27 22:01:11,615 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:01:11,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:11,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 70 transitions. [2022-04-27 22:01:11,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 70 transitions. [2022-04-27 22:01:11,617 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 28 states and 70 transitions. [2022-04-27 22:01:11,687 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 70 edges. 70 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:11,688 INFO L225 Difference]: With dead ends: 69 [2022-04-27 22:01:11,688 INFO L226 Difference]: Without dead ends: 55 [2022-04-27 22:01:11,689 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=347, Invalid=2005, Unknown=0, NotChecked=0, Total=2352 [2022-04-27 22:01:11,689 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 38 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 74 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 65 SdHoareTripleChecker+Invalid, 392 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 74 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:11,690 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [38 Valid, 65 Invalid, 392 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [74 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 22:01:11,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2022-04-27 22:01:11,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 50. [2022-04-27 22:01:11,837 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:11,838 INFO L82 GeneralOperation]: Start isEquivalent. First operand 55 states. Second operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,838 INFO L74 IsIncluded]: Start isIncluded. First operand 55 states. Second operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,839 INFO L87 Difference]: Start difference. First operand 55 states. Second operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:11,840 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2022-04-27 22:01:11,840 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 62 transitions. [2022-04-27 22:01:11,840 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:11,840 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:11,840 INFO L74 IsIncluded]: Start isIncluded. First operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-27 22:01:11,840 INFO L87 Difference]: Start difference. First operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 55 states. [2022-04-27 22:01:11,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:11,841 INFO L93 Difference]: Finished difference Result 55 states and 62 transitions. [2022-04-27 22:01:11,842 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 62 transitions. [2022-04-27 22:01:11,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:11,842 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:11,842 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:11,842 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:11,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 45 states have (on average 1.1777777777777778) internal successors, (53), 45 states have internal predecessors, (53), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 57 transitions. [2022-04-27 22:01:11,844 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 57 transitions. Word has length 25 [2022-04-27 22:01:11,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:11,845 INFO L495 AbstractCegarLoop]: Abstraction has 50 states and 57 transitions. [2022-04-27 22:01:11,846 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5) internal successors, (36), 23 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:11,846 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 57 transitions. [2022-04-27 22:01:11,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 22:01:11,847 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:11,847 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:11,874 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:12,060 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 22:01:12,061 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:12,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:12,061 INFO L85 PathProgramCache]: Analyzing trace with hash -575953218, now seen corresponding path program 9 times [2022-04-27 22:01:12,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:12,061 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627539785] [2022-04-27 22:01:12,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:12,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:12,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:12,188 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:12,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:12,200 INFO L290 TraceCheckUtils]: 0: Hoare triple {3832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-27 22:01:12,201 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,201 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,202 INFO L272 TraceCheckUtils]: 0: Hoare triple {3819#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:12,202 INFO L290 TraceCheckUtils]: 1: Hoare triple {3832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-27 22:01:12,202 INFO L290 TraceCheckUtils]: 2: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,202 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,202 INFO L272 TraceCheckUtils]: 4: Hoare triple {3819#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,202 INFO L290 TraceCheckUtils]: 5: Hoare triple {3819#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3824#(= main_~y~0 0)} is VALID [2022-04-27 22:01:12,203 INFO L290 TraceCheckUtils]: 6: Hoare triple {3824#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:12,204 INFO L290 TraceCheckUtils]: 7: Hoare triple {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:12,204 INFO L290 TraceCheckUtils]: 8: Hoare triple {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:12,205 INFO L290 TraceCheckUtils]: 9: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:12,205 INFO L290 TraceCheckUtils]: 10: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3828#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:12,206 INFO L290 TraceCheckUtils]: 11: Hoare triple {3828#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3829#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:12,207 INFO L290 TraceCheckUtils]: 12: Hoare triple {3829#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3830#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:01:12,207 INFO L290 TraceCheckUtils]: 13: Hoare triple {3830#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3831#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:01:12,208 INFO L290 TraceCheckUtils]: 14: Hoare triple {3831#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 15: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 16: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 17: Hoare triple {3820#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 18: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 19: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 20: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-27 22:01:12,209 INFO L290 TraceCheckUtils]: 21: Hoare triple {3820#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,210 INFO L272 TraceCheckUtils]: 22: Hoare triple {3820#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3820#false} is VALID [2022-04-27 22:01:12,210 INFO L290 TraceCheckUtils]: 23: Hoare triple {3820#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3820#false} is VALID [2022-04-27 22:01:12,210 INFO L290 TraceCheckUtils]: 24: Hoare triple {3820#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,210 INFO L290 TraceCheckUtils]: 25: Hoare triple {3820#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,210 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:01:12,211 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:12,211 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627539785] [2022-04-27 22:01:12,211 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627539785] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:12,211 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [484076698] [2022-04-27 22:01:12,211 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:01:12,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:12,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:12,216 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:12,217 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 22:01:12,277 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-27 22:01:12,278 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:12,279 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 22:01:12,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:12,288 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:12,478 INFO L272 TraceCheckUtils]: 0: Hoare triple {3819#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,478 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-27 22:01:12,478 INFO L290 TraceCheckUtils]: 2: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,478 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,479 INFO L272 TraceCheckUtils]: 4: Hoare triple {3819#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,479 INFO L290 TraceCheckUtils]: 5: Hoare triple {3819#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3824#(= main_~y~0 0)} is VALID [2022-04-27 22:01:12,479 INFO L290 TraceCheckUtils]: 6: Hoare triple {3824#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:12,480 INFO L290 TraceCheckUtils]: 7: Hoare triple {3825#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:12,481 INFO L290 TraceCheckUtils]: 8: Hoare triple {3826#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:12,481 INFO L290 TraceCheckUtils]: 9: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:12,481 INFO L290 TraceCheckUtils]: 10: Hoare triple {3827#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3866#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:12,482 INFO L290 TraceCheckUtils]: 11: Hoare triple {3866#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3870#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:12,483 INFO L290 TraceCheckUtils]: 12: Hoare triple {3870#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3874#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:12,483 INFO L290 TraceCheckUtils]: 13: Hoare triple {3874#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3878#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} is VALID [2022-04-27 22:01:12,484 INFO L290 TraceCheckUtils]: 14: Hoare triple {3878#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-27 22:01:12,484 INFO L290 TraceCheckUtils]: 15: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-27 22:01:12,484 INFO L290 TraceCheckUtils]: 16: Hoare triple {3820#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3820#false} is VALID [2022-04-27 22:01:12,484 INFO L290 TraceCheckUtils]: 17: Hoare triple {3820#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 18: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 19: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 20: Hoare triple {3820#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 21: Hoare triple {3820#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L272 TraceCheckUtils]: 22: Hoare triple {3820#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 23: Hoare triple {3820#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 24: Hoare triple {3820#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,485 INFO L290 TraceCheckUtils]: 25: Hoare triple {3820#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,486 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:01:12,486 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:12,728 INFO L290 TraceCheckUtils]: 25: Hoare triple {3820#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,728 INFO L290 TraceCheckUtils]: 24: Hoare triple {3820#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,728 INFO L290 TraceCheckUtils]: 23: Hoare triple {3820#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3820#false} is VALID [2022-04-27 22:01:12,728 INFO L272 TraceCheckUtils]: 22: Hoare triple {3820#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {3820#false} is VALID [2022-04-27 22:01:12,729 INFO L290 TraceCheckUtils]: 21: Hoare triple {3927#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3820#false} is VALID [2022-04-27 22:01:12,730 INFO L290 TraceCheckUtils]: 20: Hoare triple {3931#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3927#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:12,730 INFO L290 TraceCheckUtils]: 19: Hoare triple {3935#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3931#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:12,731 INFO L290 TraceCheckUtils]: 18: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {3935#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:12,732 INFO L290 TraceCheckUtils]: 17: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:12,732 INFO L290 TraceCheckUtils]: 16: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:12,732 INFO L290 TraceCheckUtils]: 15: Hoare triple {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:12,733 INFO L290 TraceCheckUtils]: 14: Hoare triple {3952#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3939#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:12,734 INFO L290 TraceCheckUtils]: 13: Hoare triple {3956#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3952#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:12,735 INFO L290 TraceCheckUtils]: 12: Hoare triple {3960#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3956#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:12,735 INFO L290 TraceCheckUtils]: 11: Hoare triple {3964#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3960#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 10: Hoare triple {3819#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {3964#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 9: Hoare triple {3819#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 8: Hoare triple {3819#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 7: Hoare triple {3819#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 6: Hoare triple {3819#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 5: Hoare triple {3819#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L272 TraceCheckUtils]: 4: Hoare triple {3819#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3819#true} {3819#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,736 INFO L290 TraceCheckUtils]: 2: Hoare triple {3819#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {3819#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3819#true} is VALID [2022-04-27 22:01:12,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {3819#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3819#true} is VALID [2022-04-27 22:01:12,737 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:01:12,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [484076698] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:12,737 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:12,737 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 23 [2022-04-27 22:01:12,737 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526464253] [2022-04-27 22:01:12,737 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:12,738 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:01:12,738 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:12,738 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:12,767 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:12,767 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 22:01:12,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:12,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 22:01:12,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=407, Unknown=0, NotChecked=0, Total=506 [2022-04-27 22:01:12,768 INFO L87 Difference]: Start difference. First operand 50 states and 57 transitions. Second operand has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:13,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:13,954 INFO L93 Difference]: Finished difference Result 85 states and 97 transitions. [2022-04-27 22:01:13,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-27 22:01:13,955 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:01:13,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:13,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:13,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 68 transitions. [2022-04-27 22:01:13,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:13,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 68 transitions. [2022-04-27 22:01:13,957 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 68 transitions. [2022-04-27 22:01:14,045 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:14,046 INFO L225 Difference]: With dead ends: 85 [2022-04-27 22:01:14,046 INFO L226 Difference]: Without dead ends: 68 [2022-04-27 22:01:14,046 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 413 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=366, Invalid=1614, Unknown=0, NotChecked=0, Total=1980 [2022-04-27 22:01:14,047 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 109 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 88 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 88 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:14,047 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 52 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [88 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:01:14,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2022-04-27 22:01:14,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 43. [2022-04-27 22:01:14,137 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:14,138 INFO L82 GeneralOperation]: Start isEquivalent. First operand 68 states. Second operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:14,138 INFO L74 IsIncluded]: Start isIncluded. First operand 68 states. Second operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:14,138 INFO L87 Difference]: Start difference. First operand 68 states. Second operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:14,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:14,139 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-04-27 22:01:14,139 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 78 transitions. [2022-04-27 22:01:14,140 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:14,140 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:14,140 INFO L74 IsIncluded]: Start isIncluded. First operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-27 22:01:14,140 INFO L87 Difference]: Start difference. First operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 68 states. [2022-04-27 22:01:14,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:14,141 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2022-04-27 22:01:14,141 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 78 transitions. [2022-04-27 22:01:14,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:14,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:14,142 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:14,142 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:14,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 38 states have internal predecessors, (44), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:14,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 48 transitions. [2022-04-27 22:01:14,143 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 48 transitions. Word has length 26 [2022-04-27 22:01:14,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:14,143 INFO L495 AbstractCegarLoop]: Abstraction has 43 states and 48 transitions. [2022-04-27 22:01:14,143 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.6956521739130435) internal successors, (39), 22 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:14,143 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 48 transitions. [2022-04-27 22:01:14,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 22:01:14,144 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:14,144 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:14,163 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-27 22:01:14,355 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 22:01:14,355 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:14,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:14,356 INFO L85 PathProgramCache]: Analyzing trace with hash -1167600349, now seen corresponding path program 10 times [2022-04-27 22:01:14,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:14,356 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830956410] [2022-04-27 22:01:14,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:14,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:14,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:14,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:14,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:14,491 INFO L290 TraceCheckUtils]: 0: Hoare triple {4402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-27 22:01:14,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,491 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,492 INFO L272 TraceCheckUtils]: 0: Hoare triple {4390#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:14,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {4402#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-27 22:01:14,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L272 TraceCheckUtils]: 4: Hoare triple {4390#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L290 TraceCheckUtils]: 5: Hoare triple {4390#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L290 TraceCheckUtils]: 6: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L290 TraceCheckUtils]: 7: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L290 TraceCheckUtils]: 8: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,493 INFO L290 TraceCheckUtils]: 9: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,494 INFO L290 TraceCheckUtils]: 10: Hoare triple {4390#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,494 INFO L290 TraceCheckUtils]: 11: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,495 INFO L290 TraceCheckUtils]: 12: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:14,496 INFO L290 TraceCheckUtils]: 13: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,497 INFO L290 TraceCheckUtils]: 14: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,498 INFO L290 TraceCheckUtils]: 15: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,499 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,500 INFO L290 TraceCheckUtils]: 17: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,501 INFO L290 TraceCheckUtils]: 18: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,502 INFO L290 TraceCheckUtils]: 19: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:14,503 INFO L290 TraceCheckUtils]: 20: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,503 INFO L290 TraceCheckUtils]: 21: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,504 INFO L272 TraceCheckUtils]: 22: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4400#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:01:14,504 INFO L290 TraceCheckUtils]: 23: Hoare triple {4400#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4401#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:01:14,505 INFO L290 TraceCheckUtils]: 24: Hoare triple {4401#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-27 22:01:14,505 INFO L290 TraceCheckUtils]: 25: Hoare triple {4391#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-27 22:01:14,505 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:14,505 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:14,506 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830956410] [2022-04-27 22:01:14,506 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830956410] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:14,506 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1994530166] [2022-04-27 22:01:14,506 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:01:14,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:14,506 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:14,508 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:14,512 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 22:01:14,550 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:01:14,550 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:14,551 INFO L263 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:01:14,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:14,560 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:14,821 INFO L272 TraceCheckUtils]: 0: Hoare triple {4390#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,821 INFO L290 TraceCheckUtils]: 1: Hoare triple {4390#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-27 22:01:14,821 INFO L290 TraceCheckUtils]: 2: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L272 TraceCheckUtils]: 4: Hoare triple {4390#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L290 TraceCheckUtils]: 5: Hoare triple {4390#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L290 TraceCheckUtils]: 6: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L290 TraceCheckUtils]: 7: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L290 TraceCheckUtils]: 8: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,822 INFO L290 TraceCheckUtils]: 9: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:14,823 INFO L290 TraceCheckUtils]: 10: Hoare triple {4390#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,823 INFO L290 TraceCheckUtils]: 11: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,824 INFO L290 TraceCheckUtils]: 12: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:14,825 INFO L290 TraceCheckUtils]: 13: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,826 INFO L290 TraceCheckUtils]: 14: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,827 INFO L290 TraceCheckUtils]: 15: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,828 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,829 INFO L290 TraceCheckUtils]: 17: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,829 INFO L290 TraceCheckUtils]: 18: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:14,830 INFO L290 TraceCheckUtils]: 19: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:14,831 INFO L290 TraceCheckUtils]: 20: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,832 INFO L290 TraceCheckUtils]: 21: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:14,832 INFO L272 TraceCheckUtils]: 22: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:14,833 INFO L290 TraceCheckUtils]: 23: Hoare triple {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4476#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:14,833 INFO L290 TraceCheckUtils]: 24: Hoare triple {4476#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-27 22:01:14,833 INFO L290 TraceCheckUtils]: 25: Hoare triple {4391#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-27 22:01:14,834 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:14,834 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:15,136 INFO L290 TraceCheckUtils]: 25: Hoare triple {4391#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-27 22:01:15,137 INFO L290 TraceCheckUtils]: 24: Hoare triple {4476#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4391#false} is VALID [2022-04-27 22:01:15,137 INFO L290 TraceCheckUtils]: 23: Hoare triple {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4476#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:15,138 INFO L272 TraceCheckUtils]: 22: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4472#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:15,139 INFO L290 TraceCheckUtils]: 21: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:15,140 INFO L290 TraceCheckUtils]: 20: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:15,140 INFO L290 TraceCheckUtils]: 19: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:15,141 INFO L290 TraceCheckUtils]: 18: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:15,142 INFO L290 TraceCheckUtils]: 17: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:15,143 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:15,144 INFO L290 TraceCheckUtils]: 15: Hoare triple {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4399#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:15,144 INFO L290 TraceCheckUtils]: 14: Hoare triple {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4398#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:15,145 INFO L290 TraceCheckUtils]: 13: Hoare triple {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:15,146 INFO L290 TraceCheckUtils]: 12: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4396#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:15,147 INFO L290 TraceCheckUtils]: 11: Hoare triple {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:15,147 INFO L290 TraceCheckUtils]: 10: Hoare triple {4390#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4395#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:15,147 INFO L290 TraceCheckUtils]: 9: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:15,147 INFO L290 TraceCheckUtils]: 8: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:15,147 INFO L290 TraceCheckUtils]: 7: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L290 TraceCheckUtils]: 6: Hoare triple {4390#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L290 TraceCheckUtils]: 5: Hoare triple {4390#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L272 TraceCheckUtils]: 4: Hoare triple {4390#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4390#true} {4390#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L290 TraceCheckUtils]: 2: Hoare triple {4390#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {4390#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L272 TraceCheckUtils]: 0: Hoare triple {4390#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#true} is VALID [2022-04-27 22:01:15,148 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:15,149 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1994530166] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:15,149 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:15,149 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 12 [2022-04-27 22:01:15,149 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2110436634] [2022-04-27 22:01:15,149 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:15,150 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:01:15,150 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:15,150 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,175 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:15,176 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 22:01:15,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:15,176 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 22:01:15,176 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2022-04-27 22:01:15,177 INFO L87 Difference]: Start difference. First operand 43 states and 48 transitions. Second operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:15,655 INFO L93 Difference]: Finished difference Result 59 states and 65 transitions. [2022-04-27 22:01:15,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 22:01:15,655 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:01:15,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:15,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 33 transitions. [2022-04-27 22:01:15,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 33 transitions. [2022-04-27 22:01:15,657 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 33 transitions. [2022-04-27 22:01:15,700 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:15,701 INFO L225 Difference]: With dead ends: 59 [2022-04-27 22:01:15,701 INFO L226 Difference]: Without dead ends: 49 [2022-04-27 22:01:15,701 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 53 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=286, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:01:15,701 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 15 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 61 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:15,702 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 61 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 182 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:01:15,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-27 22:01:15,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 45. [2022-04-27 22:01:15,815 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:15,815 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,815 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,815 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:15,816 INFO L93 Difference]: Finished difference Result 49 states and 54 transitions. [2022-04-27 22:01:15,816 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 54 transitions. [2022-04-27 22:01:15,817 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:15,817 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:15,817 INFO L74 IsIncluded]: Start isIncluded. First operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:01:15,817 INFO L87 Difference]: Start difference. First operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:01:15,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:15,818 INFO L93 Difference]: Finished difference Result 49 states and 54 transitions. [2022-04-27 22:01:15,818 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 54 transitions. [2022-04-27 22:01:15,818 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:15,818 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:15,818 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:15,818 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:15,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 40 states have (on average 1.15) internal successors, (46), 40 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 50 transitions. [2022-04-27 22:01:15,819 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 50 transitions. Word has length 26 [2022-04-27 22:01:15,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:15,819 INFO L495 AbstractCegarLoop]: Abstraction has 45 states and 50 transitions. [2022-04-27 22:01:15,819 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 9 states have internal predecessors, (22), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:15,819 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 50 transitions. [2022-04-27 22:01:15,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:01:15,820 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:15,820 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:15,836 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:16,023 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-27 22:01:16,024 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:16,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:16,024 INFO L85 PathProgramCache]: Analyzing trace with hash 627420638, now seen corresponding path program 11 times [2022-04-27 22:01:16,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:16,024 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094379097] [2022-04-27 22:01:16,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:16,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:16,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:16,192 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:16,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:16,196 INFO L290 TraceCheckUtils]: 0: Hoare triple {4848#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-27 22:01:16,196 INFO L290 TraceCheckUtils]: 1: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,196 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,197 INFO L272 TraceCheckUtils]: 0: Hoare triple {4832#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4848#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:16,197 INFO L290 TraceCheckUtils]: 1: Hoare triple {4848#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-27 22:01:16,197 INFO L290 TraceCheckUtils]: 2: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,197 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,197 INFO L272 TraceCheckUtils]: 4: Hoare triple {4832#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,197 INFO L290 TraceCheckUtils]: 5: Hoare triple {4832#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4837#(= main_~y~0 0)} is VALID [2022-04-27 22:01:16,198 INFO L290 TraceCheckUtils]: 6: Hoare triple {4837#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:16,199 INFO L290 TraceCheckUtils]: 7: Hoare triple {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:16,199 INFO L290 TraceCheckUtils]: 8: Hoare triple {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:16,200 INFO L290 TraceCheckUtils]: 9: Hoare triple {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:16,200 INFO L290 TraceCheckUtils]: 10: Hoare triple {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,201 INFO L290 TraceCheckUtils]: 12: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4843#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:16,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {4843#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4844#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:16,202 INFO L290 TraceCheckUtils]: 14: Hoare triple {4844#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4845#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:16,203 INFO L290 TraceCheckUtils]: 15: Hoare triple {4845#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4846#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:16,203 INFO L290 TraceCheckUtils]: 16: Hoare triple {4846#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4847#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:01:16,204 INFO L290 TraceCheckUtils]: 17: Hoare triple {4847#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,204 INFO L290 TraceCheckUtils]: 18: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,204 INFO L290 TraceCheckUtils]: 19: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,204 INFO L290 TraceCheckUtils]: 20: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,204 INFO L290 TraceCheckUtils]: 21: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,204 INFO L290 TraceCheckUtils]: 22: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,205 INFO L290 TraceCheckUtils]: 23: Hoare triple {4833#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,205 INFO L272 TraceCheckUtils]: 24: Hoare triple {4833#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4833#false} is VALID [2022-04-27 22:01:16,205 INFO L290 TraceCheckUtils]: 25: Hoare triple {4833#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4833#false} is VALID [2022-04-27 22:01:16,205 INFO L290 TraceCheckUtils]: 26: Hoare triple {4833#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,205 INFO L290 TraceCheckUtils]: 27: Hoare triple {4833#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,205 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:16,205 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:16,205 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094379097] [2022-04-27 22:01:16,206 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2094379097] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:16,206 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1569661827] [2022-04-27 22:01:16,206 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:01:16,206 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:16,206 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:16,207 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:16,233 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 22:01:16,344 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:01:16,344 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:16,345 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-27 22:01:16,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:16,353 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:16,590 INFO L272 TraceCheckUtils]: 0: Hoare triple {4832#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {4832#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-27 22:01:16,590 INFO L290 TraceCheckUtils]: 2: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,590 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,591 INFO L272 TraceCheckUtils]: 4: Hoare triple {4832#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {4832#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4837#(= main_~y~0 0)} is VALID [2022-04-27 22:01:16,604 INFO L290 TraceCheckUtils]: 6: Hoare triple {4837#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:16,605 INFO L290 TraceCheckUtils]: 7: Hoare triple {4838#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:16,605 INFO L290 TraceCheckUtils]: 8: Hoare triple {4839#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:16,606 INFO L290 TraceCheckUtils]: 9: Hoare triple {4840#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:16,607 INFO L290 TraceCheckUtils]: 10: Hoare triple {4841#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,607 INFO L290 TraceCheckUtils]: 11: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,608 INFO L290 TraceCheckUtils]: 12: Hoare triple {4842#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4888#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,608 INFO L290 TraceCheckUtils]: 13: Hoare triple {4888#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4892#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:16,609 INFO L290 TraceCheckUtils]: 14: Hoare triple {4892#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4896#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,610 INFO L290 TraceCheckUtils]: 15: Hoare triple {4896#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4900#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,611 INFO L290 TraceCheckUtils]: 16: Hoare triple {4900#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4904#(and (<= 5 main_~y~0) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:16,611 INFO L290 TraceCheckUtils]: 17: Hoare triple {4904#(and (<= 5 main_~y~0) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)) (<= main_~y~0 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,611 INFO L290 TraceCheckUtils]: 18: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,611 INFO L290 TraceCheckUtils]: 19: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 20: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 21: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 22: Hoare triple {4833#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 23: Hoare triple {4833#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L272 TraceCheckUtils]: 24: Hoare triple {4833#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 25: Hoare triple {4833#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 26: Hoare triple {4833#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,612 INFO L290 TraceCheckUtils]: 27: Hoare triple {4833#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,613 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:16,613 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:16,919 INFO L290 TraceCheckUtils]: 27: Hoare triple {4833#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,919 INFO L290 TraceCheckUtils]: 26: Hoare triple {4833#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,919 INFO L290 TraceCheckUtils]: 25: Hoare triple {4833#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4833#false} is VALID [2022-04-27 22:01:16,919 INFO L272 TraceCheckUtils]: 24: Hoare triple {4833#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {4833#false} is VALID [2022-04-27 22:01:16,919 INFO L290 TraceCheckUtils]: 23: Hoare triple {4833#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4833#false} is VALID [2022-04-27 22:01:16,920 INFO L290 TraceCheckUtils]: 22: Hoare triple {4953#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4833#false} is VALID [2022-04-27 22:01:16,920 INFO L290 TraceCheckUtils]: 21: Hoare triple {4957#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4953#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:16,921 INFO L290 TraceCheckUtils]: 20: Hoare triple {4961#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4957#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:16,922 INFO L290 TraceCheckUtils]: 19: Hoare triple {4965#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4961#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:16,922 INFO L290 TraceCheckUtils]: 18: Hoare triple {4969#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {4965#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:16,923 INFO L290 TraceCheckUtils]: 17: Hoare triple {4973#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {4969#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:16,923 INFO L290 TraceCheckUtils]: 16: Hoare triple {4977#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4973#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:16,924 INFO L290 TraceCheckUtils]: 15: Hoare triple {4981#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4977#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:16,925 INFO L290 TraceCheckUtils]: 14: Hoare triple {4985#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4981#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:16,926 INFO L290 TraceCheckUtils]: 13: Hoare triple {4989#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4985#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:16,926 INFO L290 TraceCheckUtils]: 12: Hoare triple {4832#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {4989#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:16,926 INFO L290 TraceCheckUtils]: 11: Hoare triple {4832#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,926 INFO L290 TraceCheckUtils]: 10: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-27 22:01:16,926 INFO L290 TraceCheckUtils]: 9: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-27 22:01:16,926 INFO L290 TraceCheckUtils]: 8: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L290 TraceCheckUtils]: 7: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L290 TraceCheckUtils]: 6: Hoare triple {4832#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L290 TraceCheckUtils]: 5: Hoare triple {4832#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L272 TraceCheckUtils]: 4: Hoare triple {4832#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4832#true} {4832#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L290 TraceCheckUtils]: 2: Hoare triple {4832#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L290 TraceCheckUtils]: 1: Hoare triple {4832#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L272 TraceCheckUtils]: 0: Hoare triple {4832#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4832#true} is VALID [2022-04-27 22:01:16,927 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:16,928 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1569661827] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:16,928 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:16,928 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 12] total 29 [2022-04-27 22:01:16,928 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390245465] [2022-04-27 22:01:16,928 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:16,929 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:01:16,929 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:16,929 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:16,968 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:16,968 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-04-27 22:01:16,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:16,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-04-27 22:01:16,969 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=685, Unknown=0, NotChecked=0, Total=812 [2022-04-27 22:01:16,969 INFO L87 Difference]: Start difference. First operand 45 states and 50 transitions. Second operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:19,035 INFO L93 Difference]: Finished difference Result 80 states and 95 transitions. [2022-04-27 22:01:19,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-04-27 22:01:19,035 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:01:19,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:19,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 78 transitions. [2022-04-27 22:01:19,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 78 transitions. [2022-04-27 22:01:19,039 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 34 states and 78 transitions. [2022-04-27 22:01:19,112 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:19,113 INFO L225 Difference]: With dead ends: 80 [2022-04-27 22:01:19,113 INFO L226 Difference]: Without dead ends: 64 [2022-04-27 22:01:19,114 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 731 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=473, Invalid=3067, Unknown=0, NotChecked=0, Total=3540 [2022-04-27 22:01:19,114 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 38 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 517 mSolverCounterSat, 83 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 90 SdHoareTripleChecker+Invalid, 600 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 83 IncrementalHoareTripleChecker+Valid, 517 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:19,114 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [38 Valid, 90 Invalid, 600 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [83 Valid, 517 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:01:19,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-04-27 22:01:19,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 58. [2022-04-27 22:01:19,280 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:19,281 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,281 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,281 INFO L87 Difference]: Start difference. First operand 64 states. Second operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:19,282 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2022-04-27 22:01:19,282 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2022-04-27 22:01:19,282 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:19,282 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:19,283 INFO L74 IsIncluded]: Start isIncluded. First operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-27 22:01:19,283 INFO L87 Difference]: Start difference. First operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-27 22:01:19,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:19,284 INFO L93 Difference]: Finished difference Result 64 states and 71 transitions. [2022-04-27 22:01:19,284 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 71 transitions. [2022-04-27 22:01:19,284 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:19,284 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:19,284 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:19,284 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:19,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 53 states have (on average 1.150943396226415) internal successors, (61), 53 states have internal predecessors, (61), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 65 transitions. [2022-04-27 22:01:19,286 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 65 transitions. Word has length 28 [2022-04-27 22:01:19,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:19,286 INFO L495 AbstractCegarLoop]: Abstraction has 58 states and 65 transitions. [2022-04-27 22:01:19,286 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 1.4137931034482758) internal successors, (41), 28 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:19,286 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 65 transitions. [2022-04-27 22:01:19,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 22:01:19,286 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:19,286 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:19,296 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:19,491 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 22:01:19,491 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:19,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:19,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1023844786, now seen corresponding path program 12 times [2022-04-27 22:01:19,492 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:19,492 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263517263] [2022-04-27 22:01:19,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:19,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:19,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:19,624 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:19,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:19,628 INFO L290 TraceCheckUtils]: 0: Hoare triple {5459#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L272 TraceCheckUtils]: 0: Hoare triple {5446#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5459#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:19,629 INFO L290 TraceCheckUtils]: 1: Hoare triple {5459#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L290 TraceCheckUtils]: 2: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L272 TraceCheckUtils]: 4: Hoare triple {5446#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,629 INFO L290 TraceCheckUtils]: 5: Hoare triple {5446#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5446#true} is VALID [2022-04-27 22:01:19,630 INFO L290 TraceCheckUtils]: 6: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,630 INFO L290 TraceCheckUtils]: 7: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,630 INFO L290 TraceCheckUtils]: 8: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,630 INFO L290 TraceCheckUtils]: 9: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,630 INFO L290 TraceCheckUtils]: 10: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,630 INFO L290 TraceCheckUtils]: 11: Hoare triple {5446#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,631 INFO L290 TraceCheckUtils]: 12: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,631 INFO L290 TraceCheckUtils]: 13: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:19,632 INFO L290 TraceCheckUtils]: 14: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,633 INFO L290 TraceCheckUtils]: 15: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,633 INFO L290 TraceCheckUtils]: 16: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,634 INFO L290 TraceCheckUtils]: 17: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:19,634 INFO L290 TraceCheckUtils]: 18: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:19,635 INFO L290 TraceCheckUtils]: 19: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,636 INFO L290 TraceCheckUtils]: 20: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,637 INFO L290 TraceCheckUtils]: 21: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,637 INFO L290 TraceCheckUtils]: 22: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:19,638 INFO L290 TraceCheckUtils]: 23: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,638 INFO L290 TraceCheckUtils]: 24: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,639 INFO L272 TraceCheckUtils]: 25: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {5457#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:01:19,639 INFO L290 TraceCheckUtils]: 26: Hoare triple {5457#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5458#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:01:19,639 INFO L290 TraceCheckUtils]: 27: Hoare triple {5458#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-27 22:01:19,640 INFO L290 TraceCheckUtils]: 28: Hoare triple {5447#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-27 22:01:19,640 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:19,640 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:19,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263517263] [2022-04-27 22:01:19,640 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263517263] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:19,640 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1571289704] [2022-04-27 22:01:19,640 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:01:19,640 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:19,640 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:19,641 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:19,642 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 22:01:19,679 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-27 22:01:19,679 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:19,680 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 22:01:19,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:19,692 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:19,932 INFO L272 TraceCheckUtils]: 0: Hoare triple {5446#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 1: Hoare triple {5446#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 2: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L272 TraceCheckUtils]: 4: Hoare triple {5446#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 5: Hoare triple {5446#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 6: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 7: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 8: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,932 INFO L290 TraceCheckUtils]: 9: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,933 INFO L290 TraceCheckUtils]: 10: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:19,933 INFO L290 TraceCheckUtils]: 11: Hoare triple {5446#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,933 INFO L290 TraceCheckUtils]: 12: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,934 INFO L290 TraceCheckUtils]: 13: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:19,935 INFO L290 TraceCheckUtils]: 14: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,936 INFO L290 TraceCheckUtils]: 15: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,937 INFO L290 TraceCheckUtils]: 16: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,938 INFO L290 TraceCheckUtils]: 17: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:19,939 INFO L290 TraceCheckUtils]: 18: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:19,940 INFO L290 TraceCheckUtils]: 19: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,940 INFO L290 TraceCheckUtils]: 20: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,941 INFO L290 TraceCheckUtils]: 21: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:19,942 INFO L290 TraceCheckUtils]: 22: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:19,943 INFO L290 TraceCheckUtils]: 23: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,944 INFO L290 TraceCheckUtils]: 24: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:19,945 INFO L272 TraceCheckUtils]: 25: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:19,945 INFO L290 TraceCheckUtils]: 26: Hoare triple {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5542#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:19,945 INFO L290 TraceCheckUtils]: 27: Hoare triple {5542#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-27 22:01:19,946 INFO L290 TraceCheckUtils]: 28: Hoare triple {5447#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-27 22:01:19,946 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:19,946 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:20,268 INFO L290 TraceCheckUtils]: 28: Hoare triple {5447#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-27 22:01:20,269 INFO L290 TraceCheckUtils]: 27: Hoare triple {5542#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {5447#false} is VALID [2022-04-27 22:01:20,269 INFO L290 TraceCheckUtils]: 26: Hoare triple {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5542#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:20,270 INFO L272 TraceCheckUtils]: 25: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {5538#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:20,271 INFO L290 TraceCheckUtils]: 24: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:20,272 INFO L290 TraceCheckUtils]: 23: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:20,273 INFO L290 TraceCheckUtils]: 22: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:20,274 INFO L290 TraceCheckUtils]: 21: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:20,275 INFO L290 TraceCheckUtils]: 20: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:20,275 INFO L290 TraceCheckUtils]: 19: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:20,276 INFO L290 TraceCheckUtils]: 18: Hoare triple {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:20,277 INFO L290 TraceCheckUtils]: 17: Hoare triple {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5456#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:20,278 INFO L290 TraceCheckUtils]: 16: Hoare triple {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5455#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:20,279 INFO L290 TraceCheckUtils]: 15: Hoare triple {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5454#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:20,280 INFO L290 TraceCheckUtils]: 14: Hoare triple {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5453#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:20,280 INFO L290 TraceCheckUtils]: 13: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5452#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:20,281 INFO L290 TraceCheckUtils]: 12: Hoare triple {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:20,281 INFO L290 TraceCheckUtils]: 11: Hoare triple {5446#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5451#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:20,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 9: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 8: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 7: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 6: Hoare triple {5446#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 5: Hoare triple {5446#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L272 TraceCheckUtils]: 4: Hoare triple {5446#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5446#true} {5446#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 2: Hoare triple {5446#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L290 TraceCheckUtils]: 1: Hoare triple {5446#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5446#true} is VALID [2022-04-27 22:01:20,282 INFO L272 TraceCheckUtils]: 0: Hoare triple {5446#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5446#true} is VALID [2022-04-27 22:01:20,283 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:20,283 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1571289704] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:20,283 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:20,283 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 13 [2022-04-27 22:01:20,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2103913814] [2022-04-27 22:01:20,283 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:20,284 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:01:20,284 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:20,284 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:20,311 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 30 edges. 30 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:20,311 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:01:20,311 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:20,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:01:20,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:01:20,312 INFO L87 Difference]: Start difference. First operand 58 states and 65 transitions. Second operand has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:21,011 INFO L93 Difference]: Finished difference Result 77 states and 86 transitions. [2022-04-27 22:01:21,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 22:01:21,011 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:01:21,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:21,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 37 transitions. [2022-04-27 22:01:21,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 37 transitions. [2022-04-27 22:01:21,013 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 37 transitions. [2022-04-27 22:01:21,046 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 37 edges. 37 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:21,047 INFO L225 Difference]: With dead ends: 77 [2022-04-27 22:01:21,047 INFO L226 Difference]: Without dead ends: 66 [2022-04-27 22:01:21,047 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 60 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=358, Unknown=0, NotChecked=0, Total=420 [2022-04-27 22:01:21,048 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 17 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 214 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 226 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 214 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:21,048 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 63 Invalid, 226 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 214 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:01:21,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2022-04-27 22:01:21,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 64. [2022-04-27 22:01:21,239 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:21,239 INFO L82 GeneralOperation]: Start isEquivalent. First operand 66 states. Second operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,239 INFO L74 IsIncluded]: Start isIncluded. First operand 66 states. Second operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,239 INFO L87 Difference]: Start difference. First operand 66 states. Second operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:21,244 INFO L93 Difference]: Finished difference Result 66 states and 74 transitions. [2022-04-27 22:01:21,244 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2022-04-27 22:01:21,245 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:21,245 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:21,245 INFO L74 IsIncluded]: Start isIncluded. First operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 66 states. [2022-04-27 22:01:21,245 INFO L87 Difference]: Start difference. First operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 66 states. [2022-04-27 22:01:21,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:21,246 INFO L93 Difference]: Finished difference Result 66 states and 74 transitions. [2022-04-27 22:01:21,246 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2022-04-27 22:01:21,247 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:21,247 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:21,247 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:21,247 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:21,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 59 states have (on average 1.152542372881356) internal successors, (68), 59 states have internal predecessors, (68), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 72 transitions. [2022-04-27 22:01:21,248 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 72 transitions. Word has length 29 [2022-04-27 22:01:21,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:21,249 INFO L495 AbstractCegarLoop]: Abstraction has 64 states and 72 transitions. [2022-04-27 22:01:21,249 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 1.8461538461538463) internal successors, (24), 10 states have internal predecessors, (24), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:21,249 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 72 transitions. [2022-04-27 22:01:21,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-04-27 22:01:21,249 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:21,249 INFO L195 NwaCegarLoop]: trace histogram [6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:21,276 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:21,473 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:21,473 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:21,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:21,474 INFO L85 PathProgramCache]: Analyzing trace with hash 2135825527, now seen corresponding path program 13 times [2022-04-27 22:01:21,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:21,474 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158517849] [2022-04-27 22:01:21,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:21,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:21,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:21,672 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:21,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:21,675 INFO L290 TraceCheckUtils]: 0: Hoare triple {6025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-27 22:01:21,675 INFO L290 TraceCheckUtils]: 1: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:21,676 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:21,676 INFO L272 TraceCheckUtils]: 0: Hoare triple {6007#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:21,676 INFO L290 TraceCheckUtils]: 1: Hoare triple {6025#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-27 22:01:21,676 INFO L290 TraceCheckUtils]: 2: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:21,676 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:21,676 INFO L272 TraceCheckUtils]: 4: Hoare triple {6007#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:21,677 INFO L290 TraceCheckUtils]: 5: Hoare triple {6007#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6012#(= main_~y~0 0)} is VALID [2022-04-27 22:01:21,677 INFO L290 TraceCheckUtils]: 6: Hoare triple {6012#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:21,678 INFO L290 TraceCheckUtils]: 7: Hoare triple {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:21,678 INFO L290 TraceCheckUtils]: 8: Hoare triple {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:21,679 INFO L290 TraceCheckUtils]: 9: Hoare triple {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:21,679 INFO L290 TraceCheckUtils]: 10: Hoare triple {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:21,680 INFO L290 TraceCheckUtils]: 11: Hoare triple {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:21,680 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:21,680 INFO L290 TraceCheckUtils]: 13: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:01:21,681 INFO L290 TraceCheckUtils]: 14: Hoare triple {6019#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6020#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:21,681 INFO L290 TraceCheckUtils]: 15: Hoare triple {6020#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6021#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:21,682 INFO L290 TraceCheckUtils]: 16: Hoare triple {6021#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6022#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:21,682 INFO L290 TraceCheckUtils]: 17: Hoare triple {6022#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6023#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:21,683 INFO L290 TraceCheckUtils]: 18: Hoare triple {6023#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6024#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:01:21,683 INFO L290 TraceCheckUtils]: 19: Hoare triple {6024#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 20: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 21: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 22: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 23: Hoare triple {6008#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 24: Hoare triple {6008#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L272 TraceCheckUtils]: 25: Hoare triple {6008#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 26: Hoare triple {6008#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 27: Hoare triple {6008#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:21,684 INFO L290 TraceCheckUtils]: 28: Hoare triple {6008#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:21,685 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:01:21,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:21,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158517849] [2022-04-27 22:01:21,685 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [158517849] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:21,685 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1637550586] [2022-04-27 22:01:21,685 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:01:21,685 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:21,686 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:21,688 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:21,689 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 22:01:21,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:21,725 INFO L263 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-27 22:01:21,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:21,733 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:22,122 INFO L272 TraceCheckUtils]: 0: Hoare triple {6007#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {6007#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-27 22:01:22,122 INFO L290 TraceCheckUtils]: 2: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,123 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,123 INFO L272 TraceCheckUtils]: 4: Hoare triple {6007#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,123 INFO L290 TraceCheckUtils]: 5: Hoare triple {6007#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6012#(= main_~y~0 0)} is VALID [2022-04-27 22:01:22,124 INFO L290 TraceCheckUtils]: 6: Hoare triple {6012#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:22,124 INFO L290 TraceCheckUtils]: 7: Hoare triple {6013#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:22,125 INFO L290 TraceCheckUtils]: 8: Hoare triple {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:22,125 INFO L290 TraceCheckUtils]: 9: Hoare triple {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:22,126 INFO L290 TraceCheckUtils]: 10: Hoare triple {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:22,126 INFO L290 TraceCheckUtils]: 11: Hoare triple {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,127 INFO L290 TraceCheckUtils]: 12: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,127 INFO L290 TraceCheckUtils]: 13: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6068#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,127 INFO L290 TraceCheckUtils]: 14: Hoare triple {6068#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6072#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:22,128 INFO L290 TraceCheckUtils]: 15: Hoare triple {6072#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6076#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,129 INFO L290 TraceCheckUtils]: 16: Hoare triple {6076#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6080#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} is VALID [2022-04-27 22:01:22,129 INFO L290 TraceCheckUtils]: 17: Hoare triple {6080#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6084#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,131 INFO L290 TraceCheckUtils]: 18: Hoare triple {6084#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,132 INFO L290 TraceCheckUtils]: 19: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:22,133 INFO L290 TraceCheckUtils]: 20: Hoare triple {6018#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:22,133 INFO L290 TraceCheckUtils]: 21: Hoare triple {6017#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:22,134 INFO L290 TraceCheckUtils]: 22: Hoare triple {6016#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:22,135 INFO L290 TraceCheckUtils]: 23: Hoare triple {6015#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:22,135 INFO L290 TraceCheckUtils]: 24: Hoare triple {6014#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:22,135 INFO L272 TraceCheckUtils]: 25: Hoare triple {6008#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6008#false} is VALID [2022-04-27 22:01:22,136 INFO L290 TraceCheckUtils]: 26: Hoare triple {6008#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6008#false} is VALID [2022-04-27 22:01:22,136 INFO L290 TraceCheckUtils]: 27: Hoare triple {6008#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:22,136 INFO L290 TraceCheckUtils]: 28: Hoare triple {6008#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:22,136 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 0 proven. 46 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:01:22,136 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:22,423 INFO L290 TraceCheckUtils]: 28: Hoare triple {6008#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:22,423 INFO L290 TraceCheckUtils]: 27: Hoare triple {6008#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:22,423 INFO L290 TraceCheckUtils]: 26: Hoare triple {6008#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6008#false} is VALID [2022-04-27 22:01:22,423 INFO L272 TraceCheckUtils]: 25: Hoare triple {6008#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6008#false} is VALID [2022-04-27 22:01:22,423 INFO L290 TraceCheckUtils]: 24: Hoare triple {6130#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6008#false} is VALID [2022-04-27 22:01:22,424 INFO L290 TraceCheckUtils]: 23: Hoare triple {6134#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6130#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:22,425 INFO L290 TraceCheckUtils]: 22: Hoare triple {6138#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6134#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:22,426 INFO L290 TraceCheckUtils]: 21: Hoare triple {6142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6138#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:22,427 INFO L290 TraceCheckUtils]: 20: Hoare triple {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6142#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:22,427 INFO L290 TraceCheckUtils]: 19: Hoare triple {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:22,427 INFO L290 TraceCheckUtils]: 18: Hoare triple {6153#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6146#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:22,429 INFO L290 TraceCheckUtils]: 17: Hoare triple {6157#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6153#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:22,429 INFO L290 TraceCheckUtils]: 16: Hoare triple {6161#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6157#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:22,430 INFO L290 TraceCheckUtils]: 15: Hoare triple {6165#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6161#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:22,431 INFO L290 TraceCheckUtils]: 14: Hoare triple {6169#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6165#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:22,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {6007#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6169#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:22,431 INFO L290 TraceCheckUtils]: 12: Hoare triple {6007#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,431 INFO L290 TraceCheckUtils]: 11: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 10: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 9: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 8: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 7: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 6: Hoare triple {6007#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 5: Hoare triple {6007#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L272 TraceCheckUtils]: 4: Hoare triple {6007#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6007#true} {6007#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 2: Hoare triple {6007#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L290 TraceCheckUtils]: 1: Hoare triple {6007#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6007#true} is VALID [2022-04-27 22:01:22,432 INFO L272 TraceCheckUtils]: 0: Hoare triple {6007#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6007#true} is VALID [2022-04-27 22:01:22,433 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:22,433 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1637550586] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:22,433 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:22,433 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 12] total 31 [2022-04-27 22:01:22,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [616238218] [2022-04-27 22:01:22,433 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:22,433 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:01:22,434 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:22,434 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:22,472 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:22,472 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-27 22:01:22,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:22,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-27 22:01:22,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=733, Unknown=0, NotChecked=0, Total=930 [2022-04-27 22:01:22,473 INFO L87 Difference]: Start difference. First operand 64 states and 72 transitions. Second operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:25,071 INFO L93 Difference]: Finished difference Result 163 states and 192 transitions. [2022-04-27 22:01:25,071 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-27 22:01:25,072 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 29 [2022-04-27 22:01:25,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:25,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 114 transitions. [2022-04-27 22:01:25,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 114 transitions. [2022-04-27 22:01:25,078 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 114 transitions. [2022-04-27 22:01:25,235 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 114 edges. 114 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:25,237 INFO L225 Difference]: With dead ends: 163 [2022-04-27 22:01:25,237 INFO L226 Difference]: Without dead ends: 136 [2022-04-27 22:01:25,239 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 56 SyntacticMatches, 1 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1501 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1121, Invalid=4281, Unknown=0, NotChecked=0, Total=5402 [2022-04-27 22:01:25,239 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 157 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 490 mSolverCounterSat, 152 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 642 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 152 IncrementalHoareTripleChecker+Valid, 490 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:25,239 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 82 Invalid, 642 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [152 Valid, 490 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 22:01:25,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-04-27 22:01:25,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 61. [2022-04-27 22:01:25,413 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:25,413 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,413 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,414 INFO L87 Difference]: Start difference. First operand 136 states. Second operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:25,416 INFO L93 Difference]: Finished difference Result 136 states and 156 transitions. [2022-04-27 22:01:25,416 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 156 transitions. [2022-04-27 22:01:25,416 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:25,417 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:25,417 INFO L74 IsIncluded]: Start isIncluded. First operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-27 22:01:25,417 INFO L87 Difference]: Start difference. First operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-27 22:01:25,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:25,419 INFO L93 Difference]: Finished difference Result 136 states and 156 transitions. [2022-04-27 22:01:25,420 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 156 transitions. [2022-04-27 22:01:25,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:25,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:25,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:25,420 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:25,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.1428571428571428) internal successors, (64), 56 states have internal predecessors, (64), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 68 transitions. [2022-04-27 22:01:25,421 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 68 transitions. Word has length 29 [2022-04-27 22:01:25,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:25,422 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 68 transitions. [2022-04-27 22:01:25,422 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 30 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:25,422 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 68 transitions. [2022-04-27 22:01:25,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:01:25,422 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:25,422 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:25,455 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:25,635 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:25,635 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:25,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:25,636 INFO L85 PathProgramCache]: Analyzing trace with hash -1608168445, now seen corresponding path program 14 times [2022-04-27 22:01:25,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:25,636 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715366938] [2022-04-27 22:01:25,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:25,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:25,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:25,826 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:25,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:25,832 INFO L290 TraceCheckUtils]: 0: Hoare triple {6950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-27 22:01:25,833 INFO L290 TraceCheckUtils]: 1: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:25,833 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:25,833 INFO L272 TraceCheckUtils]: 0: Hoare triple {6936#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 1: Hoare triple {6950#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 2: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L272 TraceCheckUtils]: 4: Hoare triple {6936#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 5: Hoare triple {6936#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 6: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 9: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 10: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:25,834 INFO L290 TraceCheckUtils]: 11: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:25,835 INFO L290 TraceCheckUtils]: 12: Hoare triple {6936#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:25,835 INFO L290 TraceCheckUtils]: 13: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:25,836 INFO L290 TraceCheckUtils]: 14: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:25,837 INFO L290 TraceCheckUtils]: 15: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,838 INFO L290 TraceCheckUtils]: 16: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,838 INFO L290 TraceCheckUtils]: 17: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,839 INFO L290 TraceCheckUtils]: 18: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:25,840 INFO L290 TraceCheckUtils]: 19: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,840 INFO L290 TraceCheckUtils]: 20: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,841 INFO L290 TraceCheckUtils]: 21: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:25,841 INFO L290 TraceCheckUtils]: 22: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,842 INFO L290 TraceCheckUtils]: 23: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,843 INFO L290 TraceCheckUtils]: 24: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:25,844 INFO L290 TraceCheckUtils]: 25: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:25,844 INFO L290 TraceCheckUtils]: 26: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:25,845 INFO L290 TraceCheckUtils]: 27: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:25,845 INFO L272 TraceCheckUtils]: 28: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {6948#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:01:25,846 INFO L290 TraceCheckUtils]: 29: Hoare triple {6948#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6949#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:01:25,846 INFO L290 TraceCheckUtils]: 30: Hoare triple {6949#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-27 22:01:25,846 INFO L290 TraceCheckUtils]: 31: Hoare triple {6937#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-27 22:01:25,846 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:25,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:25,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715366938] [2022-04-27 22:01:25,847 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [715366938] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:25,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1938314653] [2022-04-27 22:01:25,847 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:01:25,847 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:25,847 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:25,856 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:25,857 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 22:01:25,901 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:01:25,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:25,902 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-27 22:01:25,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:25,913 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:26,160 INFO L272 TraceCheckUtils]: 0: Hoare triple {6936#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 1: Hoare triple {6936#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 2: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L272 TraceCheckUtils]: 4: Hoare triple {6936#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 5: Hoare triple {6936#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 6: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 7: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 8: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,161 INFO L290 TraceCheckUtils]: 9: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,162 INFO L290 TraceCheckUtils]: 10: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,162 INFO L290 TraceCheckUtils]: 11: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,162 INFO L290 TraceCheckUtils]: 12: Hoare triple {6936#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,162 INFO L290 TraceCheckUtils]: 13: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,163 INFO L290 TraceCheckUtils]: 14: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:26,164 INFO L290 TraceCheckUtils]: 15: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,165 INFO L290 TraceCheckUtils]: 16: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,165 INFO L290 TraceCheckUtils]: 17: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,166 INFO L290 TraceCheckUtils]: 18: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:26,167 INFO L290 TraceCheckUtils]: 19: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,167 INFO L290 TraceCheckUtils]: 20: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,168 INFO L290 TraceCheckUtils]: 21: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:26,168 INFO L290 TraceCheckUtils]: 22: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,169 INFO L290 TraceCheckUtils]: 23: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,170 INFO L290 TraceCheckUtils]: 24: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,171 INFO L290 TraceCheckUtils]: 25: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:26,171 INFO L290 TraceCheckUtils]: 26: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,172 INFO L290 TraceCheckUtils]: 27: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,172 INFO L272 TraceCheckUtils]: 28: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:26,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7042#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:26,173 INFO L290 TraceCheckUtils]: 30: Hoare triple {7042#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-27 22:01:26,173 INFO L290 TraceCheckUtils]: 31: Hoare triple {6937#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-27 22:01:26,173 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:26,173 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:26,458 INFO L290 TraceCheckUtils]: 31: Hoare triple {6937#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-27 22:01:26,458 INFO L290 TraceCheckUtils]: 30: Hoare triple {7042#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {6937#false} is VALID [2022-04-27 22:01:26,459 INFO L290 TraceCheckUtils]: 29: Hoare triple {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7042#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:26,459 INFO L272 TraceCheckUtils]: 28: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7038#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:26,460 INFO L290 TraceCheckUtils]: 27: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,460 INFO L290 TraceCheckUtils]: 26: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,461 INFO L290 TraceCheckUtils]: 25: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:26,462 INFO L290 TraceCheckUtils]: 24: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,463 INFO L290 TraceCheckUtils]: 23: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,463 INFO L290 TraceCheckUtils]: 22: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,464 INFO L290 TraceCheckUtils]: 21: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:26,464 INFO L290 TraceCheckUtils]: 20: Hoare triple {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,465 INFO L290 TraceCheckUtils]: 19: Hoare triple {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6947#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,466 INFO L290 TraceCheckUtils]: 18: Hoare triple {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6946#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:26,466 INFO L290 TraceCheckUtils]: 17: Hoare triple {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6945#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,467 INFO L290 TraceCheckUtils]: 16: Hoare triple {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6944#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,468 INFO L290 TraceCheckUtils]: 15: Hoare triple {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6943#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:26,469 INFO L290 TraceCheckUtils]: 14: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6942#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:26,469 INFO L290 TraceCheckUtils]: 13: Hoare triple {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,469 INFO L290 TraceCheckUtils]: 12: Hoare triple {6936#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6941#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:26,469 INFO L290 TraceCheckUtils]: 11: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,469 INFO L290 TraceCheckUtils]: 10: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 9: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 8: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 7: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 6: Hoare triple {6936#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 5: Hoare triple {6936#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L272 TraceCheckUtils]: 4: Hoare triple {6936#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6936#true} {6936#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 2: Hoare triple {6936#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L290 TraceCheckUtils]: 1: Hoare triple {6936#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L272 TraceCheckUtils]: 0: Hoare triple {6936#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6936#true} is VALID [2022-04-27 22:01:26,470 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:26,471 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1938314653] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:26,471 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:26,471 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 14 [2022-04-27 22:01:26,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619135373] [2022-04-27 22:01:26,471 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:26,471 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:01:26,472 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:26,472 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:26,498 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:26,498 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 22:01:26,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:26,498 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 22:01:26,498 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=155, Unknown=0, NotChecked=0, Total=182 [2022-04-27 22:01:26,499 INFO L87 Difference]: Start difference. First operand 61 states and 68 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:27,261 INFO L93 Difference]: Finished difference Result 88 states and 98 transitions. [2022-04-27 22:01:27,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 22:01:27,262 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:01:27,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:27,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-27 22:01:27,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 40 transitions. [2022-04-27 22:01:27,263 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 40 transitions. [2022-04-27 22:01:27,301 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:27,302 INFO L225 Difference]: With dead ends: 88 [2022-04-27 22:01:27,302 INFO L226 Difference]: Without dead ends: 76 [2022-04-27 22:01:27,302 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 67 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=438, Unknown=0, NotChecked=0, Total=506 [2022-04-27 22:01:27,302 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 19 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 242 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 254 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 242 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:27,303 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 64 Invalid, 254 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 242 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:01:27,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-04-27 22:01:27,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 69. [2022-04-27 22:01:27,490 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:27,490 INFO L82 GeneralOperation]: Start isEquivalent. First operand 76 states. Second operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,491 INFO L74 IsIncluded]: Start isIncluded. First operand 76 states. Second operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,491 INFO L87 Difference]: Start difference. First operand 76 states. Second operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:27,492 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2022-04-27 22:01:27,492 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 85 transitions. [2022-04-27 22:01:27,493 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:27,493 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:27,493 INFO L74 IsIncluded]: Start isIncluded. First operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 76 states. [2022-04-27 22:01:27,493 INFO L87 Difference]: Start difference. First operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 76 states. [2022-04-27 22:01:27,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:27,494 INFO L93 Difference]: Finished difference Result 76 states and 85 transitions. [2022-04-27 22:01:27,494 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 85 transitions. [2022-04-27 22:01:27,495 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:27,495 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:27,495 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:27,495 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:27,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 64 states have (on average 1.15625) internal successors, (74), 64 states have internal predecessors, (74), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 78 transitions. [2022-04-27 22:01:27,498 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 78 transitions. Word has length 32 [2022-04-27 22:01:27,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:27,500 INFO L495 AbstractCegarLoop]: Abstraction has 69 states and 78 transitions. [2022-04-27 22:01:27,500 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:27,500 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 78 transitions. [2022-04-27 22:01:27,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:01:27,501 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:27,501 INFO L195 NwaCegarLoop]: trace histogram [7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:27,525 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2022-04-27 22:01:27,709 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:27,709 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:27,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:27,709 INFO L85 PathProgramCache]: Analyzing trace with hash -1631799165, now seen corresponding path program 15 times [2022-04-27 22:01:27,709 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:27,710 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793615444] [2022-04-27 22:01:27,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:27,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:27,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:27,949 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:27,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:27,953 INFO L290 TraceCheckUtils]: 0: Hoare triple {7575#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-27 22:01:27,953 INFO L290 TraceCheckUtils]: 1: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:27,953 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:27,953 INFO L272 TraceCheckUtils]: 0: Hoare triple {7556#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7575#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:27,954 INFO L290 TraceCheckUtils]: 1: Hoare triple {7575#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-27 22:01:27,954 INFO L290 TraceCheckUtils]: 2: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:27,954 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:27,954 INFO L272 TraceCheckUtils]: 4: Hoare triple {7556#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:27,954 INFO L290 TraceCheckUtils]: 5: Hoare triple {7556#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7561#(= main_~y~0 0)} is VALID [2022-04-27 22:01:27,954 INFO L290 TraceCheckUtils]: 6: Hoare triple {7561#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7562#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:27,955 INFO L290 TraceCheckUtils]: 7: Hoare triple {7562#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7563#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:27,956 INFO L290 TraceCheckUtils]: 8: Hoare triple {7563#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7564#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:27,956 INFO L290 TraceCheckUtils]: 9: Hoare triple {7564#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7565#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:27,957 INFO L290 TraceCheckUtils]: 10: Hoare triple {7565#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7566#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:27,957 INFO L290 TraceCheckUtils]: 11: Hoare triple {7566#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7567#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:27,958 INFO L290 TraceCheckUtils]: 12: Hoare triple {7567#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:27,958 INFO L290 TraceCheckUtils]: 13: Hoare triple {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:27,958 INFO L290 TraceCheckUtils]: 14: Hoare triple {7568#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {7569#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:01:27,959 INFO L290 TraceCheckUtils]: 15: Hoare triple {7569#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7570#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:01:27,959 INFO L290 TraceCheckUtils]: 16: Hoare triple {7570#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:27,960 INFO L290 TraceCheckUtils]: 17: Hoare triple {7571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7572#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:27,961 INFO L290 TraceCheckUtils]: 18: Hoare triple {7572#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7573#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:27,961 INFO L290 TraceCheckUtils]: 19: Hoare triple {7573#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7574#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:27,961 INFO L290 TraceCheckUtils]: 20: Hoare triple {7574#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 21: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 22: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 23: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 24: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 25: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 26: Hoare triple {7557#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 27: Hoare triple {7557#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L272 TraceCheckUtils]: 28: Hoare triple {7557#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 29: Hoare triple {7557#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 30: Hoare triple {7557#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:27,962 INFO L290 TraceCheckUtils]: 31: Hoare triple {7557#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:27,963 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:27,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:27,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793615444] [2022-04-27 22:01:27,963 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1793615444] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:27,963 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [666306956] [2022-04-27 22:01:27,963 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:01:27,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:27,963 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:27,964 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:27,965 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 22:01:28,029 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-27 22:01:28,029 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:28,030 INFO L263 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 22:01:28,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:28,040 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:28,334 INFO L272 TraceCheckUtils]: 0: Hoare triple {7556#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L290 TraceCheckUtils]: 1: Hoare triple {7556#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L290 TraceCheckUtils]: 2: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L272 TraceCheckUtils]: 4: Hoare triple {7556#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L290 TraceCheckUtils]: 5: Hoare triple {7556#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L290 TraceCheckUtils]: 6: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,334 INFO L290 TraceCheckUtils]: 7: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 8: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 9: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 10: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 11: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 12: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 13: Hoare triple {7556#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,335 INFO L290 TraceCheckUtils]: 14: Hoare triple {7556#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {7621#(= main_~z~0 main_~y~0)} is VALID [2022-04-27 22:01:28,336 INFO L290 TraceCheckUtils]: 15: Hoare triple {7621#(= main_~z~0 main_~y~0)} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7625#(= main_~y~0 (+ main_~z~0 1))} is VALID [2022-04-27 22:01:28,336 INFO L290 TraceCheckUtils]: 16: Hoare triple {7625#(= main_~y~0 (+ main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7629#(= main_~y~0 (+ main_~z~0 2))} is VALID [2022-04-27 22:01:28,339 INFO L290 TraceCheckUtils]: 17: Hoare triple {7629#(= main_~y~0 (+ main_~z~0 2))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7633#(= main_~y~0 (+ main_~z~0 3))} is VALID [2022-04-27 22:01:28,339 INFO L290 TraceCheckUtils]: 18: Hoare triple {7633#(= main_~y~0 (+ main_~z~0 3))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7637#(= (+ main_~y~0 (- 3)) (+ main_~z~0 1))} is VALID [2022-04-27 22:01:28,340 INFO L290 TraceCheckUtils]: 19: Hoare triple {7637#(= (+ main_~y~0 (- 3)) (+ main_~z~0 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7641#(= (+ main_~y~0 (- 4)) (+ main_~z~0 1))} is VALID [2022-04-27 22:01:28,340 INFO L290 TraceCheckUtils]: 20: Hoare triple {7641#(= (+ main_~y~0 (- 4)) (+ main_~z~0 1))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:28,341 INFO L290 TraceCheckUtils]: 21: Hoare triple {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:28,342 INFO L290 TraceCheckUtils]: 22: Hoare triple {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:28,343 INFO L290 TraceCheckUtils]: 23: Hoare triple {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:28,343 INFO L290 TraceCheckUtils]: 24: Hoare triple {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:28,344 INFO L290 TraceCheckUtils]: 25: Hoare triple {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7665#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:28,344 INFO L290 TraceCheckUtils]: 26: Hoare triple {7665#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:28,345 INFO L290 TraceCheckUtils]: 27: Hoare triple {7557#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:28,345 INFO L272 TraceCheckUtils]: 28: Hoare triple {7557#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7557#false} is VALID [2022-04-27 22:01:28,345 INFO L290 TraceCheckUtils]: 29: Hoare triple {7557#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7557#false} is VALID [2022-04-27 22:01:28,345 INFO L290 TraceCheckUtils]: 30: Hoare triple {7557#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:28,345 INFO L290 TraceCheckUtils]: 31: Hoare triple {7557#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:28,345 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:28,345 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:28,641 INFO L290 TraceCheckUtils]: 31: Hoare triple {7557#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:28,641 INFO L290 TraceCheckUtils]: 30: Hoare triple {7557#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:28,641 INFO L290 TraceCheckUtils]: 29: Hoare triple {7557#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7557#false} is VALID [2022-04-27 22:01:28,642 INFO L272 TraceCheckUtils]: 28: Hoare triple {7557#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {7557#false} is VALID [2022-04-27 22:01:28,642 INFO L290 TraceCheckUtils]: 27: Hoare triple {7557#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7557#false} is VALID [2022-04-27 22:01:28,642 INFO L290 TraceCheckUtils]: 26: Hoare triple {7665#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7557#false} is VALID [2022-04-27 22:01:28,643 INFO L290 TraceCheckUtils]: 25: Hoare triple {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7665#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:28,644 INFO L290 TraceCheckUtils]: 24: Hoare triple {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7661#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:28,644 INFO L290 TraceCheckUtils]: 23: Hoare triple {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7657#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:28,645 INFO L290 TraceCheckUtils]: 22: Hoare triple {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7653#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:28,646 INFO L290 TraceCheckUtils]: 21: Hoare triple {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {7649#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:28,646 INFO L290 TraceCheckUtils]: 20: Hoare triple {7717#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {7645#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:28,647 INFO L290 TraceCheckUtils]: 19: Hoare triple {7721#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7717#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod main_~z~0 4294967296)))} is VALID [2022-04-27 22:01:28,648 INFO L290 TraceCheckUtils]: 18: Hoare triple {7725#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7721#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:28,648 INFO L290 TraceCheckUtils]: 17: Hoare triple {7729#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7725#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:28,649 INFO L290 TraceCheckUtils]: 16: Hoare triple {7733#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7729#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:28,650 INFO L290 TraceCheckUtils]: 15: Hoare triple {7737#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7733#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)))} is VALID [2022-04-27 22:01:28,650 INFO L290 TraceCheckUtils]: 14: Hoare triple {7556#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {7737#(or (not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296))) (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)))} is VALID [2022-04-27 22:01:28,650 INFO L290 TraceCheckUtils]: 13: Hoare triple {7556#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,650 INFO L290 TraceCheckUtils]: 12: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,650 INFO L290 TraceCheckUtils]: 11: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 10: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 9: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 8: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 7: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 6: Hoare triple {7556#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 5: Hoare triple {7556#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L272 TraceCheckUtils]: 4: Hoare triple {7556#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7556#true} {7556#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 2: Hoare triple {7556#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {7556#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7556#true} is VALID [2022-04-27 22:01:28,651 INFO L272 TraceCheckUtils]: 0: Hoare triple {7556#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7556#true} is VALID [2022-04-27 22:01:28,652 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:28,652 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [666306956] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:28,652 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:28,652 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 14, 14] total 35 [2022-04-27 22:01:28,652 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975655153] [2022-04-27 22:01:28,652 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:28,652 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:01:28,653 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:28,653 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:28,699 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:28,699 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-04-27 22:01:28,699 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:28,700 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-04-27 22:01:28,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=1065, Unknown=0, NotChecked=0, Total=1190 [2022-04-27 22:01:28,700 INFO L87 Difference]: Start difference. First operand 69 states and 78 transitions. Second operand has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:34,240 INFO L93 Difference]: Finished difference Result 128 states and 155 transitions. [2022-04-27 22:01:34,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2022-04-27 22:01:34,241 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:01:34,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:34,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 111 transitions. [2022-04-27 22:01:34,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 111 transitions. [2022-04-27 22:01:34,244 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 56 states and 111 transitions. [2022-04-27 22:01:34,442 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:34,443 INFO L225 Difference]: With dead ends: 128 [2022-04-27 22:01:34,443 INFO L226 Difference]: Without dead ends: 85 [2022-04-27 22:01:34,445 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1418 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=733, Invalid=6923, Unknown=0, NotChecked=0, Total=7656 [2022-04-27 22:01:34,445 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 43 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 1085 mSolverCounterSat, 187 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 43 SdHoareTripleChecker+Valid, 123 SdHoareTripleChecker+Invalid, 1272 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 187 IncrementalHoareTripleChecker+Valid, 1085 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:34,445 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [43 Valid, 123 Invalid, 1272 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [187 Valid, 1085 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-27 22:01:34,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-27 22:01:34,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 77. [2022-04-27 22:01:34,763 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:34,763 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,763 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,764 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:34,765 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2022-04-27 22:01:34,765 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 94 transitions. [2022-04-27 22:01:34,765 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:34,765 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:34,766 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-27 22:01:34,766 INFO L87 Difference]: Start difference. First operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-27 22:01:34,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:34,767 INFO L93 Difference]: Finished difference Result 85 states and 94 transitions. [2022-04-27 22:01:34,767 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 94 transitions. [2022-04-27 22:01:34,767 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:34,767 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:34,767 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:34,768 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:34,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 72 states have (on average 1.1388888888888888) internal successors, (82), 72 states have internal predecessors, (82), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 86 transitions. [2022-04-27 22:01:34,769 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 86 transitions. Word has length 32 [2022-04-27 22:01:34,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:34,769 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 86 transitions. [2022-04-27 22:01:34,769 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 1.3428571428571427) internal successors, (47), 34 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:34,769 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 86 transitions. [2022-04-27 22:01:34,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 22:01:34,770 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:34,770 INFO L195 NwaCegarLoop]: trace histogram [8, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:34,798 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:34,995 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:34,995 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:34,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:34,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1125856974, now seen corresponding path program 16 times [2022-04-27 22:01:34,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:34,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164541994] [2022-04-27 22:01:34,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:34,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:35,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:35,257 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:35,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:35,261 INFO L290 TraceCheckUtils]: 0: Hoare triple {8407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-27 22:01:35,261 INFO L290 TraceCheckUtils]: 1: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,261 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,261 INFO L272 TraceCheckUtils]: 0: Hoare triple {8386#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:35,262 INFO L290 TraceCheckUtils]: 1: Hoare triple {8407#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-27 22:01:35,262 INFO L290 TraceCheckUtils]: 2: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,262 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,262 INFO L272 TraceCheckUtils]: 4: Hoare triple {8386#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,263 INFO L290 TraceCheckUtils]: 5: Hoare triple {8386#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8391#(= main_~y~0 0)} is VALID [2022-04-27 22:01:35,263 INFO L290 TraceCheckUtils]: 6: Hoare triple {8391#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:35,264 INFO L290 TraceCheckUtils]: 7: Hoare triple {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:35,264 INFO L290 TraceCheckUtils]: 8: Hoare triple {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:35,268 INFO L290 TraceCheckUtils]: 9: Hoare triple {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:35,269 INFO L290 TraceCheckUtils]: 10: Hoare triple {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:35,269 INFO L290 TraceCheckUtils]: 11: Hoare triple {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:35,270 INFO L290 TraceCheckUtils]: 12: Hoare triple {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:35,271 INFO L290 TraceCheckUtils]: 13: Hoare triple {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,271 INFO L290 TraceCheckUtils]: 14: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,272 INFO L290 TraceCheckUtils]: 15: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {8400#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:01:35,273 INFO L290 TraceCheckUtils]: 16: Hoare triple {8400#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8401#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:01:35,273 INFO L290 TraceCheckUtils]: 17: Hoare triple {8401#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8402#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:01:35,274 INFO L290 TraceCheckUtils]: 18: Hoare triple {8402#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8403#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:35,275 INFO L290 TraceCheckUtils]: 19: Hoare triple {8403#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8404#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:35,276 INFO L290 TraceCheckUtils]: 20: Hoare triple {8404#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8405#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:35,276 INFO L290 TraceCheckUtils]: 21: Hoare triple {8405#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8406#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 22: Hoare triple {8406#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 23: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 24: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 25: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 26: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 27: Hoare triple {8387#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8387#false} is VALID [2022-04-27 22:01:35,277 INFO L290 TraceCheckUtils]: 28: Hoare triple {8387#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,278 INFO L272 TraceCheckUtils]: 29: Hoare triple {8387#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {8387#false} is VALID [2022-04-27 22:01:35,278 INFO L290 TraceCheckUtils]: 30: Hoare triple {8387#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8387#false} is VALID [2022-04-27 22:01:35,278 INFO L290 TraceCheckUtils]: 31: Hoare triple {8387#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,278 INFO L290 TraceCheckUtils]: 32: Hoare triple {8387#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,278 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:01:35,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:35,278 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164541994] [2022-04-27 22:01:35,279 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [164541994] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:35,279 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [563864766] [2022-04-27 22:01:35,279 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:01:35,279 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:35,279 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:35,284 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:35,286 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 22:01:35,341 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:01:35,342 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:35,343 INFO L263 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-27 22:01:35,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:35,357 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:35,807 INFO L272 TraceCheckUtils]: 0: Hoare triple {8386#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,807 INFO L290 TraceCheckUtils]: 1: Hoare triple {8386#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-27 22:01:35,807 INFO L290 TraceCheckUtils]: 2: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,807 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,807 INFO L272 TraceCheckUtils]: 4: Hoare triple {8386#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:35,809 INFO L290 TraceCheckUtils]: 5: Hoare triple {8386#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8391#(= main_~y~0 0)} is VALID [2022-04-27 22:01:35,809 INFO L290 TraceCheckUtils]: 6: Hoare triple {8391#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:35,810 INFO L290 TraceCheckUtils]: 7: Hoare triple {8392#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:35,810 INFO L290 TraceCheckUtils]: 8: Hoare triple {8393#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:35,811 INFO L290 TraceCheckUtils]: 9: Hoare triple {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:35,811 INFO L290 TraceCheckUtils]: 10: Hoare triple {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:35,812 INFO L290 TraceCheckUtils]: 11: Hoare triple {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:35,812 INFO L290 TraceCheckUtils]: 12: Hoare triple {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:35,813 INFO L290 TraceCheckUtils]: 13: Hoare triple {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,813 INFO L290 TraceCheckUtils]: 14: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,814 INFO L290 TraceCheckUtils]: 15: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {8456#(and (= main_~z~0 main_~y~0) (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,814 INFO L290 TraceCheckUtils]: 16: Hoare triple {8456#(and (= main_~z~0 main_~y~0) (<= main_~y~0 8) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8460#(and (<= main_~y~0 8) (<= 8 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:35,815 INFO L290 TraceCheckUtils]: 17: Hoare triple {8460#(and (<= main_~y~0 8) (<= 8 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8464#(and (<= main_~y~0 8) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,815 INFO L290 TraceCheckUtils]: 18: Hoare triple {8464#(and (<= main_~y~0 8) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8468#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,816 INFO L290 TraceCheckUtils]: 19: Hoare triple {8468#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8472#(and (= (+ main_~z~0 3) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,817 INFO L290 TraceCheckUtils]: 20: Hoare triple {8472#(and (= (+ main_~z~0 3) (+ (- 1) main_~y~0)) (<= main_~y~0 8) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8476#(and (<= main_~y~0 8) (= (+ (- 1) main_~y~0) (+ main_~z~0 4)) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,817 INFO L290 TraceCheckUtils]: 21: Hoare triple {8476#(and (<= main_~y~0 8) (= (+ (- 1) main_~y~0) (+ main_~z~0 4)) (<= 8 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,817 INFO L290 TraceCheckUtils]: 22: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:35,818 INFO L290 TraceCheckUtils]: 23: Hoare triple {8399#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:35,818 INFO L290 TraceCheckUtils]: 24: Hoare triple {8398#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:35,819 INFO L290 TraceCheckUtils]: 25: Hoare triple {8397#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:35,819 INFO L290 TraceCheckUtils]: 26: Hoare triple {8396#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:35,820 INFO L290 TraceCheckUtils]: 27: Hoare triple {8395#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:35,820 INFO L290 TraceCheckUtils]: 28: Hoare triple {8394#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,820 INFO L272 TraceCheckUtils]: 29: Hoare triple {8387#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {8387#false} is VALID [2022-04-27 22:01:35,821 INFO L290 TraceCheckUtils]: 30: Hoare triple {8387#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8387#false} is VALID [2022-04-27 22:01:35,821 INFO L290 TraceCheckUtils]: 31: Hoare triple {8387#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,821 INFO L290 TraceCheckUtils]: 32: Hoare triple {8387#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:35,821 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:01:35,821 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:36,257 INFO L290 TraceCheckUtils]: 32: Hoare triple {8387#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:36,258 INFO L290 TraceCheckUtils]: 31: Hoare triple {8387#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:36,258 INFO L290 TraceCheckUtils]: 30: Hoare triple {8387#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8387#false} is VALID [2022-04-27 22:01:36,258 INFO L272 TraceCheckUtils]: 29: Hoare triple {8387#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {8387#false} is VALID [2022-04-27 22:01:36,258 INFO L290 TraceCheckUtils]: 28: Hoare triple {8525#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8387#false} is VALID [2022-04-27 22:01:36,260 INFO L290 TraceCheckUtils]: 27: Hoare triple {8529#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8525#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:36,261 INFO L290 TraceCheckUtils]: 26: Hoare triple {8533#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8529#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:36,262 INFO L290 TraceCheckUtils]: 25: Hoare triple {8537#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8533#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:36,263 INFO L290 TraceCheckUtils]: 24: Hoare triple {8541#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8537#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:36,264 INFO L290 TraceCheckUtils]: 23: Hoare triple {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {8541#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:36,264 INFO L290 TraceCheckUtils]: 22: Hoare triple {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:36,265 INFO L290 TraceCheckUtils]: 21: Hoare triple {8552#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8545#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:36,266 INFO L290 TraceCheckUtils]: 20: Hoare triple {8556#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8552#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:01:36,267 INFO L290 TraceCheckUtils]: 19: Hoare triple {8560#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8556#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:36,268 INFO L290 TraceCheckUtils]: 18: Hoare triple {8564#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8560#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:01:36,269 INFO L290 TraceCheckUtils]: 17: Hoare triple {8568#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8564#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:36,270 INFO L290 TraceCheckUtils]: 16: Hoare triple {8572#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8568#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 15: Hoare triple {8386#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {8572#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 14: Hoare triple {8386#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 13: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 12: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 11: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 10: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 9: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 8: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,271 INFO L290 TraceCheckUtils]: 7: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L290 TraceCheckUtils]: 6: Hoare triple {8386#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L290 TraceCheckUtils]: 5: Hoare triple {8386#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L272 TraceCheckUtils]: 4: Hoare triple {8386#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8386#true} {8386#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L290 TraceCheckUtils]: 2: Hoare triple {8386#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L290 TraceCheckUtils]: 1: Hoare triple {8386#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8386#true} is VALID [2022-04-27 22:01:36,272 INFO L272 TraceCheckUtils]: 0: Hoare triple {8386#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8386#true} is VALID [2022-04-27 22:01:36,273 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 6 proven. 30 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:01:36,273 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [563864766] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:36,273 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:36,273 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 14] total 37 [2022-04-27 22:01:36,273 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1661404057] [2022-04-27 22:01:36,273 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:36,274 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:01:36,274 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:36,274 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:36,316 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:36,316 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-04-27 22:01:36,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:36,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-04-27 22:01:36,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=1060, Unknown=0, NotChecked=0, Total=1332 [2022-04-27 22:01:36,317 INFO L87 Difference]: Start difference. First operand 77 states and 86 transitions. Second operand has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:40,282 INFO L93 Difference]: Finished difference Result 200 states and 234 transitions. [2022-04-27 22:01:40,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2022-04-27 22:01:40,282 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:01:40,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:40,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 133 transitions. [2022-04-27 22:01:40,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 133 transitions. [2022-04-27 22:01:40,286 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 57 states and 133 transitions. [2022-04-27 22:01:40,587 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 133 edges. 133 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:40,590 INFO L225 Difference]: With dead ends: 200 [2022-04-27 22:01:40,590 INFO L226 Difference]: Without dead ends: 187 [2022-04-27 22:01:40,592 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 64 SyntacticMatches, 1 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2401 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1751, Invalid=6439, Unknown=0, NotChecked=0, Total=8190 [2022-04-27 22:01:40,594 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 290 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 657 mSolverCounterSat, 325 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 290 SdHoareTripleChecker+Valid, 93 SdHoareTripleChecker+Invalid, 982 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 325 IncrementalHoareTripleChecker+Valid, 657 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:40,594 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [290 Valid, 93 Invalid, 982 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [325 Valid, 657 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-04-27 22:01:40,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-04-27 22:01:40,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 84. [2022-04-27 22:01:40,984 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:40,984 INFO L82 GeneralOperation]: Start isEquivalent. First operand 187 states. Second operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,984 INFO L74 IsIncluded]: Start isIncluded. First operand 187 states. Second operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,984 INFO L87 Difference]: Start difference. First operand 187 states. Second operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:40,988 INFO L93 Difference]: Finished difference Result 187 states and 213 transitions. [2022-04-27 22:01:40,988 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 213 transitions. [2022-04-27 22:01:40,988 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:40,988 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:40,988 INFO L74 IsIncluded]: Start isIncluded. First operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-27 22:01:40,988 INFO L87 Difference]: Start difference. First operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 187 states. [2022-04-27 22:01:40,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:40,992 INFO L93 Difference]: Finished difference Result 187 states and 213 transitions. [2022-04-27 22:01:40,992 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 213 transitions. [2022-04-27 22:01:40,992 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:40,992 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:40,992 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:40,992 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:40,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 79 states have (on average 1.139240506329114) internal successors, (90), 79 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 94 transitions. [2022-04-27 22:01:40,994 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 94 transitions. Word has length 33 [2022-04-27 22:01:40,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:40,994 INFO L495 AbstractCegarLoop]: Abstraction has 84 states and 94 transitions. [2022-04-27 22:01:40,994 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 1.5405405405405406) internal successors, (57), 36 states have internal predecessors, (57), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:40,994 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 94 transitions. [2022-04-27 22:01:40,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 22:01:40,995 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:40,995 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:41,022 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:41,215 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:41,215 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:41,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:41,216 INFO L85 PathProgramCache]: Analyzing trace with hash -1822415150, now seen corresponding path program 17 times [2022-04-27 22:01:41,216 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:41,216 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127453255] [2022-04-27 22:01:41,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:41,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:41,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:41,434 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:41,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:41,438 INFO L290 TraceCheckUtils]: 0: Hoare triple {9590#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-27 22:01:41,438 INFO L290 TraceCheckUtils]: 1: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:41,438 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L272 TraceCheckUtils]: 0: Hoare triple {9575#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9590#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:41,439 INFO L290 TraceCheckUtils]: 1: Hoare triple {9590#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L290 TraceCheckUtils]: 2: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L272 TraceCheckUtils]: 4: Hoare triple {9575#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L290 TraceCheckUtils]: 5: Hoare triple {9575#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,439 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,440 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,440 INFO L290 TraceCheckUtils]: 9: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,440 INFO L290 TraceCheckUtils]: 10: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,440 INFO L290 TraceCheckUtils]: 11: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,440 INFO L290 TraceCheckUtils]: 12: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:41,441 INFO L290 TraceCheckUtils]: 13: Hoare triple {9575#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:41,441 INFO L290 TraceCheckUtils]: 14: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:41,442 INFO L290 TraceCheckUtils]: 15: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:41,443 INFO L290 TraceCheckUtils]: 16: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,444 INFO L290 TraceCheckUtils]: 17: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,445 INFO L290 TraceCheckUtils]: 18: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,445 INFO L290 TraceCheckUtils]: 19: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:41,446 INFO L290 TraceCheckUtils]: 20: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,447 INFO L290 TraceCheckUtils]: 21: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,448 INFO L290 TraceCheckUtils]: 22: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,449 INFO L290 TraceCheckUtils]: 23: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,450 INFO L290 TraceCheckUtils]: 24: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:41,451 INFO L290 TraceCheckUtils]: 25: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,451 INFO L290 TraceCheckUtils]: 26: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,452 INFO L290 TraceCheckUtils]: 27: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:41,453 INFO L290 TraceCheckUtils]: 28: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:41,454 INFO L290 TraceCheckUtils]: 29: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:41,455 INFO L290 TraceCheckUtils]: 30: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:41,455 INFO L272 TraceCheckUtils]: 31: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {9588#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:01:41,456 INFO L290 TraceCheckUtils]: 32: Hoare triple {9588#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9589#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:01:41,456 INFO L290 TraceCheckUtils]: 33: Hoare triple {9589#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-27 22:01:41,456 INFO L290 TraceCheckUtils]: 34: Hoare triple {9576#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-27 22:01:41,457 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:41,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:41,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127453255] [2022-04-27 22:01:41,457 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [127453255] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:41,457 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [649927010] [2022-04-27 22:01:41,457 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:01:41,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:41,457 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:41,458 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:41,467 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 22:01:42,017 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-04-27 22:01:42,017 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:42,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 164 conjuncts, 32 conjunts are in the unsatisfiable core [2022-04-27 22:01:42,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:42,031 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:42,308 INFO L272 TraceCheckUtils]: 0: Hoare triple {9575#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,308 INFO L290 TraceCheckUtils]: 1: Hoare triple {9575#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-27 22:01:42,308 INFO L290 TraceCheckUtils]: 2: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,308 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,308 INFO L272 TraceCheckUtils]: 4: Hoare triple {9575#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,308 INFO L290 TraceCheckUtils]: 5: Hoare triple {9575#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 9: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 10: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 11: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 12: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,309 INFO L290 TraceCheckUtils]: 13: Hoare triple {9575#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,310 INFO L290 TraceCheckUtils]: 14: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,311 INFO L290 TraceCheckUtils]: 15: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:42,311 INFO L290 TraceCheckUtils]: 16: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,312 INFO L290 TraceCheckUtils]: 17: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,313 INFO L290 TraceCheckUtils]: 18: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,314 INFO L290 TraceCheckUtils]: 19: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:42,314 INFO L290 TraceCheckUtils]: 20: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,315 INFO L290 TraceCheckUtils]: 21: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,315 INFO L290 TraceCheckUtils]: 22: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,316 INFO L290 TraceCheckUtils]: 23: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,317 INFO L290 TraceCheckUtils]: 24: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:42,318 INFO L290 TraceCheckUtils]: 25: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,318 INFO L290 TraceCheckUtils]: 26: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,319 INFO L290 TraceCheckUtils]: 27: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,320 INFO L290 TraceCheckUtils]: 28: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:42,320 INFO L290 TraceCheckUtils]: 29: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,321 INFO L290 TraceCheckUtils]: 30: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,321 INFO L272 TraceCheckUtils]: 31: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:42,322 INFO L290 TraceCheckUtils]: 32: Hoare triple {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9691#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:42,322 INFO L290 TraceCheckUtils]: 33: Hoare triple {9691#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-27 22:01:42,322 INFO L290 TraceCheckUtils]: 34: Hoare triple {9576#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-27 22:01:42,322 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:42,322 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:42,597 INFO L290 TraceCheckUtils]: 34: Hoare triple {9576#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-27 22:01:42,597 INFO L290 TraceCheckUtils]: 33: Hoare triple {9691#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {9576#false} is VALID [2022-04-27 22:01:42,598 INFO L290 TraceCheckUtils]: 32: Hoare triple {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9691#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:01:42,598 INFO L272 TraceCheckUtils]: 31: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {9687#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:01:42,599 INFO L290 TraceCheckUtils]: 30: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,599 INFO L290 TraceCheckUtils]: 29: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,600 INFO L290 TraceCheckUtils]: 28: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:42,601 INFO L290 TraceCheckUtils]: 27: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,602 INFO L290 TraceCheckUtils]: 26: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,602 INFO L290 TraceCheckUtils]: 25: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,603 INFO L290 TraceCheckUtils]: 24: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:42,604 INFO L290 TraceCheckUtils]: 23: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,604 INFO L290 TraceCheckUtils]: 22: Hoare triple {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,605 INFO L290 TraceCheckUtils]: 21: Hoare triple {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9587#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,605 INFO L290 TraceCheckUtils]: 20: Hoare triple {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9586#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,606 INFO L290 TraceCheckUtils]: 19: Hoare triple {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9585#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:01:42,607 INFO L290 TraceCheckUtils]: 18: Hoare triple {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9584#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,607 INFO L290 TraceCheckUtils]: 17: Hoare triple {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9583#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,608 INFO L290 TraceCheckUtils]: 16: Hoare triple {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9582#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:01:42,609 INFO L290 TraceCheckUtils]: 15: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9581#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:01:42,609 INFO L290 TraceCheckUtils]: 14: Hoare triple {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 13: Hoare triple {9575#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9580#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 12: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 11: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 10: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 9: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 8: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 7: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 6: Hoare triple {9575#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 5: Hoare triple {9575#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L272 TraceCheckUtils]: 4: Hoare triple {9575#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9575#true} {9575#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 2: Hoare triple {9575#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,610 INFO L290 TraceCheckUtils]: 1: Hoare triple {9575#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9575#true} is VALID [2022-04-27 22:01:42,611 INFO L272 TraceCheckUtils]: 0: Hoare triple {9575#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9575#true} is VALID [2022-04-27 22:01:42,611 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:42,611 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [649927010] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:42,611 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:42,611 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 15 [2022-04-27 22:01:42,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976234145] [2022-04-27 22:01:42,611 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:42,612 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:01:42,612 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:42,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:42,642 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:42,642 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 22:01:42,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:42,642 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 22:01:42,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2022-04-27 22:01:42,642 INFO L87 Difference]: Start difference. First operand 84 states and 94 transitions. Second operand has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:43,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:43,643 INFO L93 Difference]: Finished difference Result 122 states and 135 transitions. [2022-04-27 22:01:43,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 22:01:43,644 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:01:43,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:43,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:43,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 42 transitions. [2022-04-27 22:01:43,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:43,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 42 transitions. [2022-04-27 22:01:43,646 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 42 transitions. [2022-04-27 22:01:43,697 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:43,698 INFO L225 Difference]: With dead ends: 122 [2022-04-27 22:01:43,698 INFO L226 Difference]: Without dead ends: 109 [2022-04-27 22:01:43,699 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 74 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=74, Invalid=526, Unknown=0, NotChecked=0, Total=600 [2022-04-27 22:01:43,700 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 19 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 318 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 332 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 318 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:43,700 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 74 Invalid, 332 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 318 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:01:43,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2022-04-27 22:01:44,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 92. [2022-04-27 22:01:44,083 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:44,083 INFO L82 GeneralOperation]: Start isEquivalent. First operand 109 states. Second operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:44,083 INFO L74 IsIncluded]: Start isIncluded. First operand 109 states. Second operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:44,084 INFO L87 Difference]: Start difference. First operand 109 states. Second operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:44,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:44,085 INFO L93 Difference]: Finished difference Result 109 states and 121 transitions. [2022-04-27 22:01:44,085 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2022-04-27 22:01:44,086 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:44,086 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:44,086 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 109 states. [2022-04-27 22:01:44,086 INFO L87 Difference]: Start difference. First operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 109 states. [2022-04-27 22:01:44,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:44,088 INFO L93 Difference]: Finished difference Result 109 states and 121 transitions. [2022-04-27 22:01:44,088 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 121 transitions. [2022-04-27 22:01:44,088 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:44,088 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:44,088 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:44,088 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:44,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 87 states have (on average 1.1379310344827587) internal successors, (99), 87 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:44,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 103 transitions. [2022-04-27 22:01:44,090 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 103 transitions. Word has length 35 [2022-04-27 22:01:44,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:44,090 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 103 transitions. [2022-04-27 22:01:44,090 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 1.8666666666666667) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:44,090 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 103 transitions. [2022-04-27 22:01:44,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 22:01:44,091 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:44,091 INFO L195 NwaCegarLoop]: trace histogram [9, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:44,102 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 22:01:44,295 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:44,296 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:44,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:44,296 INFO L85 PathProgramCache]: Analyzing trace with hash -807949186, now seen corresponding path program 18 times [2022-04-27 22:01:44,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:44,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821160660] [2022-04-27 22:01:44,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:44,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:44,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:44,598 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:44,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:44,606 INFO L290 TraceCheckUtils]: 0: Hoare triple {10398#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-27 22:01:44,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:44,606 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:44,606 INFO L272 TraceCheckUtils]: 0: Hoare triple {10376#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10398#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:44,606 INFO L290 TraceCheckUtils]: 1: Hoare triple {10398#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-27 22:01:44,607 INFO L290 TraceCheckUtils]: 2: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:44,607 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:44,607 INFO L272 TraceCheckUtils]: 4: Hoare triple {10376#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:44,607 INFO L290 TraceCheckUtils]: 5: Hoare triple {10376#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10381#(= main_~y~0 0)} is VALID [2022-04-27 22:01:44,607 INFO L290 TraceCheckUtils]: 6: Hoare triple {10381#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:44,608 INFO L290 TraceCheckUtils]: 7: Hoare triple {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:44,608 INFO L290 TraceCheckUtils]: 8: Hoare triple {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:44,609 INFO L290 TraceCheckUtils]: 9: Hoare triple {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:44,610 INFO L290 TraceCheckUtils]: 10: Hoare triple {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:44,610 INFO L290 TraceCheckUtils]: 11: Hoare triple {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:44,611 INFO L290 TraceCheckUtils]: 12: Hoare triple {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:44,611 INFO L290 TraceCheckUtils]: 13: Hoare triple {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:44,612 INFO L290 TraceCheckUtils]: 14: Hoare triple {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:44,612 INFO L290 TraceCheckUtils]: 15: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:44,612 INFO L290 TraceCheckUtils]: 16: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {10391#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:01:44,613 INFO L290 TraceCheckUtils]: 17: Hoare triple {10391#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10392#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:01:44,613 INFO L290 TraceCheckUtils]: 18: Hoare triple {10392#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10393#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:01:44,614 INFO L290 TraceCheckUtils]: 19: Hoare triple {10393#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10394#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:01:44,614 INFO L290 TraceCheckUtils]: 20: Hoare triple {10394#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10395#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:44,615 INFO L290 TraceCheckUtils]: 21: Hoare triple {10395#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10396#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:44,615 INFO L290 TraceCheckUtils]: 22: Hoare triple {10396#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10397#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 23: Hoare triple {10397#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 24: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 25: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 26: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 27: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 28: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 29: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 30: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L290 TraceCheckUtils]: 31: Hoare triple {10377#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:44,616 INFO L272 TraceCheckUtils]: 32: Hoare triple {10377#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {10377#false} is VALID [2022-04-27 22:01:44,617 INFO L290 TraceCheckUtils]: 33: Hoare triple {10377#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10377#false} is VALID [2022-04-27 22:01:44,617 INFO L290 TraceCheckUtils]: 34: Hoare triple {10377#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:44,617 INFO L290 TraceCheckUtils]: 35: Hoare triple {10377#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:44,617 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:44,617 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:44,617 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821160660] [2022-04-27 22:01:44,617 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1821160660] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:44,617 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116291042] [2022-04-27 22:01:44,617 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:01:44,617 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:44,618 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:44,619 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:44,620 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 22:01:44,706 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2022-04-27 22:01:44,706 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:01:44,708 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-27 22:01:44,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:44,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:45,032 INFO L272 TraceCheckUtils]: 0: Hoare triple {10376#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,032 INFO L290 TraceCheckUtils]: 1: Hoare triple {10376#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-27 22:01:45,032 INFO L290 TraceCheckUtils]: 2: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,032 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,032 INFO L272 TraceCheckUtils]: 4: Hoare triple {10376#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,032 INFO L290 TraceCheckUtils]: 5: Hoare triple {10376#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10381#(= main_~y~0 0)} is VALID [2022-04-27 22:01:45,033 INFO L290 TraceCheckUtils]: 6: Hoare triple {10381#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:45,033 INFO L290 TraceCheckUtils]: 7: Hoare triple {10382#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:45,034 INFO L290 TraceCheckUtils]: 8: Hoare triple {10383#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:45,034 INFO L290 TraceCheckUtils]: 9: Hoare triple {10384#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:45,035 INFO L290 TraceCheckUtils]: 10: Hoare triple {10385#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:45,036 INFO L290 TraceCheckUtils]: 11: Hoare triple {10386#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:45,036 INFO L290 TraceCheckUtils]: 12: Hoare triple {10387#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:45,037 INFO L290 TraceCheckUtils]: 13: Hoare triple {10388#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:45,037 INFO L290 TraceCheckUtils]: 14: Hoare triple {10389#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,038 INFO L290 TraceCheckUtils]: 15: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,038 INFO L290 TraceCheckUtils]: 16: Hoare triple {10390#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {10450#(and (= main_~z~0 main_~y~0) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,038 INFO L290 TraceCheckUtils]: 17: Hoare triple {10450#(and (= main_~z~0 main_~y~0) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10454#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:01:45,039 INFO L290 TraceCheckUtils]: 18: Hoare triple {10454#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10458#(and (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,040 INFO L290 TraceCheckUtils]: 19: Hoare triple {10458#(and (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10462#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,040 INFO L290 TraceCheckUtils]: 20: Hoare triple {10462#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10466#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} is VALID [2022-04-27 22:01:45,041 INFO L290 TraceCheckUtils]: 21: Hoare triple {10466#(and (<= 9 main_~y~0) (<= main_~y~0 9) (= (+ (- 2) main_~y~0) (+ main_~z~0 2)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10470#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,041 INFO L290 TraceCheckUtils]: 22: Hoare triple {10470#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 9 main_~y~0) (<= main_~y~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10474#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:45,042 INFO L290 TraceCheckUtils]: 23: Hoare triple {10474#(and (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 9 main_~y~0) (<= main_~y~0 9))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,042 INFO L290 TraceCheckUtils]: 24: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,042 INFO L290 TraceCheckUtils]: 25: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,042 INFO L290 TraceCheckUtils]: 26: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,042 INFO L290 TraceCheckUtils]: 27: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 28: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 29: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 30: Hoare triple {10377#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 31: Hoare triple {10377#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L272 TraceCheckUtils]: 32: Hoare triple {10377#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 33: Hoare triple {10377#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 34: Hoare triple {10377#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,043 INFO L290 TraceCheckUtils]: 35: Hoare triple {10377#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,044 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:01:45,044 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:45,532 INFO L290 TraceCheckUtils]: 35: Hoare triple {10377#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,532 INFO L290 TraceCheckUtils]: 34: Hoare triple {10377#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,532 INFO L290 TraceCheckUtils]: 33: Hoare triple {10377#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10377#false} is VALID [2022-04-27 22:01:45,532 INFO L272 TraceCheckUtils]: 32: Hoare triple {10377#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {10377#false} is VALID [2022-04-27 22:01:45,532 INFO L290 TraceCheckUtils]: 31: Hoare triple {10377#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10377#false} is VALID [2022-04-27 22:01:45,532 INFO L290 TraceCheckUtils]: 30: Hoare triple {10529#(not (< 0 (mod main_~y~0 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10377#false} is VALID [2022-04-27 22:01:45,534 INFO L290 TraceCheckUtils]: 29: Hoare triple {10533#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10529#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:01:45,534 INFO L290 TraceCheckUtils]: 28: Hoare triple {10537#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10533#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:01:45,535 INFO L290 TraceCheckUtils]: 27: Hoare triple {10541#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10537#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:01:45,536 INFO L290 TraceCheckUtils]: 26: Hoare triple {10545#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10541#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:01:45,536 INFO L290 TraceCheckUtils]: 25: Hoare triple {10549#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10545#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:45,537 INFO L290 TraceCheckUtils]: 24: Hoare triple {10553#(not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {10549#(not (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:45,537 INFO L290 TraceCheckUtils]: 23: Hoare triple {10557#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {10553#(not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:01:45,538 INFO L290 TraceCheckUtils]: 22: Hoare triple {10561#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10557#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,539 INFO L290 TraceCheckUtils]: 21: Hoare triple {10565#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10561#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,540 INFO L290 TraceCheckUtils]: 20: Hoare triple {10569#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10565#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,544 INFO L290 TraceCheckUtils]: 19: Hoare triple {10573#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10569#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,546 INFO L290 TraceCheckUtils]: 18: Hoare triple {10577#(or (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10573#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,547 INFO L290 TraceCheckUtils]: 17: Hoare triple {10581#(or (< 0 (mod (+ 4294967290 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10577#(or (< 0 (mod (+ 4294967291 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,547 INFO L290 TraceCheckUtils]: 16: Hoare triple {10376#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {10581#(or (< 0 (mod (+ 4294967290 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:01:45,547 INFO L290 TraceCheckUtils]: 15: Hoare triple {10376#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,547 INFO L290 TraceCheckUtils]: 14: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,547 INFO L290 TraceCheckUtils]: 13: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,547 INFO L290 TraceCheckUtils]: 12: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 11: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 10: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 9: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 8: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 7: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 6: Hoare triple {10376#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L290 TraceCheckUtils]: 5: Hoare triple {10376#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10376#true} is VALID [2022-04-27 22:01:45,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {10376#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,549 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10376#true} {10376#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,549 INFO L290 TraceCheckUtils]: 2: Hoare triple {10376#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,549 INFO L290 TraceCheckUtils]: 1: Hoare triple {10376#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10376#true} is VALID [2022-04-27 22:01:45,549 INFO L272 TraceCheckUtils]: 0: Hoare triple {10376#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10376#true} is VALID [2022-04-27 22:01:45,549 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 7 proven. 42 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2022-04-27 22:01:45,549 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2116291042] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:45,549 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:45,550 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 16] total 41 [2022-04-27 22:01:45,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044687740] [2022-04-27 22:01:45,550 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:45,550 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:01:45,551 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:45,551 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:45,601 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 58 edges. 58 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:45,601 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 41 states [2022-04-27 22:01:45,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:45,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2022-04-27 22:01:45,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=1427, Unknown=0, NotChecked=0, Total=1640 [2022-04-27 22:01:45,602 INFO L87 Difference]: Start difference. First operand 92 states and 103 transitions. Second operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:53,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:53,774 INFO L93 Difference]: Finished difference Result 160 states and 191 transitions. [2022-04-27 22:01:53,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2022-04-27 22:01:53,775 INFO L78 Accepts]: Start accepts. Automaton has has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:01:53,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:01:53,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:53,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 134 transitions. [2022-04-27 22:01:53,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:53,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 134 transitions. [2022-04-27 22:01:53,779 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 72 states and 134 transitions. [2022-04-27 22:01:54,054 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 134 edges. 134 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:54,056 INFO L225 Difference]: With dead ends: 160 [2022-04-27 22:01:54,056 INFO L226 Difference]: Without dead ends: 124 [2022-04-27 22:01:54,059 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 62 SyntacticMatches, 1 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2978 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=1227, Invalid=10763, Unknown=0, NotChecked=0, Total=11990 [2022-04-27 22:01:54,059 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 51 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1198 mSolverCounterSat, 187 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 51 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 1385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 187 IncrementalHoareTripleChecker+Valid, 1198 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:01:54,059 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [51 Valid, 110 Invalid, 1385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [187 Valid, 1198 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-04-27 22:01:54,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2022-04-27 22:01:54,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 114. [2022-04-27 22:01:54,645 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:01:54,645 INFO L82 GeneralOperation]: Start isEquivalent. First operand 124 states. Second operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:54,645 INFO L74 IsIncluded]: Start isIncluded. First operand 124 states. Second operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:54,645 INFO L87 Difference]: Start difference. First operand 124 states. Second operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:54,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:54,647 INFO L93 Difference]: Finished difference Result 124 states and 138 transitions. [2022-04-27 22:01:54,647 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 138 transitions. [2022-04-27 22:01:54,648 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:54,648 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:54,648 INFO L74 IsIncluded]: Start isIncluded. First operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-27 22:01:54,648 INFO L87 Difference]: Start difference. First operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 124 states. [2022-04-27 22:01:54,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:01:54,650 INFO L93 Difference]: Finished difference Result 124 states and 138 transitions. [2022-04-27 22:01:54,650 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 138 transitions. [2022-04-27 22:01:54,650 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:01:54,651 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:01:54,651 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:01:54,651 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:01:54,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 109 states have (on average 1.1376146788990826) internal successors, (124), 109 states have internal predecessors, (124), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:54,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 128 transitions. [2022-04-27 22:01:54,653 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 128 transitions. Word has length 36 [2022-04-27 22:01:54,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:01:54,653 INFO L495 AbstractCegarLoop]: Abstraction has 114 states and 128 transitions. [2022-04-27 22:01:54,653 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:54,653 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 128 transitions. [2022-04-27 22:01:54,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-27 22:01:54,654 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:01:54,654 INFO L195 NwaCegarLoop]: trace histogram [10, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:01:54,672 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-27 22:01:54,863 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-27 22:01:54,863 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:01:54,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:01:54,864 INFO L85 PathProgramCache]: Analyzing trace with hash -625866281, now seen corresponding path program 19 times [2022-04-27 22:01:54,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:01:54,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579616556] [2022-04-27 22:01:54,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:01:54,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:01:54,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:55,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:01:55,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:55,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {11492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-27 22:01:55,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,188 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {11468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:01:55,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {11492#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-27 22:01:55,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,189 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,189 INFO L272 TraceCheckUtils]: 4: Hoare triple {11468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {11468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11473#(= main_~y~0 0)} is VALID [2022-04-27 22:01:55,190 INFO L290 TraceCheckUtils]: 6: Hoare triple {11473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:55,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:55,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:55,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:55,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:55,194 INFO L290 TraceCheckUtils]: 11: Hoare triple {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:55,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:55,211 INFO L290 TraceCheckUtils]: 13: Hoare triple {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:55,212 INFO L290 TraceCheckUtils]: 14: Hoare triple {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:55,213 INFO L290 TraceCheckUtils]: 15: Hoare triple {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:01:55,213 INFO L290 TraceCheckUtils]: 16: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:01:55,214 INFO L290 TraceCheckUtils]: 17: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-27 22:01:55,215 INFO L290 TraceCheckUtils]: 18: Hoare triple {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:01:55,216 INFO L290 TraceCheckUtils]: 19: Hoare triple {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:01:55,217 INFO L290 TraceCheckUtils]: 20: Hoare triple {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:01:55,218 INFO L290 TraceCheckUtils]: 21: Hoare triple {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:01:55,219 INFO L290 TraceCheckUtils]: 22: Hoare triple {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:55,220 INFO L290 TraceCheckUtils]: 23: Hoare triple {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:55,221 INFO L290 TraceCheckUtils]: 24: Hoare triple {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11491#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:01:55,221 INFO L290 TraceCheckUtils]: 25: Hoare triple {11491#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,222 INFO L290 TraceCheckUtils]: 26: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,222 INFO L290 TraceCheckUtils]: 27: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,223 INFO L290 TraceCheckUtils]: 28: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,223 INFO L290 TraceCheckUtils]: 29: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,223 INFO L290 TraceCheckUtils]: 30: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,223 INFO L290 TraceCheckUtils]: 31: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,223 INFO L290 TraceCheckUtils]: 32: Hoare triple {11469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,223 INFO L272 TraceCheckUtils]: 33: Hoare triple {11469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {11469#false} is VALID [2022-04-27 22:01:55,224 INFO L290 TraceCheckUtils]: 34: Hoare triple {11469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11469#false} is VALID [2022-04-27 22:01:55,224 INFO L290 TraceCheckUtils]: 35: Hoare triple {11469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,224 INFO L290 TraceCheckUtils]: 36: Hoare triple {11469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,224 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:55,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:01:55,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1579616556] [2022-04-27 22:01:55,224 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1579616556] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:01:55,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [322995983] [2022-04-27 22:01:55,225 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:01:55,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:01:55,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:01:55,226 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:01:55,227 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 22:01:55,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:55,272 INFO L263 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-27 22:01:55,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:01:55,281 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:01:55,611 INFO L272 TraceCheckUtils]: 0: Hoare triple {11468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,611 INFO L290 TraceCheckUtils]: 1: Hoare triple {11468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-27 22:01:55,611 INFO L290 TraceCheckUtils]: 2: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {11468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:55,612 INFO L290 TraceCheckUtils]: 5: Hoare triple {11468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11473#(= main_~y~0 0)} is VALID [2022-04-27 22:01:55,612 INFO L290 TraceCheckUtils]: 6: Hoare triple {11473#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:01:55,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {11474#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:01:55,613 INFO L290 TraceCheckUtils]: 8: Hoare triple {11475#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:01:55,614 INFO L290 TraceCheckUtils]: 9: Hoare triple {11476#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:01:55,614 INFO L290 TraceCheckUtils]: 10: Hoare triple {11477#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:01:55,615 INFO L290 TraceCheckUtils]: 11: Hoare triple {11478#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:01:55,615 INFO L290 TraceCheckUtils]: 12: Hoare triple {11479#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:01:55,616 INFO L290 TraceCheckUtils]: 13: Hoare triple {11480#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:01:55,616 INFO L290 TraceCheckUtils]: 14: Hoare triple {11481#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:01:55,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {11482#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:01:55,617 INFO L290 TraceCheckUtils]: 16: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:01:55,618 INFO L290 TraceCheckUtils]: 17: Hoare triple {11483#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-27 22:01:55,618 INFO L290 TraceCheckUtils]: 18: Hoare triple {11484#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:01:55,619 INFO L290 TraceCheckUtils]: 19: Hoare triple {11485#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:01:55,619 INFO L290 TraceCheckUtils]: 20: Hoare triple {11486#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:01:55,620 INFO L290 TraceCheckUtils]: 21: Hoare triple {11487#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:01:55,620 INFO L290 TraceCheckUtils]: 22: Hoare triple {11488#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:01:55,621 INFO L290 TraceCheckUtils]: 23: Hoare triple {11489#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:01:55,621 INFO L290 TraceCheckUtils]: 24: Hoare triple {11490#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11568#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 25: Hoare triple {11568#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 26: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 27: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 28: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 29: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 30: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 31: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 32: Hoare triple {11469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L272 TraceCheckUtils]: 33: Hoare triple {11469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {11469#false} is VALID [2022-04-27 22:01:55,622 INFO L290 TraceCheckUtils]: 34: Hoare triple {11469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11469#false} is VALID [2022-04-27 22:01:55,623 INFO L290 TraceCheckUtils]: 35: Hoare triple {11469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,623 INFO L290 TraceCheckUtils]: 36: Hoare triple {11469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:55,623 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:55,623 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:01:56,172 INFO L290 TraceCheckUtils]: 36: Hoare triple {11469#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 35: Hoare triple {11469#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 34: Hoare triple {11469#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L272 TraceCheckUtils]: 33: Hoare triple {11469#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 32: Hoare triple {11469#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 31: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 30: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 29: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 28: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 27: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:56,173 INFO L290 TraceCheckUtils]: 26: Hoare triple {11469#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {11469#false} is VALID [2022-04-27 22:01:56,174 INFO L290 TraceCheckUtils]: 25: Hoare triple {11638#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {11469#false} is VALID [2022-04-27 22:01:56,175 INFO L290 TraceCheckUtils]: 24: Hoare triple {11642#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11638#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:01:56,175 INFO L290 TraceCheckUtils]: 23: Hoare triple {11646#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11642#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:56,176 INFO L290 TraceCheckUtils]: 22: Hoare triple {11650#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11646#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:56,177 INFO L290 TraceCheckUtils]: 21: Hoare triple {11654#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11650#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:56,177 INFO L290 TraceCheckUtils]: 20: Hoare triple {11658#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11654#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 22:01:56,178 INFO L290 TraceCheckUtils]: 19: Hoare triple {11662#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11658#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 22:01:56,179 INFO L290 TraceCheckUtils]: 18: Hoare triple {11666#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11662#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-27 22:01:56,179 INFO L290 TraceCheckUtils]: 17: Hoare triple {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {11666#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-27 22:01:56,180 INFO L290 TraceCheckUtils]: 16: Hoare triple {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 22:01:56,180 INFO L290 TraceCheckUtils]: 15: Hoare triple {11677#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11670#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 22:01:56,182 INFO L290 TraceCheckUtils]: 14: Hoare triple {11681#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11677#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:56,183 INFO L290 TraceCheckUtils]: 13: Hoare triple {11685#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11681#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:56,184 INFO L290 TraceCheckUtils]: 12: Hoare triple {11689#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11685#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:01:56,184 INFO L290 TraceCheckUtils]: 11: Hoare triple {11693#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11689#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:01:56,185 INFO L290 TraceCheckUtils]: 10: Hoare triple {11697#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11693#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:01:56,186 INFO L290 TraceCheckUtils]: 9: Hoare triple {11701#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11697#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:01:56,186 INFO L290 TraceCheckUtils]: 8: Hoare triple {11705#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11701#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:01:56,187 INFO L290 TraceCheckUtils]: 7: Hoare triple {11709#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11705#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:01:56,187 INFO L290 TraceCheckUtils]: 6: Hoare triple {11713#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11709#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:01:56,188 INFO L290 TraceCheckUtils]: 5: Hoare triple {11468#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11713#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:01:56,188 INFO L272 TraceCheckUtils]: 4: Hoare triple {11468#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:56,188 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11468#true} {11468#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:56,188 INFO L290 TraceCheckUtils]: 2: Hoare triple {11468#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:56,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {11468#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11468#true} is VALID [2022-04-27 22:01:56,188 INFO L272 TraceCheckUtils]: 0: Hoare triple {11468#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11468#true} is VALID [2022-04-27 22:01:56,189 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 83 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:01:56,189 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [322995983] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:01:56,189 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:01:56,189 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-27 22:01:56,189 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [120411132] [2022-04-27 22:01:56,189 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:01:56,189 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 22:01:56,190 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:01:56,190 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:01:56,231 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:01:56,231 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-27 22:01:56,231 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:01:56,232 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-27 22:01:56,232 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=264, Invalid=1458, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:01:56,232 INFO L87 Difference]: Start difference. First operand 114 states and 128 transitions. Second operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:07,239 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~z~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 4294967294 c_main_~z~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 4294967294 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967292 c_main_~z~0) 4294967296)) (< 0 (mod (+ 4294967290 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967292 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 4294967293) 4294967296)) (< 0 (mod (+ 4294967290 c_main_~z~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967291 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967289 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967289 c_main_~z~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 4294967293 c_main_~z~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 4294967291 c_main_~z~0) 4294967296))) is different from false [2022-04-27 22:02:27,945 WARN L232 SmtUtils]: Spent 11.30s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:02:31,729 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.19s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:02:48,560 WARN L232 SmtUtils]: Spent 10.04s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:02,658 WARN L232 SmtUtils]: Spent 6.50s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:16,236 WARN L232 SmtUtils]: Spent 5.83s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:26,372 WARN L232 SmtUtils]: Spent 6.86s on a formula simplification that was a NOOP. DAG size: 65 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:38,790 WARN L232 SmtUtils]: Spent 8.69s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:03:54,100 WARN L232 SmtUtils]: Spent 5.40s on a formula simplification that was a NOOP. DAG size: 62 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:05:37,257 WARN L232 SmtUtils]: Spent 10.01s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:05:55,232 WARN L232 SmtUtils]: Spent 8.19s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:06,161 WARN L232 SmtUtils]: Spent 6.93s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:20,600 WARN L232 SmtUtils]: Spent 5.60s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:30,545 WARN L232 SmtUtils]: Spent 7.18s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:27,659 WARN L232 SmtUtils]: Spent 5.30s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:08:09,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:09,445 INFO L93 Difference]: Finished difference Result 339 states and 409 transitions. [2022-04-27 22:08:09,445 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 239 states. [2022-04-27 22:08:09,445 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 22:08:09,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:09,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:09,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 355 transitions. [2022-04-27 22:08:09,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:09,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 355 transitions. [2022-04-27 22:08:09,458 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 239 states and 355 transitions. [2022-04-27 22:08:14,497 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 355 edges. 355 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:14,503 INFO L225 Difference]: With dead ends: 339 [2022-04-27 22:08:14,503 INFO L226 Difference]: Without dead ends: 310 [2022-04-27 22:08:14,515 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 332 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 276 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 28411 ImplicationChecksByTransitivity, 358.1s TimeCoverageRelationStatistics Valid=10945, Invalid=65510, Unknown=1, NotChecked=550, Total=77006 [2022-04-27 22:08:14,516 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 451 mSDsluCounter, 117 mSDsCounter, 0 mSdLazyCounter, 1273 mSolverCounterSat, 1337 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 451 SdHoareTripleChecker+Valid, 134 SdHoareTripleChecker+Invalid, 2611 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1337 IncrementalHoareTripleChecker+Valid, 1273 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1 IncrementalHoareTripleChecker+Unchecked, 7.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:14,516 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [451 Valid, 134 Invalid, 2611 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1337 Valid, 1273 Invalid, 0 Unknown, 1 Unchecked, 7.5s Time] [2022-04-27 22:08:14,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2022-04-27 22:08:15,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 180. [2022-04-27 22:08:15,404 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:15,405 INFO L82 GeneralOperation]: Start isEquivalent. First operand 310 states. Second operand has 180 states, 175 states have (on average 1.177142857142857) internal successors, (206), 175 states have internal predecessors, (206), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:15,405 INFO L74 IsIncluded]: Start isIncluded. First operand 310 states. Second operand has 180 states, 175 states have (on average 1.177142857142857) internal successors, (206), 175 states have internal predecessors, (206), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:15,405 INFO L87 Difference]: Start difference. First operand 310 states. Second operand has 180 states, 175 states have (on average 1.177142857142857) internal successors, (206), 175 states have internal predecessors, (206), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:15,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:15,413 INFO L93 Difference]: Finished difference Result 310 states and 349 transitions. [2022-04-27 22:08:15,413 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 349 transitions. [2022-04-27 22:08:15,413 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:15,413 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:15,414 INFO L74 IsIncluded]: Start isIncluded. First operand has 180 states, 175 states have (on average 1.177142857142857) internal successors, (206), 175 states have internal predecessors, (206), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 310 states. [2022-04-27 22:08:15,414 INFO L87 Difference]: Start difference. First operand has 180 states, 175 states have (on average 1.177142857142857) internal successors, (206), 175 states have internal predecessors, (206), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 310 states. [2022-04-27 22:08:15,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:15,420 INFO L93 Difference]: Finished difference Result 310 states and 349 transitions. [2022-04-27 22:08:15,420 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 349 transitions. [2022-04-27 22:08:15,421 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:15,421 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:15,421 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:15,421 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:15,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 175 states have (on average 1.177142857142857) internal successors, (206), 175 states have internal predecessors, (206), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:15,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 210 transitions. [2022-04-27 22:08:15,426 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 210 transitions. Word has length 37 [2022-04-27 22:08:15,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:15,426 INFO L495 AbstractCegarLoop]: Abstraction has 180 states and 210 transitions. [2022-04-27 22:08:15,426 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 1.2380952380952381) internal successors, (52), 41 states have internal predecessors, (52), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:15,426 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 210 transitions. [2022-04-27 22:08:15,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-27 22:08:15,427 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:15,427 INFO L195 NwaCegarLoop]: trace histogram [12, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:15,450 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-04-27 22:08:15,640 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-27 22:08:15,640 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:15,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:15,641 INFO L85 PathProgramCache]: Analyzing trace with hash -1368491133, now seen corresponding path program 20 times [2022-04-27 22:08:15,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:15,641 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584610835] [2022-04-27 22:08:15,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:15,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:15,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:15,886 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:15,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:15,890 INFO L290 TraceCheckUtils]: 0: Hoare triple {13717#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13698#true} is VALID [2022-04-27 22:08:15,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {13698#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:15,891 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13698#true} {13698#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:15,891 INFO L272 TraceCheckUtils]: 0: Hoare triple {13698#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13717#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:15,891 INFO L290 TraceCheckUtils]: 1: Hoare triple {13717#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13698#true} is VALID [2022-04-27 22:08:15,892 INFO L290 TraceCheckUtils]: 2: Hoare triple {13698#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:15,892 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13698#true} {13698#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:15,892 INFO L272 TraceCheckUtils]: 4: Hoare triple {13698#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:15,892 INFO L290 TraceCheckUtils]: 5: Hoare triple {13698#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13703#(= main_~y~0 0)} is VALID [2022-04-27 22:08:15,893 INFO L290 TraceCheckUtils]: 6: Hoare triple {13703#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13704#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:15,893 INFO L290 TraceCheckUtils]: 7: Hoare triple {13704#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13705#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:15,894 INFO L290 TraceCheckUtils]: 8: Hoare triple {13705#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13706#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:15,895 INFO L290 TraceCheckUtils]: 9: Hoare triple {13706#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13707#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:15,895 INFO L290 TraceCheckUtils]: 10: Hoare triple {13707#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13708#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:15,896 INFO L290 TraceCheckUtils]: 11: Hoare triple {13708#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:15,896 INFO L290 TraceCheckUtils]: 12: Hoare triple {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:15,897 INFO L290 TraceCheckUtils]: 13: Hoare triple {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {13710#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:15,898 INFO L290 TraceCheckUtils]: 14: Hoare triple {13710#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13711#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:15,898 INFO L290 TraceCheckUtils]: 15: Hoare triple {13711#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13712#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:08:15,899 INFO L290 TraceCheckUtils]: 16: Hoare triple {13712#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13713#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:08:15,900 INFO L290 TraceCheckUtils]: 17: Hoare triple {13713#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13714#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:08:15,900 INFO L290 TraceCheckUtils]: 18: Hoare triple {13714#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13715#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:08:15,901 INFO L290 TraceCheckUtils]: 19: Hoare triple {13715#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13716#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:08:15,901 INFO L290 TraceCheckUtils]: 20: Hoare triple {13716#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 21: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 22: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 23: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 24: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 25: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 26: Hoare triple {13699#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 27: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 28: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 29: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:15,902 INFO L290 TraceCheckUtils]: 30: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L290 TraceCheckUtils]: 31: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L290 TraceCheckUtils]: 32: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L290 TraceCheckUtils]: 33: Hoare triple {13699#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L272 TraceCheckUtils]: 34: Hoare triple {13699#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L290 TraceCheckUtils]: 35: Hoare triple {13699#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L290 TraceCheckUtils]: 36: Hoare triple {13699#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L290 TraceCheckUtils]: 37: Hoare triple {13699#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:15,903 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 42 proven. 42 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:08:15,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:15,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584610835] [2022-04-27 22:08:15,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1584610835] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:15,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [909146255] [2022-04-27 22:08:15,904 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:08:15,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:15,904 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:15,908 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:15,909 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 22:08:15,964 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:08:15,964 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:15,966 INFO L263 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-27 22:08:15,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:15,976 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:16,309 INFO L272 TraceCheckUtils]: 0: Hoare triple {13698#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,310 INFO L290 TraceCheckUtils]: 1: Hoare triple {13698#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13698#true} is VALID [2022-04-27 22:08:16,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {13698#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,310 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13698#true} {13698#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,310 INFO L272 TraceCheckUtils]: 4: Hoare triple {13698#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,310 INFO L290 TraceCheckUtils]: 5: Hoare triple {13698#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13703#(= main_~y~0 0)} is VALID [2022-04-27 22:08:16,310 INFO L290 TraceCheckUtils]: 6: Hoare triple {13703#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13704#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:16,311 INFO L290 TraceCheckUtils]: 7: Hoare triple {13704#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13705#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:16,312 INFO L290 TraceCheckUtils]: 8: Hoare triple {13705#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13706#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:16,312 INFO L290 TraceCheckUtils]: 9: Hoare triple {13706#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13707#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:16,313 INFO L290 TraceCheckUtils]: 10: Hoare triple {13707#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13708#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:16,313 INFO L290 TraceCheckUtils]: 11: Hoare triple {13708#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,313 INFO L290 TraceCheckUtils]: 12: Hoare triple {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,314 INFO L290 TraceCheckUtils]: 13: Hoare triple {13709#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {13760#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,314 INFO L290 TraceCheckUtils]: 14: Hoare triple {13760#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13764#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:08:16,315 INFO L290 TraceCheckUtils]: 15: Hoare triple {13764#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13768#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,315 INFO L290 TraceCheckUtils]: 16: Hoare triple {13768#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13772#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,316 INFO L290 TraceCheckUtils]: 17: Hoare triple {13772#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13776#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,317 INFO L290 TraceCheckUtils]: 18: Hoare triple {13776#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13780#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,317 INFO L290 TraceCheckUtils]: 19: Hoare triple {13780#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13784#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 20: Hoare triple {13784#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 4)) (+ main_~z~0 2)) (<= 6 main_~y~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 21: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 22: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 23: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 24: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 25: Hoare triple {13699#false} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 26: Hoare triple {13699#false} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 27: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:16,318 INFO L290 TraceCheckUtils]: 28: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 29: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 30: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 31: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 32: Hoare triple {13699#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 33: Hoare triple {13699#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L272 TraceCheckUtils]: 34: Hoare triple {13699#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 35: Hoare triple {13699#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 36: Hoare triple {13699#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L290 TraceCheckUtils]: 37: Hoare triple {13699#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,319 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 42 proven. 42 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:08:16,319 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:16,800 INFO L290 TraceCheckUtils]: 37: Hoare triple {13699#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,800 INFO L290 TraceCheckUtils]: 36: Hoare triple {13699#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,800 INFO L290 TraceCheckUtils]: 35: Hoare triple {13699#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13699#false} is VALID [2022-04-27 22:08:16,800 INFO L272 TraceCheckUtils]: 34: Hoare triple {13699#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {13699#false} is VALID [2022-04-27 22:08:16,800 INFO L290 TraceCheckUtils]: 33: Hoare triple {13851#(< 0 (mod main_~y~0 4294967296))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13699#false} is VALID [2022-04-27 22:08:16,801 INFO L290 TraceCheckUtils]: 32: Hoare triple {13855#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13851#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:08:16,802 INFO L290 TraceCheckUtils]: 31: Hoare triple {13859#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13855#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:16,803 INFO L290 TraceCheckUtils]: 30: Hoare triple {13863#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13859#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:16,804 INFO L290 TraceCheckUtils]: 29: Hoare triple {13867#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13863#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:16,805 INFO L290 TraceCheckUtils]: 28: Hoare triple {13871#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13867#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,805 INFO L290 TraceCheckUtils]: 27: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {13871#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,806 INFO L290 TraceCheckUtils]: 26: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,806 INFO L290 TraceCheckUtils]: 25: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,806 INFO L290 TraceCheckUtils]: 24: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,806 INFO L290 TraceCheckUtils]: 23: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,807 INFO L290 TraceCheckUtils]: 22: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,807 INFO L290 TraceCheckUtils]: 21: Hoare triple {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,807 INFO L290 TraceCheckUtils]: 20: Hoare triple {13897#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13875#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:16,808 INFO L290 TraceCheckUtils]: 19: Hoare triple {13901#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13897#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:08:16,809 INFO L290 TraceCheckUtils]: 18: Hoare triple {13905#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13901#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:08:16,810 INFO L290 TraceCheckUtils]: 17: Hoare triple {13909#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13905#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:08:16,811 INFO L290 TraceCheckUtils]: 16: Hoare triple {13913#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13909#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:08:16,811 INFO L290 TraceCheckUtils]: 15: Hoare triple {13917#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13913#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:08:16,812 INFO L290 TraceCheckUtils]: 14: Hoare triple {13921#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13917#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:08:16,812 INFO L290 TraceCheckUtils]: 13: Hoare triple {13698#true} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {13921#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 12: Hoare triple {13698#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 11: Hoare triple {13698#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 10: Hoare triple {13698#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 9: Hoare triple {13698#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 8: Hoare triple {13698#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {13698#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {13698#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 5: Hoare triple {13698#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L272 TraceCheckUtils]: 4: Hoare triple {13698#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13698#true} {13698#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 2: Hoare triple {13698#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L290 TraceCheckUtils]: 1: Hoare triple {13698#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13698#true} is VALID [2022-04-27 22:08:16,813 INFO L272 TraceCheckUtils]: 0: Hoare triple {13698#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13698#true} is VALID [2022-04-27 22:08:16,814 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 42 proven. 42 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:08:16,814 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [909146255] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:16,814 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:16,814 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 38 [2022-04-27 22:08:16,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919966167] [2022-04-27 22:08:16,815 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:16,815 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-27 22:08:16,815 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:16,815 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:16,854 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:16,855 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 22:08:16,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:16,855 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 22:08:16,855 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=1172, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 22:08:16,856 INFO L87 Difference]: Start difference. First operand 180 states and 210 transitions. Second operand has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:24,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:24,617 INFO L93 Difference]: Finished difference Result 251 states and 283 transitions. [2022-04-27 22:08:24,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2022-04-27 22:08:24,617 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-27 22:08:24,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:24,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:24,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 110 transitions. [2022-04-27 22:08:24,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:24,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 110 transitions. [2022-04-27 22:08:24,622 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 52 states and 110 transitions. [2022-04-27 22:08:25,128 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 110 edges. 110 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:25,132 INFO L225 Difference]: With dead ends: 251 [2022-04-27 22:08:25,132 INFO L226 Difference]: Without dead ends: 225 [2022-04-27 22:08:25,134 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 63 SyntacticMatches, 1 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1912 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1228, Invalid=6254, Unknown=0, NotChecked=0, Total=7482 [2022-04-27 22:08:25,135 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 234 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 524 mSolverCounterSat, 198 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 234 SdHoareTripleChecker+Valid, 113 SdHoareTripleChecker+Invalid, 722 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 198 IncrementalHoareTripleChecker+Valid, 524 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:25,136 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [234 Valid, 113 Invalid, 722 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [198 Valid, 524 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-27 22:08:25,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2022-04-27 22:08:25,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 149. [2022-04-27 22:08:25,930 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:25,930 INFO L82 GeneralOperation]: Start isEquivalent. First operand 225 states. Second operand has 149 states, 144 states have (on average 1.1875) internal successors, (171), 144 states have internal predecessors, (171), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:25,931 INFO L74 IsIncluded]: Start isIncluded. First operand 225 states. Second operand has 149 states, 144 states have (on average 1.1875) internal successors, (171), 144 states have internal predecessors, (171), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:25,931 INFO L87 Difference]: Start difference. First operand 225 states. Second operand has 149 states, 144 states have (on average 1.1875) internal successors, (171), 144 states have internal predecessors, (171), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:25,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:25,935 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2022-04-27 22:08:25,935 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 254 transitions. [2022-04-27 22:08:25,936 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:25,936 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:25,936 INFO L74 IsIncluded]: Start isIncluded. First operand has 149 states, 144 states have (on average 1.1875) internal successors, (171), 144 states have internal predecessors, (171), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 225 states. [2022-04-27 22:08:25,936 INFO L87 Difference]: Start difference. First operand has 149 states, 144 states have (on average 1.1875) internal successors, (171), 144 states have internal predecessors, (171), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 225 states. [2022-04-27 22:08:25,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:25,940 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2022-04-27 22:08:25,940 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 254 transitions. [2022-04-27 22:08:25,940 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:25,940 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:25,941 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:25,941 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:25,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 144 states have (on average 1.1875) internal successors, (171), 144 states have internal predecessors, (171), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:25,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 175 transitions. [2022-04-27 22:08:25,943 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 175 transitions. Word has length 38 [2022-04-27 22:08:25,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:25,943 INFO L495 AbstractCegarLoop]: Abstraction has 149 states and 175 transitions. [2022-04-27 22:08:25,944 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.4210526315789473) internal successors, (54), 37 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:25,944 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 175 transitions. [2022-04-27 22:08:25,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-04-27 22:08:25,944 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:25,944 INFO L195 NwaCegarLoop]: trace histogram [8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:25,967 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2022-04-27 22:08:26,159 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-27 22:08:26,159 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:26,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:26,160 INFO L85 PathProgramCache]: Analyzing trace with hash 1777126115, now seen corresponding path program 21 times [2022-04-27 22:08:26,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:26,160 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050510795] [2022-04-27 22:08:26,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:26,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:26,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:26,398 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:26,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:26,402 INFO L290 TraceCheckUtils]: 0: Hoare triple {15212#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15196#true} is VALID [2022-04-27 22:08:26,402 INFO L290 TraceCheckUtils]: 1: Hoare triple {15196#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,402 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {15196#true} {15196#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,403 INFO L272 TraceCheckUtils]: 0: Hoare triple {15196#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15212#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:26,403 INFO L290 TraceCheckUtils]: 1: Hoare triple {15212#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15196#true} is VALID [2022-04-27 22:08:26,403 INFO L290 TraceCheckUtils]: 2: Hoare triple {15196#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,403 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15196#true} {15196#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,403 INFO L272 TraceCheckUtils]: 4: Hoare triple {15196#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,403 INFO L290 TraceCheckUtils]: 5: Hoare triple {15196#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15196#true} is VALID [2022-04-27 22:08:26,403 INFO L290 TraceCheckUtils]: 6: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 7: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 8: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 9: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 11: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 12: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,404 INFO L290 TraceCheckUtils]: 13: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,405 INFO L290 TraceCheckUtils]: 14: Hoare triple {15196#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,405 INFO L290 TraceCheckUtils]: 15: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,406 INFO L290 TraceCheckUtils]: 16: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:26,407 INFO L290 TraceCheckUtils]: 17: Hoare triple {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,408 INFO L290 TraceCheckUtils]: 18: Hoare triple {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,409 INFO L290 TraceCheckUtils]: 19: Hoare triple {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,410 INFO L290 TraceCheckUtils]: 20: Hoare triple {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:08:26,411 INFO L290 TraceCheckUtils]: 21: Hoare triple {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,412 INFO L290 TraceCheckUtils]: 22: Hoare triple {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,412 INFO L290 TraceCheckUtils]: 23: Hoare triple {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,413 INFO L290 TraceCheckUtils]: 24: Hoare triple {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,414 INFO L290 TraceCheckUtils]: 25: Hoare triple {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,415 INFO L290 TraceCheckUtils]: 26: Hoare triple {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,416 INFO L290 TraceCheckUtils]: 27: Hoare triple {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:08:26,417 INFO L290 TraceCheckUtils]: 28: Hoare triple {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,418 INFO L290 TraceCheckUtils]: 29: Hoare triple {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,419 INFO L290 TraceCheckUtils]: 30: Hoare triple {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,424 INFO L290 TraceCheckUtils]: 31: Hoare triple {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:26,425 INFO L290 TraceCheckUtils]: 32: Hoare triple {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,425 INFO L290 TraceCheckUtils]: 33: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,426 INFO L272 TraceCheckUtils]: 34: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {15210#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:08:26,426 INFO L290 TraceCheckUtils]: 35: Hoare triple {15210#(not (= |__VERIFIER_assert_#in~cond| 0))} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15211#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:08:26,427 INFO L290 TraceCheckUtils]: 36: Hoare triple {15211#(not (= __VERIFIER_assert_~cond 0))} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15197#false} is VALID [2022-04-27 22:08:26,427 INFO L290 TraceCheckUtils]: 37: Hoare triple {15197#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15197#false} is VALID [2022-04-27 22:08:26,427 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:08:26,427 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:26,427 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050510795] [2022-04-27 22:08:26,427 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2050510795] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:26,427 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [101358133] [2022-04-27 22:08:26,428 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:08:26,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:26,428 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:26,429 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:26,430 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 22:08:26,606 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-04-27 22:08:26,606 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:26,608 INFO L263 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 52 conjunts are in the unsatisfiable core [2022-04-27 22:08:26,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:26,620 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:26,890 INFO L272 TraceCheckUtils]: 0: Hoare triple {15196#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,890 INFO L290 TraceCheckUtils]: 1: Hoare triple {15196#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15196#true} is VALID [2022-04-27 22:08:26,890 INFO L290 TraceCheckUtils]: 2: Hoare triple {15196#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,890 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15196#true} {15196#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,890 INFO L272 TraceCheckUtils]: 4: Hoare triple {15196#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:26,890 INFO L290 TraceCheckUtils]: 5: Hoare triple {15196#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 6: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 7: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 8: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 9: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 10: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 11: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 12: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,891 INFO L290 TraceCheckUtils]: 13: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:26,895 INFO L290 TraceCheckUtils]: 14: Hoare triple {15196#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,895 INFO L290 TraceCheckUtils]: 15: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,896 INFO L290 TraceCheckUtils]: 16: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:26,896 INFO L290 TraceCheckUtils]: 17: Hoare triple {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,897 INFO L290 TraceCheckUtils]: 18: Hoare triple {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,898 INFO L290 TraceCheckUtils]: 19: Hoare triple {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,898 INFO L290 TraceCheckUtils]: 20: Hoare triple {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:08:26,899 INFO L290 TraceCheckUtils]: 21: Hoare triple {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,900 INFO L290 TraceCheckUtils]: 22: Hoare triple {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,901 INFO L290 TraceCheckUtils]: 23: Hoare triple {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,901 INFO L290 TraceCheckUtils]: 24: Hoare triple {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,902 INFO L290 TraceCheckUtils]: 25: Hoare triple {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,902 INFO L290 TraceCheckUtils]: 26: Hoare triple {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,903 INFO L290 TraceCheckUtils]: 27: Hoare triple {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:08:26,904 INFO L290 TraceCheckUtils]: 28: Hoare triple {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,905 INFO L290 TraceCheckUtils]: 29: Hoare triple {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,905 INFO L290 TraceCheckUtils]: 30: Hoare triple {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:26,906 INFO L290 TraceCheckUtils]: 31: Hoare triple {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:26,907 INFO L290 TraceCheckUtils]: 32: Hoare triple {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,907 INFO L290 TraceCheckUtils]: 33: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:26,908 INFO L272 TraceCheckUtils]: 34: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {15318#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:08:26,908 INFO L290 TraceCheckUtils]: 35: Hoare triple {15318#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15322#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:08:26,908 INFO L290 TraceCheckUtils]: 36: Hoare triple {15322#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15197#false} is VALID [2022-04-27 22:08:26,908 INFO L290 TraceCheckUtils]: 37: Hoare triple {15197#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15197#false} is VALID [2022-04-27 22:08:26,909 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:08:26,909 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:27,083 INFO L290 TraceCheckUtils]: 37: Hoare triple {15197#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15197#false} is VALID [2022-04-27 22:08:27,086 INFO L290 TraceCheckUtils]: 36: Hoare triple {15322#(<= 1 __VERIFIER_assert_~cond)} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {15197#false} is VALID [2022-04-27 22:08:27,086 INFO L290 TraceCheckUtils]: 35: Hoare triple {15318#(<= 1 |__VERIFIER_assert_#in~cond|)} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {15322#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:08:27,087 INFO L272 TraceCheckUtils]: 34: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {15318#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:08:27,087 INFO L290 TraceCheckUtils]: 33: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:27,088 INFO L290 TraceCheckUtils]: 32: Hoare triple {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:27,088 INFO L290 TraceCheckUtils]: 31: Hoare triple {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:27,089 INFO L290 TraceCheckUtils]: 30: Hoare triple {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,090 INFO L290 TraceCheckUtils]: 29: Hoare triple {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,091 INFO L290 TraceCheckUtils]: 28: Hoare triple {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,091 INFO L290 TraceCheckUtils]: 27: Hoare triple {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:08:27,092 INFO L290 TraceCheckUtils]: 26: Hoare triple {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,093 INFO L290 TraceCheckUtils]: 25: Hoare triple {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,093 INFO L290 TraceCheckUtils]: 24: Hoare triple {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,094 INFO L290 TraceCheckUtils]: 23: Hoare triple {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15209#(<= main_~x~0 (+ 8 (* (div (+ main_~x~0 (- 8)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,095 INFO L290 TraceCheckUtils]: 22: Hoare triple {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15208#(<= main_~x~0 (+ 7 (* (div (+ main_~x~0 (- 7)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,095 INFO L290 TraceCheckUtils]: 21: Hoare triple {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15207#(<= main_~x~0 (+ 6 (* (div (+ main_~x~0 (- 6)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,096 INFO L290 TraceCheckUtils]: 20: Hoare triple {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15206#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 (- 5)) 4294967296)) 5))} is VALID [2022-04-27 22:08:27,097 INFO L290 TraceCheckUtils]: 19: Hoare triple {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15205#(<= main_~x~0 (+ 4 (* (div (+ main_~x~0 (- 4)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,097 INFO L290 TraceCheckUtils]: 18: Hoare triple {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15204#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,098 INFO L290 TraceCheckUtils]: 17: Hoare triple {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15203#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:27,099 INFO L290 TraceCheckUtils]: 16: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {15202#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:27,099 INFO L290 TraceCheckUtils]: 15: Hoare triple {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 14: Hoare triple {15196#true} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {15201#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 13: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 12: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 11: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 10: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 9: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 8: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 7: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 6: Hoare triple {15196#true} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 5: Hoare triple {15196#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L272 TraceCheckUtils]: 4: Hoare triple {15196#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {15196#true} {15196#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:27,100 INFO L290 TraceCheckUtils]: 2: Hoare triple {15196#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:27,101 INFO L290 TraceCheckUtils]: 1: Hoare triple {15196#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {15196#true} is VALID [2022-04-27 22:08:27,101 INFO L272 TraceCheckUtils]: 0: Hoare triple {15196#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {15196#true} is VALID [2022-04-27 22:08:27,101 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2022-04-27 22:08:27,101 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [101358133] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:27,101 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:27,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 16 [2022-04-27 22:08:27,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986680319] [2022-04-27 22:08:27,101 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:27,102 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-27 22:08:27,102 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:27,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:27,130 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:27,130 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:08:27,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:27,131 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:08:27,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=209, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:08:27,131 INFO L87 Difference]: Start difference. First operand 149 states and 175 transitions. Second operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:28,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:28,651 INFO L93 Difference]: Finished difference Result 191 states and 220 transitions. [2022-04-27 22:08:28,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 22:08:28,651 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 38 [2022-04-27 22:08:28,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:28,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:28,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 44 transitions. [2022-04-27 22:08:28,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:28,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 44 transitions. [2022-04-27 22:08:28,653 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 44 transitions. [2022-04-27 22:08:28,700 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:28,702 INFO L225 Difference]: With dead ends: 191 [2022-04-27 22:08:28,702 INFO L226 Difference]: Without dead ends: 177 [2022-04-27 22:08:28,702 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 81 SyntacticMatches, 3 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=622, Unknown=0, NotChecked=0, Total=702 [2022-04-27 22:08:28,703 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 19 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 355 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:28,703 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 74 Invalid, 355 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:08:28,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2022-04-27 22:08:29,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 160. [2022-04-27 22:08:29,498 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:29,498 INFO L82 GeneralOperation]: Start isEquivalent. First operand 177 states. Second operand has 160 states, 155 states have (on average 1.1870967741935483) internal successors, (184), 155 states have internal predecessors, (184), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,499 INFO L74 IsIncluded]: Start isIncluded. First operand 177 states. Second operand has 160 states, 155 states have (on average 1.1870967741935483) internal successors, (184), 155 states have internal predecessors, (184), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,499 INFO L87 Difference]: Start difference. First operand 177 states. Second operand has 160 states, 155 states have (on average 1.1870967741935483) internal successors, (184), 155 states have internal predecessors, (184), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:29,501 INFO L93 Difference]: Finished difference Result 177 states and 205 transitions. [2022-04-27 22:08:29,501 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 205 transitions. [2022-04-27 22:08:29,501 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:29,501 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:29,501 INFO L74 IsIncluded]: Start isIncluded. First operand has 160 states, 155 states have (on average 1.1870967741935483) internal successors, (184), 155 states have internal predecessors, (184), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 177 states. [2022-04-27 22:08:29,501 INFO L87 Difference]: Start difference. First operand has 160 states, 155 states have (on average 1.1870967741935483) internal successors, (184), 155 states have internal predecessors, (184), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 177 states. [2022-04-27 22:08:29,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:29,504 INFO L93 Difference]: Finished difference Result 177 states and 205 transitions. [2022-04-27 22:08:29,504 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 205 transitions. [2022-04-27 22:08:29,504 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:29,504 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:29,504 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:29,504 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:29,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 155 states have (on average 1.1870967741935483) internal successors, (184), 155 states have internal predecessors, (184), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 188 transitions. [2022-04-27 22:08:29,507 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 188 transitions. Word has length 38 [2022-04-27 22:08:29,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:29,507 INFO L495 AbstractCegarLoop]: Abstraction has 160 states and 188 transitions. [2022-04-27 22:08:29,507 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.875) internal successors, (30), 13 states have internal predecessors, (30), 2 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:29,507 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 188 transitions. [2022-04-27 22:08:29,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-04-27 22:08:29,508 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:29,508 INFO L195 NwaCegarLoop]: trace histogram [11, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:29,527 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-27 22:08:29,723 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:29,723 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:29,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:29,724 INFO L85 PathProgramCache]: Analyzing trace with hash -800026242, now seen corresponding path program 22 times [2022-04-27 22:08:29,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:29,724 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870894896] [2022-04-27 22:08:29,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:29,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:29,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:30,136 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:30,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:30,139 INFO L290 TraceCheckUtils]: 0: Hoare triple {16436#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16410#true} is VALID [2022-04-27 22:08:30,139 INFO L290 TraceCheckUtils]: 1: Hoare triple {16410#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,139 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16410#true} {16410#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,140 INFO L272 TraceCheckUtils]: 0: Hoare triple {16410#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16436#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:30,140 INFO L290 TraceCheckUtils]: 1: Hoare triple {16436#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16410#true} is VALID [2022-04-27 22:08:30,140 INFO L290 TraceCheckUtils]: 2: Hoare triple {16410#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,140 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16410#true} {16410#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,140 INFO L272 TraceCheckUtils]: 4: Hoare triple {16410#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,140 INFO L290 TraceCheckUtils]: 5: Hoare triple {16410#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16415#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,141 INFO L290 TraceCheckUtils]: 6: Hoare triple {16415#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16416#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:30,141 INFO L290 TraceCheckUtils]: 7: Hoare triple {16416#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16417#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:30,142 INFO L290 TraceCheckUtils]: 8: Hoare triple {16417#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16418#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:30,142 INFO L290 TraceCheckUtils]: 9: Hoare triple {16418#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16419#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,143 INFO L290 TraceCheckUtils]: 10: Hoare triple {16419#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16420#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:30,143 INFO L290 TraceCheckUtils]: 11: Hoare triple {16420#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16421#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:30,144 INFO L290 TraceCheckUtils]: 12: Hoare triple {16421#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16422#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:08:30,144 INFO L290 TraceCheckUtils]: 13: Hoare triple {16422#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16423#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:08:30,145 INFO L290 TraceCheckUtils]: 14: Hoare triple {16423#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16424#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:08:30,145 INFO L290 TraceCheckUtils]: 15: Hoare triple {16424#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16425#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:08:30,146 INFO L290 TraceCheckUtils]: 16: Hoare triple {16425#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:08:30,146 INFO L290 TraceCheckUtils]: 17: Hoare triple {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:08:30,147 INFO L290 TraceCheckUtils]: 18: Hoare triple {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {16427#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-27 22:08:30,147 INFO L290 TraceCheckUtils]: 19: Hoare triple {16427#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16428#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-27 22:08:30,148 INFO L290 TraceCheckUtils]: 20: Hoare triple {16428#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16429#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:08:30,148 INFO L290 TraceCheckUtils]: 21: Hoare triple {16429#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16430#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:08:30,149 INFO L290 TraceCheckUtils]: 22: Hoare triple {16430#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16431#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:08:30,149 INFO L290 TraceCheckUtils]: 23: Hoare triple {16431#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16432#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:30,150 INFO L290 TraceCheckUtils]: 24: Hoare triple {16432#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16433#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:30,150 INFO L290 TraceCheckUtils]: 25: Hoare triple {16433#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16434#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:08:30,151 INFO L290 TraceCheckUtils]: 26: Hoare triple {16434#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16435#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:08:30,151 INFO L290 TraceCheckUtils]: 27: Hoare triple {16435#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,151 INFO L290 TraceCheckUtils]: 28: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,151 INFO L290 TraceCheckUtils]: 29: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 30: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 31: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 32: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 33: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 34: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 35: Hoare triple {16411#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L272 TraceCheckUtils]: 36: Hoare triple {16411#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {16411#false} is VALID [2022-04-27 22:08:30,152 INFO L290 TraceCheckUtils]: 37: Hoare triple {16411#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16411#false} is VALID [2022-04-27 22:08:30,155 INFO L290 TraceCheckUtils]: 38: Hoare triple {16411#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,155 INFO L290 TraceCheckUtils]: 39: Hoare triple {16411#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,155 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:08:30,156 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:30,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1870894896] [2022-04-27 22:08:30,156 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1870894896] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:30,156 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1408474011] [2022-04-27 22:08:30,156 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:08:30,156 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:30,156 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:30,157 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:30,158 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-27 22:08:30,204 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:08:30,205 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:30,206 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 43 conjunts are in the unsatisfiable core [2022-04-27 22:08:30,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:30,216 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:30,564 INFO L272 TraceCheckUtils]: 0: Hoare triple {16410#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,564 INFO L290 TraceCheckUtils]: 1: Hoare triple {16410#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16410#true} is VALID [2022-04-27 22:08:30,564 INFO L290 TraceCheckUtils]: 2: Hoare triple {16410#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,564 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16410#true} {16410#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,564 INFO L272 TraceCheckUtils]: 4: Hoare triple {16410#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:30,564 INFO L290 TraceCheckUtils]: 5: Hoare triple {16410#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16415#(= main_~y~0 0)} is VALID [2022-04-27 22:08:30,565 INFO L290 TraceCheckUtils]: 6: Hoare triple {16415#(= main_~y~0 0)} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16416#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:30,565 INFO L290 TraceCheckUtils]: 7: Hoare triple {16416#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16417#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:30,566 INFO L290 TraceCheckUtils]: 8: Hoare triple {16417#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16418#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:30,566 INFO L290 TraceCheckUtils]: 9: Hoare triple {16418#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16419#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:30,567 INFO L290 TraceCheckUtils]: 10: Hoare triple {16419#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16420#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:30,572 INFO L290 TraceCheckUtils]: 11: Hoare triple {16420#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16421#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:30,573 INFO L290 TraceCheckUtils]: 12: Hoare triple {16421#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16422#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:08:30,574 INFO L290 TraceCheckUtils]: 13: Hoare triple {16422#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16423#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:08:30,574 INFO L290 TraceCheckUtils]: 14: Hoare triple {16423#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16424#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:08:30,575 INFO L290 TraceCheckUtils]: 15: Hoare triple {16424#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16425#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:08:30,575 INFO L290 TraceCheckUtils]: 16: Hoare triple {16425#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:08:30,575 INFO L290 TraceCheckUtils]: 17: Hoare triple {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:08:30,576 INFO L290 TraceCheckUtils]: 18: Hoare triple {16426#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {16427#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-27 22:08:30,576 INFO L290 TraceCheckUtils]: 19: Hoare triple {16427#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16428#(and (<= main_~z~0 10) (<= 10 main_~z~0))} is VALID [2022-04-27 22:08:30,577 INFO L290 TraceCheckUtils]: 20: Hoare triple {16428#(and (<= main_~z~0 10) (<= 10 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16429#(and (<= 9 main_~z~0) (<= main_~z~0 9))} is VALID [2022-04-27 22:08:30,577 INFO L290 TraceCheckUtils]: 21: Hoare triple {16429#(and (<= 9 main_~z~0) (<= main_~z~0 9))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16430#(and (<= 8 main_~z~0) (<= main_~z~0 8))} is VALID [2022-04-27 22:08:30,578 INFO L290 TraceCheckUtils]: 22: Hoare triple {16430#(and (<= 8 main_~z~0) (<= main_~z~0 8))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16431#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:08:30,578 INFO L290 TraceCheckUtils]: 23: Hoare triple {16431#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16432#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:30,579 INFO L290 TraceCheckUtils]: 24: Hoare triple {16432#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16433#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:30,579 INFO L290 TraceCheckUtils]: 25: Hoare triple {16433#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16434#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:08:30,580 INFO L290 TraceCheckUtils]: 26: Hoare triple {16434#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16518#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:08:30,580 INFO L290 TraceCheckUtils]: 27: Hoare triple {16518#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 28: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 29: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 30: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 31: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 32: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 33: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 34: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 35: Hoare triple {16411#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L272 TraceCheckUtils]: 36: Hoare triple {16411#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 37: Hoare triple {16411#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 38: Hoare triple {16411#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,581 INFO L290 TraceCheckUtils]: 39: Hoare triple {16411#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:30,582 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:08:30,582 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:31,231 INFO L290 TraceCheckUtils]: 39: Hoare triple {16411#false} [86] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 38: Hoare triple {16411#false} [84] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_1 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 37: Hoare triple {16411#false} [82] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_3 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L272 TraceCheckUtils]: 36: Hoare triple {16411#false} [80] L29-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~x~0_10 4294967296) 0) 1 0)) InVars {main_~x~0=v_main_~x~0_10} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 35: Hoare triple {16411#false} [78] L29-1-->L29-2: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 34: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 33: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 32: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 31: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 30: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 29: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,232 INFO L290 TraceCheckUtils]: 28: Hoare triple {16411#false} [79] L29-1-->L29-1: Formula: (and (= v_main_~x~0_3 (+ v_main_~x~0_2 1)) (< 0 (mod v_main_~y~0_4 4294967296)) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_~x~0=v_main_~x~0_2, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~x~0, main_~y~0, main_#t~post9] {16411#false} is VALID [2022-04-27 22:08:31,233 INFO L290 TraceCheckUtils]: 27: Hoare triple {16594#(< 0 (mod main_~z~0 4294967296))} [75] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_3 4294967296))) InVars {main_~z~0=v_main_~z~0_3} OutVars{main_~z~0=v_main_~z~0_3} AuxVars[] AssignedVars[] {16411#false} is VALID [2022-04-27 22:08:31,233 INFO L290 TraceCheckUtils]: 26: Hoare triple {16598#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16594#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:08:31,234 INFO L290 TraceCheckUtils]: 25: Hoare triple {16602#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16598#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:31,235 INFO L290 TraceCheckUtils]: 24: Hoare triple {16606#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16602#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:31,235 INFO L290 TraceCheckUtils]: 23: Hoare triple {16610#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16606#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:31,236 INFO L290 TraceCheckUtils]: 22: Hoare triple {16614#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16610#(< 0 (mod (+ 4294967292 main_~z~0) 4294967296))} is VALID [2022-04-27 22:08:31,237 INFO L290 TraceCheckUtils]: 21: Hoare triple {16618#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16614#(< 0 (mod (+ 4294967291 main_~z~0) 4294967296))} is VALID [2022-04-27 22:08:31,237 INFO L290 TraceCheckUtils]: 20: Hoare triple {16622#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16618#(< 0 (mod (+ 4294967290 main_~z~0) 4294967296))} is VALID [2022-04-27 22:08:31,238 INFO L290 TraceCheckUtils]: 19: Hoare triple {16626#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} [76] L23-2-->L23-2: Formula: (and (< 0 (mod v_main_~z~0_5 4294967296)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_5 (+ v_main_~z~0_4 1))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_5} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_4, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16622#(< 0 (mod (+ main_~z~0 4294967289) 4294967296))} is VALID [2022-04-27 22:08:31,238 INFO L290 TraceCheckUtils]: 18: Hoare triple {16630#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [73] L16-3-->L23-2: Formula: (= v_main_~y~0_7 v_main_~z~0_2) InVars {main_~y~0=v_main_~y~0_7} OutVars{main_~y~0=v_main_~y~0_7, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_~z~0] {16626#(< 0 (mod (+ 4294967288 main_~z~0) 4294967296))} is VALID [2022-04-27 22:08:31,239 INFO L290 TraceCheckUtils]: 17: Hoare triple {16630#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} [71] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16630#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:31,239 INFO L290 TraceCheckUtils]: 16: Hoare triple {16637#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16630#(< 0 (mod (+ 4294967288 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:31,240 INFO L290 TraceCheckUtils]: 15: Hoare triple {16641#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16637#(< 0 (mod (+ main_~y~0 4294967289) 4294967296))} is VALID [2022-04-27 22:08:31,241 INFO L290 TraceCheckUtils]: 14: Hoare triple {16645#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16641#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:31,241 INFO L290 TraceCheckUtils]: 13: Hoare triple {16649#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16645#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:31,242 INFO L290 TraceCheckUtils]: 12: Hoare triple {16653#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16649#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:08:31,242 INFO L290 TraceCheckUtils]: 11: Hoare triple {16657#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16653#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:08:31,243 INFO L290 TraceCheckUtils]: 10: Hoare triple {16661#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16657#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:31,244 INFO L290 TraceCheckUtils]: 9: Hoare triple {16665#(< 0 (mod main_~y~0 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16661#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:31,245 INFO L290 TraceCheckUtils]: 8: Hoare triple {16669#(< 0 (mod (+ main_~y~0 1) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16665#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:08:31,245 INFO L290 TraceCheckUtils]: 7: Hoare triple {16673#(< 0 (mod (+ main_~y~0 2) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16669#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:08:31,246 INFO L290 TraceCheckUtils]: 6: Hoare triple {16677#(< 0 (mod (+ main_~y~0 3) 4294967296))} [72] L16-2-->L16-2: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= v_main_~y~0_5 (+ v_main_~y~0_6 1))) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_6, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16673#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:08:31,246 INFO L290 TraceCheckUtils]: 5: Hoare triple {16410#true} [68] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16677#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:08:31,246 INFO L272 TraceCheckUtils]: 4: Hoare triple {16410#true} [65] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:31,246 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16410#true} {16410#true} [89] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:31,246 INFO L290 TraceCheckUtils]: 2: Hoare triple {16410#true} [69] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:31,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {16410#true} [66] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16410#true} is VALID [2022-04-27 22:08:31,247 INFO L272 TraceCheckUtils]: 0: Hoare triple {16410#true} [64] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16410#true} is VALID [2022-04-27 22:08:31,247 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-04-27 22:08:31,247 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1408474011] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:31,247 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:31,247 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23] total 46 [2022-04-27 22:08:31,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1007851568] [2022-04-27 22:08:31,247 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:31,248 INFO L78 Accepts]: Start accepts. Automaton has has 46 states, 46 states have (on average 1.2173913043478262) internal successors, (56), 45 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 40 [2022-04-27 22:08:31,248 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:31,248 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 46 states, 46 states have (on average 1.2173913043478262) internal successors, (56), 45 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:31,291 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:31,291 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 46 states [2022-04-27 22:08:31,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:31,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2022-04-27 22:08:31,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=1759, Unknown=0, NotChecked=0, Total=2070 [2022-04-27 22:08:31,292 INFO L87 Difference]: Start difference. First operand 160 states and 188 transitions. Second operand has 46 states, 46 states have (on average 1.2173913043478262) internal successors, (56), 45 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:45,219 WARN L232 SmtUtils]: Spent 5.21s on a formula simplification that was a NOOP. DAG size: 56 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:30,887 WARN L232 SmtUtils]: Spent 30.28s on a formula simplification that was a NOOP. DAG size: 83 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:10:11,509 WARN L232 SmtUtils]: Spent 23.68s on a formula simplification that was a NOOP. DAG size: 80 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:10:42,071 WARN L232 SmtUtils]: Spent 19.52s on a formula simplification that was a NOOP. DAG size: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:11:14,999 WARN L232 SmtUtils]: Spent 18.59s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:11:49,322 WARN L232 SmtUtils]: Spent 19.19s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:12:17,890 WARN L232 SmtUtils]: Spent 17.95s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:12:46,592 WARN L232 SmtUtils]: Spent 16.77s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:06,209 WARN L232 SmtUtils]: Spent 11.58s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:26,364 WARN L232 SmtUtils]: Spent 9.66s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:51,619 WARN L232 SmtUtils]: Spent 18.34s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:09,464 WARN L232 SmtUtils]: Spent 9.31s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:23,464 WARN L232 SmtUtils]: Spent 8.10s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:36,455 WARN L232 SmtUtils]: Spent 6.87s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:48,975 WARN L232 SmtUtils]: Spent 6.20s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:57,865 WARN L232 SmtUtils]: Spent 5.06s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)