/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de41.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 22:02:41,635 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 22:02:41,637 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 22:02:41,681 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-04-27 22:02:41,696 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 22:02:41,698 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 22:02:41,699 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 22:02:41,701 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 22:02:41,702 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 22:02:41,703 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 22:02:41,705 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 22:02:41,710 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 22:02:41,711 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 22:02:41,712 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 22:02:41,713 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 22:02:41,714 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 22:02:41,715 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 22:02:41,719 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-04-27 22:02:41,726 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 22:02:41,726 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 22:02:41,728 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 22:02:41,728 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 22:02:41,752 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 22:02:41,752 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 22:02:41,753 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 22:02:41,753 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 22:02:41,754 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 22:02:41,754 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 22:02:41,754 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 22:02:41,754 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 22:02:41,754 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 22:02:41,755 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 22:02:41,755 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 22:02:41,755 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 22:02:41,755 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 22:02:41,756 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 22:02:41,756 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 22:02:41,756 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 22:02:41,756 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 22:02:41,756 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 22:02:41,756 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 22:02:41,756 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:02:41,756 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 22:02:41,757 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 22:02:41,757 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 22:02:41,757 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 22:02:41,757 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 22:02:41,757 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 22:02:41,757 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 22:02:41,758 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 22:02:41,758 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 22:02:41,758 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 22:02:41,962 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 22:02:41,982 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 22:02:41,984 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 22:02:41,984 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 22:02:41,986 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 22:02:41,987 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de41.c [2022-04-27 22:02:42,038 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6545c970a/055e444c6c964effb0119c3251ba7f30/FLAG96dd1ea95 [2022-04-27 22:02:42,347 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 22:02:42,348 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c [2022-04-27 22:02:42,352 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6545c970a/055e444c6c964effb0119c3251ba7f30/FLAG96dd1ea95 [2022-04-27 22:02:42,779 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6545c970a/055e444c6c964effb0119c3251ba7f30 [2022-04-27 22:02:42,781 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 22:02:42,783 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 22:02:42,786 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 22:02:42,786 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 22:02:42,789 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 22:02:42,790 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:02:42" (1/1) ... [2022-04-27 22:02:42,791 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1aadda18 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:42, skipping insertion in model container [2022-04-27 22:02:42,791 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:02:42" (1/1) ... [2022-04-27 22:02:42,797 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 22:02:42,810 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 22:02:42,952 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c[368,381] [2022-04-27 22:02:42,967 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:02:42,974 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 22:02:42,988 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de41.c[368,381] [2022-04-27 22:02:42,992 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:02:43,007 INFO L208 MainTranslator]: Completed translation [2022-04-27 22:02:43,007 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43 WrapperNode [2022-04-27 22:02:43,007 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 22:02:43,008 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 22:02:43,009 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 22:02:43,009 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 22:02:43,016 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,016 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,021 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,021 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,026 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,036 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,039 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,040 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 22:02:43,042 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 22:02:43,042 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 22:02:43,042 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 22:02:43,048 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,054 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:02:43,062 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:43,076 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 22:02:43,095 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 22:02:43,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 22:02:43,113 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 22:02:43,114 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 22:02:43,114 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 22:02:43,115 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 22:02:43,115 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 22:02:43,115 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 22:02:43,116 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 22:02:43,117 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 22:02:43,117 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 22:02:43,117 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 22:02:43,117 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 22:02:43,118 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 22:02:43,118 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 22:02:43,118 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 22:02:43,118 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 22:02:43,118 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 22:02:43,118 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 22:02:43,170 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 22:02:43,171 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 22:02:43,345 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 22:02:43,361 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 22:02:43,362 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-04-27 22:02:43,363 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:02:43 BoogieIcfgContainer [2022-04-27 22:02:43,363 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 22:02:43,364 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 22:02:43,364 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 22:02:43,368 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 22:02:43,370 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:02:43" (1/1) ... [2022-04-27 22:02:43,372 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 22:02:43,413 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:02:43 BasicIcfg [2022-04-27 22:02:43,414 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 22:02:43,415 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 22:02:43,415 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 22:02:43,418 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 22:02:43,419 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 10:02:42" (1/4) ... [2022-04-27 22:02:43,419 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@35ea705c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:02:43, skipping insertion in model container [2022-04-27 22:02:43,419 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:02:43" (2/4) ... [2022-04-27 22:02:43,420 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@35ea705c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:02:43, skipping insertion in model container [2022-04-27 22:02:43,420 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:02:43" (3/4) ... [2022-04-27 22:02:43,420 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@35ea705c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 10:02:43, skipping insertion in model container [2022-04-27 22:02:43,420 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:02:43" (4/4) ... [2022-04-27 22:02:43,421 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de41.cqvasr [2022-04-27 22:02:43,437 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 22:02:43,437 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 22:02:43,475 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 22:02:43,481 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@735d8ddc, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@4b803144 [2022-04-27 22:02:43,481 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 22:02:43,487 INFO L276 IsEmpty]: Start isEmpty. Operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 22:02:43,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 22:02:43,492 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:43,492 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:43,493 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:43,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:43,497 INFO L85 PathProgramCache]: Analyzing trace with hash -2015447748, now seen corresponding path program 1 times [2022-04-27 22:02:43,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:43,505 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978777290] [2022-04-27 22:02:43,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:43,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:43,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:43,657 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:43,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:43,685 INFO L290 TraceCheckUtils]: 0: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-27 22:02:43,685 INFO L290 TraceCheckUtils]: 1: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 22:02:43,685 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 22:02:43,687 INFO L272 TraceCheckUtils]: 0: Hoare triple {26#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:43,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {31#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26#true} is VALID [2022-04-27 22:02:43,688 INFO L290 TraceCheckUtils]: 2: Hoare triple {26#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 22:02:43,688 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26#true} {26#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 22:02:43,688 INFO L272 TraceCheckUtils]: 4: Hoare triple {26#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26#true} is VALID [2022-04-27 22:02:43,689 INFO L290 TraceCheckUtils]: 5: Hoare triple {26#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26#true} is VALID [2022-04-27 22:02:43,691 INFO L290 TraceCheckUtils]: 6: Hoare triple {26#true} [81] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 22:02:43,692 INFO L290 TraceCheckUtils]: 7: Hoare triple {27#false} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {27#false} is VALID [2022-04-27 22:02:43,692 INFO L290 TraceCheckUtils]: 8: Hoare triple {27#false} [85] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 22:02:43,692 INFO L290 TraceCheckUtils]: 9: Hoare triple {27#false} [88] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 22:02:43,692 INFO L290 TraceCheckUtils]: 10: Hoare triple {27#false} [91] L35-1-->L35-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 22:02:43,693 INFO L272 TraceCheckUtils]: 11: Hoare triple {27#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {27#false} is VALID [2022-04-27 22:02:43,693 INFO L290 TraceCheckUtils]: 12: Hoare triple {27#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {27#false} is VALID [2022-04-27 22:02:43,693 INFO L290 TraceCheckUtils]: 13: Hoare triple {27#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 22:02:43,694 INFO L290 TraceCheckUtils]: 14: Hoare triple {27#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#false} is VALID [2022-04-27 22:02:43,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:43,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:43,695 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [978777290] [2022-04-27 22:02:43,696 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [978777290] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:02:43,696 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:02:43,696 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 22:02:43,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130329269] [2022-04-27 22:02:43,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:02:43,709 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:02:43,710 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:43,713 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:43,746 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:43,747 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 22:02:43,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:43,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 22:02:43,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:02:43,774 INFO L87 Difference]: Start difference. First operand has 23 states, 15 states have (on average 1.6666666666666667) internal successors, (25), 16 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:43,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:43,873 INFO L93 Difference]: Finished difference Result 39 states and 54 transitions. [2022-04-27 22:02:43,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 22:02:43,874 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:02:43,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:43,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:43,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 54 transitions. [2022-04-27 22:02:43,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:43,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 54 transitions. [2022-04-27 22:02:43,894 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 54 transitions. [2022-04-27 22:02:43,966 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:43,975 INFO L225 Difference]: With dead ends: 39 [2022-04-27 22:02:43,976 INFO L226 Difference]: Without dead ends: 16 [2022-04-27 22:02:43,979 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:02:43,984 INFO L413 NwaCegarLoop]: 25 mSDtfsCounter, 17 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:43,985 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [18 Valid, 28 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:02:43,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states. [2022-04-27 22:02:44,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2022-04-27 22:02:44,013 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:44,013 INFO L82 GeneralOperation]: Start isEquivalent. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,014 INFO L74 IsIncluded]: Start isIncluded. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,014 INFO L87 Difference]: Start difference. First operand 16 states. Second operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:44,016 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-27 22:02:44,016 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-27 22:02:44,017 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:44,017 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:44,017 INFO L74 IsIncluded]: Start isIncluded. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 22:02:44,017 INFO L87 Difference]: Start difference. First operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 16 states. [2022-04-27 22:02:44,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:44,019 INFO L93 Difference]: Finished difference Result 16 states and 19 transitions. [2022-04-27 22:02:44,019 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-27 22:02:44,019 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:44,019 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:44,019 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:44,019 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:44,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 19 transitions. [2022-04-27 22:02:44,022 INFO L78 Accepts]: Start accepts. Automaton has 16 states and 19 transitions. Word has length 15 [2022-04-27 22:02:44,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:44,022 INFO L495 AbstractCegarLoop]: Abstraction has 16 states and 19 transitions. [2022-04-27 22:02:44,023 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 2 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,023 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 19 transitions. [2022-04-27 22:02:44,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-04-27 22:02:44,024 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:44,024 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:44,024 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 22:02:44,024 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:44,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:44,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1389121438, now seen corresponding path program 1 times [2022-04-27 22:02:44,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:44,025 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533576418] [2022-04-27 22:02:44,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:44,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:44,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:44,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:44,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:44,350 INFO L290 TraceCheckUtils]: 0: Hoare triple {150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {140#true} is VALID [2022-04-27 22:02:44,350 INFO L290 TraceCheckUtils]: 1: Hoare triple {140#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-27 22:02:44,350 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {140#true} {140#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-27 22:02:44,351 INFO L272 TraceCheckUtils]: 0: Hoare triple {140#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:44,351 INFO L290 TraceCheckUtils]: 1: Hoare triple {150#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {140#true} is VALID [2022-04-27 22:02:44,351 INFO L290 TraceCheckUtils]: 2: Hoare triple {140#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-27 22:02:44,352 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {140#true} {140#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-27 22:02:44,352 INFO L272 TraceCheckUtils]: 4: Hoare triple {140#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {140#true} is VALID [2022-04-27 22:02:44,353 INFO L290 TraceCheckUtils]: 5: Hoare triple {140#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {145#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:44,354 INFO L290 TraceCheckUtils]: 6: Hoare triple {145#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:44,354 INFO L290 TraceCheckUtils]: 7: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:44,355 INFO L290 TraceCheckUtils]: 8: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:44,356 INFO L290 TraceCheckUtils]: 9: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:44,357 INFO L290 TraceCheckUtils]: 10: Hoare triple {146#(and (= main_~n~0 main_~x~0) (<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296))) (= main_~y~0 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {147#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} is VALID [2022-04-27 22:02:44,358 INFO L272 TraceCheckUtils]: 11: Hoare triple {147#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (= main_~y~0 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {148#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:02:44,358 INFO L290 TraceCheckUtils]: 12: Hoare triple {148#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {149#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:02:44,359 INFO L290 TraceCheckUtils]: 13: Hoare triple {149#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {141#false} is VALID [2022-04-27 22:02:44,359 INFO L290 TraceCheckUtils]: 14: Hoare triple {141#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {141#false} is VALID [2022-04-27 22:02:44,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:44,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:44,360 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533576418] [2022-04-27 22:02:44,360 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [533576418] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:02:44,360 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:02:44,360 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-27 22:02:44,361 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663458772] [2022-04-27 22:02:44,361 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:02:44,362 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:02:44,362 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:44,363 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,377 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 15 edges. 15 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:44,377 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-27 22:02:44,377 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:44,378 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-27 22:02:44,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2022-04-27 22:02:44,379 INFO L87 Difference]: Start difference. First operand 16 states and 19 transitions. Second operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:44,727 INFO L93 Difference]: Finished difference Result 35 states and 46 transitions. [2022-04-27 22:02:44,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 22:02:44,728 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 15 [2022-04-27 22:02:44,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:44,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 46 transitions. [2022-04-27 22:02:44,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 46 transitions. [2022-04-27 22:02:44,732 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 46 transitions. [2022-04-27 22:02:44,787 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:44,789 INFO L225 Difference]: With dead ends: 35 [2022-04-27 22:02:44,789 INFO L226 Difference]: Without dead ends: 22 [2022-04-27 22:02:44,790 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:02:44,791 INFO L413 NwaCegarLoop]: 11 mSDtfsCounter, 36 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:44,791 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [36 Valid, 38 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:02:44,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2022-04-27 22:02:44,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2022-04-27 22:02:44,799 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:44,799 INFO L82 GeneralOperation]: Start isEquivalent. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,800 INFO L74 IsIncluded]: Start isIncluded. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,800 INFO L87 Difference]: Start difference. First operand 22 states. Second operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:44,802 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-27 22:02:44,802 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:02:44,803 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:44,803 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:44,803 INFO L74 IsIncluded]: Start isIncluded. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 22:02:44,804 INFO L87 Difference]: Start difference. First operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 22 states. [2022-04-27 22:02:44,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:44,806 INFO L93 Difference]: Finished difference Result 22 states and 27 transitions. [2022-04-27 22:02:44,806 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:02:44,806 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:44,807 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:44,807 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:44,807 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:44,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 17 states have internal predecessors, (23), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2022-04-27 22:02:44,810 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 27 transitions. Word has length 15 [2022-04-27 22:02:44,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:44,810 INFO L495 AbstractCegarLoop]: Abstraction has 22 states and 27 transitions. [2022-04-27 22:02:44,811 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 6 states have internal predecessors, (11), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:44,811 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 27 transitions. [2022-04-27 22:02:44,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:02:44,812 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:44,812 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:44,812 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 22:02:44,812 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:44,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:44,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1590526661, now seen corresponding path program 1 times [2022-04-27 22:02:44,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:44,813 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743491630] [2022-04-27 22:02:44,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:44,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:44,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:44,915 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:44,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:44,924 INFO L290 TraceCheckUtils]: 0: Hoare triple {299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-27 22:02:44,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:44,925 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:44,925 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:44,926 INFO L290 TraceCheckUtils]: 1: Hoare triple {299#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-27 22:02:44,926 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:44,926 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:44,926 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:44,927 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {296#(= main_~y~0 0)} is VALID [2022-04-27 22:02:44,927 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:44,928 INFO L290 TraceCheckUtils]: 7: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:44,929 INFO L290 TraceCheckUtils]: 8: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {298#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:02:44,929 INFO L290 TraceCheckUtils]: 9: Hoare triple {298#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:44,930 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:44,930 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:44,930 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {292#false} is VALID [2022-04-27 22:02:44,930 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-27 22:02:44,931 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:44,931 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:44,931 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:44,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:44,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1743491630] [2022-04-27 22:02:44,932 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1743491630] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:44,932 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1247359621] [2022-04-27 22:02:44,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:44,932 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:44,933 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:44,940 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:44,975 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 22:02:44,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:44,986 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 22:02:45,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:45,014 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:45,274 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,274 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-27 22:02:45,275 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,275 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,275 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,275 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {296#(= main_~y~0 0)} is VALID [2022-04-27 22:02:45,276 INFO L290 TraceCheckUtils]: 6: Hoare triple {296#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:45,277 INFO L290 TraceCheckUtils]: 7: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:45,277 INFO L290 TraceCheckUtils]: 8: Hoare triple {297#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {327#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:02:45,278 INFO L290 TraceCheckUtils]: 9: Hoare triple {327#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,278 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,278 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,278 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {292#false} is VALID [2022-04-27 22:02:45,279 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-27 22:02:45,279 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,279 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,279 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:45,279 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:45,366 INFO L290 TraceCheckUtils]: 15: Hoare triple {292#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,366 INFO L290 TraceCheckUtils]: 14: Hoare triple {292#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,367 INFO L290 TraceCheckUtils]: 13: Hoare triple {292#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {292#false} is VALID [2022-04-27 22:02:45,367 INFO L272 TraceCheckUtils]: 12: Hoare triple {292#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {292#false} is VALID [2022-04-27 22:02:45,367 INFO L290 TraceCheckUtils]: 11: Hoare triple {292#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,367 INFO L290 TraceCheckUtils]: 10: Hoare triple {292#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,368 INFO L290 TraceCheckUtils]: 9: Hoare triple {367#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {292#false} is VALID [2022-04-27 22:02:45,368 INFO L290 TraceCheckUtils]: 8: Hoare triple {371#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {367#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:02:45,369 INFO L290 TraceCheckUtils]: 7: Hoare triple {371#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {371#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:02:45,370 INFO L290 TraceCheckUtils]: 6: Hoare triple {378#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {371#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:02:45,370 INFO L290 TraceCheckUtils]: 5: Hoare triple {291#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {378#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:02:45,370 INFO L272 TraceCheckUtils]: 4: Hoare triple {291#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,371 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291#true} {291#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,371 INFO L290 TraceCheckUtils]: 2: Hoare triple {291#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,371 INFO L290 TraceCheckUtils]: 1: Hoare triple {291#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {291#true} is VALID [2022-04-27 22:02:45,371 INFO L272 TraceCheckUtils]: 0: Hoare triple {291#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {291#true} is VALID [2022-04-27 22:02:45,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:45,374 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1247359621] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:45,374 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:45,374 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-27 22:02:45,375 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936284120] [2022-04-27 22:02:45,375 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:45,376 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:02:45,376 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:45,377 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:45,395 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:45,395 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 22:02:45,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:45,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 22:02:45,397 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-27 22:02:45,398 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. Second operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:45,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:45,922 INFO L93 Difference]: Finished difference Result 56 states and 81 transitions. [2022-04-27 22:02:45,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 22:02:45,923 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:02:45,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:45,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:45,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 78 transitions. [2022-04-27 22:02:45,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:45,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 78 transitions. [2022-04-27 22:02:45,928 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 78 transitions. [2022-04-27 22:02:46,004 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 78 edges. 78 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:46,006 INFO L225 Difference]: With dead ends: 56 [2022-04-27 22:02:46,006 INFO L226 Difference]: Without dead ends: 49 [2022-04-27 22:02:46,006 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:02:46,007 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 68 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 111 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 68 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:46,007 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [68 Valid, 45 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 111 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:02:46,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-04-27 22:02:46,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 34. [2022-04-27 22:02:46,033 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:46,033 INFO L82 GeneralOperation]: Start isEquivalent. First operand 49 states. Second operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,034 INFO L74 IsIncluded]: Start isIncluded. First operand 49 states. Second operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,035 INFO L87 Difference]: Start difference. First operand 49 states. Second operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:46,042 INFO L93 Difference]: Finished difference Result 49 states and 66 transitions. [2022-04-27 22:02:46,042 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 66 transitions. [2022-04-27 22:02:46,043 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:46,043 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:46,043 INFO L74 IsIncluded]: Start isIncluded. First operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:02:46,043 INFO L87 Difference]: Start difference. First operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 49 states. [2022-04-27 22:02:46,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:46,049 INFO L93 Difference]: Finished difference Result 49 states and 66 transitions. [2022-04-27 22:02:46,049 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 66 transitions. [2022-04-27 22:02:46,051 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:46,051 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:46,051 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:46,051 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:46,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.3793103448275863) internal successors, (40), 29 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 44 transitions. [2022-04-27 22:02:46,053 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 44 transitions. Word has length 16 [2022-04-27 22:02:46,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:46,053 INFO L495 AbstractCegarLoop]: Abstraction has 34 states and 44 transitions. [2022-04-27 22:02:46,054 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.0) internal successors, (20), 9 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,054 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 44 transitions. [2022-04-27 22:02:46,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:02:46,054 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:46,054 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:46,079 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-27 22:02:46,274 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:46,274 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:46,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:46,275 INFO L85 PathProgramCache]: Analyzing trace with hash -1930032162, now seen corresponding path program 1 times [2022-04-27 22:02:46,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:46,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477228386] [2022-04-27 22:02:46,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:46,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:46,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:46,320 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:46,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:46,325 INFO L290 TraceCheckUtils]: 0: Hoare triple {655#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {648#true} is VALID [2022-04-27 22:02:46,326 INFO L290 TraceCheckUtils]: 1: Hoare triple {648#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-27 22:02:46,326 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {648#true} {648#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-27 22:02:46,326 INFO L272 TraceCheckUtils]: 0: Hoare triple {648#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {655#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:46,327 INFO L290 TraceCheckUtils]: 1: Hoare triple {655#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {648#true} is VALID [2022-04-27 22:02:46,327 INFO L290 TraceCheckUtils]: 2: Hoare triple {648#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-27 22:02:46,327 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {648#true} {648#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-27 22:02:46,327 INFO L272 TraceCheckUtils]: 4: Hoare triple {648#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {648#true} is VALID [2022-04-27 22:02:46,328 INFO L290 TraceCheckUtils]: 5: Hoare triple {648#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {653#(= main_~y~0 0)} is VALID [2022-04-27 22:02:46,328 INFO L290 TraceCheckUtils]: 6: Hoare triple {653#(= main_~y~0 0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {653#(= main_~y~0 0)} is VALID [2022-04-27 22:02:46,329 INFO L290 TraceCheckUtils]: 7: Hoare triple {653#(= main_~y~0 0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {654#(= main_~z~0 0)} is VALID [2022-04-27 22:02:46,329 INFO L290 TraceCheckUtils]: 8: Hoare triple {654#(= main_~z~0 0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {649#false} is VALID [2022-04-27 22:02:46,329 INFO L290 TraceCheckUtils]: 9: Hoare triple {649#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-27 22:02:46,329 INFO L290 TraceCheckUtils]: 10: Hoare triple {649#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-27 22:02:46,330 INFO L290 TraceCheckUtils]: 11: Hoare triple {649#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {649#false} is VALID [2022-04-27 22:02:46,330 INFO L290 TraceCheckUtils]: 12: Hoare triple {649#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-27 22:02:46,330 INFO L272 TraceCheckUtils]: 13: Hoare triple {649#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {649#false} is VALID [2022-04-27 22:02:46,330 INFO L290 TraceCheckUtils]: 14: Hoare triple {649#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {649#false} is VALID [2022-04-27 22:02:46,330 INFO L290 TraceCheckUtils]: 15: Hoare triple {649#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-27 22:02:46,331 INFO L290 TraceCheckUtils]: 16: Hoare triple {649#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {649#false} is VALID [2022-04-27 22:02:46,331 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:46,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:46,331 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477228386] [2022-04-27 22:02:46,331 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1477228386] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:02:46,331 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:02:46,332 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 22:02:46,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259400564] [2022-04-27 22:02:46,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:02:46,332 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:02:46,332 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:46,333 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,344 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:46,345 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:02:46,345 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:46,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:02:46,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:02:46,346 INFO L87 Difference]: Start difference. First operand 34 states and 44 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:46,446 INFO L93 Difference]: Finished difference Result 40 states and 50 transitions. [2022-04-27 22:02:46,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:02:46,446 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:02:46,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:46,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 32 transitions. [2022-04-27 22:02:46,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 32 transitions. [2022-04-27 22:02:46,449 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 32 transitions. [2022-04-27 22:02:46,480 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:46,482 INFO L225 Difference]: With dead ends: 40 [2022-04-27 22:02:46,482 INFO L226 Difference]: Without dead ends: 29 [2022-04-27 22:02:46,483 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:02:46,490 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 16 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:46,492 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 29 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:02:46,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2022-04-27 22:02:46,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2022-04-27 22:02:46,512 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:46,512 INFO L82 GeneralOperation]: Start isEquivalent. First operand 29 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,512 INFO L74 IsIncluded]: Start isIncluded. First operand 29 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,512 INFO L87 Difference]: Start difference. First operand 29 states. Second operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:46,513 INFO L93 Difference]: Finished difference Result 29 states and 37 transitions. [2022-04-27 22:02:46,514 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-27 22:02:46,514 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:46,514 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:46,514 INFO L74 IsIncluded]: Start isIncluded. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-27 22:02:46,514 INFO L87 Difference]: Start difference. First operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 29 states. [2022-04-27 22:02:46,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:46,516 INFO L93 Difference]: Finished difference Result 29 states and 37 transitions. [2022-04-27 22:02:46,516 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-27 22:02:46,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:46,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:46,516 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:46,516 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:46,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 24 states have (on average 1.375) internal successors, (33), 24 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2022-04-27 22:02:46,517 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 37 transitions. Word has length 17 [2022-04-27 22:02:46,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:46,518 INFO L495 AbstractCegarLoop]: Abstraction has 29 states and 37 transitions. [2022-04-27 22:02:46,518 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:46,518 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 37 transitions. [2022-04-27 22:02:46,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-04-27 22:02:46,518 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:46,518 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:46,519 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 22:02:46,519 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:46,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:46,519 INFO L85 PathProgramCache]: Analyzing trace with hash -880154102, now seen corresponding path program 1 times [2022-04-27 22:02:46,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:46,519 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402605134] [2022-04-27 22:02:46,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:46,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:46,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:46,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:46,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:46,579 INFO L290 TraceCheckUtils]: 0: Hoare triple {832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-27 22:02:46,579 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,580 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,580 INFO L272 TraceCheckUtils]: 0: Hoare triple {825#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:46,581 INFO L290 TraceCheckUtils]: 1: Hoare triple {832#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-27 22:02:46,581 INFO L290 TraceCheckUtils]: 2: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,581 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,581 INFO L272 TraceCheckUtils]: 4: Hoare triple {825#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,581 INFO L290 TraceCheckUtils]: 5: Hoare triple {825#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {825#true} is VALID [2022-04-27 22:02:46,582 INFO L290 TraceCheckUtils]: 6: Hoare triple {825#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:46,583 INFO L290 TraceCheckUtils]: 7: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:46,584 INFO L290 TraceCheckUtils]: 8: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:46,585 INFO L290 TraceCheckUtils]: 9: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,585 INFO L290 TraceCheckUtils]: 10: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,586 INFO L290 TraceCheckUtils]: 11: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,586 INFO L290 TraceCheckUtils]: 12: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,587 INFO L290 TraceCheckUtils]: 13: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:46,587 INFO L272 TraceCheckUtils]: 14: Hoare triple {826#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {826#false} is VALID [2022-04-27 22:02:46,587 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {826#false} is VALID [2022-04-27 22:02:46,587 INFO L290 TraceCheckUtils]: 16: Hoare triple {826#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:46,588 INFO L290 TraceCheckUtils]: 17: Hoare triple {826#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:46,588 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:46,588 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:46,588 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1402605134] [2022-04-27 22:02:46,588 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1402605134] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:46,588 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [749979453] [2022-04-27 22:02:46,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:46,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:46,589 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:46,590 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:46,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 22:02:46,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:46,626 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:02:46,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:46,632 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:46,975 INFO L272 TraceCheckUtils]: 0: Hoare triple {825#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-27 22:02:46,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,978 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,978 INFO L272 TraceCheckUtils]: 4: Hoare triple {825#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:46,982 INFO L290 TraceCheckUtils]: 5: Hoare triple {825#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {825#true} is VALID [2022-04-27 22:02:46,983 INFO L290 TraceCheckUtils]: 6: Hoare triple {825#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:46,984 INFO L290 TraceCheckUtils]: 7: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:46,984 INFO L290 TraceCheckUtils]: 8: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:46,985 INFO L290 TraceCheckUtils]: 9: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,986 INFO L290 TraceCheckUtils]: 10: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,986 INFO L290 TraceCheckUtils]: 11: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,987 INFO L290 TraceCheckUtils]: 12: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:46,988 INFO L290 TraceCheckUtils]: 13: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:46,988 INFO L272 TraceCheckUtils]: 14: Hoare triple {826#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {826#false} is VALID [2022-04-27 22:02:46,988 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {826#false} is VALID [2022-04-27 22:02:46,991 INFO L290 TraceCheckUtils]: 16: Hoare triple {826#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:46,991 INFO L290 TraceCheckUtils]: 17: Hoare triple {826#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:46,991 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:46,992 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:47,077 INFO L290 TraceCheckUtils]: 17: Hoare triple {826#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:47,077 INFO L290 TraceCheckUtils]: 16: Hoare triple {826#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:47,078 INFO L290 TraceCheckUtils]: 15: Hoare triple {826#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {826#false} is VALID [2022-04-27 22:02:47,078 INFO L272 TraceCheckUtils]: 14: Hoare triple {826#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {826#false} is VALID [2022-04-27 22:02:47,078 INFO L290 TraceCheckUtils]: 13: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {826#false} is VALID [2022-04-27 22:02:47,079 INFO L290 TraceCheckUtils]: 12: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:47,079 INFO L290 TraceCheckUtils]: 11: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:47,080 INFO L290 TraceCheckUtils]: 10: Hoare triple {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:47,081 INFO L290 TraceCheckUtils]: 9: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {831#(<= (+ (* 4294967296 (div main_~x~0 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:02:47,081 INFO L290 TraceCheckUtils]: 8: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:47,082 INFO L290 TraceCheckUtils]: 7: Hoare triple {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:47,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {825#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {830#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:47,083 INFO L290 TraceCheckUtils]: 5: Hoare triple {825#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {825#true} is VALID [2022-04-27 22:02:47,083 INFO L272 TraceCheckUtils]: 4: Hoare triple {825#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:47,084 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {825#true} {825#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:47,084 INFO L290 TraceCheckUtils]: 2: Hoare triple {825#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:47,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {825#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {825#true} is VALID [2022-04-27 22:02:47,084 INFO L272 TraceCheckUtils]: 0: Hoare triple {825#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {825#true} is VALID [2022-04-27 22:02:47,084 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:47,084 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [749979453] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:47,084 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:47,084 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-27 22:02:47,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557133324] [2022-04-27 22:02:47,085 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:47,085 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 22:02:47,085 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:47,085 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,100 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 20 edges. 20 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:47,100 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:02:47,100 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:47,101 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:02:47,101 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:02:47,101 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:47,248 INFO L93 Difference]: Finished difference Result 45 states and 60 transitions. [2022-04-27 22:02:47,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:02:47,248 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-04-27 22:02:47,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:47,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-27 22:02:47,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-27 22:02:47,251 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 36 transitions. [2022-04-27 22:02:47,287 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:47,288 INFO L225 Difference]: With dead ends: 45 [2022-04-27 22:02:47,288 INFO L226 Difference]: Without dead ends: 40 [2022-04-27 22:02:47,289 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 34 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:02:47,289 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 47 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:47,290 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 30 Invalid, 47 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:02:47,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-04-27 22:02:47,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 38. [2022-04-27 22:02:47,316 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:47,316 INFO L82 GeneralOperation]: Start isEquivalent. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,316 INFO L74 IsIncluded]: Start isIncluded. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,316 INFO L87 Difference]: Start difference. First operand 40 states. Second operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,318 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:47,318 INFO L93 Difference]: Finished difference Result 40 states and 55 transitions. [2022-04-27 22:02:47,318 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 55 transitions. [2022-04-27 22:02:47,318 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:47,318 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:47,318 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-27 22:02:47,319 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 40 states. [2022-04-27 22:02:47,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:47,320 INFO L93 Difference]: Finished difference Result 40 states and 55 transitions. [2022-04-27 22:02:47,320 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 55 transitions. [2022-04-27 22:02:47,320 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:47,320 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:47,320 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:47,320 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:47,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4242424242424243) internal successors, (47), 33 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 51 transitions. [2022-04-27 22:02:47,322 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 51 transitions. Word has length 18 [2022-04-27 22:02:47,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:47,322 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 51 transitions. [2022-04-27 22:02:47,322 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.0) internal successors, (15), 4 states have internal predecessors, (15), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:47,322 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 51 transitions. [2022-04-27 22:02:47,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:02:47,323 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:47,323 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:47,346 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 22:02:47,539 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:47,539 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:47,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:47,540 INFO L85 PathProgramCache]: Analyzing trace with hash -1488252743, now seen corresponding path program 1 times [2022-04-27 22:02:47,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:47,540 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334736969] [2022-04-27 22:02:47,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:47,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:47,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:47,782 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:47,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:47,790 INFO L290 TraceCheckUtils]: 0: Hoare triple {1161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-27 22:02:47,790 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:47,790 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:47,791 INFO L272 TraceCheckUtils]: 0: Hoare triple {1149#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:47,791 INFO L290 TraceCheckUtils]: 1: Hoare triple {1161#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-27 22:02:47,792 INFO L290 TraceCheckUtils]: 2: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:47,792 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:47,792 INFO L272 TraceCheckUtils]: 4: Hoare triple {1149#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:47,792 INFO L290 TraceCheckUtils]: 5: Hoare triple {1149#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:47,797 INFO L290 TraceCheckUtils]: 6: Hoare triple {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1155#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:02:47,801 INFO L290 TraceCheckUtils]: 7: Hoare triple {1155#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) main_~y~0) main_~n~0) (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-27 22:02:47,801 INFO L290 TraceCheckUtils]: 8: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-27 22:02:47,802 INFO L290 TraceCheckUtils]: 9: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-27 22:02:47,803 INFO L290 TraceCheckUtils]: 10: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} is VALID [2022-04-27 22:02:47,809 INFO L290 TraceCheckUtils]: 11: Hoare triple {1156#(and (<= (+ (* (div main_~n~0 4294967296) 4294967296) 1) (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0) main_~n~0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:02:47,809 INFO L290 TraceCheckUtils]: 12: Hoare triple {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:02:47,812 INFO L290 TraceCheckUtils]: 13: Hoare triple {1157#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) main_~y~0 1) main_~n~0) (<= (* (div main_~n~0 4294967296) 4294967296) (+ (* (div (+ (- 1) main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) main_~y~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:02:47,812 INFO L290 TraceCheckUtils]: 14: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:02:47,814 INFO L272 TraceCheckUtils]: 15: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1159#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:02:47,815 INFO L290 TraceCheckUtils]: 16: Hoare triple {1159#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1160#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:02:47,815 INFO L290 TraceCheckUtils]: 17: Hoare triple {1160#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-27 22:02:47,815 INFO L290 TraceCheckUtils]: 18: Hoare triple {1150#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-27 22:02:47,816 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:47,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:47,816 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334736969] [2022-04-27 22:02:47,816 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [334736969] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:47,816 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1879021555] [2022-04-27 22:02:47,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:47,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:47,817 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:47,817 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:47,821 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 22:02:47,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:47,853 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-27 22:02:47,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:47,861 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:48,295 INFO L272 TraceCheckUtils]: 0: Hoare triple {1149#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,296 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-27 22:02:48,296 INFO L290 TraceCheckUtils]: 2: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,296 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,296 INFO L272 TraceCheckUtils]: 4: Hoare triple {1149#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,296 INFO L290 TraceCheckUtils]: 5: Hoare triple {1149#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:02:48,297 INFO L290 TraceCheckUtils]: 6: Hoare triple {1154#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1183#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} is VALID [2022-04-27 22:02:48,298 INFO L290 TraceCheckUtils]: 7: Hoare triple {1183#(and (= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0) (= (+ (- 1) main_~y~0) 0) (< 0 (mod (+ main_~x~0 1) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1187#(and (= (+ main_~x~0 1) main_~n~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-27 22:02:48,298 INFO L290 TraceCheckUtils]: 8: Hoare triple {1187#(and (= (+ main_~x~0 1) main_~n~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1191#(and (= (+ main_~x~0 1) main_~n~0) (= main_~z~0 main_~y~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} is VALID [2022-04-27 22:02:48,299 INFO L290 TraceCheckUtils]: 9: Hoare triple {1191#(and (= (+ main_~x~0 1) main_~n~0) (= main_~z~0 main_~y~0) (= main_~y~0 1) (<= (mod main_~x~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:02:48,299 INFO L290 TraceCheckUtils]: 10: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:02:48,300 INFO L290 TraceCheckUtils]: 11: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:02:48,300 INFO L290 TraceCheckUtils]: 12: Hoare triple {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:02:48,301 INFO L290 TraceCheckUtils]: 13: Hoare triple {1202#(and (= (+ main_~y~0 1) 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:02:48,302 INFO L290 TraceCheckUtils]: 14: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:02:48,307 INFO L272 TraceCheckUtils]: 15: Hoare triple {1195#(and (= main_~y~0 1) (<= (mod (+ main_~n~0 4294967295) 4294967296) 0))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:02:48,307 INFO L290 TraceCheckUtils]: 16: Hoare triple {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1219#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:02:48,308 INFO L290 TraceCheckUtils]: 17: Hoare triple {1219#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-27 22:02:48,308 INFO L290 TraceCheckUtils]: 18: Hoare triple {1150#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-27 22:02:48,308 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:48,308 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:48,893 INFO L290 TraceCheckUtils]: 18: Hoare triple {1150#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-27 22:02:48,894 INFO L290 TraceCheckUtils]: 17: Hoare triple {1219#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1150#false} is VALID [2022-04-27 22:02:48,894 INFO L290 TraceCheckUtils]: 16: Hoare triple {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1219#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:02:48,895 INFO L272 TraceCheckUtils]: 15: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1215#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:02:48,896 INFO L290 TraceCheckUtils]: 14: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:02:48,897 INFO L290 TraceCheckUtils]: 13: Hoare triple {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:02:48,898 INFO L290 TraceCheckUtils]: 12: Hoare triple {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:02:48,899 INFO L290 TraceCheckUtils]: 11: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1241#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:02:48,900 INFO L290 TraceCheckUtils]: 10: Hoare triple {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:02:48,901 INFO L290 TraceCheckUtils]: 9: Hoare triple {1254#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (mod main_~z~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1158#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:02:48,912 INFO L290 TraceCheckUtils]: 8: Hoare triple {1258#(or (<= (mod main_~y~0 4294967296) 0) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1254#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (<= (mod main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:02:48,913 INFO L290 TraceCheckUtils]: 7: Hoare triple {1262#(or (<= (mod main_~y~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1258#(or (<= (mod main_~y~0 4294967296) 0) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:02:48,915 INFO L290 TraceCheckUtils]: 6: Hoare triple {1266#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1262#(or (<= (mod main_~y~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:02:48,916 INFO L290 TraceCheckUtils]: 5: Hoare triple {1149#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1266#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:02:48,916 INFO L272 TraceCheckUtils]: 4: Hoare triple {1149#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,917 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1149#true} {1149#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,917 INFO L290 TraceCheckUtils]: 2: Hoare triple {1149#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,917 INFO L290 TraceCheckUtils]: 1: Hoare triple {1149#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1149#true} is VALID [2022-04-27 22:02:48,917 INFO L272 TraceCheckUtils]: 0: Hoare triple {1149#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1149#true} is VALID [2022-04-27 22:02:48,917 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:48,918 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1879021555] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:48,918 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:48,918 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 22 [2022-04-27 22:02:48,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335694647] [2022-04-27 22:02:48,918 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:48,919 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:02:48,919 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:48,919 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:48,979 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 43 edges. 43 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:48,979 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 22:02:48,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:48,980 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 22:02:48,980 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=370, Unknown=0, NotChecked=0, Total=462 [2022-04-27 22:02:48,981 INFO L87 Difference]: Start difference. First operand 38 states and 51 transitions. Second operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:50,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:50,823 INFO L93 Difference]: Finished difference Result 70 states and 97 transitions. [2022-04-27 22:02:50,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2022-04-27 22:02:50,824 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:02:50,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:50,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:50,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 75 transitions. [2022-04-27 22:02:50,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:50,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 75 transitions. [2022-04-27 22:02:50,828 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 26 states and 75 transitions. [2022-04-27 22:02:51,011 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 75 edges. 75 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:51,013 INFO L225 Difference]: With dead ends: 70 [2022-04-27 22:02:51,013 INFO L226 Difference]: Without dead ends: 64 [2022-04-27 22:02:51,014 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 528 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=370, Invalid=1610, Unknown=0, NotChecked=0, Total=1980 [2022-04-27 22:02:51,014 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 107 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 190 mSolverCounterSat, 68 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 107 SdHoareTripleChecker+Valid, 46 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 68 IncrementalHoareTripleChecker+Valid, 190 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:51,014 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [107 Valid, 46 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [68 Valid, 190 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 22:02:51,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-04-27 22:02:51,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 42. [2022-04-27 22:02:51,069 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:51,070 INFO L82 GeneralOperation]: Start isEquivalent. First operand 64 states. Second operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:51,070 INFO L74 IsIncluded]: Start isIncluded. First operand 64 states. Second operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:51,070 INFO L87 Difference]: Start difference. First operand 64 states. Second operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:51,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:51,072 INFO L93 Difference]: Finished difference Result 64 states and 90 transitions. [2022-04-27 22:02:51,072 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 90 transitions. [2022-04-27 22:02:51,073 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:51,073 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:51,074 INFO L74 IsIncluded]: Start isIncluded. First operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-27 22:02:51,074 INFO L87 Difference]: Start difference. First operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 64 states. [2022-04-27 22:02:51,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:51,077 INFO L93 Difference]: Finished difference Result 64 states and 90 transitions. [2022-04-27 22:02:51,077 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 90 transitions. [2022-04-27 22:02:51,078 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:51,078 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:51,078 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:51,078 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:51,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 37 states have (on average 1.4594594594594594) internal successors, (54), 37 states have internal predecessors, (54), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:51,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 58 transitions. [2022-04-27 22:02:51,079 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 58 transitions. Word has length 19 [2022-04-27 22:02:51,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:51,081 INFO L495 AbstractCegarLoop]: Abstraction has 42 states and 58 transitions. [2022-04-27 22:02:51,081 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.6363636363636365) internal successors, (36), 19 states have internal predecessors, (36), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:51,081 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 58 transitions. [2022-04-27 22:02:51,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:02:51,081 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:51,082 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:51,108 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 22:02:51,295 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:51,295 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:51,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:51,296 INFO L85 PathProgramCache]: Analyzing trace with hash -904026877, now seen corresponding path program 2 times [2022-04-27 22:02:51,296 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:51,296 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379555738] [2022-04-27 22:02:51,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:51,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:51,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:51,387 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:51,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:51,398 INFO L290 TraceCheckUtils]: 0: Hoare triple {1632#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-27 22:02:51,399 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,399 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,399 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1632#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:51,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {1632#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-27 22:02:51,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,401 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,401 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,401 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1628#(= main_~y~0 0)} is VALID [2022-04-27 22:02:51,402 INFO L290 TraceCheckUtils]: 6: Hoare triple {1628#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:51,402 INFO L290 TraceCheckUtils]: 7: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:51,403 INFO L290 TraceCheckUtils]: 8: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1630#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:02:51,404 INFO L290 TraceCheckUtils]: 9: Hoare triple {1630#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1631#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:02:51,404 INFO L290 TraceCheckUtils]: 10: Hoare triple {1631#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 11: Hoare triple {1624#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 12: Hoare triple {1624#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 13: Hoare triple {1624#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 14: Hoare triple {1624#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L272 TraceCheckUtils]: 15: Hoare triple {1624#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 16: Hoare triple {1624#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,405 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:51,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:51,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379555738] [2022-04-27 22:02:51,406 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379555738] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:51,406 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [466936808] [2022-04-27 22:02:51,406 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:02:51,406 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:51,406 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:51,408 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:51,439 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 22:02:51,464 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:02:51,464 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:02:51,465 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 22:02:51,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:51,483 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:51,589 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,590 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-27 22:02:51,597 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,597 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,597 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,601 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1628#(= main_~y~0 0)} is VALID [2022-04-27 22:02:51,602 INFO L290 TraceCheckUtils]: 6: Hoare triple {1628#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:51,602 INFO L290 TraceCheckUtils]: 7: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:51,603 INFO L290 TraceCheckUtils]: 8: Hoare triple {1629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1660#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:51,607 INFO L290 TraceCheckUtils]: 9: Hoare triple {1660#(and (= main_~z~0 main_~y~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1664#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 10: Hoare triple {1664#(and (<= 1 main_~y~0) (= main_~y~0 (+ main_~z~0 1)) (<= main_~y~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 11: Hoare triple {1624#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 12: Hoare triple {1624#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 13: Hoare triple {1624#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 14: Hoare triple {1624#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L272 TraceCheckUtils]: 15: Hoare triple {1624#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 16: Hoare triple {1624#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#false} is VALID [2022-04-27 22:02:51,609 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,610 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,610 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:51,610 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:51,731 INFO L290 TraceCheckUtils]: 18: Hoare triple {1624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,731 INFO L290 TraceCheckUtils]: 17: Hoare triple {1624#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,732 INFO L290 TraceCheckUtils]: 16: Hoare triple {1624#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1624#false} is VALID [2022-04-27 22:02:51,732 INFO L272 TraceCheckUtils]: 15: Hoare triple {1624#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {1624#false} is VALID [2022-04-27 22:02:51,732 INFO L290 TraceCheckUtils]: 14: Hoare triple {1624#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,732 INFO L290 TraceCheckUtils]: 13: Hoare triple {1707#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1624#false} is VALID [2022-04-27 22:02:51,734 INFO L290 TraceCheckUtils]: 12: Hoare triple {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1707#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:02:51,734 INFO L290 TraceCheckUtils]: 11: Hoare triple {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:02:51,735 INFO L290 TraceCheckUtils]: 10: Hoare triple {1718#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1711#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:02:51,736 INFO L290 TraceCheckUtils]: 9: Hoare triple {1722#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1718#(or (< 0 (mod (+ main_~y~0 4294967295) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:02:51,736 INFO L290 TraceCheckUtils]: 8: Hoare triple {1623#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1722#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:02:51,736 INFO L290 TraceCheckUtils]: 7: Hoare triple {1623#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,736 INFO L290 TraceCheckUtils]: 6: Hoare triple {1623#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L290 TraceCheckUtils]: 5: Hoare triple {1623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L272 TraceCheckUtils]: 4: Hoare triple {1623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1623#true} {1623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L290 TraceCheckUtils]: 2: Hoare triple {1623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L290 TraceCheckUtils]: 1: Hoare triple {1623#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L272 TraceCheckUtils]: 0: Hoare triple {1623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1623#true} is VALID [2022-04-27 22:02:51,737 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:02:51,737 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [466936808] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:51,738 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:51,738 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 13 [2022-04-27 22:02:51,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924130754] [2022-04-27 22:02:51,738 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:51,738 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:02:51,739 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:51,739 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:51,765 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:51,765 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:02:51,765 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:51,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:02:51,766 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:02:51,766 INFO L87 Difference]: Start difference. First operand 42 states and 58 transitions. Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:52,356 INFO L93 Difference]: Finished difference Result 68 states and 93 transitions. [2022-04-27 22:02:52,356 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-27 22:02:52,356 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:02:52,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:52,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-27 22:02:52,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 71 transitions. [2022-04-27 22:02:52,360 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 71 transitions. [2022-04-27 22:02:52,435 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 71 edges. 71 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:52,436 INFO L225 Difference]: With dead ends: 68 [2022-04-27 22:02:52,436 INFO L226 Difference]: Without dead ends: 56 [2022-04-27 22:02:52,437 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=495, Unknown=0, NotChecked=0, Total=650 [2022-04-27 22:02:52,437 INFO L413 NwaCegarLoop]: 17 mSDtfsCounter, 71 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 115 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 39 SdHoareTripleChecker+Invalid, 168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 115 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:52,437 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 39 Invalid, 168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 115 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:02:52,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-04-27 22:02:52,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 39. [2022-04-27 22:02:52,503 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:52,504 INFO L82 GeneralOperation]: Start isEquivalent. First operand 56 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,504 INFO L74 IsIncluded]: Start isIncluded. First operand 56 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,504 INFO L87 Difference]: Start difference. First operand 56 states. Second operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:52,506 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2022-04-27 22:02:52,506 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 75 transitions. [2022-04-27 22:02:52,506 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:52,506 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:52,507 INFO L74 IsIncluded]: Start isIncluded. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-27 22:02:52,507 INFO L87 Difference]: Start difference. First operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 56 states. [2022-04-27 22:02:52,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:52,509 INFO L93 Difference]: Finished difference Result 56 states and 75 transitions. [2022-04-27 22:02:52,509 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 75 transitions. [2022-04-27 22:02:52,509 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:52,509 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:52,509 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:52,509 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:52,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 51 transitions. [2022-04-27 22:02:52,510 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 51 transitions. Word has length 19 [2022-04-27 22:02:52,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:52,511 INFO L495 AbstractCegarLoop]: Abstraction has 39 states and 51 transitions. [2022-04-27 22:02:52,511 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 12 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:52,511 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 51 transitions. [2022-04-27 22:02:52,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:02:52,511 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:52,511 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:52,537 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-04-27 22:02:52,727 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:52,727 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:52,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:52,728 INFO L85 PathProgramCache]: Analyzing trace with hash -485269154, now seen corresponding path program 2 times [2022-04-27 22:02:52,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:52,728 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787459919] [2022-04-27 22:02:52,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:52,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:52,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:52,851 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:52,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:52,856 INFO L290 TraceCheckUtils]: 0: Hoare triple {2058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-27 22:02:52,856 INFO L290 TraceCheckUtils]: 1: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:52,856 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:52,857 INFO L272 TraceCheckUtils]: 0: Hoare triple {2047#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:52,857 INFO L290 TraceCheckUtils]: 1: Hoare triple {2058#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-27 22:02:52,857 INFO L290 TraceCheckUtils]: 2: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:52,857 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:52,858 INFO L272 TraceCheckUtils]: 4: Hoare triple {2047#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:52,858 INFO L290 TraceCheckUtils]: 5: Hoare triple {2047#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2052#(= main_~y~0 0)} is VALID [2022-04-27 22:02:52,858 INFO L290 TraceCheckUtils]: 6: Hoare triple {2052#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:52,859 INFO L290 TraceCheckUtils]: 7: Hoare triple {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:52,859 INFO L290 TraceCheckUtils]: 8: Hoare triple {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:02:52,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:02:52,860 INFO L290 TraceCheckUtils]: 10: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:02:52,861 INFO L290 TraceCheckUtils]: 11: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2057#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:02:52,861 INFO L290 TraceCheckUtils]: 12: Hoare triple {2057#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:52,861 INFO L290 TraceCheckUtils]: 13: Hoare triple {2048#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:52,861 INFO L290 TraceCheckUtils]: 14: Hoare triple {2048#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:52,861 INFO L272 TraceCheckUtils]: 15: Hoare triple {2048#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2048#false} is VALID [2022-04-27 22:02:52,861 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2048#false} is VALID [2022-04-27 22:02:52,862 INFO L290 TraceCheckUtils]: 17: Hoare triple {2048#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:52,862 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:52,862 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:52,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:52,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787459919] [2022-04-27 22:02:52,862 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1787459919] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:52,862 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1692473882] [2022-04-27 22:02:52,862 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:02:52,862 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:52,862 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:52,863 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:52,864 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 22:02:52,905 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:02:52,905 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:02:52,905 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 22:02:52,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:52,911 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:53,108 INFO L272 TraceCheckUtils]: 0: Hoare triple {2047#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,109 INFO L290 TraceCheckUtils]: 1: Hoare triple {2047#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-27 22:02:53,109 INFO L290 TraceCheckUtils]: 2: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,109 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,110 INFO L272 TraceCheckUtils]: 4: Hoare triple {2047#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,112 INFO L290 TraceCheckUtils]: 5: Hoare triple {2047#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2052#(= main_~y~0 0)} is VALID [2022-04-27 22:02:53,112 INFO L290 TraceCheckUtils]: 6: Hoare triple {2052#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:53,113 INFO L290 TraceCheckUtils]: 7: Hoare triple {2053#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:53,114 INFO L290 TraceCheckUtils]: 8: Hoare triple {2054#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:02:53,114 INFO L290 TraceCheckUtils]: 9: Hoare triple {2055#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:02:53,115 INFO L290 TraceCheckUtils]: 10: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:02:53,115 INFO L290 TraceCheckUtils]: 11: Hoare triple {2056#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2095#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:02:53,116 INFO L290 TraceCheckUtils]: 12: Hoare triple {2095#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,116 INFO L290 TraceCheckUtils]: 13: Hoare triple {2048#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,116 INFO L290 TraceCheckUtils]: 14: Hoare triple {2048#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,116 INFO L272 TraceCheckUtils]: 15: Hoare triple {2048#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2048#false} is VALID [2022-04-27 22:02:53,116 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2048#false} is VALID [2022-04-27 22:02:53,116 INFO L290 TraceCheckUtils]: 17: Hoare triple {2048#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,117 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,117 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:53,117 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:53,256 INFO L290 TraceCheckUtils]: 18: Hoare triple {2048#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,256 INFO L290 TraceCheckUtils]: 17: Hoare triple {2048#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,256 INFO L290 TraceCheckUtils]: 16: Hoare triple {2048#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2048#false} is VALID [2022-04-27 22:02:53,256 INFO L272 TraceCheckUtils]: 15: Hoare triple {2048#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2048#false} is VALID [2022-04-27 22:02:53,256 INFO L290 TraceCheckUtils]: 14: Hoare triple {2048#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,256 INFO L290 TraceCheckUtils]: 13: Hoare triple {2048#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,257 INFO L290 TraceCheckUtils]: 12: Hoare triple {2135#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2048#false} is VALID [2022-04-27 22:02:53,257 INFO L290 TraceCheckUtils]: 11: Hoare triple {2139#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2135#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:02:53,257 INFO L290 TraceCheckUtils]: 10: Hoare triple {2139#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2139#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:02:53,260 INFO L290 TraceCheckUtils]: 9: Hoare triple {2146#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2139#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:02:53,261 INFO L290 TraceCheckUtils]: 8: Hoare triple {2150#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2146#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:02:53,262 INFO L290 TraceCheckUtils]: 7: Hoare triple {2154#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2150#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:02:53,262 INFO L290 TraceCheckUtils]: 6: Hoare triple {2158#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2154#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:02:53,263 INFO L290 TraceCheckUtils]: 5: Hoare triple {2047#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2158#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:02:53,263 INFO L272 TraceCheckUtils]: 4: Hoare triple {2047#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,263 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2047#true} {2047#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,263 INFO L290 TraceCheckUtils]: 2: Hoare triple {2047#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,263 INFO L290 TraceCheckUtils]: 1: Hoare triple {2047#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2047#true} is VALID [2022-04-27 22:02:53,263 INFO L272 TraceCheckUtils]: 0: Hoare triple {2047#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2047#true} is VALID [2022-04-27 22:02:53,263 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:02:53,263 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1692473882] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:53,264 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:53,264 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-27 22:02:53,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506052355] [2022-04-27 22:02:53,264 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:53,264 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:02:53,265 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:53,265 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:53,292 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:53,293 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:02:53,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:53,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:02:53,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:02:53,294 INFO L87 Difference]: Start difference. First operand 39 states and 51 transitions. Second operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:55,204 INFO L93 Difference]: Finished difference Result 139 states and 213 transitions. [2022-04-27 22:02:55,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 22:02:55,204 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:02:55,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:55,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 149 transitions. [2022-04-27 22:02:55,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 149 transitions. [2022-04-27 22:02:55,211 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 149 transitions. [2022-04-27 22:02:55,430 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 149 edges. 149 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:55,434 INFO L225 Difference]: With dead ends: 139 [2022-04-27 22:02:55,434 INFO L226 Difference]: Without dead ends: 128 [2022-04-27 22:02:55,435 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=416, Invalid=1144, Unknown=0, NotChecked=0, Total=1560 [2022-04-27 22:02:55,435 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 219 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 335 mSolverCounterSat, 183 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 219 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 183 IncrementalHoareTripleChecker+Valid, 335 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:55,435 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [219 Valid, 64 Invalid, 518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [183 Valid, 335 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:02:55,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2022-04-27 22:02:55,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 65. [2022-04-27 22:02:55,571 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:55,571 INFO L82 GeneralOperation]: Start isEquivalent. First operand 128 states. Second operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,571 INFO L74 IsIncluded]: Start isIncluded. First operand 128 states. Second operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,572 INFO L87 Difference]: Start difference. First operand 128 states. Second operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:55,577 INFO L93 Difference]: Finished difference Result 128 states and 176 transitions. [2022-04-27 22:02:55,577 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 176 transitions. [2022-04-27 22:02:55,578 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:55,578 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:55,578 INFO L74 IsIncluded]: Start isIncluded. First operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 128 states. [2022-04-27 22:02:55,578 INFO L87 Difference]: Start difference. First operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 128 states. [2022-04-27 22:02:55,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:55,582 INFO L93 Difference]: Finished difference Result 128 states and 176 transitions. [2022-04-27 22:02:55,582 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 176 transitions. [2022-04-27 22:02:55,582 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:55,582 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:55,582 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:55,582 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:55,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 60 states have (on average 1.4) internal successors, (84), 60 states have internal predecessors, (84), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 88 transitions. [2022-04-27 22:02:55,584 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 88 transitions. Word has length 19 [2022-04-27 22:02:55,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:55,584 INFO L495 AbstractCegarLoop]: Abstraction has 65 states and 88 transitions. [2022-04-27 22:02:55,585 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.625) internal successors, (26), 15 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:55,585 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 88 transitions. [2022-04-27 22:02:55,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 22:02:55,585 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:55,585 INFO L195 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:55,610 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 22:02:55,799 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:55,800 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:55,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:55,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1135525866, now seen corresponding path program 2 times [2022-04-27 22:02:55,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:55,800 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182688701] [2022-04-27 22:02:55,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:55,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:55,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:55,868 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:55,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:55,873 INFO L290 TraceCheckUtils]: 0: Hoare triple {2787#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-27 22:02:55,873 INFO L290 TraceCheckUtils]: 1: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:55,873 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:55,873 INFO L272 TraceCheckUtils]: 0: Hoare triple {2780#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2787#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:55,874 INFO L290 TraceCheckUtils]: 1: Hoare triple {2787#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-27 22:02:55,874 INFO L290 TraceCheckUtils]: 2: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:55,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:55,874 INFO L272 TraceCheckUtils]: 4: Hoare triple {2780#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:55,874 INFO L290 TraceCheckUtils]: 5: Hoare triple {2780#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2780#true} is VALID [2022-04-27 22:02:55,874 INFO L290 TraceCheckUtils]: 6: Hoare triple {2780#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2780#true} is VALID [2022-04-27 22:02:55,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {2780#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:55,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:55,876 INFO L290 TraceCheckUtils]: 9: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:55,876 INFO L290 TraceCheckUtils]: 10: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:55,877 INFO L290 TraceCheckUtils]: 11: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:55,877 INFO L290 TraceCheckUtils]: 12: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:55,878 INFO L290 TraceCheckUtils]: 13: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:55,879 INFO L290 TraceCheckUtils]: 14: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2781#false} is VALID [2022-04-27 22:02:55,879 INFO L290 TraceCheckUtils]: 15: Hoare triple {2781#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:55,879 INFO L272 TraceCheckUtils]: 16: Hoare triple {2781#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2781#false} is VALID [2022-04-27 22:02:55,879 INFO L290 TraceCheckUtils]: 17: Hoare triple {2781#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2781#false} is VALID [2022-04-27 22:02:55,879 INFO L290 TraceCheckUtils]: 18: Hoare triple {2781#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:55,879 INFO L290 TraceCheckUtils]: 19: Hoare triple {2781#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:55,879 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:02:55,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:55,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182688701] [2022-04-27 22:02:55,880 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [182688701] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:55,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1496481406] [2022-04-27 22:02:55,880 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:02:55,880 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:55,880 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:55,881 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:55,905 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 22:02:55,922 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:02:55,922 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:02:55,923 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:02:55,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:55,929 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:56,153 INFO L272 TraceCheckUtils]: 0: Hoare triple {2780#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,153 INFO L290 TraceCheckUtils]: 1: Hoare triple {2780#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-27 22:02:56,153 INFO L290 TraceCheckUtils]: 2: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,153 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,153 INFO L272 TraceCheckUtils]: 4: Hoare triple {2780#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,153 INFO L290 TraceCheckUtils]: 5: Hoare triple {2780#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2780#true} is VALID [2022-04-27 22:02:56,153 INFO L290 TraceCheckUtils]: 6: Hoare triple {2780#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2780#true} is VALID [2022-04-27 22:02:56,156 INFO L290 TraceCheckUtils]: 7: Hoare triple {2780#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:56,158 INFO L290 TraceCheckUtils]: 8: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:56,160 INFO L290 TraceCheckUtils]: 9: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,160 INFO L290 TraceCheckUtils]: 10: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,161 INFO L290 TraceCheckUtils]: 11: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,161 INFO L290 TraceCheckUtils]: 12: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,162 INFO L290 TraceCheckUtils]: 13: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:56,162 INFO L290 TraceCheckUtils]: 14: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2781#false} is VALID [2022-04-27 22:02:56,163 INFO L290 TraceCheckUtils]: 15: Hoare triple {2781#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:56,163 INFO L272 TraceCheckUtils]: 16: Hoare triple {2781#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2781#false} is VALID [2022-04-27 22:02:56,163 INFO L290 TraceCheckUtils]: 17: Hoare triple {2781#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2781#false} is VALID [2022-04-27 22:02:56,163 INFO L290 TraceCheckUtils]: 18: Hoare triple {2781#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:56,163 INFO L290 TraceCheckUtils]: 19: Hoare triple {2781#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:56,163 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:02:56,163 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:56,368 INFO L290 TraceCheckUtils]: 19: Hoare triple {2781#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:56,368 INFO L290 TraceCheckUtils]: 18: Hoare triple {2781#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:56,368 INFO L290 TraceCheckUtils]: 17: Hoare triple {2781#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2781#false} is VALID [2022-04-27 22:02:56,368 INFO L272 TraceCheckUtils]: 16: Hoare triple {2781#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {2781#false} is VALID [2022-04-27 22:02:56,368 INFO L290 TraceCheckUtils]: 15: Hoare triple {2781#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2781#false} is VALID [2022-04-27 22:02:56,369 INFO L290 TraceCheckUtils]: 14: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2781#false} is VALID [2022-04-27 22:02:56,370 INFO L290 TraceCheckUtils]: 13: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:56,370 INFO L290 TraceCheckUtils]: 12: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,371 INFO L290 TraceCheckUtils]: 11: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,371 INFO L290 TraceCheckUtils]: 10: Hoare triple {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,372 INFO L290 TraceCheckUtils]: 9: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2786#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:02:56,372 INFO L290 TraceCheckUtils]: 8: Hoare triple {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:56,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {2780#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2785#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:56,378 INFO L290 TraceCheckUtils]: 6: Hoare triple {2780#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2780#true} is VALID [2022-04-27 22:02:56,378 INFO L290 TraceCheckUtils]: 5: Hoare triple {2780#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2780#true} is VALID [2022-04-27 22:02:56,378 INFO L272 TraceCheckUtils]: 4: Hoare triple {2780#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,378 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2780#true} {2780#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,378 INFO L290 TraceCheckUtils]: 2: Hoare triple {2780#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,378 INFO L290 TraceCheckUtils]: 1: Hoare triple {2780#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2780#true} is VALID [2022-04-27 22:02:56,379 INFO L272 TraceCheckUtils]: 0: Hoare triple {2780#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2780#true} is VALID [2022-04-27 22:02:56,379 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:02:56,379 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1496481406] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:56,379 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:56,379 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-04-27 22:02:56,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1138945500] [2022-04-27 22:02:56,379 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:56,380 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:02:56,380 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:56,380 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,402 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:56,402 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:02:56,402 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:56,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:02:56,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:02:56,403 INFO L87 Difference]: Start difference. First operand 65 states and 88 transitions. Second operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:56,689 INFO L93 Difference]: Finished difference Result 76 states and 102 transitions. [2022-04-27 22:02:56,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:02:56,690 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:02:56,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:56,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-27 22:02:56,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 36 transitions. [2022-04-27 22:02:56,692 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 36 transitions. [2022-04-27 22:02:56,729 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:56,730 INFO L225 Difference]: With dead ends: 76 [2022-04-27 22:02:56,730 INFO L226 Difference]: Without dead ends: 63 [2022-04-27 22:02:56,730 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:02:56,731 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:56,731 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 31 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:02:56,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2022-04-27 22:02:56,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2022-04-27 22:02:56,863 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:56,863 INFO L82 GeneralOperation]: Start isEquivalent. First operand 63 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,863 INFO L74 IsIncluded]: Start isIncluded. First operand 63 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,863 INFO L87 Difference]: Start difference. First operand 63 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:56,865 INFO L93 Difference]: Finished difference Result 63 states and 87 transitions. [2022-04-27 22:02:56,865 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-27 22:02:56,865 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:56,865 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:56,866 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 63 states. [2022-04-27 22:02:56,866 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 63 states. [2022-04-27 22:02:56,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:56,868 INFO L93 Difference]: Finished difference Result 63 states and 87 transitions. [2022-04-27 22:02:56,868 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-27 22:02:56,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:56,868 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:56,868 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:56,868 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:56,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 87 transitions. [2022-04-27 22:02:56,870 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 87 transitions. Word has length 20 [2022-04-27 22:02:56,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:56,870 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 87 transitions. [2022-04-27 22:02:56,870 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.4) internal successors, (17), 4 states have internal predecessors, (17), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:56,871 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-27 22:02:56,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 22:02:56,871 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:56,871 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:56,897 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-27 22:02:57,091 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:57,091 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:57,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:57,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1850387710, now seen corresponding path program 3 times [2022-04-27 22:02:57,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:57,092 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32850263] [2022-04-27 22:02:57,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:57,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:57,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:57,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:57,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:57,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {3254#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-27 22:02:57,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,189 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,189 INFO L272 TraceCheckUtils]: 0: Hoare triple {3244#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3254#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:57,189 INFO L290 TraceCheckUtils]: 1: Hoare triple {3254#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-27 22:02:57,189 INFO L290 TraceCheckUtils]: 2: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,190 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,190 INFO L272 TraceCheckUtils]: 4: Hoare triple {3244#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,190 INFO L290 TraceCheckUtils]: 5: Hoare triple {3244#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3249#(= main_~y~0 0)} is VALID [2022-04-27 22:02:57,191 INFO L290 TraceCheckUtils]: 6: Hoare triple {3249#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:57,191 INFO L290 TraceCheckUtils]: 7: Hoare triple {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:57,192 INFO L290 TraceCheckUtils]: 8: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:57,192 INFO L290 TraceCheckUtils]: 9: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3252#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:02:57,193 INFO L290 TraceCheckUtils]: 10: Hoare triple {3252#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3253#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 11: Hoare triple {3253#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 12: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 13: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 14: Hoare triple {3245#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 15: Hoare triple {3245#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 16: Hoare triple {3245#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L272 TraceCheckUtils]: 17: Hoare triple {3245#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 18: Hoare triple {3245#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 19: Hoare triple {3245#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,194 INFO L290 TraceCheckUtils]: 20: Hoare triple {3245#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,195 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:02:57,195 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:57,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32850263] [2022-04-27 22:02:57,195 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [32850263] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:57,195 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [665023974] [2022-04-27 22:02:57,195 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:02:57,195 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:57,195 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:57,196 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:57,199 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 22:02:57,228 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 22:02:57,228 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:02:57,228 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:02:57,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:57,239 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:57,351 INFO L272 TraceCheckUtils]: 0: Hoare triple {3244#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,351 INFO L290 TraceCheckUtils]: 1: Hoare triple {3244#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-27 22:02:57,351 INFO L290 TraceCheckUtils]: 2: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,351 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,351 INFO L272 TraceCheckUtils]: 4: Hoare triple {3244#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,352 INFO L290 TraceCheckUtils]: 5: Hoare triple {3244#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3249#(= main_~y~0 0)} is VALID [2022-04-27 22:02:57,352 INFO L290 TraceCheckUtils]: 6: Hoare triple {3249#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:02:57,353 INFO L290 TraceCheckUtils]: 7: Hoare triple {3250#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:57,353 INFO L290 TraceCheckUtils]: 8: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:57,353 INFO L290 TraceCheckUtils]: 9: Hoare triple {3251#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3285#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:02:57,354 INFO L290 TraceCheckUtils]: 10: Hoare triple {3285#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3289#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:02:57,354 INFO L290 TraceCheckUtils]: 11: Hoare triple {3289#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,354 INFO L290 TraceCheckUtils]: 12: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-27 22:02:57,354 INFO L290 TraceCheckUtils]: 13: Hoare triple {3245#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-27 22:02:57,354 INFO L290 TraceCheckUtils]: 14: Hoare triple {3245#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,354 INFO L290 TraceCheckUtils]: 15: Hoare triple {3245#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3245#false} is VALID [2022-04-27 22:02:57,355 INFO L290 TraceCheckUtils]: 16: Hoare triple {3245#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,355 INFO L272 TraceCheckUtils]: 17: Hoare triple {3245#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3245#false} is VALID [2022-04-27 22:02:57,355 INFO L290 TraceCheckUtils]: 18: Hoare triple {3245#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3245#false} is VALID [2022-04-27 22:02:57,355 INFO L290 TraceCheckUtils]: 19: Hoare triple {3245#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,355 INFO L290 TraceCheckUtils]: 20: Hoare triple {3245#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,355 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:02:57,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:57,472 INFO L290 TraceCheckUtils]: 20: Hoare triple {3245#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,472 INFO L290 TraceCheckUtils]: 19: Hoare triple {3245#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,472 INFO L290 TraceCheckUtils]: 18: Hoare triple {3245#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3245#false} is VALID [2022-04-27 22:02:57,472 INFO L272 TraceCheckUtils]: 17: Hoare triple {3245#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3245#false} is VALID [2022-04-27 22:02:57,473 INFO L290 TraceCheckUtils]: 16: Hoare triple {3245#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,473 INFO L290 TraceCheckUtils]: 15: Hoare triple {3245#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3245#false} is VALID [2022-04-27 22:02:57,473 INFO L290 TraceCheckUtils]: 14: Hoare triple {3245#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3245#false} is VALID [2022-04-27 22:02:57,473 INFO L290 TraceCheckUtils]: 13: Hoare triple {3341#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3245#false} is VALID [2022-04-27 22:02:57,474 INFO L290 TraceCheckUtils]: 12: Hoare triple {3345#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3341#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:02:57,475 INFO L290 TraceCheckUtils]: 11: Hoare triple {3349#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3345#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:02:57,476 INFO L290 TraceCheckUtils]: 10: Hoare triple {3353#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3349#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:02:57,476 INFO L290 TraceCheckUtils]: 9: Hoare triple {3244#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3353#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:02:57,476 INFO L290 TraceCheckUtils]: 8: Hoare triple {3244#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,476 INFO L290 TraceCheckUtils]: 7: Hoare triple {3244#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3244#true} is VALID [2022-04-27 22:02:57,476 INFO L290 TraceCheckUtils]: 6: Hoare triple {3244#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3244#true} is VALID [2022-04-27 22:02:57,476 INFO L290 TraceCheckUtils]: 5: Hoare triple {3244#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3244#true} is VALID [2022-04-27 22:02:57,476 INFO L272 TraceCheckUtils]: 4: Hoare triple {3244#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,476 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3244#true} {3244#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,477 INFO L290 TraceCheckUtils]: 2: Hoare triple {3244#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,477 INFO L290 TraceCheckUtils]: 1: Hoare triple {3244#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3244#true} is VALID [2022-04-27 22:02:57,477 INFO L272 TraceCheckUtils]: 0: Hoare triple {3244#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3244#true} is VALID [2022-04-27 22:02:57,477 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:02:57,477 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [665023974] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:57,477 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:57,477 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-27 22:02:57,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029327818] [2022-04-27 22:02:57,477 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:57,478 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:02:57,478 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:57,478 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:57,506 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:57,506 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 22:02:57,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:57,506 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 22:02:57,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-27 22:02:57,506 INFO L87 Difference]: Start difference. First operand 63 states and 87 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:58,293 INFO L93 Difference]: Finished difference Result 97 states and 131 transitions. [2022-04-27 22:02:58,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-04-27 22:02:58,293 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:02:58,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:02:58,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 72 transitions. [2022-04-27 22:02:58,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 72 transitions. [2022-04-27 22:02:58,296 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 15 states and 72 transitions. [2022-04-27 22:02:58,376 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:58,377 INFO L225 Difference]: With dead ends: 97 [2022-04-27 22:02:58,377 INFO L226 Difference]: Without dead ends: 80 [2022-04-27 22:02:58,378 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=522, Unknown=0, NotChecked=0, Total=650 [2022-04-27 22:02:58,378 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 44 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 169 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 45 SdHoareTripleChecker+Invalid, 215 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 169 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:02:58,379 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 45 Invalid, 215 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 169 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:02:58,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2022-04-27 22:02:58,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 61. [2022-04-27 22:02:58,528 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:02:58,528 INFO L82 GeneralOperation]: Start isEquivalent. First operand 80 states. Second operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,528 INFO L74 IsIncluded]: Start isIncluded. First operand 80 states. Second operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,528 INFO L87 Difference]: Start difference. First operand 80 states. Second operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:58,530 INFO L93 Difference]: Finished difference Result 80 states and 108 transitions. [2022-04-27 22:02:58,530 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 108 transitions. [2022-04-27 22:02:58,531 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:58,531 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:58,531 INFO L74 IsIncluded]: Start isIncluded. First operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-27 22:02:58,531 INFO L87 Difference]: Start difference. First operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 80 states. [2022-04-27 22:02:58,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:02:58,533 INFO L93 Difference]: Finished difference Result 80 states and 108 transitions. [2022-04-27 22:02:58,533 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 108 transitions. [2022-04-27 22:02:58,533 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:02:58,533 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:02:58,533 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:02:58,533 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:02:58,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 56 states have (on average 1.4107142857142858) internal successors, (79), 56 states have internal predecessors, (79), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 83 transitions. [2022-04-27 22:02:58,535 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 83 transitions. Word has length 21 [2022-04-27 22:02:58,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:02:58,535 INFO L495 AbstractCegarLoop]: Abstraction has 61 states and 83 transitions. [2022-04-27 22:02:58,535 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 13 states have internal predecessors, (28), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:58,535 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 83 transitions. [2022-04-27 22:02:58,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 22:02:58,535 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:02:58,536 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:02:58,553 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 22:02:58,743 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:58,743 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:02:58,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:02:58,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1066744542, now seen corresponding path program 3 times [2022-04-27 22:02:58,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:02:58,744 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326154909] [2022-04-27 22:02:58,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:02:58,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:02:58,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:58,805 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:02:58,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:58,810 INFO L290 TraceCheckUtils]: 0: Hoare triple {3816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-27 22:02:58,811 INFO L290 TraceCheckUtils]: 1: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:58,811 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:58,811 INFO L272 TraceCheckUtils]: 0: Hoare triple {3807#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:02:58,811 INFO L290 TraceCheckUtils]: 1: Hoare triple {3816#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-27 22:02:58,812 INFO L290 TraceCheckUtils]: 2: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:58,812 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:58,812 INFO L272 TraceCheckUtils]: 4: Hoare triple {3807#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:58,812 INFO L290 TraceCheckUtils]: 5: Hoare triple {3807#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3807#true} is VALID [2022-04-27 22:02:58,813 INFO L290 TraceCheckUtils]: 6: Hoare triple {3807#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:02:58,813 INFO L290 TraceCheckUtils]: 7: Hoare triple {3812#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:02:58,814 INFO L290 TraceCheckUtils]: 8: Hoare triple {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:02:58,814 INFO L290 TraceCheckUtils]: 9: Hoare triple {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:02:58,815 INFO L290 TraceCheckUtils]: 10: Hoare triple {3813#(<= (* (div (+ main_~x~0 2) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3814#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:02:58,815 INFO L290 TraceCheckUtils]: 11: Hoare triple {3814#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:02:58,816 INFO L290 TraceCheckUtils]: 12: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:02:58,816 INFO L290 TraceCheckUtils]: 13: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:02:58,817 INFO L290 TraceCheckUtils]: 14: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:02:58,817 INFO L290 TraceCheckUtils]: 15: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:02:58,817 INFO L290 TraceCheckUtils]: 16: Hoare triple {3815#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:58,817 INFO L272 TraceCheckUtils]: 17: Hoare triple {3808#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3808#false} is VALID [2022-04-27 22:02:58,817 INFO L290 TraceCheckUtils]: 18: Hoare triple {3808#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3808#false} is VALID [2022-04-27 22:02:58,818 INFO L290 TraceCheckUtils]: 19: Hoare triple {3808#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:58,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {3808#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:58,818 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:02:58,818 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:02:58,818 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326154909] [2022-04-27 22:02:58,818 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326154909] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:02:58,818 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [558649596] [2022-04-27 22:02:58,818 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:02:58,818 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:02:58,818 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:02:58,819 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:02:58,820 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 22:02:58,849 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 22:02:58,849 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:02:58,849 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-27 22:02:58,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:02:58,857 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:02:59,412 INFO L272 TraceCheckUtils]: 0: Hoare triple {3807#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,412 INFO L290 TraceCheckUtils]: 1: Hoare triple {3807#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-27 22:02:59,412 INFO L290 TraceCheckUtils]: 2: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,412 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,412 INFO L272 TraceCheckUtils]: 4: Hoare triple {3807#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,412 INFO L290 TraceCheckUtils]: 5: Hoare triple {3807#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:02:59,413 INFO L290 TraceCheckUtils]: 6: Hoare triple {3835#(= main_~n~0 main_~x~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3839#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:02:59,413 INFO L290 TraceCheckUtils]: 7: Hoare triple {3839#(= (+ main_~x~0 1) main_~n~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3843#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:02:59,413 INFO L290 TraceCheckUtils]: 8: Hoare triple {3843#(= main_~n~0 (+ main_~x~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3843#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:02:59,414 INFO L290 TraceCheckUtils]: 9: Hoare triple {3843#(= main_~n~0 (+ main_~x~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3843#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:02:59,414 INFO L290 TraceCheckUtils]: 10: Hoare triple {3843#(= main_~n~0 (+ main_~x~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3839#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:02:59,415 INFO L290 TraceCheckUtils]: 11: Hoare triple {3839#(= (+ main_~x~0 1) main_~n~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:02:59,415 INFO L290 TraceCheckUtils]: 12: Hoare triple {3835#(= main_~n~0 main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:02:59,415 INFO L290 TraceCheckUtils]: 13: Hoare triple {3835#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:02:59,416 INFO L290 TraceCheckUtils]: 14: Hoare triple {3835#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3835#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:02:59,416 INFO L290 TraceCheckUtils]: 15: Hoare triple {3835#(= main_~n~0 main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3868#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-27 22:02:59,416 INFO L290 TraceCheckUtils]: 16: Hoare triple {3868#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3872#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 22:02:59,417 INFO L272 TraceCheckUtils]: 17: Hoare triple {3872#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:02:59,417 INFO L290 TraceCheckUtils]: 18: Hoare triple {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3880#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:02:59,418 INFO L290 TraceCheckUtils]: 19: Hoare triple {3880#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:59,418 INFO L290 TraceCheckUtils]: 20: Hoare triple {3808#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:59,418 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:02:59,418 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:02:59,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {3808#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:59,883 INFO L290 TraceCheckUtils]: 19: Hoare triple {3880#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {3808#false} is VALID [2022-04-27 22:02:59,883 INFO L290 TraceCheckUtils]: 18: Hoare triple {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3880#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:02:59,884 INFO L272 TraceCheckUtils]: 17: Hoare triple {3896#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {3876#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:02:59,884 INFO L290 TraceCheckUtils]: 16: Hoare triple {3900#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3896#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:02:59,884 INFO L290 TraceCheckUtils]: 15: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3900#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:02:59,885 INFO L290 TraceCheckUtils]: 14: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:59,885 INFO L290 TraceCheckUtils]: 13: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:59,885 INFO L290 TraceCheckUtils]: 12: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:59,886 INFO L290 TraceCheckUtils]: 11: Hoare triple {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:59,887 INFO L290 TraceCheckUtils]: 10: Hoare triple {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:02:59,887 INFO L290 TraceCheckUtils]: 9: Hoare triple {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-27 22:02:59,888 INFO L290 TraceCheckUtils]: 8: Hoare triple {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-27 22:02:59,889 INFO L290 TraceCheckUtils]: 7: Hoare triple {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3921#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-27 22:02:59,889 INFO L290 TraceCheckUtils]: 6: Hoare triple {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3917#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:02:59,890 INFO L290 TraceCheckUtils]: 5: Hoare triple {3807#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3904#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:02:59,890 INFO L272 TraceCheckUtils]: 4: Hoare triple {3807#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,890 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3807#true} {3807#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,890 INFO L290 TraceCheckUtils]: 2: Hoare triple {3807#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,890 INFO L290 TraceCheckUtils]: 1: Hoare triple {3807#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3807#true} is VALID [2022-04-27 22:02:59,890 INFO L272 TraceCheckUtils]: 0: Hoare triple {3807#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3807#true} is VALID [2022-04-27 22:02:59,890 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:02:59,890 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [558649596] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:02:59,890 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:02:59,890 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 9] total 19 [2022-04-27 22:02:59,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417532680] [2022-04-27 22:02:59,891 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:02:59,891 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:02:59,891 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:02:59,891 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:02:59,935 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:02:59,935 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 22:02:59,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:02:59,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 22:02:59,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=285, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:02:59,936 INFO L87 Difference]: Start difference. First operand 61 states and 83 transitions. Second operand has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:00,746 INFO L93 Difference]: Finished difference Result 90 states and 124 transitions. [2022-04-27 22:03:00,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-04-27 22:03:00,746 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:03:00,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:00,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 61 transitions. [2022-04-27 22:03:00,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 61 transitions. [2022-04-27 22:03:00,749 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 13 states and 61 transitions. [2022-04-27 22:03:00,811 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:00,812 INFO L225 Difference]: With dead ends: 90 [2022-04-27 22:03:00,812 INFO L226 Difference]: Without dead ends: 85 [2022-04-27 22:03:00,812 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 30 SyntacticMatches, 2 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=141, Invalid=671, Unknown=0, NotChecked=0, Total=812 [2022-04-27 22:03:00,813 INFO L413 NwaCegarLoop]: 20 mSDtfsCounter, 65 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 65 SdHoareTripleChecker+Valid, 62 SdHoareTripleChecker+Invalid, 279 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:00,813 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [65 Valid, 62 Invalid, 279 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:03:00,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-04-27 22:03:00,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 76. [2022-04-27 22:03:00,982 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:00,982 INFO L82 GeneralOperation]: Start isEquivalent. First operand 85 states. Second operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,982 INFO L74 IsIncluded]: Start isIncluded. First operand 85 states. Second operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,982 INFO L87 Difference]: Start difference. First operand 85 states. Second operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:00,984 INFO L93 Difference]: Finished difference Result 85 states and 116 transitions. [2022-04-27 22:03:00,984 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 116 transitions. [2022-04-27 22:03:00,984 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:00,984 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:00,985 INFO L74 IsIncluded]: Start isIncluded. First operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-27 22:03:00,985 INFO L87 Difference]: Start difference. First operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 85 states. [2022-04-27 22:03:00,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:00,986 INFO L93 Difference]: Finished difference Result 85 states and 116 transitions. [2022-04-27 22:03:00,986 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 116 transitions. [2022-04-27 22:03:00,987 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:00,987 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:00,987 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:00,987 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:00,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 71 states have (on average 1.408450704225352) internal successors, (100), 71 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 104 transitions. [2022-04-27 22:03:00,988 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 104 transitions. Word has length 21 [2022-04-27 22:03:00,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:00,988 INFO L495 AbstractCegarLoop]: Abstraction has 76 states and 104 transitions. [2022-04-27 22:03:00,989 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 17 states have (on average 2.411764705882353) internal successors, (41), 17 states have internal predecessors, (41), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:00,989 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 104 transitions. [2022-04-27 22:03:00,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 22:03:00,989 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:00,989 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:01,015 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 22:03:01,203 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-27 22:03:01,203 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:01,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:01,203 INFO L85 PathProgramCache]: Analyzing trace with hash -500618306, now seen corresponding path program 4 times [2022-04-27 22:03:01,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:01,204 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552104469] [2022-04-27 22:03:01,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:01,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:01,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:01,561 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:01,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:01,566 INFO L290 TraceCheckUtils]: 0: Hoare triple {4403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-27 22:03:01,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:01,567 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:01,567 INFO L272 TraceCheckUtils]: 0: Hoare triple {4389#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:01,567 INFO L290 TraceCheckUtils]: 1: Hoare triple {4403#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-27 22:03:01,568 INFO L290 TraceCheckUtils]: 2: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:01,568 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:01,568 INFO L272 TraceCheckUtils]: 4: Hoare triple {4389#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:01,568 INFO L290 TraceCheckUtils]: 5: Hoare triple {4389#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:03:01,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:01,718 INFO L290 TraceCheckUtils]: 7: Hoare triple {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4396#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:01,719 INFO L290 TraceCheckUtils]: 8: Hoare triple {4396#(and (<= 2 main_~y~0) (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~x~0) (* (- 1) main_~y~0) (* 4294967296 (div main_~x~0 4294967296))) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2) (<= main_~n~0 (+ (* (div (+ main_~n~0 (* (- 1) main_~y~0)) 4294967296) 4294967296) 4294967295)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:01,719 INFO L290 TraceCheckUtils]: 9: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:01,720 INFO L290 TraceCheckUtils]: 10: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:01,720 INFO L290 TraceCheckUtils]: 11: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:01,721 INFO L290 TraceCheckUtils]: 12: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:01,722 INFO L290 TraceCheckUtils]: 13: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:01,722 INFO L290 TraceCheckUtils]: 14: Hoare triple {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} is VALID [2022-04-27 22:03:01,723 INFO L290 TraceCheckUtils]: 15: Hoare triple {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} is VALID [2022-04-27 22:03:01,724 INFO L290 TraceCheckUtils]: 16: Hoare triple {4399#(and (<= (+ 2 (* 4294967296 (div (+ main_~n~0 (* (- 1) main_~y~0) 4294967293) 4294967296))) main_~n~0) (<= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:01,726 INFO L290 TraceCheckUtils]: 17: Hoare triple {4398#(and (<= (+ (* 4294967296 (div (+ main_~n~0 4294967294 (* (- 1) main_~y~0)) 4294967296)) 2) main_~n~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:03:01,727 INFO L290 TraceCheckUtils]: 18: Hoare triple {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:03:01,730 INFO L272 TraceCheckUtils]: 19: Hoare triple {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {4401#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:03:01,730 INFO L290 TraceCheckUtils]: 20: Hoare triple {4401#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4402#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:03:01,731 INFO L290 TraceCheckUtils]: 21: Hoare triple {4402#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-27 22:03:01,731 INFO L290 TraceCheckUtils]: 22: Hoare triple {4390#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-27 22:03:01,731 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:03:01,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:01,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552104469] [2022-04-27 22:03:01,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [552104469] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:01,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1156542355] [2022-04-27 22:03:01,731 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:03:01,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:01,732 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:01,732 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:01,733 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 22:03:01,786 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:03:01,787 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:01,787 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-27 22:03:01,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:01,799 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:09,125 INFO L272 TraceCheckUtils]: 0: Hoare triple {4389#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:09,126 INFO L290 TraceCheckUtils]: 1: Hoare triple {4389#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-27 22:03:09,126 INFO L290 TraceCheckUtils]: 2: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:09,126 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:09,126 INFO L272 TraceCheckUtils]: 4: Hoare triple {4389#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:09,126 INFO L290 TraceCheckUtils]: 5: Hoare triple {4389#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:03:09,127 INFO L290 TraceCheckUtils]: 6: Hoare triple {4394#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:09,129 INFO L290 TraceCheckUtils]: 7: Hoare triple {4395#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:09,129 INFO L290 TraceCheckUtils]: 8: Hoare triple {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:09,130 INFO L290 TraceCheckUtils]: 9: Hoare triple {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4435#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:09,131 INFO L290 TraceCheckUtils]: 10: Hoare triple {4435#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4439#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 1) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)))} is VALID [2022-04-27 22:03:09,191 INFO L290 TraceCheckUtils]: 11: Hoare triple {4439#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 1) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:09,192 INFO L290 TraceCheckUtils]: 12: Hoare triple {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:09,195 INFO L290 TraceCheckUtils]: 13: Hoare triple {4443#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= 2 main_~y~0) (<= main_~y~0 2) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 2)) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4450#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)) (<= 1 main_~y~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:09,197 INFO L290 TraceCheckUtils]: 14: Hoare triple {4450#(and (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= (+ main_~y~0 main_~x~0) (+ main_~n~0 1)) (<= 1 main_~y~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:09,197 INFO L290 TraceCheckUtils]: 15: Hoare triple {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:09,201 INFO L290 TraceCheckUtils]: 16: Hoare triple {4454#(and (<= 0 main_~y~0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (<= main_~y~0 0) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4461#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:09,203 INFO L290 TraceCheckUtils]: 17: Hoare triple {4461#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (< 0 (mod main_~x~0 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:09,206 INFO L290 TraceCheckUtils]: 18: Hoare triple {4428#(and (<= 2 main_~y~0) (<= main_~y~0 2) (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (+ main_~y~0 main_~x~0) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:09,207 INFO L272 TraceCheckUtils]: 19: Hoare triple {4397#(and (<= (+ (* (div (+ main_~n~0 4294967295 (* (- 1) main_~y~0)) 4294967296) 4294967296) 2) main_~n~0) (<= main_~y~0 2))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:03:09,207 INFO L290 TraceCheckUtils]: 20: Hoare triple {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4475#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:03:09,208 INFO L290 TraceCheckUtils]: 21: Hoare triple {4475#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-27 22:03:09,208 INFO L290 TraceCheckUtils]: 22: Hoare triple {4390#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-27 22:03:09,208 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:09,208 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:10,492 INFO L290 TraceCheckUtils]: 22: Hoare triple {4390#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-27 22:03:10,492 INFO L290 TraceCheckUtils]: 21: Hoare triple {4475#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {4390#false} is VALID [2022-04-27 22:03:10,493 INFO L290 TraceCheckUtils]: 20: Hoare triple {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4475#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:03:10,493 INFO L272 TraceCheckUtils]: 19: Hoare triple {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {4471#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:03:10,494 INFO L290 TraceCheckUtils]: 18: Hoare triple {4494#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4400#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:03:10,495 INFO L290 TraceCheckUtils]: 17: Hoare triple {4498#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4494#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:03:10,496 INFO L290 TraceCheckUtils]: 16: Hoare triple {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4498#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:03:10,497 INFO L290 TraceCheckUtils]: 15: Hoare triple {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:10,498 INFO L290 TraceCheckUtils]: 14: Hoare triple {4509#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4502#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:10,499 INFO L290 TraceCheckUtils]: 13: Hoare triple {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4509#(or (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:10,499 INFO L290 TraceCheckUtils]: 12: Hoare triple {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:10,500 INFO L290 TraceCheckUtils]: 11: Hoare triple {4520#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4513#(or (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:10,501 INFO L290 TraceCheckUtils]: 10: Hoare triple {4524#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4520#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:03:10,502 INFO L290 TraceCheckUtils]: 9: Hoare triple {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4524#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:03:10,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:03:10,504 INFO L290 TraceCheckUtils]: 7: Hoare triple {4535#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4528#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:03:10,506 INFO L290 TraceCheckUtils]: 6: Hoare triple {4539#(or (<= (mod (+ main_~y~0 2) 4294967296) 0) (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4535#(or (<= (mod (+ main_~y~0 1) 4294967296) 0) (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:03:10,507 INFO L290 TraceCheckUtils]: 5: Hoare triple {4389#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4539#(or (<= (mod (+ main_~y~0 2) 4294967296) 0) (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:10,507 INFO L272 TraceCheckUtils]: 4: Hoare triple {4389#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:10,507 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4389#true} {4389#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:10,507 INFO L290 TraceCheckUtils]: 2: Hoare triple {4389#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:10,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {4389#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4389#true} is VALID [2022-04-27 22:03:10,507 INFO L272 TraceCheckUtils]: 0: Hoare triple {4389#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4389#true} is VALID [2022-04-27 22:03:10,507 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:10,508 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1156542355] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:10,508 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:10,508 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14, 15] total 31 [2022-04-27 22:03:10,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1164977922] [2022-04-27 22:03:10,508 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:10,508 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:03:10,509 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:10,509 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:10,620 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:10,621 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-27 22:03:10,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:10,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-27 22:03:10,621 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=775, Unknown=0, NotChecked=0, Total=930 [2022-04-27 22:03:10,622 INFO L87 Difference]: Start difference. First operand 76 states and 104 transitions. Second operand has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:18,105 INFO L93 Difference]: Finished difference Result 140 states and 185 transitions. [2022-04-27 22:03:18,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-04-27 22:03:18,106 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:03:18,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:18,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 117 transitions. [2022-04-27 22:03:18,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 117 transitions. [2022-04-27 22:03:18,109 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 49 states and 117 transitions. [2022-04-27 22:03:18,504 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 117 edges. 117 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:18,506 INFO L225 Difference]: With dead ends: 140 [2022-04-27 22:03:18,506 INFO L226 Difference]: Without dead ends: 119 [2022-04-27 22:03:18,507 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 25 SyntacticMatches, 5 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1696 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=972, Invalid=4880, Unknown=0, NotChecked=0, Total=5852 [2022-04-27 22:03:18,508 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 138 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 527 mSolverCounterSat, 178 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 91 SdHoareTripleChecker+Invalid, 705 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 178 IncrementalHoareTripleChecker+Valid, 527 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:18,508 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [138 Valid, 91 Invalid, 705 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [178 Valid, 527 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-04-27 22:03:18,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2022-04-27 22:03:18,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 93. [2022-04-27 22:03:18,692 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:18,692 INFO L82 GeneralOperation]: Start isEquivalent. First operand 119 states. Second operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,693 INFO L74 IsIncluded]: Start isIncluded. First operand 119 states. Second operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,693 INFO L87 Difference]: Start difference. First operand 119 states. Second operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:18,695 INFO L93 Difference]: Finished difference Result 119 states and 159 transitions. [2022-04-27 22:03:18,695 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 159 transitions. [2022-04-27 22:03:18,695 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:18,695 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:18,696 INFO L74 IsIncluded]: Start isIncluded. First operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-27 22:03:18,696 INFO L87 Difference]: Start difference. First operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 119 states. [2022-04-27 22:03:18,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:18,698 INFO L93 Difference]: Finished difference Result 119 states and 159 transitions. [2022-04-27 22:03:18,698 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 159 transitions. [2022-04-27 22:03:18,698 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:18,698 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:18,698 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:18,699 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:18,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 88 states have (on average 1.3863636363636365) internal successors, (122), 88 states have internal predecessors, (122), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 126 transitions. [2022-04-27 22:03:18,700 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 126 transitions. Word has length 23 [2022-04-27 22:03:18,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:18,701 INFO L495 AbstractCegarLoop]: Abstraction has 93 states and 126 transitions. [2022-04-27 22:03:18,701 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 1.5161290322580645) internal successors, (47), 28 states have internal predecessors, (47), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:18,701 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 126 transitions. [2022-04-27 22:03:18,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-04-27 22:03:18,701 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:18,701 INFO L195 NwaCegarLoop]: trace histogram [4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:18,727 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 22:03:18,922 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:18,922 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:18,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:18,923 INFO L85 PathProgramCache]: Analyzing trace with hash 192604094, now seen corresponding path program 4 times [2022-04-27 22:03:18,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:18,923 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031009964] [2022-04-27 22:03:18,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:18,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:18,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:19,015 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:19,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:19,021 INFO L290 TraceCheckUtils]: 0: Hoare triple {5229#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-27 22:03:19,021 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,021 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,022 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5229#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:19,022 INFO L290 TraceCheckUtils]: 1: Hoare triple {5229#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-27 22:03:19,022 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,037 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,038 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,038 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5223#(= main_~y~0 0)} is VALID [2022-04-27 22:03:19,039 INFO L290 TraceCheckUtils]: 6: Hoare triple {5223#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:19,040 INFO L290 TraceCheckUtils]: 7: Hoare triple {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:19,040 INFO L290 TraceCheckUtils]: 8: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:19,041 INFO L290 TraceCheckUtils]: 9: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5226#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:03:19,041 INFO L290 TraceCheckUtils]: 10: Hoare triple {5226#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5227#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:03:19,042 INFO L290 TraceCheckUtils]: 11: Hoare triple {5227#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5228#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 12: Hoare triple {5228#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 13: Hoare triple {5219#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 14: Hoare triple {5219#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 15: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 16: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 17: Hoare triple {5219#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 18: Hoare triple {5219#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L272 TraceCheckUtils]: 19: Hoare triple {5219#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 20: Hoare triple {5219#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5219#false} is VALID [2022-04-27 22:03:19,043 INFO L290 TraceCheckUtils]: 21: Hoare triple {5219#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,044 INFO L290 TraceCheckUtils]: 22: Hoare triple {5219#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,044 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:03:19,044 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:19,044 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031009964] [2022-04-27 22:03:19,044 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031009964] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:19,044 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1376536775] [2022-04-27 22:03:19,044 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:03:19,044 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:19,044 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:19,045 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:19,074 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 22:03:19,098 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:03:19,098 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:19,099 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:03:19,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:19,112 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:19,234 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,234 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-27 22:03:19,235 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,235 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,235 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,235 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5223#(= main_~y~0 0)} is VALID [2022-04-27 22:03:19,236 INFO L290 TraceCheckUtils]: 6: Hoare triple {5223#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:19,236 INFO L290 TraceCheckUtils]: 7: Hoare triple {5224#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:19,237 INFO L290 TraceCheckUtils]: 8: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:19,237 INFO L290 TraceCheckUtils]: 9: Hoare triple {5225#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5260#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:19,237 INFO L290 TraceCheckUtils]: 10: Hoare triple {5260#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5264#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:03:19,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {5264#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5268#(and (= main_~y~0 (+ main_~z~0 2)) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 12: Hoare triple {5268#(and (= main_~y~0 (+ main_~z~0 2)) (<= 2 main_~y~0) (<= main_~y~0 2))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 13: Hoare triple {5219#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 14: Hoare triple {5219#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 15: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 16: Hoare triple {5219#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 17: Hoare triple {5219#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 18: Hoare triple {5219#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L272 TraceCheckUtils]: 19: Hoare triple {5219#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 20: Hoare triple {5219#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5219#false} is VALID [2022-04-27 22:03:19,239 INFO L290 TraceCheckUtils]: 21: Hoare triple {5219#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,240 INFO L290 TraceCheckUtils]: 22: Hoare triple {5219#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,240 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:03:19,240 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:19,407 INFO L290 TraceCheckUtils]: 22: Hoare triple {5219#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,407 INFO L290 TraceCheckUtils]: 21: Hoare triple {5219#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,407 INFO L290 TraceCheckUtils]: 20: Hoare triple {5219#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5219#false} is VALID [2022-04-27 22:03:19,408 INFO L272 TraceCheckUtils]: 19: Hoare triple {5219#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5219#false} is VALID [2022-04-27 22:03:19,408 INFO L290 TraceCheckUtils]: 18: Hoare triple {5219#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,408 INFO L290 TraceCheckUtils]: 17: Hoare triple {5317#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5219#false} is VALID [2022-04-27 22:03:19,409 INFO L290 TraceCheckUtils]: 16: Hoare triple {5321#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5317#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:03:19,410 INFO L290 TraceCheckUtils]: 15: Hoare triple {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5321#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:19,411 INFO L290 TraceCheckUtils]: 14: Hoare triple {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:03:19,411 INFO L290 TraceCheckUtils]: 13: Hoare triple {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:03:19,414 INFO L290 TraceCheckUtils]: 12: Hoare triple {5335#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5325#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:03:19,417 INFO L290 TraceCheckUtils]: 11: Hoare triple {5339#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5335#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:03:19,418 INFO L290 TraceCheckUtils]: 10: Hoare triple {5343#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5339#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:19,418 INFO L290 TraceCheckUtils]: 9: Hoare triple {5218#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5343#(or (< 0 (mod (+ main_~y~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:03:19,418 INFO L290 TraceCheckUtils]: 8: Hoare triple {5218#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,418 INFO L290 TraceCheckUtils]: 7: Hoare triple {5218#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5218#true} is VALID [2022-04-27 22:03:19,418 INFO L290 TraceCheckUtils]: 6: Hoare triple {5218#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5218#true} is VALID [2022-04-27 22:03:19,418 INFO L290 TraceCheckUtils]: 5: Hoare triple {5218#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5218#true} is VALID [2022-04-27 22:03:19,419 INFO L272 TraceCheckUtils]: 4: Hoare triple {5218#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,419 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5218#true} {5218#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,419 INFO L290 TraceCheckUtils]: 2: Hoare triple {5218#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,419 INFO L290 TraceCheckUtils]: 1: Hoare triple {5218#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5218#true} is VALID [2022-04-27 22:03:19,419 INFO L272 TraceCheckUtils]: 0: Hoare triple {5218#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5218#true} is VALID [2022-04-27 22:03:19,419 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:03:19,419 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1376536775] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:19,419 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:19,419 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 18 [2022-04-27 22:03:19,420 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2090284349] [2022-04-27 22:03:19,420 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:19,420 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:03:19,420 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:19,420 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:19,450 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 40 edges. 40 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:19,450 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-04-27 22:03:19,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:19,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-04-27 22:03:19,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:03:19,451 INFO L87 Difference]: Start difference. First operand 93 states and 126 transitions. Second operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:20,369 INFO L93 Difference]: Finished difference Result 115 states and 152 transitions. [2022-04-27 22:03:20,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-04-27 22:03:20,370 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 23 [2022-04-27 22:03:20,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:20,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 73 transitions. [2022-04-27 22:03:20,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 73 transitions. [2022-04-27 22:03:20,372 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 18 states and 73 transitions. [2022-04-27 22:03:20,457 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:20,458 INFO L225 Difference]: With dead ends: 115 [2022-04-27 22:03:20,458 INFO L226 Difference]: Without dead ends: 94 [2022-04-27 22:03:20,459 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=213, Invalid=843, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 22:03:20,459 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 91 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 185 mSolverCounterSat, 73 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 53 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 73 IncrementalHoareTripleChecker+Valid, 185 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:20,459 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [91 Valid, 53 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [73 Valid, 185 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:03:20,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2022-04-27 22:03:20,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 77. [2022-04-27 22:03:20,616 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:20,617 INFO L82 GeneralOperation]: Start isEquivalent. First operand 94 states. Second operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,617 INFO L74 IsIncluded]: Start isIncluded. First operand 94 states. Second operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,617 INFO L87 Difference]: Start difference. First operand 94 states. Second operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:20,619 INFO L93 Difference]: Finished difference Result 94 states and 123 transitions. [2022-04-27 22:03:20,619 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 123 transitions. [2022-04-27 22:03:20,619 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:20,619 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:20,620 INFO L74 IsIncluded]: Start isIncluded. First operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-27 22:03:20,620 INFO L87 Difference]: Start difference. First operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 94 states. [2022-04-27 22:03:20,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:20,621 INFO L93 Difference]: Finished difference Result 94 states and 123 transitions. [2022-04-27 22:03:20,622 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 123 transitions. [2022-04-27 22:03:20,622 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:20,622 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:20,622 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:20,622 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:20,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 72 states have (on average 1.375) internal successors, (99), 72 states have internal predecessors, (99), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 103 transitions. [2022-04-27 22:03:20,623 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 103 transitions. Word has length 23 [2022-04-27 22:03:20,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:20,624 INFO L495 AbstractCegarLoop]: Abstraction has 77 states and 103 transitions. [2022-04-27 22:03:20,624 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:20,624 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 103 transitions. [2022-04-27 22:03:20,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 22:03:20,624 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:20,624 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:20,646 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 22:03:20,843 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 22:03:20,843 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:20,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:20,844 INFO L85 PathProgramCache]: Analyzing trace with hash 466505418, now seen corresponding path program 5 times [2022-04-27 22:03:20,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:20,844 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986767138] [2022-04-27 22:03:20,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:20,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:20,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:20,926 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:20,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:20,930 INFO L290 TraceCheckUtils]: 0: Hoare triple {5882#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-27 22:03:20,930 INFO L290 TraceCheckUtils]: 1: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:20,930 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:20,931 INFO L272 TraceCheckUtils]: 0: Hoare triple {5871#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5882#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:20,931 INFO L290 TraceCheckUtils]: 1: Hoare triple {5882#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-27 22:03:20,931 INFO L290 TraceCheckUtils]: 2: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:20,931 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:20,931 INFO L272 TraceCheckUtils]: 4: Hoare triple {5871#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:20,931 INFO L290 TraceCheckUtils]: 5: Hoare triple {5871#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5871#true} is VALID [2022-04-27 22:03:20,932 INFO L290 TraceCheckUtils]: 6: Hoare triple {5871#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:03:20,933 INFO L290 TraceCheckUtils]: 7: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5877#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-27 22:03:20,933 INFO L290 TraceCheckUtils]: 8: Hoare triple {5877#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:03:20,934 INFO L290 TraceCheckUtils]: 9: Hoare triple {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:03:20,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:03:20,935 INFO L290 TraceCheckUtils]: 11: Hoare triple {5878#(<= (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5879#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:03:20,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {5879#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5880#(<= (+ 2 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:03:20,936 INFO L290 TraceCheckUtils]: 13: Hoare triple {5880#(<= (+ 2 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:03:20,936 INFO L290 TraceCheckUtils]: 14: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:03:20,937 INFO L290 TraceCheckUtils]: 15: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:03:20,937 INFO L290 TraceCheckUtils]: 16: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:03:20,937 INFO L290 TraceCheckUtils]: 17: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:03:20,938 INFO L290 TraceCheckUtils]: 18: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:03:20,938 INFO L290 TraceCheckUtils]: 19: Hoare triple {5881#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:20,938 INFO L272 TraceCheckUtils]: 20: Hoare triple {5872#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5872#false} is VALID [2022-04-27 22:03:20,938 INFO L290 TraceCheckUtils]: 21: Hoare triple {5872#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5872#false} is VALID [2022-04-27 22:03:20,938 INFO L290 TraceCheckUtils]: 22: Hoare triple {5872#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:20,939 INFO L290 TraceCheckUtils]: 23: Hoare triple {5872#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:20,939 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:03:20,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:20,939 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986767138] [2022-04-27 22:03:20,939 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1986767138] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:20,939 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265880772] [2022-04-27 22:03:20,939 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:03:20,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:20,939 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:20,941 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:20,941 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 22:03:20,981 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-27 22:03:20,981 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:20,982 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 22:03:20,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:20,989 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:21,276 INFO L272 TraceCheckUtils]: 0: Hoare triple {5871#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,277 INFO L290 TraceCheckUtils]: 1: Hoare triple {5871#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-27 22:03:21,277 INFO L290 TraceCheckUtils]: 2: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,277 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,277 INFO L272 TraceCheckUtils]: 4: Hoare triple {5871#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,277 INFO L290 TraceCheckUtils]: 5: Hoare triple {5871#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5871#true} is VALID [2022-04-27 22:03:21,278 INFO L290 TraceCheckUtils]: 6: Hoare triple {5871#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:03:21,279 INFO L290 TraceCheckUtils]: 7: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:03:21,280 INFO L290 TraceCheckUtils]: 8: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,280 INFO L290 TraceCheckUtils]: 9: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,280 INFO L290 TraceCheckUtils]: 10: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,281 INFO L290 TraceCheckUtils]: 11: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:03:21,282 INFO L290 TraceCheckUtils]: 12: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:03:21,283 INFO L290 TraceCheckUtils]: 13: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,283 INFO L290 TraceCheckUtils]: 14: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,285 INFO L290 TraceCheckUtils]: 15: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,285 INFO L290 TraceCheckUtils]: 16: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,285 INFO L290 TraceCheckUtils]: 17: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,286 INFO L290 TraceCheckUtils]: 18: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,287 INFO L290 TraceCheckUtils]: 19: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:21,287 INFO L272 TraceCheckUtils]: 20: Hoare triple {5872#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5872#false} is VALID [2022-04-27 22:03:21,287 INFO L290 TraceCheckUtils]: 21: Hoare triple {5872#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5872#false} is VALID [2022-04-27 22:03:21,287 INFO L290 TraceCheckUtils]: 22: Hoare triple {5872#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:21,288 INFO L290 TraceCheckUtils]: 23: Hoare triple {5872#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:21,288 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:03:21,288 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:21,400 INFO L290 TraceCheckUtils]: 23: Hoare triple {5872#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:21,401 INFO L290 TraceCheckUtils]: 22: Hoare triple {5872#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:21,401 INFO L290 TraceCheckUtils]: 21: Hoare triple {5872#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5872#false} is VALID [2022-04-27 22:03:21,401 INFO L272 TraceCheckUtils]: 20: Hoare triple {5872#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {5872#false} is VALID [2022-04-27 22:03:21,402 INFO L290 TraceCheckUtils]: 19: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5872#false} is VALID [2022-04-27 22:03:21,402 INFO L290 TraceCheckUtils]: 18: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,402 INFO L290 TraceCheckUtils]: 17: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,403 INFO L290 TraceCheckUtils]: 16: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,403 INFO L290 TraceCheckUtils]: 15: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,403 INFO L290 TraceCheckUtils]: 14: Hoare triple {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,404 INFO L290 TraceCheckUtils]: 13: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5927#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,405 INFO L290 TraceCheckUtils]: 12: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:03:21,406 INFO L290 TraceCheckUtils]: 11: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:03:21,406 INFO L290 TraceCheckUtils]: 10: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,407 INFO L290 TraceCheckUtils]: 9: Hoare triple {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,408 INFO L290 TraceCheckUtils]: 8: Hoare triple {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5911#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:03:21,408 INFO L290 TraceCheckUtils]: 7: Hoare triple {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5907#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:03:21,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {5871#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5876#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:03:21,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {5871#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5871#true} is VALID [2022-04-27 22:03:21,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {5871#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5871#true} {5871#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,409 INFO L290 TraceCheckUtils]: 2: Hoare triple {5871#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {5871#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5871#true} is VALID [2022-04-27 22:03:21,410 INFO L272 TraceCheckUtils]: 0: Hoare triple {5871#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5871#true} is VALID [2022-04-27 22:03:21,410 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:03:21,410 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1265880772] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:21,410 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:21,410 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6] total 12 [2022-04-27 22:03:21,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574748166] [2022-04-27 22:03:21,410 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:21,411 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:03:21,411 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:21,411 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,439 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 35 edges. 35 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:21,439 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-04-27 22:03:21,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:21,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-04-27 22:03:21,439 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2022-04-27 22:03:21,440 INFO L87 Difference]: Start difference. First operand 77 states and 103 transitions. Second operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:21,982 INFO L93 Difference]: Finished difference Result 102 states and 139 transitions. [2022-04-27 22:03:21,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 22:03:21,982 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:03:21,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:21,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 54 transitions. [2022-04-27 22:03:21,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:21,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 54 transitions. [2022-04-27 22:03:21,985 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 54 transitions. [2022-04-27 22:03:22,046 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:22,048 INFO L225 Difference]: With dead ends: 102 [2022-04-27 22:03:22,048 INFO L226 Difference]: Without dead ends: 97 [2022-04-27 22:03:22,048 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:03:22,049 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 62 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:22,049 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [62 Valid, 51 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:03:22,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2022-04-27 22:03:22,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 92. [2022-04-27 22:03:22,240 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:22,240 INFO L82 GeneralOperation]: Start isEquivalent. First operand 97 states. Second operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:22,241 INFO L74 IsIncluded]: Start isIncluded. First operand 97 states. Second operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:22,241 INFO L87 Difference]: Start difference. First operand 97 states. Second operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:22,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:22,242 INFO L93 Difference]: Finished difference Result 97 states and 132 transitions. [2022-04-27 22:03:22,242 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 132 transitions. [2022-04-27 22:03:22,242 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:22,242 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:22,243 INFO L74 IsIncluded]: Start isIncluded. First operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-27 22:03:22,243 INFO L87 Difference]: Start difference. First operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 97 states. [2022-04-27 22:03:22,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:22,244 INFO L93 Difference]: Finished difference Result 97 states and 132 transitions. [2022-04-27 22:03:22,244 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 132 transitions. [2022-04-27 22:03:22,244 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:22,244 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:22,244 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:22,245 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:22,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 87 states have (on average 1.3793103448275863) internal successors, (120), 87 states have internal predecessors, (120), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:22,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 124 transitions. [2022-04-27 22:03:22,246 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 124 transitions. Word has length 24 [2022-04-27 22:03:22,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:22,246 INFO L495 AbstractCegarLoop]: Abstraction has 92 states and 124 transitions. [2022-04-27 22:03:22,246 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 2.5) internal successors, (30), 11 states have internal predecessors, (30), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:22,247 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 124 transitions. [2022-04-27 22:03:22,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 22:03:22,247 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:22,247 INFO L195 NwaCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:22,263 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-04-27 22:03:22,447 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 22:03:22,448 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:22,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:22,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1774083744, now seen corresponding path program 5 times [2022-04-27 22:03:22,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:22,448 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171836137] [2022-04-27 22:03:22,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:22,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:22,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:22,590 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:22,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:22,594 INFO L290 TraceCheckUtils]: 0: Hoare triple {6525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-27 22:03:22,594 INFO L290 TraceCheckUtils]: 1: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,594 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,595 INFO L272 TraceCheckUtils]: 0: Hoare triple {6511#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:22,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {6525#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-27 22:03:22,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {6511#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {6511#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6516#(= main_~y~0 0)} is VALID [2022-04-27 22:03:22,596 INFO L290 TraceCheckUtils]: 6: Hoare triple {6516#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:22,596 INFO L290 TraceCheckUtils]: 7: Hoare triple {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:22,597 INFO L290 TraceCheckUtils]: 8: Hoare triple {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:22,597 INFO L290 TraceCheckUtils]: 9: Hoare triple {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:03:22,598 INFO L290 TraceCheckUtils]: 10: Hoare triple {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:03:22,599 INFO L290 TraceCheckUtils]: 11: Hoare triple {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:03:22,599 INFO L290 TraceCheckUtils]: 12: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:03:22,600 INFO L290 TraceCheckUtils]: 13: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:03:22,600 INFO L290 TraceCheckUtils]: 14: Hoare triple {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6524#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:03:22,601 INFO L290 TraceCheckUtils]: 15: Hoare triple {6524#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,601 INFO L290 TraceCheckUtils]: 16: Hoare triple {6512#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6512#false} is VALID [2022-04-27 22:03:22,601 INFO L290 TraceCheckUtils]: 17: Hoare triple {6512#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,601 INFO L290 TraceCheckUtils]: 18: Hoare triple {6512#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6512#false} is VALID [2022-04-27 22:03:22,601 INFO L290 TraceCheckUtils]: 19: Hoare triple {6512#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,601 INFO L272 TraceCheckUtils]: 20: Hoare triple {6512#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {6512#false} is VALID [2022-04-27 22:03:22,601 INFO L290 TraceCheckUtils]: 21: Hoare triple {6512#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6512#false} is VALID [2022-04-27 22:03:22,602 INFO L290 TraceCheckUtils]: 22: Hoare triple {6512#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,602 INFO L290 TraceCheckUtils]: 23: Hoare triple {6512#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,602 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:03:22,602 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:22,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171836137] [2022-04-27 22:03:22,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [171836137] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:22,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1558415563] [2022-04-27 22:03:22,603 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:03:22,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:22,603 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:22,608 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:22,609 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 22:03:22,645 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:03:22,645 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:22,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 19 conjunts are in the unsatisfiable core [2022-04-27 22:03:22,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:22,652 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:22,853 INFO L272 TraceCheckUtils]: 0: Hoare triple {6511#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,853 INFO L290 TraceCheckUtils]: 1: Hoare triple {6511#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-27 22:03:22,853 INFO L290 TraceCheckUtils]: 2: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,853 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,853 INFO L272 TraceCheckUtils]: 4: Hoare triple {6511#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:22,854 INFO L290 TraceCheckUtils]: 5: Hoare triple {6511#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6516#(= main_~y~0 0)} is VALID [2022-04-27 22:03:22,854 INFO L290 TraceCheckUtils]: 6: Hoare triple {6516#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:22,855 INFO L290 TraceCheckUtils]: 7: Hoare triple {6517#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:22,855 INFO L290 TraceCheckUtils]: 8: Hoare triple {6518#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:22,856 INFO L290 TraceCheckUtils]: 9: Hoare triple {6519#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:03:22,856 INFO L290 TraceCheckUtils]: 10: Hoare triple {6520#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:03:22,857 INFO L290 TraceCheckUtils]: 11: Hoare triple {6521#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:03:22,857 INFO L290 TraceCheckUtils]: 12: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:03:22,857 INFO L290 TraceCheckUtils]: 13: Hoare triple {6522#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:03:22,858 INFO L290 TraceCheckUtils]: 14: Hoare triple {6523#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:03:22,858 INFO L290 TraceCheckUtils]: 15: Hoare triple {6571#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,858 INFO L290 TraceCheckUtils]: 16: Hoare triple {6512#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6512#false} is VALID [2022-04-27 22:03:22,858 INFO L290 TraceCheckUtils]: 17: Hoare triple {6512#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,858 INFO L290 TraceCheckUtils]: 18: Hoare triple {6512#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6512#false} is VALID [2022-04-27 22:03:22,859 INFO L290 TraceCheckUtils]: 19: Hoare triple {6512#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,859 INFO L272 TraceCheckUtils]: 20: Hoare triple {6512#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {6512#false} is VALID [2022-04-27 22:03:22,859 INFO L290 TraceCheckUtils]: 21: Hoare triple {6512#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6512#false} is VALID [2022-04-27 22:03:22,859 INFO L290 TraceCheckUtils]: 22: Hoare triple {6512#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,859 INFO L290 TraceCheckUtils]: 23: Hoare triple {6512#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:22,859 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:03:22,859 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:23,048 INFO L290 TraceCheckUtils]: 23: Hoare triple {6512#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:23,048 INFO L290 TraceCheckUtils]: 22: Hoare triple {6512#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:23,048 INFO L290 TraceCheckUtils]: 21: Hoare triple {6512#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6512#false} is VALID [2022-04-27 22:03:23,049 INFO L272 TraceCheckUtils]: 20: Hoare triple {6512#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {6512#false} is VALID [2022-04-27 22:03:23,049 INFO L290 TraceCheckUtils]: 19: Hoare triple {6512#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:23,049 INFO L290 TraceCheckUtils]: 18: Hoare triple {6512#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {6512#false} is VALID [2022-04-27 22:03:23,049 INFO L290 TraceCheckUtils]: 17: Hoare triple {6512#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:23,049 INFO L290 TraceCheckUtils]: 16: Hoare triple {6512#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6512#false} is VALID [2022-04-27 22:03:23,050 INFO L290 TraceCheckUtils]: 15: Hoare triple {6623#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6512#false} is VALID [2022-04-27 22:03:23,051 INFO L290 TraceCheckUtils]: 14: Hoare triple {6627#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6623#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:03:23,051 INFO L290 TraceCheckUtils]: 13: Hoare triple {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6627#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:23,051 INFO L290 TraceCheckUtils]: 12: Hoare triple {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:23,052 INFO L290 TraceCheckUtils]: 11: Hoare triple {6638#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6631#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:23,053 INFO L290 TraceCheckUtils]: 10: Hoare triple {6642#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6638#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:03:23,053 INFO L290 TraceCheckUtils]: 9: Hoare triple {6646#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6642#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:03:23,056 INFO L290 TraceCheckUtils]: 8: Hoare triple {6650#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6646#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:03:23,056 INFO L290 TraceCheckUtils]: 7: Hoare triple {6654#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6650#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:03:23,057 INFO L290 TraceCheckUtils]: 6: Hoare triple {6658#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6654#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:03:23,058 INFO L290 TraceCheckUtils]: 5: Hoare triple {6511#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6658#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:03:23,058 INFO L272 TraceCheckUtils]: 4: Hoare triple {6511#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:23,058 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6511#true} {6511#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:23,058 INFO L290 TraceCheckUtils]: 2: Hoare triple {6511#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:23,058 INFO L290 TraceCheckUtils]: 1: Hoare triple {6511#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6511#true} is VALID [2022-04-27 22:03:23,058 INFO L272 TraceCheckUtils]: 0: Hoare triple {6511#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6511#true} is VALID [2022-04-27 22:03:23,058 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:03:23,058 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1558415563] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:23,059 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:23,059 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 22 [2022-04-27 22:03:23,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [452716849] [2022-04-27 22:03:23,059 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:23,059 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:03:23,066 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:23,066 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:23,093 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:23,093 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 22:03:23,093 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:23,093 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 22:03:23,094 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2022-04-27 22:03:23,094 INFO L87 Difference]: Start difference. First operand 92 states and 124 transitions. Second operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:30,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:30,401 INFO L93 Difference]: Finished difference Result 296 states and 424 transitions. [2022-04-27 22:03:30,401 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-27 22:03:30,401 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:03:30,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:30,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:30,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 237 transitions. [2022-04-27 22:03:30,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:30,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 237 transitions. [2022-04-27 22:03:30,410 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 237 transitions. [2022-04-27 22:03:30,841 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 237 edges. 237 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:30,847 INFO L225 Difference]: With dead ends: 296 [2022-04-27 22:03:30,848 INFO L226 Difference]: Without dead ends: 270 [2022-04-27 22:03:30,852 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 40 SyntacticMatches, 1 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2412 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=1734, Invalid=5406, Unknown=0, NotChecked=0, Total=7140 [2022-04-27 22:03:30,853 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 349 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 643 mSolverCounterSat, 411 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 349 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 1054 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 411 IncrementalHoareTripleChecker+Valid, 643 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:30,853 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [349 Valid, 84 Invalid, 1054 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [411 Valid, 643 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-04-27 22:03:30,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states. [2022-04-27 22:03:31,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 109. [2022-04-27 22:03:31,140 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:31,141 INFO L82 GeneralOperation]: Start isEquivalent. First operand 270 states. Second operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:31,143 INFO L74 IsIncluded]: Start isIncluded. First operand 270 states. Second operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:31,143 INFO L87 Difference]: Start difference. First operand 270 states. Second operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:31,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:31,149 INFO L93 Difference]: Finished difference Result 270 states and 363 transitions. [2022-04-27 22:03:31,149 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 363 transitions. [2022-04-27 22:03:31,150 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:31,150 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:31,150 INFO L74 IsIncluded]: Start isIncluded. First operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 270 states. [2022-04-27 22:03:31,151 INFO L87 Difference]: Start difference. First operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 270 states. [2022-04-27 22:03:31,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:31,157 INFO L93 Difference]: Finished difference Result 270 states and 363 transitions. [2022-04-27 22:03:31,157 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 363 transitions. [2022-04-27 22:03:31,158 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:31,158 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:31,158 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:31,158 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:31,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 109 states, 104 states have (on average 1.375) internal successors, (143), 104 states have internal predecessors, (143), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:31,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 147 transitions. [2022-04-27 22:03:31,160 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 147 transitions. Word has length 24 [2022-04-27 22:03:31,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:31,160 INFO L495 AbstractCegarLoop]: Abstraction has 109 states and 147 transitions. [2022-04-27 22:03:31,160 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 1.5454545454545454) internal successors, (34), 21 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:31,161 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 147 transitions. [2022-04-27 22:03:31,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 22:03:31,163 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:31,163 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:31,187 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 22:03:31,377 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 22:03:31,378 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:31,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:31,378 INFO L85 PathProgramCache]: Analyzing trace with hash 388770243, now seen corresponding path program 6 times [2022-04-27 22:03:31,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:31,378 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373836199] [2022-04-27 22:03:31,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:31,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:31,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:31,483 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:31,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:31,487 INFO L290 TraceCheckUtils]: 0: Hoare triple {7922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-27 22:03:31,487 INFO L290 TraceCheckUtils]: 1: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,487 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,487 INFO L272 TraceCheckUtils]: 0: Hoare triple {7910#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:31,488 INFO L290 TraceCheckUtils]: 1: Hoare triple {7922#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-27 22:03:31,488 INFO L290 TraceCheckUtils]: 2: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,488 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,488 INFO L272 TraceCheckUtils]: 4: Hoare triple {7910#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,488 INFO L290 TraceCheckUtils]: 5: Hoare triple {7910#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7915#(= main_~y~0 0)} is VALID [2022-04-27 22:03:31,488 INFO L290 TraceCheckUtils]: 6: Hoare triple {7915#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:31,489 INFO L290 TraceCheckUtils]: 7: Hoare triple {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:31,489 INFO L290 TraceCheckUtils]: 8: Hoare triple {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:31,490 INFO L290 TraceCheckUtils]: 9: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:31,490 INFO L290 TraceCheckUtils]: 10: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7919#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:03:31,491 INFO L290 TraceCheckUtils]: 11: Hoare triple {7919#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7920#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:03:31,491 INFO L290 TraceCheckUtils]: 12: Hoare triple {7920#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7921#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 13: Hoare triple {7921#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 14: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 15: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 16: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 17: Hoare triple {7911#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 18: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 19: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 20: Hoare triple {7911#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L272 TraceCheckUtils]: 21: Hoare triple {7911#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 22: Hoare triple {7911#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 23: Hoare triple {7911#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L290 TraceCheckUtils]: 24: Hoare triple {7911#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,492 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:03:31,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:31,493 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373836199] [2022-04-27 22:03:31,493 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373836199] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:31,493 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [24572208] [2022-04-27 22:03:31,493 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:03:31,493 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:31,493 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:31,494 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:31,494 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 22:03:31,527 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-27 22:03:31,527 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:31,528 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:03:31,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:31,534 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:31,662 INFO L272 TraceCheckUtils]: 0: Hoare triple {7910#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,663 INFO L290 TraceCheckUtils]: 1: Hoare triple {7910#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-27 22:03:31,663 INFO L290 TraceCheckUtils]: 2: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,663 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,663 INFO L272 TraceCheckUtils]: 4: Hoare triple {7910#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,663 INFO L290 TraceCheckUtils]: 5: Hoare triple {7910#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7915#(= main_~y~0 0)} is VALID [2022-04-27 22:03:31,664 INFO L290 TraceCheckUtils]: 6: Hoare triple {7915#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:31,664 INFO L290 TraceCheckUtils]: 7: Hoare triple {7916#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:31,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {7917#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:31,665 INFO L290 TraceCheckUtils]: 9: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:31,665 INFO L290 TraceCheckUtils]: 10: Hoare triple {7918#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7956#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:31,666 INFO L290 TraceCheckUtils]: 11: Hoare triple {7956#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7960#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:03:31,666 INFO L290 TraceCheckUtils]: 12: Hoare triple {7960#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7964#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 13: Hoare triple {7964#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 14: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 15: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 16: Hoare triple {7911#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 17: Hoare triple {7911#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 18: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 19: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 20: Hoare triple {7911#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L272 TraceCheckUtils]: 21: Hoare triple {7911#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 22: Hoare triple {7911#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7911#false} is VALID [2022-04-27 22:03:31,667 INFO L290 TraceCheckUtils]: 23: Hoare triple {7911#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,668 INFO L290 TraceCheckUtils]: 24: Hoare triple {7911#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,668 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:03:31,668 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:31,817 INFO L290 TraceCheckUtils]: 24: Hoare triple {7911#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,817 INFO L290 TraceCheckUtils]: 23: Hoare triple {7911#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,817 INFO L290 TraceCheckUtils]: 22: Hoare triple {7911#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7911#false} is VALID [2022-04-27 22:03:31,817 INFO L272 TraceCheckUtils]: 21: Hoare triple {7911#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {7911#false} is VALID [2022-04-27 22:03:31,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {7911#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,818 INFO L290 TraceCheckUtils]: 19: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-27 22:03:31,818 INFO L290 TraceCheckUtils]: 18: Hoare triple {7911#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7911#false} is VALID [2022-04-27 22:03:31,818 INFO L290 TraceCheckUtils]: 17: Hoare triple {7911#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7911#false} is VALID [2022-04-27 22:03:31,818 INFO L290 TraceCheckUtils]: 16: Hoare triple {8025#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7911#false} is VALID [2022-04-27 22:03:31,819 INFO L290 TraceCheckUtils]: 15: Hoare triple {8029#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8025#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:31,820 INFO L290 TraceCheckUtils]: 14: Hoare triple {8033#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8029#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:03:31,820 INFO L290 TraceCheckUtils]: 13: Hoare triple {8037#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8033#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:03:31,821 INFO L290 TraceCheckUtils]: 12: Hoare triple {8041#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8037#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 11: Hoare triple {8045#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8041#(or (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 10: Hoare triple {7910#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8045#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 9: Hoare triple {7910#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 8: Hoare triple {7910#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 7: Hoare triple {7910#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 6: Hoare triple {7910#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 5: Hoare triple {7910#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L272 TraceCheckUtils]: 4: Hoare triple {7910#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7910#true} {7910#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,822 INFO L290 TraceCheckUtils]: 2: Hoare triple {7910#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,823 INFO L290 TraceCheckUtils]: 1: Hoare triple {7910#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7910#true} is VALID [2022-04-27 22:03:31,823 INFO L272 TraceCheckUtils]: 0: Hoare triple {7910#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7910#true} is VALID [2022-04-27 22:03:31,823 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:03:31,823 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [24572208] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:31,823 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:31,823 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 8] total 19 [2022-04-27 22:03:31,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135943115] [2022-04-27 22:03:31,823 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:31,823 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:03:31,824 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:31,824 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:31,851 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:31,851 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 22:03:31,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:31,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 22:03:31,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:03:31,852 INFO L87 Difference]: Start difference. First operand 109 states and 147 transitions. Second operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:33,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:33,569 INFO L93 Difference]: Finished difference Result 164 states and 214 transitions. [2022-04-27 22:03:33,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-27 22:03:33,569 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:03:33,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:33,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:33,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 89 transitions. [2022-04-27 22:03:33,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:33,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 89 transitions. [2022-04-27 22:03:33,572 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 89 transitions. [2022-04-27 22:03:33,670 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 89 edges. 89 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:33,672 INFO L225 Difference]: With dead ends: 164 [2022-04-27 22:03:33,672 INFO L226 Difference]: Without dead ends: 144 [2022-04-27 22:03:33,673 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=225, Invalid=1181, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 22:03:33,673 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 46 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 379 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 46 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 451 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 379 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:33,673 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [46 Valid, 71 Invalid, 451 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 379 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 22:03:33,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2022-04-27 22:03:34,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 105. [2022-04-27 22:03:34,003 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:34,003 INFO L82 GeneralOperation]: Start isEquivalent. First operand 144 states. Second operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:34,004 INFO L74 IsIncluded]: Start isIncluded. First operand 144 states. Second operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:34,004 INFO L87 Difference]: Start difference. First operand 144 states. Second operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:34,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:34,006 INFO L93 Difference]: Finished difference Result 144 states and 187 transitions. [2022-04-27 22:03:34,006 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 187 transitions. [2022-04-27 22:03:34,008 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:34,008 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:34,008 INFO L74 IsIncluded]: Start isIncluded. First operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-27 22:03:34,008 INFO L87 Difference]: Start difference. First operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 144 states. [2022-04-27 22:03:34,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:34,010 INFO L93 Difference]: Finished difference Result 144 states and 187 transitions. [2022-04-27 22:03:34,011 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 187 transitions. [2022-04-27 22:03:34,011 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:34,011 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:34,011 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:34,011 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:34,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 100 states have (on average 1.35) internal successors, (135), 100 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:34,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 139 transitions. [2022-04-27 22:03:34,013 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 139 transitions. Word has length 25 [2022-04-27 22:03:34,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:34,013 INFO L495 AbstractCegarLoop]: Abstraction has 105 states and 139 transitions. [2022-04-27 22:03:34,013 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 1.736842105263158) internal successors, (33), 18 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:34,013 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 139 transitions. [2022-04-27 22:03:34,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 22:03:34,014 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:34,014 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:34,040 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 22:03:34,235 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-27 22:03:34,235 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:34,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:34,236 INFO L85 PathProgramCache]: Analyzing trace with hash -87467495, now seen corresponding path program 7 times [2022-04-27 22:03:34,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:34,236 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830790554] [2022-04-27 22:03:34,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:34,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:34,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:34,594 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:34,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:34,598 INFO L290 TraceCheckUtils]: 0: Hoare triple {8818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-27 22:03:34,598 INFO L290 TraceCheckUtils]: 1: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:34,598 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:34,599 INFO L272 TraceCheckUtils]: 0: Hoare triple {8801#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:34,599 INFO L290 TraceCheckUtils]: 1: Hoare triple {8818#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-27 22:03:34,599 INFO L290 TraceCheckUtils]: 2: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:34,599 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:34,599 INFO L272 TraceCheckUtils]: 4: Hoare triple {8801#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:34,600 INFO L290 TraceCheckUtils]: 5: Hoare triple {8801#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:03:34,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:34,606 INFO L290 TraceCheckUtils]: 7: Hoare triple {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8808#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:34,607 INFO L290 TraceCheckUtils]: 8: Hoare triple {8808#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8809#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} is VALID [2022-04-27 22:03:34,608 INFO L290 TraceCheckUtils]: 9: Hoare triple {8809#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-27 22:03:34,609 INFO L290 TraceCheckUtils]: 10: Hoare triple {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-27 22:03:34,609 INFO L290 TraceCheckUtils]: 11: Hoare triple {8810#(and (<= main_~y~0 3) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:03:34,610 INFO L290 TraceCheckUtils]: 12: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:03:34,610 INFO L290 TraceCheckUtils]: 13: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:03:34,611 INFO L290 TraceCheckUtils]: 14: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:03:34,612 INFO L290 TraceCheckUtils]: 15: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:34,613 INFO L290 TraceCheckUtils]: 16: Hoare triple {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:34,613 INFO L290 TraceCheckUtils]: 17: Hoare triple {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:34,614 INFO L290 TraceCheckUtils]: 18: Hoare triple {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:34,615 INFO L290 TraceCheckUtils]: 19: Hoare triple {8814#(and (<= main_~y~0 0) (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:34,615 INFO L290 TraceCheckUtils]: 20: Hoare triple {8813#(and (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:34,618 INFO L290 TraceCheckUtils]: 21: Hoare triple {8812#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296) 1)) (<= main_~y~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:03:34,619 INFO L290 TraceCheckUtils]: 22: Hoare triple {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:03:34,620 INFO L272 TraceCheckUtils]: 23: Hoare triple {8815#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {8816#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:03:34,621 INFO L290 TraceCheckUtils]: 24: Hoare triple {8816#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8817#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:03:34,621 INFO L290 TraceCheckUtils]: 25: Hoare triple {8817#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-27 22:03:34,621 INFO L290 TraceCheckUtils]: 26: Hoare triple {8802#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-27 22:03:34,621 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:03:34,621 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:34,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830790554] [2022-04-27 22:03:34,622 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830790554] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:34,622 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [793005321] [2022-04-27 22:03:34,622 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:03:34,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:34,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:34,624 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:34,653 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 22:03:34,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:34,720 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 49 conjunts are in the unsatisfiable core [2022-04-27 22:03:34,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:34,730 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:39,709 INFO L272 TraceCheckUtils]: 0: Hoare triple {8801#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:39,709 INFO L290 TraceCheckUtils]: 1: Hoare triple {8801#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-27 22:03:39,709 INFO L290 TraceCheckUtils]: 2: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:39,709 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:39,709 INFO L272 TraceCheckUtils]: 4: Hoare triple {8801#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:39,710 INFO L290 TraceCheckUtils]: 5: Hoare triple {8801#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:03:39,711 INFO L290 TraceCheckUtils]: 6: Hoare triple {8806#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:39,713 INFO L290 TraceCheckUtils]: 7: Hoare triple {8807#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8843#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:39,714 INFO L290 TraceCheckUtils]: 8: Hoare triple {8843#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8847#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:39,715 INFO L290 TraceCheckUtils]: 9: Hoare triple {8847#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:39,715 INFO L290 TraceCheckUtils]: 10: Hoare triple {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8855#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:39,728 INFO L290 TraceCheckUtils]: 11: Hoare triple {8855#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8859#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0))} is VALID [2022-04-27 22:03:39,730 INFO L290 TraceCheckUtils]: 12: Hoare triple {8859#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8863#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 2) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-27 22:03:39,731 INFO L290 TraceCheckUtils]: 13: Hoare triple {8863#(and (<= main_~x~0 (+ 4294967294 (* (div (+ (- 2) main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 3) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:39,732 INFO L290 TraceCheckUtils]: 14: Hoare triple {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:39,738 INFO L290 TraceCheckUtils]: 15: Hoare triple {8867#(and (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8874#(and (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:39,740 INFO L290 TraceCheckUtils]: 16: Hoare triple {8874#(and (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8878#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:39,741 INFO L290 TraceCheckUtils]: 17: Hoare triple {8878#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:39,742 INFO L290 TraceCheckUtils]: 18: Hoare triple {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:03:39,747 INFO L290 TraceCheckUtils]: 19: Hoare triple {8882#(and (<= main_~x~0 main_~n~0) (<= (mod (+ main_~x~0 4294967293) 4294967296) 0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8889#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:39,749 INFO L290 TraceCheckUtils]: 20: Hoare triple {8889#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (mod (+ main_~x~0 4294967294) 4294967296) 0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8893#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:03:39,751 INFO L290 TraceCheckUtils]: 21: Hoare triple {8893#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= (mod (+ main_~x~0 4294967295) 4294967296) 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:03:39,762 INFO L290 TraceCheckUtils]: 22: Hoare triple {8851#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod main_~x~0 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:03:39,764 INFO L272 TraceCheckUtils]: 23: Hoare triple {8811#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 3)) 4294967296) 4294967296))) (<= main_~y~0 3))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:03:39,764 INFO L290 TraceCheckUtils]: 24: Hoare triple {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8907#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:03:39,764 INFO L290 TraceCheckUtils]: 25: Hoare triple {8907#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-27 22:03:39,765 INFO L290 TraceCheckUtils]: 26: Hoare triple {8802#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-27 22:03:39,765 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:39,765 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:41,468 INFO L290 TraceCheckUtils]: 26: Hoare triple {8802#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-27 22:03:41,469 INFO L290 TraceCheckUtils]: 25: Hoare triple {8907#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {8802#false} is VALID [2022-04-27 22:03:41,469 INFO L290 TraceCheckUtils]: 24: Hoare triple {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8907#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:03:41,470 INFO L272 TraceCheckUtils]: 23: Hoare triple {8923#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {8903#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:03:41,470 INFO L290 TraceCheckUtils]: 22: Hoare triple {8927#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8923#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:03:41,472 INFO L290 TraceCheckUtils]: 21: Hoare triple {8931#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8927#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,474 INFO L290 TraceCheckUtils]: 20: Hoare triple {8935#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8931#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-27 22:03:41,475 INFO L290 TraceCheckUtils]: 19: Hoare triple {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {8935#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-27 22:03:41,476 INFO L290 TraceCheckUtils]: 18: Hoare triple {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:03:41,477 INFO L290 TraceCheckUtils]: 17: Hoare triple {8946#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8939#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:03:41,480 INFO L290 TraceCheckUtils]: 16: Hoare triple {8950#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8946#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-27 22:03:41,482 INFO L290 TraceCheckUtils]: 15: Hoare triple {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {8950#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-27 22:03:41,482 INFO L290 TraceCheckUtils]: 14: Hoare triple {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,483 INFO L290 TraceCheckUtils]: 13: Hoare triple {8961#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8954#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,484 INFO L290 TraceCheckUtils]: 12: Hoare triple {8965#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8961#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,485 INFO L290 TraceCheckUtils]: 11: Hoare triple {8969#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {8965#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,486 INFO L290 TraceCheckUtils]: 10: Hoare triple {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8969#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,486 INFO L290 TraceCheckUtils]: 9: Hoare triple {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,489 INFO L290 TraceCheckUtils]: 8: Hoare triple {8980#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8973#(or (not (< 0 (mod main_~y~0 4294967296))) (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:03:41,490 INFO L290 TraceCheckUtils]: 7: Hoare triple {8984#(or (not (< 0 (mod (+ main_~y~0 2) 4294967296))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8980#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 1) 4294967296))) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-27 22:03:41,492 INFO L290 TraceCheckUtils]: 6: Hoare triple {8988#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (<= (mod (+ main_~y~0 3) 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8984#(or (not (< 0 (mod (+ main_~y~0 2) 4294967296))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-27 22:03:41,493 INFO L290 TraceCheckUtils]: 5: Hoare triple {8801#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8988#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (<= (mod (+ main_~y~0 3) 4294967296) 0))} is VALID [2022-04-27 22:03:41,493 INFO L272 TraceCheckUtils]: 4: Hoare triple {8801#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:41,493 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8801#true} {8801#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:41,493 INFO L290 TraceCheckUtils]: 2: Hoare triple {8801#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:41,493 INFO L290 TraceCheckUtils]: 1: Hoare triple {8801#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8801#true} is VALID [2022-04-27 22:03:41,493 INFO L272 TraceCheckUtils]: 0: Hoare triple {8801#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8801#true} is VALID [2022-04-27 22:03:41,494 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:03:41,494 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [793005321] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:41,494 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:41,494 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 19, 19] total 44 [2022-04-27 22:03:41,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [882835031] [2022-04-27 22:03:41,494 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:41,495 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:03:41,495 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:41,495 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:41,684 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:41,684 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2022-04-27 22:03:41,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:41,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2022-04-27 22:03:41,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=340, Invalid=1552, Unknown=0, NotChecked=0, Total=1892 [2022-04-27 22:03:41,686 INFO L87 Difference]: Start difference. First operand 105 states and 139 transitions. Second operand has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:56,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:56,809 INFO L93 Difference]: Finished difference Result 188 states and 243 transitions. [2022-04-27 22:03:56,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-27 22:03:56,810 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:03:56,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:03:56,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:56,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 142 transitions. [2022-04-27 22:03:56,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:56,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 142 transitions. [2022-04-27 22:03:56,815 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 142 transitions. [2022-04-27 22:03:57,498 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 142 edges. 142 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:57,500 INFO L225 Difference]: With dead ends: 188 [2022-04-27 22:03:57,500 INFO L226 Difference]: Without dead ends: 169 [2022-04-27 22:03:57,502 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 24 SyntacticMatches, 5 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3393 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=1743, Invalid=9599, Unknown=0, NotChecked=0, Total=11342 [2022-04-27 22:03:57,503 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 182 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 645 mSolverCounterSat, 320 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 182 SdHoareTripleChecker+Valid, 88 SdHoareTripleChecker+Invalid, 965 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 320 IncrementalHoareTripleChecker+Valid, 645 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:03:57,503 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [182 Valid, 88 Invalid, 965 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [320 Valid, 645 Invalid, 0 Unknown, 0 Unchecked, 3.4s Time] [2022-04-27 22:03:57,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2022-04-27 22:03:57,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 129. [2022-04-27 22:03:57,867 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:03:57,867 INFO L82 GeneralOperation]: Start isEquivalent. First operand 169 states. Second operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:57,868 INFO L74 IsIncluded]: Start isIncluded. First operand 169 states. Second operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:57,868 INFO L87 Difference]: Start difference. First operand 169 states. Second operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:57,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:57,871 INFO L93 Difference]: Finished difference Result 169 states and 220 transitions. [2022-04-27 22:03:57,871 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 220 transitions. [2022-04-27 22:03:57,871 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:57,871 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:57,871 INFO L74 IsIncluded]: Start isIncluded. First operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 169 states. [2022-04-27 22:03:57,872 INFO L87 Difference]: Start difference. First operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 169 states. [2022-04-27 22:03:57,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:03:57,874 INFO L93 Difference]: Finished difference Result 169 states and 220 transitions. [2022-04-27 22:03:57,874 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 220 transitions. [2022-04-27 22:03:57,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:03:57,875 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:03:57,875 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:03:57,875 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:03:57,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 124 states have (on average 1.3387096774193548) internal successors, (166), 124 states have internal predecessors, (166), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:57,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 170 transitions. [2022-04-27 22:03:57,878 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 170 transitions. Word has length 27 [2022-04-27 22:03:57,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:03:57,878 INFO L495 AbstractCegarLoop]: Abstraction has 129 states and 170 transitions. [2022-04-27 22:03:57,878 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 43 states have (on average 1.372093023255814) internal successors, (59), 41 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:57,878 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 170 transitions. [2022-04-27 22:03:57,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 22:03:57,879 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:03:57,879 INFO L195 NwaCegarLoop]: trace histogram [6, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:03:57,906 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 22:03:58,099 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:58,099 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:03:58,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:03:58,100 INFO L85 PathProgramCache]: Analyzing trace with hash -109156381, now seen corresponding path program 6 times [2022-04-27 22:03:58,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:03:58,100 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606575561] [2022-04-27 22:03:58,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:03:58,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:03:58,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:58,235 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:03:58,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:58,248 INFO L290 TraceCheckUtils]: 0: Hoare triple {9935#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-27 22:03:58,248 INFO L290 TraceCheckUtils]: 1: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,248 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,249 INFO L272 TraceCheckUtils]: 0: Hoare triple {9922#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9935#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:03:58,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {9935#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-27 22:03:58,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,249 INFO L272 TraceCheckUtils]: 4: Hoare triple {9922#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,250 INFO L290 TraceCheckUtils]: 5: Hoare triple {9922#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9927#(= main_~y~0 0)} is VALID [2022-04-27 22:03:58,250 INFO L290 TraceCheckUtils]: 6: Hoare triple {9927#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:58,251 INFO L290 TraceCheckUtils]: 7: Hoare triple {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:58,252 INFO L290 TraceCheckUtils]: 8: Hoare triple {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,253 INFO L290 TraceCheckUtils]: 9: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,253 INFO L290 TraceCheckUtils]: 10: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9931#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:03:58,254 INFO L290 TraceCheckUtils]: 11: Hoare triple {9931#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9932#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:03:58,254 INFO L290 TraceCheckUtils]: 12: Hoare triple {9932#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9933#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:03:58,255 INFO L290 TraceCheckUtils]: 13: Hoare triple {9933#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9934#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:03:58,256 INFO L290 TraceCheckUtils]: 14: Hoare triple {9934#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-27 22:03:58,256 INFO L290 TraceCheckUtils]: 15: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-27 22:03:58,256 INFO L290 TraceCheckUtils]: 16: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-27 22:03:58,256 INFO L290 TraceCheckUtils]: 17: Hoare triple {9923#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,256 INFO L290 TraceCheckUtils]: 18: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-27 22:03:58,256 INFO L290 TraceCheckUtils]: 19: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L290 TraceCheckUtils]: 20: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L290 TraceCheckUtils]: 21: Hoare triple {9923#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L290 TraceCheckUtils]: 22: Hoare triple {9923#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L272 TraceCheckUtils]: 23: Hoare triple {9923#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L290 TraceCheckUtils]: 24: Hoare triple {9923#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L290 TraceCheckUtils]: 25: Hoare triple {9923#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L290 TraceCheckUtils]: 26: Hoare triple {9923#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,257 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:03:58,257 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:03:58,258 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606575561] [2022-04-27 22:03:58,258 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1606575561] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:03:58,258 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [849674038] [2022-04-27 22:03:58,258 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:03:58,258 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:03:58,258 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:03:58,260 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:03:58,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 22:03:58,321 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-27 22:03:58,321 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:03:58,322 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 22:03:58,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:03:58,328 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:03:58,507 INFO L272 TraceCheckUtils]: 0: Hoare triple {9922#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {9922#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-27 22:03:58,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,508 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,508 INFO L272 TraceCheckUtils]: 4: Hoare triple {9922#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,508 INFO L290 TraceCheckUtils]: 5: Hoare triple {9922#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9927#(= main_~y~0 0)} is VALID [2022-04-27 22:03:58,509 INFO L290 TraceCheckUtils]: 6: Hoare triple {9927#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:03:58,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {9928#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:03:58,510 INFO L290 TraceCheckUtils]: 8: Hoare triple {9929#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,511 INFO L290 TraceCheckUtils]: 9: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,511 INFO L290 TraceCheckUtils]: 10: Hoare triple {9930#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {9969#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,512 INFO L290 TraceCheckUtils]: 11: Hoare triple {9969#(and (= main_~z~0 main_~y~0) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9973#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:03:58,512 INFO L290 TraceCheckUtils]: 12: Hoare triple {9973#(and (<= main_~y~0 3) (<= 3 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9977#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,513 INFO L290 TraceCheckUtils]: 13: Hoare triple {9977#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9981#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 14: Hoare triple {9981#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 3) (<= 3 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 15: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 16: Hoare triple {9923#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 17: Hoare triple {9923#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 18: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 19: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 20: Hoare triple {9923#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {9923#false} is VALID [2022-04-27 22:03:58,514 INFO L290 TraceCheckUtils]: 21: Hoare triple {9923#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,515 INFO L290 TraceCheckUtils]: 22: Hoare triple {9923#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,515 INFO L272 TraceCheckUtils]: 23: Hoare triple {9923#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {9923#false} is VALID [2022-04-27 22:03:58,515 INFO L290 TraceCheckUtils]: 24: Hoare triple {9923#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9923#false} is VALID [2022-04-27 22:03:58,515 INFO L290 TraceCheckUtils]: 25: Hoare triple {9923#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,515 INFO L290 TraceCheckUtils]: 26: Hoare triple {9923#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,515 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:03:58,515 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:03:58,756 INFO L290 TraceCheckUtils]: 26: Hoare triple {9923#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,757 INFO L290 TraceCheckUtils]: 25: Hoare triple {9923#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,757 INFO L290 TraceCheckUtils]: 24: Hoare triple {9923#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {9923#false} is VALID [2022-04-27 22:03:58,757 INFO L272 TraceCheckUtils]: 23: Hoare triple {9923#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {9923#false} is VALID [2022-04-27 22:03:58,757 INFO L290 TraceCheckUtils]: 22: Hoare triple {9923#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,757 INFO L290 TraceCheckUtils]: 21: Hoare triple {10036#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {9923#false} is VALID [2022-04-27 22:03:58,758 INFO L290 TraceCheckUtils]: 20: Hoare triple {10040#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10036#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:03:58,759 INFO L290 TraceCheckUtils]: 19: Hoare triple {10044#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10040#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:03:58,760 INFO L290 TraceCheckUtils]: 18: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10044#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:03:58,760 INFO L290 TraceCheckUtils]: 17: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:03:58,760 INFO L290 TraceCheckUtils]: 16: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:03:58,761 INFO L290 TraceCheckUtils]: 15: Hoare triple {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:03:58,761 INFO L290 TraceCheckUtils]: 14: Hoare triple {10061#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10048#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:03:58,762 INFO L290 TraceCheckUtils]: 13: Hoare triple {10065#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10061#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:03:58,763 INFO L290 TraceCheckUtils]: 12: Hoare triple {10069#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10065#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:03:58,764 INFO L290 TraceCheckUtils]: 11: Hoare triple {10073#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10069#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:03:58,764 INFO L290 TraceCheckUtils]: 10: Hoare triple {9922#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10073#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 9: Hoare triple {9922#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 8: Hoare triple {9922#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 7: Hoare triple {9922#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 6: Hoare triple {9922#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 5: Hoare triple {9922#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L272 TraceCheckUtils]: 4: Hoare triple {9922#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {9922#true} {9922#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 2: Hoare triple {9922#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L290 TraceCheckUtils]: 1: Hoare triple {9922#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L272 TraceCheckUtils]: 0: Hoare triple {9922#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {9922#true} is VALID [2022-04-27 22:03:58,765 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-04-27 22:03:58,765 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [849674038] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:03:58,765 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:03:58,766 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 23 [2022-04-27 22:03:58,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120001307] [2022-04-27 22:03:58,766 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:03:58,766 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:03:58,766 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:03:58,766 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:03:58,802 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:03:58,802 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-04-27 22:03:58,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:03:58,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-04-27 22:03:58,803 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=407, Unknown=0, NotChecked=0, Total=506 [2022-04-27 22:03:58,803 INFO L87 Difference]: Start difference. First operand 129 states and 170 transitions. Second operand has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:00,304 INFO L93 Difference]: Finished difference Result 162 states and 209 transitions. [2022-04-27 22:04:00,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-04-27 22:04:00,304 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:04:00,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:00,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 90 transitions. [2022-04-27 22:04:00,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 90 transitions. [2022-04-27 22:04:00,306 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 25 states and 90 transitions. [2022-04-27 22:04:00,406 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 90 edges. 90 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:00,407 INFO L225 Difference]: With dead ends: 162 [2022-04-27 22:04:00,408 INFO L226 Difference]: Without dead ends: 136 [2022-04-27 22:04:00,408 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 412 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=366, Invalid=1614, Unknown=0, NotChecked=0, Total=1980 [2022-04-27 22:04:00,409 INFO L413 NwaCegarLoop]: 16 mSDtfsCounter, 94 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 252 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 321 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 252 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:00,409 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [94 Valid, 68 Invalid, 321 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 252 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:04:00,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-04-27 22:04:00,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 108. [2022-04-27 22:04:00,752 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:00,753 INFO L82 GeneralOperation]: Start isEquivalent. First operand 136 states. Second operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,753 INFO L74 IsIncluded]: Start isIncluded. First operand 136 states. Second operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,753 INFO L87 Difference]: Start difference. First operand 136 states. Second operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:00,755 INFO L93 Difference]: Finished difference Result 136 states and 174 transitions. [2022-04-27 22:04:00,755 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 174 transitions. [2022-04-27 22:04:00,756 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:00,756 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:00,756 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-27 22:04:00,756 INFO L87 Difference]: Start difference. First operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 136 states. [2022-04-27 22:04:00,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:00,758 INFO L93 Difference]: Finished difference Result 136 states and 174 transitions. [2022-04-27 22:04:00,758 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 174 transitions. [2022-04-27 22:04:00,758 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:00,759 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:00,759 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:00,759 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:00,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 103 states have (on average 1.3398058252427185) internal successors, (138), 103 states have internal predecessors, (138), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 142 transitions. [2022-04-27 22:04:00,761 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 142 transitions. Word has length 27 [2022-04-27 22:04:00,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:00,761 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 142 transitions. [2022-04-27 22:04:00,761 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.7391304347826086) internal successors, (40), 22 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:00,761 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 142 transitions. [2022-04-27 22:04:00,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 22:04:00,762 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:00,762 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:00,787 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 22:04:00,984 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 22:04:00,984 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:00,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:00,985 INFO L85 PathProgramCache]: Analyzing trace with hash -1270348258, now seen corresponding path program 7 times [2022-04-27 22:04:00,985 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:00,985 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733669769] [2022-04-27 22:04:00,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:00,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:01,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:01,124 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:01,128 INFO L290 TraceCheckUtils]: 0: Hoare triple {10829#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L272 TraceCheckUtils]: 0: Hoare triple {10816#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10829#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:01,128 INFO L290 TraceCheckUtils]: 1: Hoare triple {10829#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L290 TraceCheckUtils]: 2: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L272 TraceCheckUtils]: 4: Hoare triple {10816#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,128 INFO L290 TraceCheckUtils]: 5: Hoare triple {10816#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10816#true} is VALID [2022-04-27 22:04:01,129 INFO L290 TraceCheckUtils]: 6: Hoare triple {10816#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:04:01,130 INFO L290 TraceCheckUtils]: 7: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10822#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-27 22:04:01,132 INFO L290 TraceCheckUtils]: 8: Hoare triple {10822#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10823#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:04:01,133 INFO L290 TraceCheckUtils]: 9: Hoare triple {10823#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:04:01,134 INFO L290 TraceCheckUtils]: 10: Hoare triple {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:04:01,134 INFO L290 TraceCheckUtils]: 11: Hoare triple {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:04:01,135 INFO L290 TraceCheckUtils]: 12: Hoare triple {10824#(<= (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10825#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 1) main_~x~0)} is VALID [2022-04-27 22:04:01,135 INFO L290 TraceCheckUtils]: 13: Hoare triple {10825#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10826#(<= (+ 2 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:04:01,136 INFO L290 TraceCheckUtils]: 14: Hoare triple {10826#(<= (+ 2 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10827#(<= (+ 3 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:04:01,137 INFO L290 TraceCheckUtils]: 15: Hoare triple {10827#(<= (+ 3 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,137 INFO L290 TraceCheckUtils]: 16: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,138 INFO L290 TraceCheckUtils]: 17: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,138 INFO L290 TraceCheckUtils]: 18: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,138 INFO L290 TraceCheckUtils]: 19: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,139 INFO L290 TraceCheckUtils]: 20: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,139 INFO L290 TraceCheckUtils]: 21: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:04:01,139 INFO L290 TraceCheckUtils]: 22: Hoare triple {10828#(<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,139 INFO L272 TraceCheckUtils]: 23: Hoare triple {10817#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {10817#false} is VALID [2022-04-27 22:04:01,139 INFO L290 TraceCheckUtils]: 24: Hoare triple {10817#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10817#false} is VALID [2022-04-27 22:04:01,140 INFO L290 TraceCheckUtils]: 25: Hoare triple {10817#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,140 INFO L290 TraceCheckUtils]: 26: Hoare triple {10817#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,140 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 10 proven. 10 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:04:01,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:01,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733669769] [2022-04-27 22:04:01,140 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1733669769] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:01,140 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1471692947] [2022-04-27 22:04:01,140 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:04:01,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:01,140 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:01,141 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:01,142 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 22:04:01,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:01,175 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:04:01,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:01,183 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:01,449 INFO L272 TraceCheckUtils]: 0: Hoare triple {10816#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-27 22:04:01,449 INFO L290 TraceCheckUtils]: 2: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,449 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,449 INFO L272 TraceCheckUtils]: 4: Hoare triple {10816#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,450 INFO L290 TraceCheckUtils]: 5: Hoare triple {10816#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10816#true} is VALID [2022-04-27 22:04:01,450 INFO L290 TraceCheckUtils]: 6: Hoare triple {10816#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:04:01,451 INFO L290 TraceCheckUtils]: 7: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:04:01,452 INFO L290 TraceCheckUtils]: 8: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,452 INFO L290 TraceCheckUtils]: 9: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:04:01,453 INFO L290 TraceCheckUtils]: 10: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:04:01,453 INFO L290 TraceCheckUtils]: 11: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:04:01,454 INFO L290 TraceCheckUtils]: 12: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,455 INFO L290 TraceCheckUtils]: 13: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:04:01,455 INFO L290 TraceCheckUtils]: 14: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:04:01,456 INFO L290 TraceCheckUtils]: 15: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,456 INFO L290 TraceCheckUtils]: 16: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,457 INFO L290 TraceCheckUtils]: 17: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,457 INFO L290 TraceCheckUtils]: 18: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,457 INFO L290 TraceCheckUtils]: 19: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,457 INFO L290 TraceCheckUtils]: 20: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,458 INFO L290 TraceCheckUtils]: 21: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,458 INFO L290 TraceCheckUtils]: 22: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,458 INFO L272 TraceCheckUtils]: 23: Hoare triple {10817#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {10817#false} is VALID [2022-04-27 22:04:01,458 INFO L290 TraceCheckUtils]: 24: Hoare triple {10817#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10817#false} is VALID [2022-04-27 22:04:01,458 INFO L290 TraceCheckUtils]: 25: Hoare triple {10817#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,459 INFO L290 TraceCheckUtils]: 26: Hoare triple {10817#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,459 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:04:01,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:01,564 INFO L290 TraceCheckUtils]: 26: Hoare triple {10817#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,564 INFO L290 TraceCheckUtils]: 25: Hoare triple {10817#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,564 INFO L290 TraceCheckUtils]: 24: Hoare triple {10817#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10817#false} is VALID [2022-04-27 22:04:01,565 INFO L272 TraceCheckUtils]: 23: Hoare triple {10817#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {10817#false} is VALID [2022-04-27 22:04:01,565 INFO L290 TraceCheckUtils]: 22: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10817#false} is VALID [2022-04-27 22:04:01,565 INFO L290 TraceCheckUtils]: 21: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,566 INFO L290 TraceCheckUtils]: 20: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,566 INFO L290 TraceCheckUtils]: 19: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,566 INFO L290 TraceCheckUtils]: 17: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,567 INFO L290 TraceCheckUtils]: 16: Hoare triple {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,567 INFO L290 TraceCheckUtils]: 15: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10881#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,568 INFO L290 TraceCheckUtils]: 14: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:04:01,569 INFO L290 TraceCheckUtils]: 13: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:04:01,570 INFO L290 TraceCheckUtils]: 12: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,570 INFO L290 TraceCheckUtils]: 11: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:04:01,570 INFO L290 TraceCheckUtils]: 10: Hoare triple {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:04:01,571 INFO L290 TraceCheckUtils]: 9: Hoare triple {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10862#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:04:01,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10858#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:04:01,575 INFO L290 TraceCheckUtils]: 7: Hoare triple {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10854#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:04:01,576 INFO L290 TraceCheckUtils]: 6: Hoare triple {10816#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10821#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:04:01,576 INFO L290 TraceCheckUtils]: 5: Hoare triple {10816#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10816#true} is VALID [2022-04-27 22:04:01,576 INFO L272 TraceCheckUtils]: 4: Hoare triple {10816#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,576 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10816#true} {10816#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,576 INFO L290 TraceCheckUtils]: 2: Hoare triple {10816#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,576 INFO L290 TraceCheckUtils]: 1: Hoare triple {10816#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10816#true} is VALID [2022-04-27 22:04:01,576 INFO L272 TraceCheckUtils]: 0: Hoare triple {10816#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10816#true} is VALID [2022-04-27 22:04:01,576 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:04:01,576 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1471692947] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:01,576 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:01,576 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7] total 15 [2022-04-27 22:04:01,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286142407] [2022-04-27 22:04:01,577 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:01,577 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:04:01,577 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:01,577 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:01,611 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:01,611 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 22:04:01,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:01,612 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 22:04:01,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2022-04-27 22:04:01,612 INFO L87 Difference]: Start difference. First operand 108 states and 142 transitions. Second operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:02,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:02,616 INFO L93 Difference]: Finished difference Result 140 states and 188 transitions. [2022-04-27 22:04:02,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 22:04:02,616 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:04:02,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:02,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:02,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 63 transitions. [2022-04-27 22:04:02,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:02,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 63 transitions. [2022-04-27 22:04:02,619 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 63 transitions. [2022-04-27 22:04:02,686 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 63 edges. 63 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:02,688 INFO L225 Difference]: With dead ends: 140 [2022-04-27 22:04:02,688 INFO L226 Difference]: Without dead ends: 135 [2022-04-27 22:04:02,688 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 50 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=121, Invalid=385, Unknown=0, NotChecked=0, Total=506 [2022-04-27 22:04:02,689 INFO L413 NwaCegarLoop]: 28 mSDtfsCounter, 37 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 261 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 261 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:02,689 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 75 Invalid, 286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 261 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:04:02,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2022-04-27 22:04:03,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 127. [2022-04-27 22:04:03,049 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:03,049 INFO L82 GeneralOperation]: Start isEquivalent. First operand 135 states. Second operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:03,049 INFO L74 IsIncluded]: Start isIncluded. First operand 135 states. Second operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:03,049 INFO L87 Difference]: Start difference. First operand 135 states. Second operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:03,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:03,051 INFO L93 Difference]: Finished difference Result 135 states and 180 transitions. [2022-04-27 22:04:03,051 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 180 transitions. [2022-04-27 22:04:03,052 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:03,052 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:03,052 INFO L74 IsIncluded]: Start isIncluded. First operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 135 states. [2022-04-27 22:04:03,052 INFO L87 Difference]: Start difference. First operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 135 states. [2022-04-27 22:04:03,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:03,054 INFO L93 Difference]: Finished difference Result 135 states and 180 transitions. [2022-04-27 22:04:03,054 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 180 transitions. [2022-04-27 22:04:03,055 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:03,055 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:03,055 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:03,055 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:03,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 122 states have (on average 1.3442622950819672) internal successors, (164), 122 states have internal predecessors, (164), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:03,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 168 transitions. [2022-04-27 22:04:03,057 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 168 transitions. Word has length 27 [2022-04-27 22:04:03,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:03,057 INFO L495 AbstractCegarLoop]: Abstraction has 127 states and 168 transitions. [2022-04-27 22:04:03,057 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.2666666666666666) internal successors, (34), 14 states have internal predecessors, (34), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:03,057 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 168 transitions. [2022-04-27 22:04:03,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:04:03,058 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:03,058 INFO L195 NwaCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:03,080 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 22:04:03,280 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:03,280 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:03,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:03,281 INFO L85 PathProgramCache]: Analyzing trace with hash -1199429051, now seen corresponding path program 8 times [2022-04-27 22:04:03,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:03,281 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982913275] [2022-04-27 22:04:03,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:03,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:03,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:03,453 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:03,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:03,456 INFO L290 TraceCheckUtils]: 0: Hoare triple {11679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-27 22:04:03,456 INFO L290 TraceCheckUtils]: 1: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,457 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,457 INFO L272 TraceCheckUtils]: 0: Hoare triple {11664#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:03,457 INFO L290 TraceCheckUtils]: 1: Hoare triple {11679#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-27 22:04:03,457 INFO L290 TraceCheckUtils]: 2: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,457 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,458 INFO L272 TraceCheckUtils]: 4: Hoare triple {11664#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,458 INFO L290 TraceCheckUtils]: 5: Hoare triple {11664#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11669#(= main_~y~0 0)} is VALID [2022-04-27 22:04:03,458 INFO L290 TraceCheckUtils]: 6: Hoare triple {11669#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:03,459 INFO L290 TraceCheckUtils]: 7: Hoare triple {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:03,460 INFO L290 TraceCheckUtils]: 8: Hoare triple {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:04:03,461 INFO L290 TraceCheckUtils]: 9: Hoare triple {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,461 INFO L290 TraceCheckUtils]: 10: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,461 INFO L290 TraceCheckUtils]: 11: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11674#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:04:03,462 INFO L290 TraceCheckUtils]: 12: Hoare triple {11674#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11675#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:04:03,463 INFO L290 TraceCheckUtils]: 13: Hoare triple {11675#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11676#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:04:03,463 INFO L290 TraceCheckUtils]: 14: Hoare triple {11676#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11677#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:03,464 INFO L290 TraceCheckUtils]: 15: Hoare triple {11677#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11678#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 16: Hoare triple {11678#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11665#false} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 17: Hoare triple {11665#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 18: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 19: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 20: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 21: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,465 INFO L290 TraceCheckUtils]: 22: Hoare triple {11665#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,466 INFO L290 TraceCheckUtils]: 23: Hoare triple {11665#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,466 INFO L272 TraceCheckUtils]: 24: Hoare triple {11665#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {11665#false} is VALID [2022-04-27 22:04:03,466 INFO L290 TraceCheckUtils]: 25: Hoare triple {11665#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11665#false} is VALID [2022-04-27 22:04:03,466 INFO L290 TraceCheckUtils]: 26: Hoare triple {11665#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,466 INFO L290 TraceCheckUtils]: 27: Hoare triple {11665#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,466 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:04:03,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:03,466 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982913275] [2022-04-27 22:04:03,466 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982913275] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:03,467 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1071427601] [2022-04-27 22:04:03,467 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:04:03,467 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:03,467 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:03,469 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:03,469 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 22:04:03,504 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:04:03,504 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:04:03,505 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 30 conjunts are in the unsatisfiable core [2022-04-27 22:04:03,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:03,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:03,698 INFO L272 TraceCheckUtils]: 0: Hoare triple {11664#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,698 INFO L290 TraceCheckUtils]: 1: Hoare triple {11664#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-27 22:04:03,698 INFO L290 TraceCheckUtils]: 2: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,698 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,698 INFO L272 TraceCheckUtils]: 4: Hoare triple {11664#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:03,699 INFO L290 TraceCheckUtils]: 5: Hoare triple {11664#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11669#(= main_~y~0 0)} is VALID [2022-04-27 22:04:03,699 INFO L290 TraceCheckUtils]: 6: Hoare triple {11669#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:03,700 INFO L290 TraceCheckUtils]: 7: Hoare triple {11670#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:03,700 INFO L290 TraceCheckUtils]: 8: Hoare triple {11671#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:04:03,701 INFO L290 TraceCheckUtils]: 9: Hoare triple {11672#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,701 INFO L290 TraceCheckUtils]: 10: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,701 INFO L290 TraceCheckUtils]: 11: Hoare triple {11673#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11716#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,702 INFO L290 TraceCheckUtils]: 12: Hoare triple {11716#(and (= main_~z~0 main_~y~0) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11720#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:04:03,702 INFO L290 TraceCheckUtils]: 13: Hoare triple {11720#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11724#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,703 INFO L290 TraceCheckUtils]: 14: Hoare triple {11724#(and (= main_~y~0 (+ main_~z~0 2)) (<= main_~y~0 4) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11728#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} is VALID [2022-04-27 22:04:03,704 INFO L290 TraceCheckUtils]: 15: Hoare triple {11728#(and (<= main_~y~0 4) (<= 4 main_~y~0) (= main_~y~0 (+ main_~z~0 3)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11732#(and (<= main_~y~0 4) (= main_~y~0 (+ main_~z~0 4)) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:03,704 INFO L290 TraceCheckUtils]: 16: Hoare triple {11732#(and (<= main_~y~0 4) (= main_~y~0 (+ main_~z~0 4)) (<= 4 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11665#false} is VALID [2022-04-27 22:04:03,704 INFO L290 TraceCheckUtils]: 17: Hoare triple {11665#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,704 INFO L290 TraceCheckUtils]: 18: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 19: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 20: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 21: Hoare triple {11665#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 22: Hoare triple {11665#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 23: Hoare triple {11665#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L272 TraceCheckUtils]: 24: Hoare triple {11665#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 25: Hoare triple {11665#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 26: Hoare triple {11665#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L290 TraceCheckUtils]: 27: Hoare triple {11665#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,705 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:04:03,705 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:03,993 INFO L290 TraceCheckUtils]: 27: Hoare triple {11665#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,993 INFO L290 TraceCheckUtils]: 26: Hoare triple {11665#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,993 INFO L290 TraceCheckUtils]: 25: Hoare triple {11665#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11665#false} is VALID [2022-04-27 22:04:03,993 INFO L272 TraceCheckUtils]: 24: Hoare triple {11665#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {11665#false} is VALID [2022-04-27 22:04:03,993 INFO L290 TraceCheckUtils]: 23: Hoare triple {11665#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,994 INFO L290 TraceCheckUtils]: 22: Hoare triple {11784#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11665#false} is VALID [2022-04-27 22:04:03,995 INFO L290 TraceCheckUtils]: 21: Hoare triple {11788#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11784#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:03,996 INFO L290 TraceCheckUtils]: 20: Hoare triple {11792#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11788#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:04:03,997 INFO L290 TraceCheckUtils]: 19: Hoare triple {11796#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11792#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:04:03,998 INFO L290 TraceCheckUtils]: 18: Hoare triple {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11796#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:04:03,998 INFO L290 TraceCheckUtils]: 17: Hoare triple {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:04:03,999 INFO L290 TraceCheckUtils]: 16: Hoare triple {11807#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11800#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:04:04,000 INFO L290 TraceCheckUtils]: 15: Hoare triple {11811#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11807#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:04:04,001 INFO L290 TraceCheckUtils]: 14: Hoare triple {11815#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11811#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:04:04,002 INFO L290 TraceCheckUtils]: 13: Hoare triple {11819#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11815#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:04:04,003 INFO L290 TraceCheckUtils]: 12: Hoare triple {11823#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11819#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 11: Hoare triple {11664#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11823#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 10: Hoare triple {11664#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 9: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 8: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 7: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 6: Hoare triple {11664#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11664#true} is VALID [2022-04-27 22:04:04,004 INFO L290 TraceCheckUtils]: 5: Hoare triple {11664#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11664#true} is VALID [2022-04-27 22:04:04,004 INFO L272 TraceCheckUtils]: 4: Hoare triple {11664#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:04,005 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11664#true} {11664#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:04,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {11664#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:04,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {11664#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11664#true} is VALID [2022-04-27 22:04:04,005 INFO L272 TraceCheckUtils]: 0: Hoare triple {11664#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11664#true} is VALID [2022-04-27 22:04:04,005 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 20 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:04:04,005 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1071427601] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:04,006 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:04,006 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 28 [2022-04-27 22:04:04,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657158295] [2022-04-27 22:04:04,006 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:04,007 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:04:04,008 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:04,008 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:04,042 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:04,042 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-27 22:04:04,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:04,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-27 22:04:04,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=618, Unknown=0, NotChecked=0, Total=756 [2022-04-27 22:04:04,043 INFO L87 Difference]: Start difference. First operand 127 states and 168 transitions. Second operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:07,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:07,787 INFO L93 Difference]: Finished difference Result 247 states and 315 transitions. [2022-04-27 22:04:07,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-27 22:04:07,788 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:04:07,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:07,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:07,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 143 transitions. [2022-04-27 22:04:07,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:07,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 143 transitions. [2022-04-27 22:04:07,791 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 143 transitions. [2022-04-27 22:04:08,019 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 143 edges. 143 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:08,022 INFO L225 Difference]: With dead ends: 247 [2022-04-27 22:04:08,022 INFO L226 Difference]: Without dead ends: 219 [2022-04-27 22:04:08,023 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1303 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=924, Invalid=4046, Unknown=0, NotChecked=0, Total=4970 [2022-04-27 22:04:08,023 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 168 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 449 mSolverCounterSat, 188 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 168 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 637 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 188 IncrementalHoareTripleChecker+Valid, 449 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:08,023 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [168 Valid, 81 Invalid, 637 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [188 Valid, 449 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-27 22:04:08,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2022-04-27 22:04:08,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 144. [2022-04-27 22:04:08,458 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:08,458 INFO L82 GeneralOperation]: Start isEquivalent. First operand 219 states. Second operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:08,459 INFO L74 IsIncluded]: Start isIncluded. First operand 219 states. Second operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:08,459 INFO L87 Difference]: Start difference. First operand 219 states. Second operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:08,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:08,462 INFO L93 Difference]: Finished difference Result 219 states and 277 transitions. [2022-04-27 22:04:08,462 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 277 transitions. [2022-04-27 22:04:08,463 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:08,463 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:08,463 INFO L74 IsIncluded]: Start isIncluded. First operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 219 states. [2022-04-27 22:04:08,463 INFO L87 Difference]: Start difference. First operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 219 states. [2022-04-27 22:04:08,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:08,467 INFO L93 Difference]: Finished difference Result 219 states and 277 transitions. [2022-04-27 22:04:08,467 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 277 transitions. [2022-04-27 22:04:08,467 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:08,467 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:08,467 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:08,467 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:08,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 144 states, 139 states have (on average 1.3093525179856116) internal successors, (182), 139 states have internal predecessors, (182), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:08,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 186 transitions. [2022-04-27 22:04:08,470 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 186 transitions. Word has length 28 [2022-04-27 22:04:08,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:08,470 INFO L495 AbstractCegarLoop]: Abstraction has 144 states and 186 transitions. [2022-04-27 22:04:08,470 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.5357142857142858) internal successors, (43), 27 states have internal predecessors, (43), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:08,470 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2022-04-27 22:04:08,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:04:08,470 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:08,471 INFO L195 NwaCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:08,489 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2022-04-27 22:04:08,679 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:08,679 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:08,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:08,680 INFO L85 PathProgramCache]: Analyzing trace with hash -1934125691, now seen corresponding path program 3 times [2022-04-27 22:04:08,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:08,680 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898207755] [2022-04-27 22:04:08,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:08,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:08,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:08,926 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:08,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:08,930 INFO L290 TraceCheckUtils]: 0: Hoare triple {12949#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-27 22:04:08,930 INFO L290 TraceCheckUtils]: 1: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:08,930 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:08,930 INFO L272 TraceCheckUtils]: 0: Hoare triple {12929#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12949#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:08,930 INFO L290 TraceCheckUtils]: 1: Hoare triple {12949#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-27 22:04:08,930 INFO L290 TraceCheckUtils]: 2: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:08,931 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:08,931 INFO L272 TraceCheckUtils]: 4: Hoare triple {12929#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:08,931 INFO L290 TraceCheckUtils]: 5: Hoare triple {12929#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12934#(= main_~y~0 0)} is VALID [2022-04-27 22:04:08,932 INFO L290 TraceCheckUtils]: 6: Hoare triple {12934#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:08,932 INFO L290 TraceCheckUtils]: 7: Hoare triple {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:08,933 INFO L290 TraceCheckUtils]: 8: Hoare triple {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:04:08,933 INFO L290 TraceCheckUtils]: 9: Hoare triple {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:08,934 INFO L290 TraceCheckUtils]: 10: Hoare triple {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:04:08,934 INFO L290 TraceCheckUtils]: 11: Hoare triple {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:04:08,935 INFO L290 TraceCheckUtils]: 12: Hoare triple {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:04:08,936 INFO L290 TraceCheckUtils]: 13: Hoare triple {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:04:08,936 INFO L290 TraceCheckUtils]: 14: Hoare triple {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:04:08,937 INFO L290 TraceCheckUtils]: 15: Hoare triple {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:04:08,937 INFO L290 TraceCheckUtils]: 16: Hoare triple {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:04:08,938 INFO L290 TraceCheckUtils]: 17: Hoare triple {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:04:08,938 INFO L290 TraceCheckUtils]: 18: Hoare triple {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:04:08,939 INFO L290 TraceCheckUtils]: 19: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:04:08,939 INFO L290 TraceCheckUtils]: 20: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12948#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:04:08,939 INFO L290 TraceCheckUtils]: 21: Hoare triple {12948#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L290 TraceCheckUtils]: 22: Hoare triple {12930#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L290 TraceCheckUtils]: 23: Hoare triple {12930#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L272 TraceCheckUtils]: 24: Hoare triple {12930#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L290 TraceCheckUtils]: 25: Hoare triple {12930#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L290 TraceCheckUtils]: 26: Hoare triple {12930#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L290 TraceCheckUtils]: 27: Hoare triple {12930#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:08,940 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:08,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:08,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898207755] [2022-04-27 22:04:08,940 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898207755] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:08,940 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1060106321] [2022-04-27 22:04:08,940 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:04:08,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:08,941 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:08,941 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:08,943 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 22:04:09,109 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-04-27 22:04:09,109 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:04:09,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-27 22:04:09,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:09,118 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:09,421 INFO L272 TraceCheckUtils]: 0: Hoare triple {12929#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,421 INFO L290 TraceCheckUtils]: 1: Hoare triple {12929#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-27 22:04:09,422 INFO L290 TraceCheckUtils]: 2: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,422 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,422 INFO L272 TraceCheckUtils]: 4: Hoare triple {12929#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,422 INFO L290 TraceCheckUtils]: 5: Hoare triple {12929#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {12934#(= main_~y~0 0)} is VALID [2022-04-27 22:04:09,422 INFO L290 TraceCheckUtils]: 6: Hoare triple {12934#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:09,423 INFO L290 TraceCheckUtils]: 7: Hoare triple {12935#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:09,423 INFO L290 TraceCheckUtils]: 8: Hoare triple {12936#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:04:09,424 INFO L290 TraceCheckUtils]: 9: Hoare triple {12937#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:09,425 INFO L290 TraceCheckUtils]: 10: Hoare triple {12938#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:04:09,425 INFO L290 TraceCheckUtils]: 11: Hoare triple {12939#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:04:09,426 INFO L290 TraceCheckUtils]: 12: Hoare triple {12940#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:04:09,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {12941#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:04:09,427 INFO L290 TraceCheckUtils]: 14: Hoare triple {12942#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:04:09,427 INFO L290 TraceCheckUtils]: 15: Hoare triple {12943#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:04:09,428 INFO L290 TraceCheckUtils]: 16: Hoare triple {12944#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:04:09,428 INFO L290 TraceCheckUtils]: 17: Hoare triple {12945#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:04:09,429 INFO L290 TraceCheckUtils]: 18: Hoare triple {12946#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:04:09,429 INFO L290 TraceCheckUtils]: 19: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:04:09,429 INFO L290 TraceCheckUtils]: 20: Hoare triple {12947#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13013#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:04:09,430 INFO L290 TraceCheckUtils]: 21: Hoare triple {13013#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L290 TraceCheckUtils]: 22: Hoare triple {12930#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L290 TraceCheckUtils]: 23: Hoare triple {12930#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L272 TraceCheckUtils]: 24: Hoare triple {12930#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L290 TraceCheckUtils]: 25: Hoare triple {12930#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L290 TraceCheckUtils]: 26: Hoare triple {12930#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L290 TraceCheckUtils]: 27: Hoare triple {12930#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,430 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:09,431 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:09,855 INFO L290 TraceCheckUtils]: 27: Hoare triple {12930#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,855 INFO L290 TraceCheckUtils]: 26: Hoare triple {12930#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,855 INFO L290 TraceCheckUtils]: 25: Hoare triple {12930#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {12930#false} is VALID [2022-04-27 22:04:09,855 INFO L272 TraceCheckUtils]: 24: Hoare triple {12930#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {12930#false} is VALID [2022-04-27 22:04:09,856 INFO L290 TraceCheckUtils]: 23: Hoare triple {12930#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,856 INFO L290 TraceCheckUtils]: 22: Hoare triple {12930#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,859 INFO L290 TraceCheckUtils]: 21: Hoare triple {13053#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12930#false} is VALID [2022-04-27 22:04:09,860 INFO L290 TraceCheckUtils]: 20: Hoare triple {13057#(< 0 (mod main_~y~0 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13053#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:04:09,860 INFO L290 TraceCheckUtils]: 19: Hoare triple {13057#(< 0 (mod main_~y~0 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13057#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:09,861 INFO L290 TraceCheckUtils]: 18: Hoare triple {13064#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13057#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:09,862 INFO L290 TraceCheckUtils]: 17: Hoare triple {13068#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13064#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:04:09,862 INFO L290 TraceCheckUtils]: 16: Hoare triple {13072#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13068#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:04:09,863 INFO L290 TraceCheckUtils]: 15: Hoare triple {13076#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13072#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:04:09,864 INFO L290 TraceCheckUtils]: 14: Hoare triple {13080#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13076#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:04:09,865 INFO L290 TraceCheckUtils]: 13: Hoare triple {13084#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13080#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:04:09,865 INFO L290 TraceCheckUtils]: 12: Hoare triple {13088#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13084#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:04:09,866 INFO L290 TraceCheckUtils]: 11: Hoare triple {13092#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13088#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:04:09,867 INFO L290 TraceCheckUtils]: 10: Hoare triple {13096#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13092#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:04:09,867 INFO L290 TraceCheckUtils]: 9: Hoare triple {13100#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13096#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:04:09,868 INFO L290 TraceCheckUtils]: 8: Hoare triple {13104#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13100#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:04:09,869 INFO L290 TraceCheckUtils]: 7: Hoare triple {13108#(< 0 (mod (+ main_~y~0 12) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13104#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:04:09,869 INFO L290 TraceCheckUtils]: 6: Hoare triple {13112#(< 0 (mod (+ main_~y~0 13) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13108#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:04:09,870 INFO L290 TraceCheckUtils]: 5: Hoare triple {12929#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13112#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:04:09,870 INFO L272 TraceCheckUtils]: 4: Hoare triple {12929#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,870 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {12929#true} {12929#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {12929#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {12929#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {12929#true} is VALID [2022-04-27 22:04:09,870 INFO L272 TraceCheckUtils]: 0: Hoare triple {12929#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {12929#true} is VALID [2022-04-27 22:04:09,870 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:09,870 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1060106321] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:09,870 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:09,871 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-27 22:04:09,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936300376] [2022-04-27 22:04:09,871 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:09,871 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:04:09,871 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:09,872 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:09,907 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:09,907 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 22:04:09,907 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:09,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 22:04:09,908 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=859, Unknown=0, NotChecked=0, Total=1122 [2022-04-27 22:04:09,908 INFO L87 Difference]: Start difference. First operand 144 states and 186 transitions. Second operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:20,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:20,398 INFO L93 Difference]: Finished difference Result 766 states and 1080 transitions. [2022-04-27 22:05:20,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-04-27 22:05:20,398 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:05:20,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:20,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:20,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 359 transitions. [2022-04-27 22:05:20,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:20,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 359 transitions. [2022-04-27 22:05:20,413 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 69 states and 359 transitions. [2022-04-27 22:05:25,293 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 359 edges. 359 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:25,311 INFO L225 Difference]: With dead ends: 766 [2022-04-27 22:05:25,312 INFO L226 Difference]: Without dead ends: 725 [2022-04-27 22:05:25,313 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2678 ImplicationChecksByTransitivity, 60.9s TimeCoverageRelationStatistics Valid=2537, Invalid=7363, Unknown=0, NotChecked=0, Total=9900 [2022-04-27 22:05:25,314 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 988 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 1900 mSolverCounterSat, 833 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 988 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 2733 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 833 IncrementalHoareTripleChecker+Valid, 1900 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:25,314 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [988 Valid, 144 Invalid, 2733 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [833 Valid, 1900 Invalid, 0 Unknown, 0 Unchecked, 4.3s Time] [2022-04-27 22:05:25,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 725 states. [2022-04-27 22:05:26,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 725 to 206. [2022-04-27 22:05:26,118 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:26,118 INFO L82 GeneralOperation]: Start isEquivalent. First operand 725 states. Second operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,118 INFO L74 IsIncluded]: Start isIncluded. First operand 725 states. Second operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,119 INFO L87 Difference]: Start difference. First operand 725 states. Second operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:26,140 INFO L93 Difference]: Finished difference Result 725 states and 934 transitions. [2022-04-27 22:05:26,140 INFO L276 IsEmpty]: Start isEmpty. Operand 725 states and 934 transitions. [2022-04-27 22:05:26,141 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:26,142 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:26,142 INFO L74 IsIncluded]: Start isIncluded. First operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 725 states. [2022-04-27 22:05:26,142 INFO L87 Difference]: Start difference. First operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 725 states. [2022-04-27 22:05:26,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:26,164 INFO L93 Difference]: Finished difference Result 725 states and 934 transitions. [2022-04-27 22:05:26,164 INFO L276 IsEmpty]: Start isEmpty. Operand 725 states and 934 transitions. [2022-04-27 22:05:26,165 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:26,165 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:26,165 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:26,165 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:26,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 201 states have (on average 1.36318407960199) internal successors, (274), 201 states have internal predecessors, (274), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 278 transitions. [2022-04-27 22:05:26,169 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 278 transitions. Word has length 28 [2022-04-27 22:05:26,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:26,170 INFO L495 AbstractCegarLoop]: Abstraction has 206 states and 278 transitions. [2022-04-27 22:05:26,170 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.2941176470588236) internal successors, (44), 33 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:26,170 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 278 transitions. [2022-04-27 22:05:26,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 22:05:26,170 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:26,170 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:26,175 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:26,375 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:26,375 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:26,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:26,377 INFO L85 PathProgramCache]: Analyzing trace with hash 1682363274, now seen corresponding path program 9 times [2022-04-27 22:05:26,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:26,377 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100008653] [2022-04-27 22:05:26,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:26,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:26,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,562 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:26,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,568 INFO L290 TraceCheckUtils]: 0: Hoare triple {16023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-27 22:05:26,568 INFO L290 TraceCheckUtils]: 1: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:26,568 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:26,569 INFO L272 TraceCheckUtils]: 0: Hoare triple {16008#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:26,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {16023#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-27 22:05:26,569 INFO L290 TraceCheckUtils]: 2: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:26,569 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:26,569 INFO L272 TraceCheckUtils]: 4: Hoare triple {16008#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:26,569 INFO L290 TraceCheckUtils]: 5: Hoare triple {16008#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16008#true} is VALID [2022-04-27 22:05:26,570 INFO L290 TraceCheckUtils]: 6: Hoare triple {16008#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16013#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:26,571 INFO L290 TraceCheckUtils]: 7: Hoare triple {16013#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16014#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-27 22:05:26,572 INFO L290 TraceCheckUtils]: 8: Hoare triple {16014#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16015#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:26,573 INFO L290 TraceCheckUtils]: 9: Hoare triple {16015#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16016#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:26,574 INFO L290 TraceCheckUtils]: 10: Hoare triple {16016#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:05:26,575 INFO L290 TraceCheckUtils]: 11: Hoare triple {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:05:26,575 INFO L290 TraceCheckUtils]: 12: Hoare triple {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:05:26,576 INFO L290 TraceCheckUtils]: 13: Hoare triple {16017#(<= (* (div (+ 5 main_~x~0) 4294967296) 4294967296) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16018#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:05:26,577 INFO L290 TraceCheckUtils]: 14: Hoare triple {16018#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16019#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 2) main_~x~0)} is VALID [2022-04-27 22:05:26,578 INFO L290 TraceCheckUtils]: 15: Hoare triple {16019#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 2) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16020#(<= (+ 3 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:05:26,579 INFO L290 TraceCheckUtils]: 16: Hoare triple {16020#(<= (+ 3 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16021#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:05:26,580 INFO L290 TraceCheckUtils]: 17: Hoare triple {16021#(<= (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,581 INFO L290 TraceCheckUtils]: 18: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,581 INFO L290 TraceCheckUtils]: 19: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,581 INFO L290 TraceCheckUtils]: 20: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,582 INFO L290 TraceCheckUtils]: 21: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,582 INFO L290 TraceCheckUtils]: 22: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,583 INFO L290 TraceCheckUtils]: 23: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,583 INFO L290 TraceCheckUtils]: 24: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:05:26,584 INFO L290 TraceCheckUtils]: 25: Hoare triple {16022#(<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:26,584 INFO L272 TraceCheckUtils]: 26: Hoare triple {16009#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {16009#false} is VALID [2022-04-27 22:05:26,584 INFO L290 TraceCheckUtils]: 27: Hoare triple {16009#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16009#false} is VALID [2022-04-27 22:05:26,584 INFO L290 TraceCheckUtils]: 28: Hoare triple {16009#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:26,584 INFO L290 TraceCheckUtils]: 29: Hoare triple {16009#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:26,585 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 15 proven. 15 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:05:26,585 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:26,585 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2100008653] [2022-04-27 22:05:26,585 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2100008653] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:26,585 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [205557035] [2022-04-27 22:05:26,585 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:26,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:26,585 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:26,588 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:26,598 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 22:05:26,691 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-27 22:05:26,691 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:26,693 INFO L263 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-27 22:05:26,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:26,704 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:27,339 INFO L272 TraceCheckUtils]: 0: Hoare triple {16008#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,339 INFO L290 TraceCheckUtils]: 1: Hoare triple {16008#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-27 22:05:27,339 INFO L290 TraceCheckUtils]: 2: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,340 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,340 INFO L272 TraceCheckUtils]: 4: Hoare triple {16008#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,340 INFO L290 TraceCheckUtils]: 5: Hoare triple {16008#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,340 INFO L290 TraceCheckUtils]: 6: Hoare triple {16042#(= main_~n~0 main_~x~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16046#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:05:27,341 INFO L290 TraceCheckUtils]: 7: Hoare triple {16046#(= (+ main_~x~0 1) main_~n~0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 22:05:27,342 INFO L290 TraceCheckUtils]: 8: Hoare triple {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 22:05:27,343 INFO L290 TraceCheckUtils]: 9: Hoare triple {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 22:05:27,343 INFO L290 TraceCheckUtils]: 10: Hoare triple {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:05:27,344 INFO L290 TraceCheckUtils]: 11: Hoare triple {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:05:27,344 INFO L290 TraceCheckUtils]: 12: Hoare triple {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} is VALID [2022-04-27 22:05:27,345 INFO L290 TraceCheckUtils]: 13: Hoare triple {16062#(= (+ main_~x~0 1) (+ main_~n~0 (- 4)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} is VALID [2022-04-27 22:05:27,346 INFO L290 TraceCheckUtils]: 14: Hoare triple {16058#(= (+ main_~n~0 (- 3)) (+ main_~x~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} is VALID [2022-04-27 22:05:27,346 INFO L290 TraceCheckUtils]: 15: Hoare triple {16054#(= (+ (- 2) main_~n~0) (+ main_~x~0 1))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 22:05:27,347 INFO L290 TraceCheckUtils]: 16: Hoare triple {16050#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16046#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:05:27,348 INFO L290 TraceCheckUtils]: 17: Hoare triple {16046#(= (+ main_~x~0 1) main_~n~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,348 INFO L290 TraceCheckUtils]: 18: Hoare triple {16042#(= main_~n~0 main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,348 INFO L290 TraceCheckUtils]: 19: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,349 INFO L290 TraceCheckUtils]: 20: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,349 INFO L290 TraceCheckUtils]: 21: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,349 INFO L290 TraceCheckUtils]: 22: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,350 INFO L290 TraceCheckUtils]: 23: Hoare triple {16042#(= main_~n~0 main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16042#(= main_~n~0 main_~x~0)} is VALID [2022-04-27 22:05:27,350 INFO L290 TraceCheckUtils]: 24: Hoare triple {16042#(= main_~n~0 main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16105#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} is VALID [2022-04-27 22:05:27,351 INFO L290 TraceCheckUtils]: 25: Hoare triple {16105#(and (= main_~n~0 main_~x~0) (not (< 0 (mod main_~y~0 4294967296))))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16109#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} is VALID [2022-04-27 22:05:27,351 INFO L272 TraceCheckUtils]: 26: Hoare triple {16109#(and (not (< 0 (mod main_~y~0 4294967296))) (not (< 0 (mod main_~n~0 4294967296))))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:27,352 INFO L290 TraceCheckUtils]: 27: Hoare triple {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16117#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:27,352 INFO L290 TraceCheckUtils]: 28: Hoare triple {16117#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:27,352 INFO L290 TraceCheckUtils]: 29: Hoare triple {16009#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:27,353 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:05:27,353 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:27,977 INFO L290 TraceCheckUtils]: 29: Hoare triple {16009#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:27,977 INFO L290 TraceCheckUtils]: 28: Hoare triple {16117#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {16009#false} is VALID [2022-04-27 22:05:27,978 INFO L290 TraceCheckUtils]: 27: Hoare triple {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16117#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:27,979 INFO L272 TraceCheckUtils]: 26: Hoare triple {16133#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {16113#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:27,979 INFO L290 TraceCheckUtils]: 25: Hoare triple {16137#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16133#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:27,980 INFO L290 TraceCheckUtils]: 24: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16137#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:27,980 INFO L290 TraceCheckUtils]: 23: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,980 INFO L290 TraceCheckUtils]: 22: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,980 INFO L290 TraceCheckUtils]: 21: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,981 INFO L290 TraceCheckUtils]: 20: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,981 INFO L290 TraceCheckUtils]: 19: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,981 INFO L290 TraceCheckUtils]: 18: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,982 INFO L290 TraceCheckUtils]: 17: Hoare triple {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,983 INFO L290 TraceCheckUtils]: 16: Hoare triple {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,984 INFO L290 TraceCheckUtils]: 15: Hoare triple {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-27 22:05:27,984 INFO L290 TraceCheckUtils]: 14: Hoare triple {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,985 INFO L290 TraceCheckUtils]: 13: Hoare triple {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,986 INFO L290 TraceCheckUtils]: 11: Hoare triple {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,986 INFO L290 TraceCheckUtils]: 10: Hoare triple {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16179#(or (< 0 (mod (+ 5 main_~x~0) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,987 INFO L290 TraceCheckUtils]: 9: Hoare triple {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16175#(or (< 0 (mod (+ main_~x~0 4) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,988 INFO L290 TraceCheckUtils]: 8: Hoare triple {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16171#(or (< 0 (mod (+ main_~x~0 3) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,989 INFO L290 TraceCheckUtils]: 7: Hoare triple {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16167#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod (+ main_~x~0 2) 4294967296)))} is VALID [2022-04-27 22:05:27,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16163#(or (< 0 (mod (+ main_~x~0 1) 4294967296)) (<= (mod main_~n~0 4294967296) 0))} is VALID [2022-04-27 22:05:27,990 INFO L290 TraceCheckUtils]: 5: Hoare triple {16008#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16141#(or (<= (mod main_~n~0 4294967296) 0) (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:05:27,990 INFO L272 TraceCheckUtils]: 4: Hoare triple {16008#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,990 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16008#true} {16008#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,990 INFO L290 TraceCheckUtils]: 2: Hoare triple {16008#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,990 INFO L290 TraceCheckUtils]: 1: Hoare triple {16008#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16008#true} is VALID [2022-04-27 22:05:27,990 INFO L272 TraceCheckUtils]: 0: Hoare triple {16008#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16008#true} is VALID [2022-04-27 22:05:27,990 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:05:27,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [205557035] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:27,990 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:27,991 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 31 [2022-04-27 22:05:27,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812173665] [2022-04-27 22:05:27,991 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:27,991 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:05:27,991 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:27,991 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:28,048 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:28,048 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-04-27 22:05:28,048 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:28,049 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-04-27 22:05:28,049 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=798, Unknown=0, NotChecked=0, Total=930 [2022-04-27 22:05:28,049 INFO L87 Difference]: Start difference. First operand 206 states and 278 transitions. Second operand has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:31,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:31,618 INFO L93 Difference]: Finished difference Result 294 states and 395 transitions. [2022-04-27 22:05:31,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-27 22:05:31,618 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:05:31,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:31,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:31,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 119 transitions. [2022-04-27 22:05:31,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:31,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 119 transitions. [2022-04-27 22:05:31,620 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 119 transitions. [2022-04-27 22:05:31,753 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 119 edges. 119 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:31,758 INFO L225 Difference]: With dead ends: 294 [2022-04-27 22:05:31,759 INFO L226 Difference]: Without dead ends: 289 [2022-04-27 22:05:31,760 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 39 SyntacticMatches, 5 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=504, Invalid=2918, Unknown=0, NotChecked=0, Total=3422 [2022-04-27 22:05:31,760 INFO L413 NwaCegarLoop]: 34 mSDtfsCounter, 183 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 786 mSolverCounterSat, 196 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 106 SdHoareTripleChecker+Invalid, 982 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 196 IncrementalHoareTripleChecker+Valid, 786 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:31,760 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 106 Invalid, 982 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [196 Valid, 786 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-27 22:05:31,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 289 states. [2022-04-27 22:05:32,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 289 to 239. [2022-04-27 22:05:32,640 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:32,640 INFO L82 GeneralOperation]: Start isEquivalent. First operand 289 states. Second operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,640 INFO L74 IsIncluded]: Start isIncluded. First operand 289 states. Second operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,641 INFO L87 Difference]: Start difference. First operand 289 states. Second operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:32,645 INFO L93 Difference]: Finished difference Result 289 states and 381 transitions. [2022-04-27 22:05:32,645 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 381 transitions. [2022-04-27 22:05:32,646 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:32,646 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:32,646 INFO L74 IsIncluded]: Start isIncluded. First operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 289 states. [2022-04-27 22:05:32,647 INFO L87 Difference]: Start difference. First operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 289 states. [2022-04-27 22:05:32,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:32,651 INFO L93 Difference]: Finished difference Result 289 states and 381 transitions. [2022-04-27 22:05:32,651 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 381 transitions. [2022-04-27 22:05:32,652 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:32,652 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:32,652 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:32,652 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:32,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 239 states, 234 states have (on average 1.3675213675213675) internal successors, (320), 234 states have internal predecessors, (320), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 324 transitions. [2022-04-27 22:05:32,656 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 324 transitions. Word has length 30 [2022-04-27 22:05:32,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:32,657 INFO L495 AbstractCegarLoop]: Abstraction has 239 states and 324 transitions. [2022-04-27 22:05:32,657 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:32,657 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 324 transitions. [2022-04-27 22:05:32,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:05:32,657 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:32,658 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:32,675 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:32,863 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:32,863 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:32,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:32,864 INFO L85 PathProgramCache]: Analyzing trace with hash 727683038, now seen corresponding path program 8 times [2022-04-27 22:05:32,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:32,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720449659] [2022-04-27 22:05:32,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:32,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:32,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:33,313 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:33,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:33,320 INFO L290 TraceCheckUtils]: 0: Hoare triple {17645#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-27 22:05:33,320 INFO L290 TraceCheckUtils]: 1: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:33,320 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:33,321 INFO L272 TraceCheckUtils]: 0: Hoare triple {17626#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17645#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:33,321 INFO L290 TraceCheckUtils]: 1: Hoare triple {17645#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-27 22:05:33,321 INFO L290 TraceCheckUtils]: 2: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:33,321 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:33,321 INFO L272 TraceCheckUtils]: 4: Hoare triple {17626#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:33,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {17626#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:05:33,330 INFO L290 TraceCheckUtils]: 6: Hoare triple {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:35,338 WARN L290 TraceCheckUtils]: 7: Hoare triple {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17633#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is UNKNOWN [2022-04-27 22:05:35,484 INFO L290 TraceCheckUtils]: 8: Hoare triple {17633#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17634#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:35,485 INFO L290 TraceCheckUtils]: 9: Hoare triple {17634#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17635#(and (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} is VALID [2022-04-27 22:05:35,486 INFO L290 TraceCheckUtils]: 10: Hoare triple {17635#(and (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-27 22:05:35,487 INFO L290 TraceCheckUtils]: 11: Hoare triple {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} is VALID [2022-04-27 22:05:35,487 INFO L290 TraceCheckUtils]: 12: Hoare triple {17636#(and (<= main_~y~0 4) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= (+ 4 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:35,488 INFO L290 TraceCheckUtils]: 13: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:35,488 INFO L290 TraceCheckUtils]: 14: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:35,489 INFO L290 TraceCheckUtils]: 15: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:35,489 INFO L290 TraceCheckUtils]: 16: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:35,490 INFO L290 TraceCheckUtils]: 17: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:05:35,490 INFO L290 TraceCheckUtils]: 18: Hoare triple {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:35,491 INFO L290 TraceCheckUtils]: 19: Hoare triple {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:35,492 INFO L290 TraceCheckUtils]: 20: Hoare triple {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} is VALID [2022-04-27 22:05:35,492 INFO L290 TraceCheckUtils]: 21: Hoare triple {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} is VALID [2022-04-27 22:05:35,493 INFO L290 TraceCheckUtils]: 22: Hoare triple {17641#(and (<= main_~n~0 (+ main_~y~0 4 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 0))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:35,493 INFO L290 TraceCheckUtils]: 23: Hoare triple {17640#(and (<= main_~n~0 (+ main_~y~0 3 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:35,494 INFO L290 TraceCheckUtils]: 24: Hoare triple {17639#(and (<= main_~y~0 2) (<= main_~n~0 (+ main_~y~0 2 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} is VALID [2022-04-27 22:05:35,495 INFO L290 TraceCheckUtils]: 25: Hoare triple {17638#(and (<= main_~n~0 (+ main_~y~0 1 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:35,496 INFO L290 TraceCheckUtils]: 26: Hoare triple {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:05:35,497 INFO L272 TraceCheckUtils]: 27: Hoare triple {17642#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (div main_~y~0 4294967296) 0) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {17643#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:05:35,497 INFO L290 TraceCheckUtils]: 28: Hoare triple {17643#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17644#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:05:35,497 INFO L290 TraceCheckUtils]: 29: Hoare triple {17644#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-27 22:05:35,497 INFO L290 TraceCheckUtils]: 30: Hoare triple {17627#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-27 22:05:35,498 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:35,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:35,498 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720449659] [2022-04-27 22:05:35,498 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [720449659] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:35,498 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934100169] [2022-04-27 22:05:35,498 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:35,498 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:35,498 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:35,499 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:35,500 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 22:05:35,628 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:35,628 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:35,629 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 58 conjunts are in the unsatisfiable core [2022-04-27 22:05:35,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:35,639 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:42,728 INFO L272 TraceCheckUtils]: 0: Hoare triple {17626#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:42,728 INFO L290 TraceCheckUtils]: 1: Hoare triple {17626#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-27 22:05:42,728 INFO L290 TraceCheckUtils]: 2: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:42,728 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:42,728 INFO L272 TraceCheckUtils]: 4: Hoare triple {17626#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:42,728 INFO L290 TraceCheckUtils]: 5: Hoare triple {17626#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:05:42,730 INFO L290 TraceCheckUtils]: 6: Hoare triple {17631#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:42,732 INFO L290 TraceCheckUtils]: 7: Hoare triple {17632#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17670#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:05:42,734 INFO L290 TraceCheckUtils]: 8: Hoare triple {17670#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17674#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:42,737 INFO L290 TraceCheckUtils]: 9: Hoare triple {17674#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17678#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:05:42,737 INFO L290 TraceCheckUtils]: 10: Hoare triple {17678#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:05:42,738 INFO L290 TraceCheckUtils]: 11: Hoare triple {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:05:42,740 INFO L290 TraceCheckUtils]: 12: Hoare triple {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17689#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~y~0 4) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)))} is VALID [2022-04-27 22:05:42,742 INFO L290 TraceCheckUtils]: 13: Hoare triple {17689#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~y~0 4) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967292)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17693#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:42,744 INFO L290 TraceCheckUtils]: 14: Hoare triple {17693#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~y~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17697#(and (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-27 22:05:42,745 INFO L290 TraceCheckUtils]: 15: Hoare triple {17697#(and (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967294)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:05:42,746 INFO L290 TraceCheckUtils]: 16: Hoare triple {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:05:42,748 INFO L290 TraceCheckUtils]: 17: Hoare triple {17701#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 4) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 4) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17708#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:05:42,750 INFO L290 TraceCheckUtils]: 18: Hoare triple {17708#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 3) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (- 3) (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17712#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:42,751 INFO L290 TraceCheckUtils]: 19: Hoare triple {17712#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~y~0 2) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ 4294967295 (* (div (+ (- 2) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17716#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:42,753 INFO L290 TraceCheckUtils]: 20: Hoare triple {17716#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~x~0 (+ (* (div (+ (- 1) main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:05:42,753 INFO L290 TraceCheckUtils]: 21: Hoare triple {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} is VALID [2022-04-27 22:05:42,756 INFO L290 TraceCheckUtils]: 22: Hoare triple {17720#(and (not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296))) (<= main_~x~0 main_~n~0) (<= main_~y~0 0) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967295)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17727#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:42,762 INFO L290 TraceCheckUtils]: 23: Hoare triple {17727#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (not (< 0 (mod (+ main_~x~0 4294967293) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17731#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:05:42,765 INFO L290 TraceCheckUtils]: 24: Hoare triple {17731#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (not (< 0 (mod (+ main_~x~0 4294967294) 4294967296))) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17735#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:42,767 INFO L290 TraceCheckUtils]: 25: Hoare triple {17735#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (not (< 0 (mod (+ main_~x~0 4294967295) 4294967296))) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:05:42,780 INFO L290 TraceCheckUtils]: 26: Hoare triple {17682#(and (<= main_~x~0 (+ 4294967291 (* (div (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~y~0 main_~x~0 (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (not (< 0 (mod main_~x~0 4294967296))) (<= (+ main_~x~0 4) main_~n~0))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} is VALID [2022-04-27 22:05:42,781 INFO L272 TraceCheckUtils]: 27: Hoare triple {17637#(and (<= main_~n~0 (+ main_~y~0 (* (div (+ main_~n~0 (- 4)) 4294967296) 4294967296))) (<= main_~y~0 4))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:42,782 INFO L290 TraceCheckUtils]: 28: Hoare triple {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17749#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:42,782 INFO L290 TraceCheckUtils]: 29: Hoare triple {17749#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-27 22:05:42,782 INFO L290 TraceCheckUtils]: 30: Hoare triple {17627#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-27 22:05:42,782 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:42,782 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:44,465 INFO L290 TraceCheckUtils]: 30: Hoare triple {17627#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-27 22:05:44,465 INFO L290 TraceCheckUtils]: 29: Hoare triple {17749#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {17627#false} is VALID [2022-04-27 22:05:44,466 INFO L290 TraceCheckUtils]: 28: Hoare triple {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17749#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:44,466 INFO L272 TraceCheckUtils]: 27: Hoare triple {17765#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {17745#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:44,466 INFO L290 TraceCheckUtils]: 26: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17765#(= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:44,468 INFO L290 TraceCheckUtils]: 25: Hoare triple {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,469 INFO L290 TraceCheckUtils]: 24: Hoare triple {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-27 22:05:44,470 INFO L290 TraceCheckUtils]: 23: Hoare triple {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-27 22:05:44,471 INFO L290 TraceCheckUtils]: 22: Hoare triple {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:05:44,472 INFO L290 TraceCheckUtils]: 21: Hoare triple {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,473 INFO L290 TraceCheckUtils]: 20: Hoare triple {17792#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,474 INFO L290 TraceCheckUtils]: 19: Hoare triple {17796#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17792#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,476 INFO L290 TraceCheckUtils]: 18: Hoare triple {17800#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17796#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,477 INFO L290 TraceCheckUtils]: 17: Hoare triple {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17800#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,477 INFO L290 TraceCheckUtils]: 16: Hoare triple {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,478 INFO L290 TraceCheckUtils]: 15: Hoare triple {17811#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17804#(or (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,479 INFO L290 TraceCheckUtils]: 14: Hoare triple {17815#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17811#(or (< 0 (mod (+ main_~x~0 4294967293) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,480 INFO L290 TraceCheckUtils]: 13: Hoare triple {17819#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17815#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,481 INFO L290 TraceCheckUtils]: 12: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17819#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,482 INFO L290 TraceCheckUtils]: 11: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,482 INFO L290 TraceCheckUtils]: 10: Hoare triple {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,484 INFO L290 TraceCheckUtils]: 9: Hoare triple {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17769#(or (< 0 (mod main_~x~0 4294967296)) (= (mod main_~n~0 4294967296) (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:05:44,485 INFO L290 TraceCheckUtils]: 8: Hoare triple {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17773#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 1) 4294967296)))} is VALID [2022-04-27 22:05:44,487 INFO L290 TraceCheckUtils]: 7: Hoare triple {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17777#(or (< 0 (mod (+ main_~x~0 4294967294) 4294967296)) (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 2) 4294967296)))} is VALID [2022-04-27 22:05:44,489 INFO L290 TraceCheckUtils]: 6: Hoare triple {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17781#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 3) 4294967296)) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:05:44,490 INFO L290 TraceCheckUtils]: 5: Hoare triple {17626#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17785#(or (= (mod main_~n~0 4294967296) (mod (+ main_~y~0 4) 4294967296)) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:05:44,490 INFO L272 TraceCheckUtils]: 4: Hoare triple {17626#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:44,490 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17626#true} {17626#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:44,491 INFO L290 TraceCheckUtils]: 2: Hoare triple {17626#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:44,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {17626#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17626#true} is VALID [2022-04-27 22:05:44,491 INFO L272 TraceCheckUtils]: 0: Hoare triple {17626#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17626#true} is VALID [2022-04-27 22:05:44,491 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:44,491 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934100169] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:44,491 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:44,491 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 22, 17] total 47 [2022-04-27 22:05:44,492 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100566089] [2022-04-27 22:05:44,492 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:44,492 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:05:44,492 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:44,493 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:44,637 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 77 edges. 77 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:44,638 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-04-27 22:05:44,638 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:44,638 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-04-27 22:05:44,638 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=322, Invalid=1840, Unknown=0, NotChecked=0, Total=2162 [2022-04-27 22:05:44,639 INFO L87 Difference]: Start difference. First operand 239 states and 324 transitions. Second operand has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:57,333 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.13s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:06:01,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:01,806 INFO L93 Difference]: Finished difference Result 349 states and 437 transitions. [2022-04-27 22:06:01,806 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2022-04-27 22:06:01,806 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:01,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:01,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:01,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 108 transitions. [2022-04-27 22:06:01,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:01,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 108 transitions. [2022-04-27 22:06:01,808 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 48 states and 108 transitions. [2022-04-27 22:06:02,742 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 108 edges. 108 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:02,747 INFO L225 Difference]: With dead ends: 349 [2022-04-27 22:06:02,747 INFO L226 Difference]: Without dead ends: 323 [2022-04-27 22:06:02,748 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 33 SyntacticMatches, 4 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2203 ImplicationChecksByTransitivity, 12.6s TimeCoverageRelationStatistics Valid=1118, Invalid=7253, Unknown=1, NotChecked=0, Total=8372 [2022-04-27 22:06:02,749 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 143 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 799 mSolverCounterSat, 263 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 143 SdHoareTripleChecker+Valid, 110 SdHoareTripleChecker+Invalid, 1062 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 263 IncrementalHoareTripleChecker+Valid, 799 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.6s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:02,749 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [143 Valid, 110 Invalid, 1062 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [263 Valid, 799 Invalid, 0 Unknown, 0 Unchecked, 4.6s Time] [2022-04-27 22:06:02,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2022-04-27 22:06:03,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 237. [2022-04-27 22:06:03,633 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:03,633 INFO L82 GeneralOperation]: Start isEquivalent. First operand 323 states. Second operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:03,634 INFO L74 IsIncluded]: Start isIncluded. First operand 323 states. Second operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:03,634 INFO L87 Difference]: Start difference. First operand 323 states. Second operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:03,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:03,638 INFO L93 Difference]: Finished difference Result 323 states and 408 transitions. [2022-04-27 22:06:03,638 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 408 transitions. [2022-04-27 22:06:03,638 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:03,638 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:03,638 INFO L74 IsIncluded]: Start isIncluded. First operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 323 states. [2022-04-27 22:06:03,638 INFO L87 Difference]: Start difference. First operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 323 states. [2022-04-27 22:06:03,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:03,644 INFO L93 Difference]: Finished difference Result 323 states and 408 transitions. [2022-04-27 22:06:03,644 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 408 transitions. [2022-04-27 22:06:03,644 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:03,644 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:03,644 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:03,644 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:03,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 237 states, 232 states have (on average 1.3706896551724137) internal successors, (318), 232 states have internal predecessors, (318), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:03,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 322 transitions. [2022-04-27 22:06:03,649 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 322 transitions. Word has length 31 [2022-04-27 22:06:03,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:03,649 INFO L495 AbstractCegarLoop]: Abstraction has 237 states and 322 transitions. [2022-04-27 22:06:03,649 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 46 states have (on average 1.5217391304347827) internal successors, (70), 44 states have internal predecessors, (70), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:03,649 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 322 transitions. [2022-04-27 22:06:03,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:06:03,650 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:03,650 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:03,669 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-27 22:06:03,863 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-04-27 22:06:03,863 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:03,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:03,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1561499527, now seen corresponding path program 9 times [2022-04-27 22:06:03,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:03,864 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251403136] [2022-04-27 22:06:03,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:03,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:03,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:04,026 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:04,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:04,030 INFO L290 TraceCheckUtils]: 0: Hoare triple {19432#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-27 22:06:04,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,030 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,031 INFO L272 TraceCheckUtils]: 0: Hoare triple {19417#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19432#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:04,031 INFO L290 TraceCheckUtils]: 1: Hoare triple {19432#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-27 22:06:04,031 INFO L290 TraceCheckUtils]: 2: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,031 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,031 INFO L272 TraceCheckUtils]: 4: Hoare triple {19417#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,031 INFO L290 TraceCheckUtils]: 5: Hoare triple {19417#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19422#(= main_~y~0 0)} is VALID [2022-04-27 22:06:04,032 INFO L290 TraceCheckUtils]: 6: Hoare triple {19422#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:04,032 INFO L290 TraceCheckUtils]: 7: Hoare triple {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:04,033 INFO L290 TraceCheckUtils]: 8: Hoare triple {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:04,034 INFO L290 TraceCheckUtils]: 9: Hoare triple {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:04,035 INFO L290 TraceCheckUtils]: 10: Hoare triple {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,035 INFO L290 TraceCheckUtils]: 11: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,035 INFO L290 TraceCheckUtils]: 12: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19428#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:04,036 INFO L290 TraceCheckUtils]: 13: Hoare triple {19428#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19429#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:06:04,037 INFO L290 TraceCheckUtils]: 14: Hoare triple {19429#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19430#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:06:04,037 INFO L290 TraceCheckUtils]: 15: Hoare triple {19430#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19431#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 16: Hoare triple {19431#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 17: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 18: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 19: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 20: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 21: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,038 INFO L290 TraceCheckUtils]: 22: Hoare triple {19418#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 23: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 24: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 25: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 26: Hoare triple {19418#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L272 TraceCheckUtils]: 27: Hoare triple {19418#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 28: Hoare triple {19418#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 29: Hoare triple {19418#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L290 TraceCheckUtils]: 30: Hoare triple {19418#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,039 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:06:04,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:04,039 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251403136] [2022-04-27 22:06:04,040 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [251403136] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:04,040 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [956871878] [2022-04-27 22:06:04,040 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:06:04,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:04,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:04,043 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:04,047 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 22:06:04,157 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-04-27 22:06:04,157 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:04,158 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 28 conjunts are in the unsatisfiable core [2022-04-27 22:06:04,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:04,166 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:04,350 INFO L272 TraceCheckUtils]: 0: Hoare triple {19417#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,351 INFO L290 TraceCheckUtils]: 1: Hoare triple {19417#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-27 22:06:04,351 INFO L290 TraceCheckUtils]: 2: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,351 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,351 INFO L272 TraceCheckUtils]: 4: Hoare triple {19417#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,351 INFO L290 TraceCheckUtils]: 5: Hoare triple {19417#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19422#(= main_~y~0 0)} is VALID [2022-04-27 22:06:04,351 INFO L290 TraceCheckUtils]: 6: Hoare triple {19422#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:04,352 INFO L290 TraceCheckUtils]: 7: Hoare triple {19423#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:04,353 INFO L290 TraceCheckUtils]: 8: Hoare triple {19424#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:04,353 INFO L290 TraceCheckUtils]: 9: Hoare triple {19425#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:04,354 INFO L290 TraceCheckUtils]: 10: Hoare triple {19426#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,354 INFO L290 TraceCheckUtils]: 11: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,354 INFO L290 TraceCheckUtils]: 12: Hoare triple {19427#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19472#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,355 INFO L290 TraceCheckUtils]: 13: Hoare triple {19472#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19476#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:06:04,355 INFO L290 TraceCheckUtils]: 14: Hoare triple {19476#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19480#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,356 INFO L290 TraceCheckUtils]: 15: Hoare triple {19480#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19484#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:04,356 INFO L290 TraceCheckUtils]: 16: Hoare triple {19484#(and (= (+ main_~z~0 2) (+ (- 1) main_~y~0)) (<= 5 main_~y~0) (<= main_~y~0 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 17: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 18: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 19: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 20: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 21: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 22: Hoare triple {19418#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 23: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 24: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 25: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 26: Hoare triple {19418#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L272 TraceCheckUtils]: 27: Hoare triple {19418#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 28: Hoare triple {19418#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 29: Hoare triple {19418#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,357 INFO L290 TraceCheckUtils]: 30: Hoare triple {19418#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,358 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:06:04,358 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:04,588 INFO L290 TraceCheckUtils]: 30: Hoare triple {19418#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,588 INFO L290 TraceCheckUtils]: 29: Hoare triple {19418#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,588 INFO L290 TraceCheckUtils]: 28: Hoare triple {19418#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L272 TraceCheckUtils]: 27: Hoare triple {19418#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 26: Hoare triple {19418#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 25: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 24: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 23: Hoare triple {19418#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 22: Hoare triple {19418#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 21: Hoare triple {19418#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,589 INFO L290 TraceCheckUtils]: 20: Hoare triple {19560#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19418#false} is VALID [2022-04-27 22:06:04,590 INFO L290 TraceCheckUtils]: 19: Hoare triple {19564#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19560#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:06:04,591 INFO L290 TraceCheckUtils]: 18: Hoare triple {19568#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19564#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:06:04,591 INFO L290 TraceCheckUtils]: 17: Hoare triple {19572#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19568#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:06:04,592 INFO L290 TraceCheckUtils]: 16: Hoare triple {19576#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19572#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:06:04,592 INFO L290 TraceCheckUtils]: 15: Hoare triple {19580#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19576#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-27 22:06:04,593 INFO L290 TraceCheckUtils]: 14: Hoare triple {19584#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19580#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:06:04,594 INFO L290 TraceCheckUtils]: 13: Hoare triple {19588#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19584#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))))} is VALID [2022-04-27 22:06:04,594 INFO L290 TraceCheckUtils]: 12: Hoare triple {19417#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19588#(or (not (< 0 (mod (+ main_~y~0 4294967293) 4294967296))) (< 0 (mod (+ main_~z~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 11: Hoare triple {19417#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 10: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 9: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 8: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {19417#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {19417#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {19417#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19417#true} {19417#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {19417#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {19417#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L272 TraceCheckUtils]: 0: Hoare triple {19417#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19417#true} is VALID [2022-04-27 22:06:04,595 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 8 proven. 12 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-27 22:06:04,595 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [956871878] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:04,595 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:04,596 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 10] total 25 [2022-04-27 22:06:04,596 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196336336] [2022-04-27 22:06:04,596 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:04,596 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:04,596 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:04,596 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:04,627 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 44 edges. 44 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:04,627 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-27 22:06:04,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:04,627 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-27 22:06:04,627 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=500, Unknown=0, NotChecked=0, Total=600 [2022-04-27 22:06:04,628 INFO L87 Difference]: Start difference. First operand 237 states and 322 transitions. Second operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:08,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:08,513 INFO L93 Difference]: Finished difference Result 365 states and 466 transitions. [2022-04-27 22:06:08,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-04-27 22:06:08,513 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:08,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:08,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:08,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 111 transitions. [2022-04-27 22:06:08,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:08,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 111 transitions. [2022-04-27 22:06:08,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 31 states and 111 transitions. [2022-04-27 22:06:08,645 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 111 edges. 111 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:08,649 INFO L225 Difference]: With dead ends: 365 [2022-04-27 22:06:08,649 INFO L226 Difference]: Without dead ends: 299 [2022-04-27 22:06:08,649 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 58 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 523 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=363, Invalid=2393, Unknown=0, NotChecked=0, Total=2756 [2022-04-27 22:06:08,650 INFO L413 NwaCegarLoop]: 30 mSDtfsCounter, 57 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 57 SdHoareTripleChecker+Valid, 102 SdHoareTripleChecker+Invalid, 883 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:08,650 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [57 Valid, 102 Invalid, 883 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [93 Valid, 790 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-27 22:06:08,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2022-04-27 22:06:09,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 222. [2022-04-27 22:06:09,547 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:09,547 INFO L82 GeneralOperation]: Start isEquivalent. First operand 299 states. Second operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,548 INFO L74 IsIncluded]: Start isIncluded. First operand 299 states. Second operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,548 INFO L87 Difference]: Start difference. First operand 299 states. Second operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:09,551 INFO L93 Difference]: Finished difference Result 299 states and 385 transitions. [2022-04-27 22:06:09,551 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 385 transitions. [2022-04-27 22:06:09,551 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:09,551 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:09,552 INFO L74 IsIncluded]: Start isIncluded. First operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 299 states. [2022-04-27 22:06:09,552 INFO L87 Difference]: Start difference. First operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 299 states. [2022-04-27 22:06:09,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:09,556 INFO L93 Difference]: Finished difference Result 299 states and 385 transitions. [2022-04-27 22:06:09,557 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 385 transitions. [2022-04-27 22:06:09,557 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:09,557 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:09,557 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:09,557 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:09,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 217 states have (on average 1.3410138248847927) internal successors, (291), 217 states have internal predecessors, (291), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 295 transitions. [2022-04-27 22:06:09,561 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 295 transitions. Word has length 31 [2022-04-27 22:06:09,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:09,561 INFO L495 AbstractCegarLoop]: Abstraction has 222 states and 295 transitions. [2022-04-27 22:06:09,561 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 1.56) internal successors, (39), 24 states have internal predecessors, (39), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,562 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 295 transitions. [2022-04-27 22:06:09,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:06:09,562 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:09,562 INFO L195 NwaCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:09,581 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:09,771 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-04-27 22:06:09,771 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:09,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:09,772 INFO L85 PathProgramCache]: Analyzing trace with hash -859632864, now seen corresponding path program 10 times [2022-04-27 22:06:09,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:09,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143667782] [2022-04-27 22:06:09,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:09,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:09,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:10,071 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:10,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:10,081 INFO L290 TraceCheckUtils]: 0: Hoare triple {21142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-27 22:06:10,081 INFO L290 TraceCheckUtils]: 1: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,081 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,082 INFO L272 TraceCheckUtils]: 0: Hoare triple {21120#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:10,082 INFO L290 TraceCheckUtils]: 1: Hoare triple {21142#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-27 22:06:10,082 INFO L290 TraceCheckUtils]: 2: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,082 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,082 INFO L272 TraceCheckUtils]: 4: Hoare triple {21120#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,083 INFO L290 TraceCheckUtils]: 5: Hoare triple {21120#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {21125#(= main_~y~0 0)} is VALID [2022-04-27 22:06:10,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {21125#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:10,084 INFO L290 TraceCheckUtils]: 7: Hoare triple {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:10,085 INFO L290 TraceCheckUtils]: 8: Hoare triple {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:10,085 INFO L290 TraceCheckUtils]: 9: Hoare triple {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:10,086 INFO L290 TraceCheckUtils]: 10: Hoare triple {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:10,087 INFO L290 TraceCheckUtils]: 11: Hoare triple {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:10,087 INFO L290 TraceCheckUtils]: 12: Hoare triple {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:10,088 INFO L290 TraceCheckUtils]: 13: Hoare triple {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:10,089 INFO L290 TraceCheckUtils]: 14: Hoare triple {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:10,089 INFO L290 TraceCheckUtils]: 15: Hoare triple {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:06:10,090 INFO L290 TraceCheckUtils]: 16: Hoare triple {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:06:10,091 INFO L290 TraceCheckUtils]: 17: Hoare triple {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:10,091 INFO L290 TraceCheckUtils]: 18: Hoare triple {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:06:10,092 INFO L290 TraceCheckUtils]: 19: Hoare triple {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:06:10,093 INFO L290 TraceCheckUtils]: 20: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:06:10,093 INFO L290 TraceCheckUtils]: 21: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:06:10,094 INFO L290 TraceCheckUtils]: 22: Hoare triple {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {21141#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:10,094 INFO L290 TraceCheckUtils]: 23: Hoare triple {21141#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,094 INFO L290 TraceCheckUtils]: 24: Hoare triple {21121#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {21121#false} is VALID [2022-04-27 22:06:10,094 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L290 TraceCheckUtils]: 26: Hoare triple {21121#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L290 TraceCheckUtils]: 27: Hoare triple {21121#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L272 TraceCheckUtils]: 28: Hoare triple {21121#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L290 TraceCheckUtils]: 29: Hoare triple {21121#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L290 TraceCheckUtils]: 30: Hoare triple {21121#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L290 TraceCheckUtils]: 31: Hoare triple {21121#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,095 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:06:10,095 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:10,095 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143667782] [2022-04-27 22:06:10,096 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1143667782] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:10,096 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [499907106] [2022-04-27 22:06:10,096 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:06:10,096 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:10,096 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:10,100 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:10,105 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 22:06:10,141 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:06:10,141 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:10,141 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 35 conjunts are in the unsatisfiable core [2022-04-27 22:06:10,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:10,149 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:10,425 INFO L272 TraceCheckUtils]: 0: Hoare triple {21120#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,425 INFO L290 TraceCheckUtils]: 1: Hoare triple {21120#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-27 22:06:10,425 INFO L290 TraceCheckUtils]: 2: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,425 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,425 INFO L272 TraceCheckUtils]: 4: Hoare triple {21120#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,425 INFO L290 TraceCheckUtils]: 5: Hoare triple {21120#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {21125#(= main_~y~0 0)} is VALID [2022-04-27 22:06:10,426 INFO L290 TraceCheckUtils]: 6: Hoare triple {21125#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:10,427 INFO L290 TraceCheckUtils]: 7: Hoare triple {21126#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:10,427 INFO L290 TraceCheckUtils]: 8: Hoare triple {21127#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:10,428 INFO L290 TraceCheckUtils]: 9: Hoare triple {21128#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:10,429 INFO L290 TraceCheckUtils]: 10: Hoare triple {21129#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:10,429 INFO L290 TraceCheckUtils]: 11: Hoare triple {21130#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:10,430 INFO L290 TraceCheckUtils]: 12: Hoare triple {21131#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:10,431 INFO L290 TraceCheckUtils]: 13: Hoare triple {21132#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:10,432 INFO L290 TraceCheckUtils]: 14: Hoare triple {21133#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:10,432 INFO L290 TraceCheckUtils]: 15: Hoare triple {21134#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:06:10,433 INFO L290 TraceCheckUtils]: 16: Hoare triple {21135#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:06:10,434 INFO L290 TraceCheckUtils]: 17: Hoare triple {21136#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:10,434 INFO L290 TraceCheckUtils]: 18: Hoare triple {21137#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:06:10,435 INFO L290 TraceCheckUtils]: 19: Hoare triple {21138#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:06:10,435 INFO L290 TraceCheckUtils]: 20: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:06:10,436 INFO L290 TraceCheckUtils]: 21: Hoare triple {21139#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:06:10,436 INFO L290 TraceCheckUtils]: 22: Hoare triple {21140#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {21212#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:06:10,437 INFO L290 TraceCheckUtils]: 23: Hoare triple {21212#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,437 INFO L290 TraceCheckUtils]: 24: Hoare triple {21121#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {21121#false} is VALID [2022-04-27 22:06:10,437 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,437 INFO L290 TraceCheckUtils]: 26: Hoare triple {21121#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {21121#false} is VALID [2022-04-27 22:06:10,437 INFO L290 TraceCheckUtils]: 27: Hoare triple {21121#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,438 INFO L272 TraceCheckUtils]: 28: Hoare triple {21121#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {21121#false} is VALID [2022-04-27 22:06:10,438 INFO L290 TraceCheckUtils]: 29: Hoare triple {21121#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {21121#false} is VALID [2022-04-27 22:06:10,438 INFO L290 TraceCheckUtils]: 30: Hoare triple {21121#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,438 INFO L290 TraceCheckUtils]: 31: Hoare triple {21121#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,438 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:06:10,438 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:10,977 INFO L290 TraceCheckUtils]: 31: Hoare triple {21121#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 30: Hoare triple {21121#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 29: Hoare triple {21121#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L272 TraceCheckUtils]: 28: Hoare triple {21121#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 27: Hoare triple {21121#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 26: Hoare triple {21121#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 25: Hoare triple {21121#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 24: Hoare triple {21121#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {21121#false} is VALID [2022-04-27 22:06:10,978 INFO L290 TraceCheckUtils]: 23: Hoare triple {21264#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {21121#false} is VALID [2022-04-27 22:06:10,979 INFO L290 TraceCheckUtils]: 22: Hoare triple {21268#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {21264#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:06:10,979 INFO L290 TraceCheckUtils]: 21: Hoare triple {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {21268#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:10,980 INFO L290 TraceCheckUtils]: 20: Hoare triple {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:10,980 INFO L290 TraceCheckUtils]: 19: Hoare triple {21279#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21272#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:10,981 INFO L290 TraceCheckUtils]: 18: Hoare triple {21283#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21279#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:06:10,982 INFO L290 TraceCheckUtils]: 17: Hoare triple {21287#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21283#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:06:10,982 INFO L290 TraceCheckUtils]: 16: Hoare triple {21291#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21287#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:06:10,983 INFO L290 TraceCheckUtils]: 15: Hoare triple {21295#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21291#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:06:10,984 INFO L290 TraceCheckUtils]: 14: Hoare triple {21299#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21295#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:06:10,984 INFO L290 TraceCheckUtils]: 13: Hoare triple {21303#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21299#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:10,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {21307#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21303#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:06:10,986 INFO L290 TraceCheckUtils]: 11: Hoare triple {21311#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21307#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:10,986 INFO L290 TraceCheckUtils]: 10: Hoare triple {21315#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21311#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:06:10,987 INFO L290 TraceCheckUtils]: 9: Hoare triple {21319#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21315#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:06:10,988 INFO L290 TraceCheckUtils]: 8: Hoare triple {21323#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21319#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:06:10,988 INFO L290 TraceCheckUtils]: 7: Hoare triple {21327#(< 0 (mod (+ main_~y~0 12) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21323#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:06:10,989 INFO L290 TraceCheckUtils]: 6: Hoare triple {21331#(< 0 (mod (+ main_~y~0 13) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {21327#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:06:10,989 INFO L290 TraceCheckUtils]: 5: Hoare triple {21120#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {21331#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:06:10,989 INFO L272 TraceCheckUtils]: 4: Hoare triple {21120#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,989 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {21120#true} {21120#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,990 INFO L290 TraceCheckUtils]: 2: Hoare triple {21120#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,990 INFO L290 TraceCheckUtils]: 1: Hoare triple {21120#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {21120#true} is VALID [2022-04-27 22:06:10,990 INFO L272 TraceCheckUtils]: 0: Hoare triple {21120#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {21120#true} is VALID [2022-04-27 22:06:10,990 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:06:10,990 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [499907106] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:10,990 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:10,990 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19, 19] total 38 [2022-04-27 22:06:10,990 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1832198425] [2022-04-27 22:06:10,990 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:10,991 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:06:10,991 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:10,991 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:11,026 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:11,026 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 22:06:11,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:11,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 22:06:11,027 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=1102, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 22:06:11,027 INFO L87 Difference]: Start difference. First operand 222 states and 295 transitions. Second operand has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:35,914 WARN L232 SmtUtils]: Spent 9.01s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:06:38,227 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~z~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 4294967295 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-27 22:06:59,133 WARN L232 SmtUtils]: Spent 10.35s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:13,910 WARN L232 SmtUtils]: Spent 5.83s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:07:21,929 WARN L232 SmtUtils]: Spent 5.04s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:08:09,360 WARN L232 SmtUtils]: Spent 7.27s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:36,870 WARN L232 SmtUtils]: Spent 6.14s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:09:49,362 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.40s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:10:11,596 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.44s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:10:14,232 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.63s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:10:38,261 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.11s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:10:42,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:42,456 INFO L93 Difference]: Finished difference Result 853 states and 1146 transitions. [2022-04-27 22:10:42,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 139 states. [2022-04-27 22:10:42,457 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:10:42,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:10:42,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:42,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 462 transitions. [2022-04-27 22:10:42,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:42,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 462 transitions. [2022-04-27 22:10:42,476 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 139 states and 462 transitions. [2022-04-27 22:10:47,145 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 462 edges. 462 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:10:47,172 INFO L225 Difference]: With dead ends: 853 [2022-04-27 22:10:47,173 INFO L226 Difference]: Without dead ends: 815 [2022-04-27 22:10:47,175 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 171 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 10775 ImplicationChecksByTransitivity, 198.0s TimeCoverageRelationStatistics Valid=7040, Invalid=22375, Unknown=1, NotChecked=340, Total=29756 [2022-04-27 22:10:47,175 INFO L413 NwaCegarLoop]: 67 mSDtfsCounter, 988 mSDsluCounter, 112 mSDsCounter, 0 mSdLazyCounter, 2546 mSolverCounterSat, 1090 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 37.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 988 SdHoareTripleChecker+Valid, 179 SdHoareTripleChecker+Invalid, 3637 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1090 IncrementalHoareTripleChecker+Valid, 2546 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 1 IncrementalHoareTripleChecker+Unchecked, 37.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:10:47,176 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [988 Valid, 179 Invalid, 3637 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1090 Valid, 2546 Invalid, 0 Unknown, 1 Unchecked, 37.3s Time] [2022-04-27 22:10:47,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 815 states. [2022-04-27 22:10:48,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 815 to 238. [2022-04-27 22:10:48,219 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:10:48,219 INFO L82 GeneralOperation]: Start isEquivalent. First operand 815 states. Second operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:48,219 INFO L74 IsIncluded]: Start isIncluded. First operand 815 states. Second operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:48,219 INFO L87 Difference]: Start difference. First operand 815 states. Second operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:48,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:48,237 INFO L93 Difference]: Finished difference Result 815 states and 1048 transitions. [2022-04-27 22:10:48,237 INFO L276 IsEmpty]: Start isEmpty. Operand 815 states and 1048 transitions. [2022-04-27 22:10:48,239 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:10:48,239 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:10:48,239 INFO L74 IsIncluded]: Start isIncluded. First operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 815 states. [2022-04-27 22:10:48,239 INFO L87 Difference]: Start difference. First operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 815 states. [2022-04-27 22:10:48,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:48,268 INFO L93 Difference]: Finished difference Result 815 states and 1048 transitions. [2022-04-27 22:10:48,268 INFO L276 IsEmpty]: Start isEmpty. Operand 815 states and 1048 transitions. [2022-04-27 22:10:48,270 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:10:48,270 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:10:48,270 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:10:48,270 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:10:48,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 238 states, 233 states have (on average 1.3390557939914163) internal successors, (312), 233 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:48,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 316 transitions. [2022-04-27 22:10:48,274 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 316 transitions. Word has length 32 [2022-04-27 22:10:48,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:10:48,275 INFO L495 AbstractCegarLoop]: Abstraction has 238 states and 316 transitions. [2022-04-27 22:10:48,275 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.3157894736842106) internal successors, (50), 37 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:48,275 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 316 transitions. [2022-04-27 22:10:48,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 22:10:48,275 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:10:48,275 INFO L195 NwaCegarLoop]: trace histogram [8, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:10:48,300 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-27 22:10:48,498 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:10:48,498 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:10:48,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:10:48,499 INFO L85 PathProgramCache]: Analyzing trace with hash -55126557, now seen corresponding path program 10 times [2022-04-27 22:10:48,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:10:48,499 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754043992] [2022-04-27 22:10:48,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:10:48,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:10:48,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:48,715 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:10:48,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:48,719 INFO L290 TraceCheckUtils]: 0: Hoare triple {24756#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24739#true} is VALID [2022-04-27 22:10:48,719 INFO L290 TraceCheckUtils]: 1: Hoare triple {24739#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:48,720 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {24739#true} {24739#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:48,720 INFO L272 TraceCheckUtils]: 0: Hoare triple {24739#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24756#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:10:48,720 INFO L290 TraceCheckUtils]: 1: Hoare triple {24756#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24739#true} is VALID [2022-04-27 22:10:48,720 INFO L290 TraceCheckUtils]: 2: Hoare triple {24739#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:48,720 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24739#true} {24739#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:48,720 INFO L272 TraceCheckUtils]: 4: Hoare triple {24739#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:48,721 INFO L290 TraceCheckUtils]: 5: Hoare triple {24739#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24744#(= main_~y~0 0)} is VALID [2022-04-27 22:10:48,721 INFO L290 TraceCheckUtils]: 6: Hoare triple {24744#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24745#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:10:48,722 INFO L290 TraceCheckUtils]: 7: Hoare triple {24745#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24746#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:10:48,723 INFO L290 TraceCheckUtils]: 8: Hoare triple {24746#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24747#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:10:48,723 INFO L290 TraceCheckUtils]: 9: Hoare triple {24747#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24748#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:10:48,724 INFO L290 TraceCheckUtils]: 10: Hoare triple {24748#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:48,725 INFO L290 TraceCheckUtils]: 11: Hoare triple {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:48,725 INFO L290 TraceCheckUtils]: 12: Hoare triple {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24750#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:10:48,726 INFO L290 TraceCheckUtils]: 13: Hoare triple {24750#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24751#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:10:48,726 INFO L290 TraceCheckUtils]: 14: Hoare triple {24751#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24752#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:10:48,727 INFO L290 TraceCheckUtils]: 15: Hoare triple {24752#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24753#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:10:48,728 INFO L290 TraceCheckUtils]: 16: Hoare triple {24753#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24754#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:10:48,728 INFO L290 TraceCheckUtils]: 17: Hoare triple {24754#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24755#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:10:48,729 INFO L290 TraceCheckUtils]: 18: Hoare triple {24755#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24740#false} is VALID [2022-04-27 22:10:48,729 INFO L290 TraceCheckUtils]: 19: Hoare triple {24740#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24740#false} is VALID [2022-04-27 22:10:48,729 INFO L290 TraceCheckUtils]: 20: Hoare triple {24740#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 21: Hoare triple {24740#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 22: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 23: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 24: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 25: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 26: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 27: Hoare triple {24740#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 28: Hoare triple {24740#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L272 TraceCheckUtils]: 29: Hoare triple {24740#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {24740#false} is VALID [2022-04-27 22:10:48,730 INFO L290 TraceCheckUtils]: 30: Hoare triple {24740#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24740#false} is VALID [2022-04-27 22:10:48,731 INFO L290 TraceCheckUtils]: 31: Hoare triple {24740#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:48,731 INFO L290 TraceCheckUtils]: 32: Hoare triple {24740#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:48,731 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:10:48,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:10:48,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754043992] [2022-04-27 22:10:48,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1754043992] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:10:48,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1455149514] [2022-04-27 22:10:48,732 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:10:48,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:10:48,732 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:10:48,736 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:10:48,739 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 22:10:48,787 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:10:48,788 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:10:48,789 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 36 conjunts are in the unsatisfiable core [2022-04-27 22:10:48,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:48,798 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:10:49,106 INFO L272 TraceCheckUtils]: 0: Hoare triple {24739#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,106 INFO L290 TraceCheckUtils]: 1: Hoare triple {24739#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24739#true} is VALID [2022-04-27 22:10:49,106 INFO L290 TraceCheckUtils]: 2: Hoare triple {24739#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,106 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24739#true} {24739#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,106 INFO L272 TraceCheckUtils]: 4: Hoare triple {24739#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,107 INFO L290 TraceCheckUtils]: 5: Hoare triple {24739#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24744#(= main_~y~0 0)} is VALID [2022-04-27 22:10:49,107 INFO L290 TraceCheckUtils]: 6: Hoare triple {24744#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24745#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:10:49,108 INFO L290 TraceCheckUtils]: 7: Hoare triple {24745#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24746#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:10:49,109 INFO L290 TraceCheckUtils]: 8: Hoare triple {24746#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24747#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:10:49,109 INFO L290 TraceCheckUtils]: 9: Hoare triple {24747#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24748#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:10:49,110 INFO L290 TraceCheckUtils]: 10: Hoare triple {24748#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,111 INFO L290 TraceCheckUtils]: 11: Hoare triple {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,111 INFO L290 TraceCheckUtils]: 12: Hoare triple {24749#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24796#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,111 INFO L290 TraceCheckUtils]: 13: Hoare triple {24796#(and (= main_~z~0 main_~y~0) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24800#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:10:49,112 INFO L290 TraceCheckUtils]: 14: Hoare triple {24800#(and (<= 5 main_~y~0) (<= main_~y~0 5) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24804#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,113 INFO L290 TraceCheckUtils]: 15: Hoare triple {24804#(and (<= 5 main_~y~0) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24808#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,114 INFO L290 TraceCheckUtils]: 16: Hoare triple {24808#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24812#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,115 INFO L290 TraceCheckUtils]: 17: Hoare triple {24812#(and (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 5 main_~y~0) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24816#(and (<= 5 main_~y~0) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:49,115 INFO L290 TraceCheckUtils]: 18: Hoare triple {24816#(and (<= 5 main_~y~0) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 19: Hoare triple {24740#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 20: Hoare triple {24740#false} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 21: Hoare triple {24740#false} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 22: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 23: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 24: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 25: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 26: Hoare triple {24740#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 27: Hoare triple {24740#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,116 INFO L290 TraceCheckUtils]: 28: Hoare triple {24740#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,117 INFO L272 TraceCheckUtils]: 29: Hoare triple {24740#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {24740#false} is VALID [2022-04-27 22:10:49,117 INFO L290 TraceCheckUtils]: 30: Hoare triple {24740#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24740#false} is VALID [2022-04-27 22:10:49,117 INFO L290 TraceCheckUtils]: 31: Hoare triple {24740#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,117 INFO L290 TraceCheckUtils]: 32: Hoare triple {24740#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,117 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:10:49,117 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:10:49,497 INFO L290 TraceCheckUtils]: 32: Hoare triple {24740#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,497 INFO L290 TraceCheckUtils]: 31: Hoare triple {24740#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,497 INFO L290 TraceCheckUtils]: 30: Hoare triple {24740#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {24740#false} is VALID [2022-04-27 22:10:49,497 INFO L272 TraceCheckUtils]: 29: Hoare triple {24740#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {24740#false} is VALID [2022-04-27 22:10:49,497 INFO L290 TraceCheckUtils]: 28: Hoare triple {24740#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,498 INFO L290 TraceCheckUtils]: 27: Hoare triple {24877#(< 0 (mod main_~y~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {24740#false} is VALID [2022-04-27 22:10:49,499 INFO L290 TraceCheckUtils]: 26: Hoare triple {24881#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24877#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:10:49,499 INFO L290 TraceCheckUtils]: 25: Hoare triple {24885#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24881#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:10:49,500 INFO L290 TraceCheckUtils]: 24: Hoare triple {24889#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24885#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:10:49,501 INFO L290 TraceCheckUtils]: 23: Hoare triple {24893#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24889#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:10:49,502 INFO L290 TraceCheckUtils]: 22: Hoare triple {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {24893#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:49,502 INFO L290 TraceCheckUtils]: 21: Hoare triple {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:49,502 INFO L290 TraceCheckUtils]: 20: Hoare triple {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:49,503 INFO L290 TraceCheckUtils]: 19: Hoare triple {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:49,503 INFO L290 TraceCheckUtils]: 18: Hoare triple {24910#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24897#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:49,504 INFO L290 TraceCheckUtils]: 17: Hoare triple {24914#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24910#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod main_~z~0 4294967296))))} is VALID [2022-04-27 22:10:49,506 INFO L290 TraceCheckUtils]: 16: Hoare triple {24918#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24914#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:10:49,507 INFO L290 TraceCheckUtils]: 15: Hoare triple {24922#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24918#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))))} is VALID [2022-04-27 22:10:49,507 INFO L290 TraceCheckUtils]: 14: Hoare triple {24926#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24922#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:10:49,508 INFO L290 TraceCheckUtils]: 13: Hoare triple {24930#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {24926#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 12: Hoare triple {24739#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {24930#(or (< 0 (mod (+ 4294967291 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 11: Hoare triple {24739#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 10: Hoare triple {24739#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 9: Hoare triple {24739#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 8: Hoare triple {24739#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 7: Hoare triple {24739#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 6: Hoare triple {24739#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 5: Hoare triple {24739#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L272 TraceCheckUtils]: 4: Hoare triple {24739#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {24739#true} {24739#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {24739#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,510 INFO L290 TraceCheckUtils]: 1: Hoare triple {24739#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {24739#true} is VALID [2022-04-27 22:10:49,510 INFO L272 TraceCheckUtils]: 0: Hoare triple {24739#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {24739#true} is VALID [2022-04-27 22:10:49,510 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:10:49,510 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1455149514] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:10:49,510 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:10:49,510 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 33 [2022-04-27 22:10:49,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183200845] [2022-04-27 22:10:49,510 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:10:49,511 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:10:49,511 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:10:49,511 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:49,550 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:10:49,550 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-04-27 22:10:49,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:10:49,551 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-04-27 22:10:49,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=873, Unknown=0, NotChecked=0, Total=1056 [2022-04-27 22:10:49,551 INFO L87 Difference]: Start difference. First operand 238 states and 316 transitions. Second operand has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:55,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:55,817 INFO L93 Difference]: Finished difference Result 435 states and 530 transitions. [2022-04-27 22:10:55,817 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2022-04-27 22:10:55,817 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:10:55,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:10:55,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:55,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 163 transitions. [2022-04-27 22:10:55,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:55,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 163 transitions. [2022-04-27 22:10:55,820 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 58 states and 163 transitions. [2022-04-27 22:10:56,129 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 163 edges. 163 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:10:56,139 INFO L225 Difference]: With dead ends: 435 [2022-04-27 22:10:56,139 INFO L226 Difference]: Without dead ends: 415 [2022-04-27 22:10:56,140 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2122 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1384, Invalid=6272, Unknown=0, NotChecked=0, Total=7656 [2022-04-27 22:10:56,140 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 233 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 556 mSolverCounterSat, 259 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 233 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 815 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 259 IncrementalHoareTripleChecker+Valid, 556 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:10:56,141 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [233 Valid, 96 Invalid, 815 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [259 Valid, 556 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-27 22:10:56,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 415 states. [2022-04-27 22:10:57,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 415 to 239. [2022-04-27 22:10:57,211 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:10:57,211 INFO L82 GeneralOperation]: Start isEquivalent. First operand 415 states. Second operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:57,212 INFO L74 IsIncluded]: Start isIncluded. First operand 415 states. Second operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:57,212 INFO L87 Difference]: Start difference. First operand 415 states. Second operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:57,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:57,220 INFO L93 Difference]: Finished difference Result 415 states and 505 transitions. [2022-04-27 22:10:57,220 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 505 transitions. [2022-04-27 22:10:57,221 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:10:57,221 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:10:57,221 INFO L74 IsIncluded]: Start isIncluded. First operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 415 states. [2022-04-27 22:10:57,221 INFO L87 Difference]: Start difference. First operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 415 states. [2022-04-27 22:10:57,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:57,230 INFO L93 Difference]: Finished difference Result 415 states and 505 transitions. [2022-04-27 22:10:57,230 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 505 transitions. [2022-04-27 22:10:57,231 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:10:57,231 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:10:57,231 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:10:57,231 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:10:57,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 239 states, 234 states have (on average 1.3333333333333333) internal successors, (312), 234 states have internal predecessors, (312), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:57,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 316 transitions. [2022-04-27 22:10:57,236 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 316 transitions. Word has length 33 [2022-04-27 22:10:57,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:10:57,237 INFO L495 AbstractCegarLoop]: Abstraction has 239 states and 316 transitions. [2022-04-27 22:10:57,238 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 1.5151515151515151) internal successors, (50), 32 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:57,238 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 316 transitions. [2022-04-27 22:10:57,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-27 22:10:57,238 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:10:57,238 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:10:57,266 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-27 22:10:57,461 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:10:57,461 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:10:57,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:10:57,461 INFO L85 PathProgramCache]: Analyzing trace with hash -479678114, now seen corresponding path program 11 times [2022-04-27 22:10:57,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:10:57,462 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711622768] [2022-04-27 22:10:57,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:10:57,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:10:57,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:57,677 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:10:57,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:57,681 INFO L290 TraceCheckUtils]: 0: Hoare triple {26871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26854#true} is VALID [2022-04-27 22:10:57,681 INFO L290 TraceCheckUtils]: 1: Hoare triple {26854#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:57,681 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {26854#true} {26854#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:57,683 INFO L272 TraceCheckUtils]: 0: Hoare triple {26854#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:10:57,683 INFO L290 TraceCheckUtils]: 1: Hoare triple {26871#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26854#true} is VALID [2022-04-27 22:10:57,683 INFO L290 TraceCheckUtils]: 2: Hoare triple {26854#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:57,684 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26854#true} {26854#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:57,684 INFO L272 TraceCheckUtils]: 4: Hoare triple {26854#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:57,684 INFO L290 TraceCheckUtils]: 5: Hoare triple {26854#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26854#true} is VALID [2022-04-27 22:10:57,685 INFO L290 TraceCheckUtils]: 6: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26859#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:10:57,686 INFO L290 TraceCheckUtils]: 7: Hoare triple {26859#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26860#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} is VALID [2022-04-27 22:10:57,687 INFO L290 TraceCheckUtils]: 8: Hoare triple {26860#(<= main_~x~0 (+ (* 4294967296 (div main_~x~0 4294967296)) 4294967293))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26861#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:10:57,688 INFO L290 TraceCheckUtils]: 9: Hoare triple {26861#(<= main_~x~0 (+ 4294967292 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26862#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:10:57,689 INFO L290 TraceCheckUtils]: 10: Hoare triple {26862#(<= main_~x~0 (+ 4294967291 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26863#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:10:57,690 INFO L290 TraceCheckUtils]: 11: Hoare triple {26863#(<= main_~x~0 (+ 4294967290 (* 4294967296 (div main_~x~0 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26864#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:10:57,690 INFO L290 TraceCheckUtils]: 12: Hoare triple {26864#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26864#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:10:57,691 INFO L290 TraceCheckUtils]: 13: Hoare triple {26864#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26864#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:10:57,692 INFO L290 TraceCheckUtils]: 14: Hoare triple {26864#(<= (* 4294967296 (div (+ main_~x~0 6) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26865#(<= (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:10:57,693 INFO L290 TraceCheckUtils]: 15: Hoare triple {26865#(<= (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 1) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26866#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 2) main_~x~0)} is VALID [2022-04-27 22:10:57,694 INFO L290 TraceCheckUtils]: 16: Hoare triple {26866#(<= (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) 2) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26867#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 3) main_~x~0)} is VALID [2022-04-27 22:10:57,694 INFO L290 TraceCheckUtils]: 17: Hoare triple {26867#(<= (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 3) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26868#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:10:57,695 INFO L290 TraceCheckUtils]: 18: Hoare triple {26868#(<= (+ (* (div (+ main_~x~0 2) 4294967296) 4294967296) 4) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26869#(<= (+ 5 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:10:57,696 INFO L290 TraceCheckUtils]: 19: Hoare triple {26869#(<= (+ 5 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) main_~x~0)} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,697 INFO L290 TraceCheckUtils]: 20: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,697 INFO L290 TraceCheckUtils]: 21: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,698 INFO L290 TraceCheckUtils]: 22: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,698 INFO L290 TraceCheckUtils]: 23: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,698 INFO L290 TraceCheckUtils]: 24: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,699 INFO L290 TraceCheckUtils]: 25: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,699 INFO L290 TraceCheckUtils]: 26: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,700 INFO L290 TraceCheckUtils]: 27: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:10:57,700 INFO L290 TraceCheckUtils]: 28: Hoare triple {26870#(<= (+ 6 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:57,700 INFO L272 TraceCheckUtils]: 29: Hoare triple {26855#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {26855#false} is VALID [2022-04-27 22:10:57,700 INFO L290 TraceCheckUtils]: 30: Hoare triple {26855#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26855#false} is VALID [2022-04-27 22:10:57,700 INFO L290 TraceCheckUtils]: 31: Hoare triple {26855#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:57,701 INFO L290 TraceCheckUtils]: 32: Hoare triple {26855#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:57,701 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 21 proven. 21 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2022-04-27 22:10:57,701 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:10:57,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711622768] [2022-04-27 22:10:57,701 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [711622768] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:10:57,701 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [639876859] [2022-04-27 22:10:57,701 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:10:57,701 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:10:57,701 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:10:57,704 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:10:57,729 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-27 22:10:58,092 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:10:58,093 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:10:58,094 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:10:58,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:58,104 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:10:58,507 INFO L272 TraceCheckUtils]: 0: Hoare triple {26854#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,507 INFO L290 TraceCheckUtils]: 1: Hoare triple {26854#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 2: Hoare triple {26854#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26854#true} {26854#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L272 TraceCheckUtils]: 4: Hoare triple {26854#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 5: Hoare triple {26854#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 6: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 7: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 8: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 9: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 10: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,508 INFO L290 TraceCheckUtils]: 11: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,509 INFO L290 TraceCheckUtils]: 12: Hoare triple {26854#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {26911#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:10:58,509 INFO L290 TraceCheckUtils]: 13: Hoare triple {26911#(not (< 0 (mod main_~x~0 4294967296)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {26911#(not (< 0 (mod main_~x~0 4294967296)))} is VALID [2022-04-27 22:10:58,510 INFO L290 TraceCheckUtils]: 14: Hoare triple {26911#(not (< 0 (mod main_~x~0 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26918#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:10:58,511 INFO L290 TraceCheckUtils]: 15: Hoare triple {26918#(not (< 0 (mod (+ main_~x~0 4294967295) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26922#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:10:58,512 INFO L290 TraceCheckUtils]: 16: Hoare triple {26922#(not (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26926#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:10:58,513 INFO L290 TraceCheckUtils]: 17: Hoare triple {26926#(not (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26930#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,514 INFO L290 TraceCheckUtils]: 18: Hoare triple {26930#(not (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26934#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,515 INFO L290 TraceCheckUtils]: 19: Hoare triple {26934#(not (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,515 INFO L290 TraceCheckUtils]: 20: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,515 INFO L290 TraceCheckUtils]: 21: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,516 INFO L290 TraceCheckUtils]: 22: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,516 INFO L290 TraceCheckUtils]: 23: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,516 INFO L290 TraceCheckUtils]: 24: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,517 INFO L290 TraceCheckUtils]: 25: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,517 INFO L290 TraceCheckUtils]: 26: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,517 INFO L290 TraceCheckUtils]: 27: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:10:58,518 INFO L290 TraceCheckUtils]: 28: Hoare triple {26938#(not (< 0 (mod (+ 4294967290 main_~x~0) 4294967296)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:58,518 INFO L272 TraceCheckUtils]: 29: Hoare triple {26855#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {26855#false} is VALID [2022-04-27 22:10:58,518 INFO L290 TraceCheckUtils]: 30: Hoare triple {26855#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26855#false} is VALID [2022-04-27 22:10:58,518 INFO L290 TraceCheckUtils]: 31: Hoare triple {26855#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:58,518 INFO L290 TraceCheckUtils]: 32: Hoare triple {26855#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:58,519 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-04-27 22:10:58,519 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:10:58,721 INFO L290 TraceCheckUtils]: 32: Hoare triple {26855#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:58,721 INFO L290 TraceCheckUtils]: 31: Hoare triple {26855#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:58,721 INFO L290 TraceCheckUtils]: 30: Hoare triple {26855#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {26855#false} is VALID [2022-04-27 22:10:58,721 INFO L272 TraceCheckUtils]: 29: Hoare triple {26855#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {26855#false} is VALID [2022-04-27 22:10:58,722 INFO L290 TraceCheckUtils]: 28: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {26855#false} is VALID [2022-04-27 22:10:58,722 INFO L290 TraceCheckUtils]: 27: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,722 INFO L290 TraceCheckUtils]: 26: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,723 INFO L290 TraceCheckUtils]: 25: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,723 INFO L290 TraceCheckUtils]: 24: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,724 INFO L290 TraceCheckUtils]: 23: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,724 INFO L290 TraceCheckUtils]: 22: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,724 INFO L290 TraceCheckUtils]: 21: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,725 INFO L290 TraceCheckUtils]: 20: Hoare triple {26990#(< 0 (mod main_~x~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,726 INFO L290 TraceCheckUtils]: 19: Hoare triple {26859#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26990#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:10:58,727 INFO L290 TraceCheckUtils]: 18: Hoare triple {27021#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {26859#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:10:58,728 INFO L290 TraceCheckUtils]: 17: Hoare triple {27025#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27021#(<= main_~x~0 (+ (* (div (+ main_~x~0 1) 4294967296) 4294967296) 4294967293))} is VALID [2022-04-27 22:10:58,729 INFO L290 TraceCheckUtils]: 16: Hoare triple {27029#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27025#(<= main_~x~0 (+ 4294967292 (* (div (+ main_~x~0 2) 4294967296) 4294967296)))} is VALID [2022-04-27 22:10:58,730 INFO L290 TraceCheckUtils]: 15: Hoare triple {27033#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27029#(<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) 4294967291))} is VALID [2022-04-27 22:10:58,731 INFO L290 TraceCheckUtils]: 14: Hoare triple {27037#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {27033#(<= main_~x~0 (+ 4294967290 (* (div (+ main_~x~0 4) 4294967296) 4294967296)))} is VALID [2022-04-27 22:10:58,731 INFO L290 TraceCheckUtils]: 13: Hoare triple {27037#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {27037#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 12: Hoare triple {26854#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {27037#(<= main_~x~0 (+ (* (div (+ 5 main_~x~0) 4294967296) 4294967296) 4294967289))} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 11: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 10: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 9: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 8: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 7: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,732 INFO L290 TraceCheckUtils]: 6: Hoare triple {26854#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L290 TraceCheckUtils]: 5: Hoare triple {26854#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L272 TraceCheckUtils]: 4: Hoare triple {26854#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {26854#true} {26854#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L290 TraceCheckUtils]: 2: Hoare triple {26854#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L290 TraceCheckUtils]: 1: Hoare triple {26854#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L272 TraceCheckUtils]: 0: Hoare triple {26854#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {26854#true} is VALID [2022-04-27 22:10:58,733 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2022-04-27 22:10:58,733 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [639876859] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:10:58,733 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:10:58,734 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 9, 9] total 28 [2022-04-27 22:10:58,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556258938] [2022-04-27 22:10:58,734 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:10:58,734 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:10:58,735 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:10:58,735 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:58,788 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 55 edges. 55 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:10:58,789 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-27 22:10:58,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:10:58,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-27 22:10:58,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=538, Unknown=0, NotChecked=0, Total=756 [2022-04-27 22:10:58,789 INFO L87 Difference]: Start difference. First operand 239 states and 316 transitions. Second operand has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:20,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:11:20,226 INFO L93 Difference]: Finished difference Result 559 states and 780 transitions. [2022-04-27 22:11:20,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-04-27 22:11:20,227 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 33 [2022-04-27 22:11:20,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:11:20,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:20,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 168 transitions. [2022-04-27 22:11:20,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:20,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 168 transitions. [2022-04-27 22:11:20,229 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 43 states and 168 transitions. [2022-04-27 22:11:20,523 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 168 edges. 168 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:11:20,534 INFO L225 Difference]: With dead ends: 559 [2022-04-27 22:11:20,535 INFO L226 Difference]: Without dead ends: 551 [2022-04-27 22:11:20,535 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 60 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1170 ImplicationChecksByTransitivity, 15.6s TimeCoverageRelationStatistics Valid=1191, Invalid=3365, Unknown=0, NotChecked=0, Total=4556 [2022-04-27 22:11:20,536 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 254 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 409 mSolverCounterSat, 214 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 254 SdHoareTripleChecker+Valid, 85 SdHoareTripleChecker+Invalid, 623 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 214 IncrementalHoareTripleChecker+Valid, 409 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 22:11:20,536 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [254 Valid, 85 Invalid, 623 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [214 Valid, 409 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-27 22:11:20,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2022-04-27 22:11:22,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 372. [2022-04-27 22:11:22,347 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:11:22,348 INFO L82 GeneralOperation]: Start isEquivalent. First operand 551 states. Second operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:22,348 INFO L74 IsIncluded]: Start isIncluded. First operand 551 states. Second operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:22,349 INFO L87 Difference]: Start difference. First operand 551 states. Second operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:22,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:11:22,362 INFO L93 Difference]: Finished difference Result 551 states and 736 transitions. [2022-04-27 22:11:22,362 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 736 transitions. [2022-04-27 22:11:22,362 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:11:22,363 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:11:22,363 INFO L74 IsIncluded]: Start isIncluded. First operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 551 states. [2022-04-27 22:11:22,364 INFO L87 Difference]: Start difference. First operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 551 states. [2022-04-27 22:11:22,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:11:22,377 INFO L93 Difference]: Finished difference Result 551 states and 736 transitions. [2022-04-27 22:11:22,377 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 736 transitions. [2022-04-27 22:11:22,378 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:11:22,378 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:11:22,378 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:11:22,378 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:11:22,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 372 states, 367 states have (on average 1.457765667574932) internal successors, (535), 367 states have internal predecessors, (535), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:22,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372 states to 372 states and 539 transitions. [2022-04-27 22:11:22,387 INFO L78 Accepts]: Start accepts. Automaton has 372 states and 539 transitions. Word has length 33 [2022-04-27 22:11:22,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:11:22,388 INFO L495 AbstractCegarLoop]: Abstraction has 372 states and 539 transitions. [2022-04-27 22:11:22,388 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.7857142857142858) internal successors, (50), 27 states have internal predecessors, (50), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:22,388 INFO L276 IsEmpty]: Start isEmpty. Operand 372 states and 539 transitions. [2022-04-27 22:11:22,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 22:11:22,389 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:11:22,389 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:11:22,394 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-27 22:11:22,593 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-27 22:11:22,593 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:11:22,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:11:22,593 INFO L85 PathProgramCache]: Analyzing trace with hash 1789844345, now seen corresponding path program 11 times [2022-04-27 22:11:22,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:11:22,593 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067779441] [2022-04-27 22:11:22,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:11:22,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:11:22,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:11:23,237 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:11:23,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:11:23,242 INFO L290 TraceCheckUtils]: 0: Hoare triple {29644#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29623#true} is VALID [2022-04-27 22:11:23,242 INFO L290 TraceCheckUtils]: 1: Hoare triple {29623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:23,243 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {29623#true} {29623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:23,243 INFO L272 TraceCheckUtils]: 0: Hoare triple {29623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29644#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:11:23,243 INFO L290 TraceCheckUtils]: 1: Hoare triple {29644#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29623#true} is VALID [2022-04-27 22:11:23,243 INFO L290 TraceCheckUtils]: 2: Hoare triple {29623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:23,243 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29623#true} {29623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:23,243 INFO L272 TraceCheckUtils]: 4: Hoare triple {29623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:23,244 INFO L290 TraceCheckUtils]: 5: Hoare triple {29623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {29628#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:11:23,245 INFO L290 TraceCheckUtils]: 6: Hoare triple {29628#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29629#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:23,248 INFO L290 TraceCheckUtils]: 7: Hoare triple {29629#(and (<= main_~x~0 (+ 4294967294 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= (+ main_~x~0 1) main_~n~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29630#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} is VALID [2022-04-27 22:11:23,983 INFO L290 TraceCheckUtils]: 8: Hoare triple {29630#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~y~0 2) (<= main_~x~0 (+ (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4294967293)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29631#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} is VALID [2022-04-27 22:11:24,034 INFO L290 TraceCheckUtils]: 9: Hoare triple {29631#(and (<= main_~y~0 3) (<= (+ main_~x~0 3) main_~n~0) (<= main_~x~0 (+ 4294967292 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29632#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:11:24,036 INFO L290 TraceCheckUtils]: 10: Hoare triple {29632#(and (<= main_~x~0 (+ 4294967291 (* (div (+ main_~y~0 main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296) 4294967296))) (<= main_~y~0 4) (<= (+ main_~x~0 4) main_~n~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29633#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,036 INFO L290 TraceCheckUtils]: 11: Hoare triple {29633#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {29634#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,037 INFO L290 TraceCheckUtils]: 12: Hoare triple {29634#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {29634#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,038 INFO L290 TraceCheckUtils]: 13: Hoare triple {29634#(and (<= (+ 5 (* 4294967296 (div main_~x~0 4294967296))) main_~n~0) (<= main_~n~0 (+ main_~y~0 (* 4294967296 (div main_~x~0 4294967296)))) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,038 INFO L290 TraceCheckUtils]: 14: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,039 INFO L290 TraceCheckUtils]: 15: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,039 INFO L290 TraceCheckUtils]: 16: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,039 INFO L290 TraceCheckUtils]: 17: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,040 INFO L290 TraceCheckUtils]: 18: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:24,040 INFO L290 TraceCheckUtils]: 19: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-27 22:11:24,041 INFO L290 TraceCheckUtils]: 20: Hoare triple {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-27 22:11:24,042 INFO L290 TraceCheckUtils]: 21: Hoare triple {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-27 22:11:24,042 INFO L290 TraceCheckUtils]: 22: Hoare triple {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:24,043 INFO L290 TraceCheckUtils]: 23: Hoare triple {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:11:24,043 INFO L290 TraceCheckUtils]: 24: Hoare triple {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:11:24,044 INFO L290 TraceCheckUtils]: 25: Hoare triple {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:24,045 INFO L290 TraceCheckUtils]: 26: Hoare triple {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-27 22:11:24,045 INFO L290 TraceCheckUtils]: 27: Hoare triple {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-27 22:11:24,046 INFO L290 TraceCheckUtils]: 28: Hoare triple {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-27 22:11:24,048 INFO L290 TraceCheckUtils]: 29: Hoare triple {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:24,049 INFO L290 TraceCheckUtils]: 30: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:24,050 INFO L272 TraceCheckUtils]: 31: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {29642#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:11:24,050 INFO L290 TraceCheckUtils]: 32: Hoare triple {29642#(not (= |__VERIFIER_assert_#in~cond| 0))} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29643#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:11:24,050 INFO L290 TraceCheckUtils]: 33: Hoare triple {29643#(not (= __VERIFIER_assert_~cond 0))} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29624#false} is VALID [2022-04-27 22:11:24,050 INFO L290 TraceCheckUtils]: 34: Hoare triple {29624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29624#false} is VALID [2022-04-27 22:11:24,051 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:11:24,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:11:24,051 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067779441] [2022-04-27 22:11:24,051 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2067779441] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:11:24,051 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [838517047] [2022-04-27 22:11:24,051 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:11:24,051 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:11:24,051 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:11:24,052 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:11:24,052 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-27 22:11:24,285 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:11:24,285 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:11:24,287 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 48 conjunts are in the unsatisfiable core [2022-04-27 22:11:24,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:11:24,299 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:11:25,098 INFO L272 TraceCheckUtils]: 0: Hoare triple {29623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:25,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {29623#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29623#true} is VALID [2022-04-27 22:11:25,098 INFO L290 TraceCheckUtils]: 2: Hoare triple {29623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:25,098 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29623#true} {29623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:25,098 INFO L272 TraceCheckUtils]: 4: Hoare triple {29623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:25,099 INFO L290 TraceCheckUtils]: 5: Hoare triple {29623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {29628#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} is VALID [2022-04-27 22:11:25,099 INFO L290 TraceCheckUtils]: 6: Hoare triple {29628#(and (= 0 (+ main_~x~0 (* (- 1) main_~n~0))) (= main_~y~0 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29666#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} is VALID [2022-04-27 22:11:25,100 INFO L290 TraceCheckUtils]: 7: Hoare triple {29666#(and (= (+ main_~x~0 1) main_~n~0) (= (+ (- 1) main_~y~0) 0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29670#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:11:25,100 INFO L290 TraceCheckUtils]: 8: Hoare triple {29670#(and (= (+ (- 2) main_~y~0) 0) (= main_~n~0 (+ main_~x~0 2)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29674#(and (= (+ main_~x~0 3) main_~n~0) (= main_~y~0 3))} is VALID [2022-04-27 22:11:25,101 INFO L290 TraceCheckUtils]: 9: Hoare triple {29674#(and (= (+ main_~x~0 3) main_~n~0) (= main_~y~0 3))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29678#(and (= 3 (+ (- 1) main_~y~0)) (= (+ main_~n~0 (- 3)) (+ main_~x~0 1)))} is VALID [2022-04-27 22:11:25,102 INFO L290 TraceCheckUtils]: 10: Hoare triple {29678#(and (= 3 (+ (- 1) main_~y~0)) (= (+ main_~n~0 (- 3)) (+ main_~x~0 1)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29633#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,102 INFO L290 TraceCheckUtils]: 11: Hoare triple {29633#(and (<= (+ 5 main_~x~0) main_~n~0) (<= main_~n~0 (+ main_~y~0 main_~x~0)) (<= main_~y~0 5))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,103 INFO L290 TraceCheckUtils]: 12: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,103 INFO L290 TraceCheckUtils]: 13: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,105 INFO L290 TraceCheckUtils]: 14: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,105 INFO L290 TraceCheckUtils]: 15: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,105 INFO L290 TraceCheckUtils]: 16: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,106 INFO L290 TraceCheckUtils]: 17: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,106 INFO L290 TraceCheckUtils]: 18: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,107 INFO L290 TraceCheckUtils]: 19: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-27 22:11:25,108 INFO L290 TraceCheckUtils]: 20: Hoare triple {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-27 22:11:25,108 INFO L290 TraceCheckUtils]: 21: Hoare triple {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-27 22:11:25,109 INFO L290 TraceCheckUtils]: 22: Hoare triple {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:25,110 INFO L290 TraceCheckUtils]: 23: Hoare triple {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:11:25,110 INFO L290 TraceCheckUtils]: 24: Hoare triple {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} is VALID [2022-04-27 22:11:25,111 INFO L290 TraceCheckUtils]: 25: Hoare triple {29640#(and (<= main_~y~0 0) (<= main_~n~0 (+ 5 (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:25,111 INFO L290 TraceCheckUtils]: 26: Hoare triple {29639#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 4)) (<= main_~y~0 1))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} is VALID [2022-04-27 22:11:25,112 INFO L290 TraceCheckUtils]: 27: Hoare triple {29638#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 3)) (<= main_~y~0 2))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} is VALID [2022-04-27 22:11:25,113 INFO L290 TraceCheckUtils]: 28: Hoare triple {29637#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 2)) (<= main_~y~0 3))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} is VALID [2022-04-27 22:11:25,113 INFO L290 TraceCheckUtils]: 29: Hoare triple {29636#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0 1)) (<= main_~y~0 4))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,114 INFO L290 TraceCheckUtils]: 30: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:25,115 INFO L272 TraceCheckUtils]: 31: Hoare triple {29635#(and (<= main_~n~0 (+ (* (div (+ main_~n~0 (- 5)) 4294967296) 4294967296) main_~y~0)) (<= main_~y~0 5))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {29745#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:11:25,116 INFO L290 TraceCheckUtils]: 32: Hoare triple {29745#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29749#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:11:25,116 INFO L290 TraceCheckUtils]: 33: Hoare triple {29749#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29624#false} is VALID [2022-04-27 22:11:25,116 INFO L290 TraceCheckUtils]: 34: Hoare triple {29624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29624#false} is VALID [2022-04-27 22:11:25,116 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:11:25,117 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:11:26,716 INFO L290 TraceCheckUtils]: 34: Hoare triple {29624#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29624#false} is VALID [2022-04-27 22:11:26,717 INFO L290 TraceCheckUtils]: 33: Hoare triple {29749#(<= 1 __VERIFIER_assert_~cond)} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {29624#false} is VALID [2022-04-27 22:11:26,717 INFO L290 TraceCheckUtils]: 32: Hoare triple {29745#(<= 1 |__VERIFIER_assert_#in~cond|)} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {29749#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:11:26,718 INFO L272 TraceCheckUtils]: 31: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {29745#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:11:26,719 INFO L290 TraceCheckUtils]: 30: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,719 INFO L290 TraceCheckUtils]: 29: Hoare triple {29771#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,720 INFO L290 TraceCheckUtils]: 28: Hoare triple {29775#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29771#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:11:26,721 INFO L290 TraceCheckUtils]: 27: Hoare triple {29779#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29775#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,722 INFO L290 TraceCheckUtils]: 26: Hoare triple {29783#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29779#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} is VALID [2022-04-27 22:11:26,723 INFO L290 TraceCheckUtils]: 25: Hoare triple {29787#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {29783#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} is VALID [2022-04-27 22:11:26,726 INFO L290 TraceCheckUtils]: 24: Hoare triple {29787#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {29787#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:11:26,727 INFO L290 TraceCheckUtils]: 23: Hoare triple {29783#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29787#(and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:11:26,728 INFO L290 TraceCheckUtils]: 22: Hoare triple {29779#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29783#(and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296)))))} is VALID [2022-04-27 22:11:26,730 INFO L290 TraceCheckUtils]: 21: Hoare triple {29775#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29779#(and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4)))} is VALID [2022-04-27 22:11:26,731 INFO L290 TraceCheckUtils]: 20: Hoare triple {29771#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29775#(and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,731 INFO L290 TraceCheckUtils]: 19: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {29771#(and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:11:26,732 INFO L290 TraceCheckUtils]: 18: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,732 INFO L290 TraceCheckUtils]: 17: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,733 INFO L290 TraceCheckUtils]: 16: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,733 INFO L290 TraceCheckUtils]: 15: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,734 INFO L290 TraceCheckUtils]: 14: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,734 INFO L290 TraceCheckUtils]: 13: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,735 INFO L290 TraceCheckUtils]: 12: Hoare triple {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,735 INFO L290 TraceCheckUtils]: 11: Hoare triple {29830#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {29641#(and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:11:26,738 INFO L290 TraceCheckUtils]: 10: Hoare triple {29834#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29830#(or (< 0 (mod main_~x~0 4294967296)) (and (< (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1)) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div main_~y~0 4294967296) 4294967296) main_~n~0))))} is VALID [2022-04-27 22:11:26,739 INFO L290 TraceCheckUtils]: 9: Hoare triple {29838#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29834#(or (< 0 (mod (+ main_~x~0 4294967295) 4294967296)) (and (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 1) 4294967296) 4294967296)) (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:11:26,740 INFO L290 TraceCheckUtils]: 8: Hoare triple {29842#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29838#(or (and (< (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ main_~y~0 2) 4294967296) 4294967296) main_~n~0))) (< 0 (mod (+ main_~x~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:11:26,742 INFO L290 TraceCheckUtils]: 7: Hoare triple {29846#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29842#(or (and (<= (+ main_~y~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~y~0 3) 4294967296) 4294967296)) (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4))) (< 0 (mod (+ main_~x~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:11:26,743 INFO L290 TraceCheckUtils]: 6: Hoare triple {29850#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {29846#(or (and (< (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))) (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~y~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ main_~n~0 (* 4294967296 (div (+ main_~y~0 4) 4294967296))))) (< 0 (mod (+ 4294967292 main_~x~0) 4294967296)))} is VALID [2022-04-27 22:11:26,744 INFO L290 TraceCheckUtils]: 5: Hoare triple {29623#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {29850#(or (< 0 (mod (+ 4294967291 main_~x~0) 4294967296)) (and (<= (+ 5 main_~y~0 (* (div main_~n~0 4294967296) 4294967296)) (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0)) (< (+ (* (div (+ 5 main_~y~0) 4294967296) 4294967296) main_~n~0) (+ main_~y~0 6 (* (div main_~n~0 4294967296) 4294967296)))))} is VALID [2022-04-27 22:11:26,744 INFO L272 TraceCheckUtils]: 4: Hoare triple {29623#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:26,744 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {29623#true} {29623#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:26,744 INFO L290 TraceCheckUtils]: 2: Hoare triple {29623#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:26,744 INFO L290 TraceCheckUtils]: 1: Hoare triple {29623#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {29623#true} is VALID [2022-04-27 22:11:26,744 INFO L272 TraceCheckUtils]: 0: Hoare triple {29623#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {29623#true} is VALID [2022-04-27 22:11:26,745 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:11:26,745 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [838517047] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:11:26,745 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:11:26,745 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 16, 16] total 36 [2022-04-27 22:11:26,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1490541403] [2022-04-27 22:11:26,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:11:26,745 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:11:26,746 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:11:26,746 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:26,885 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 68 edges. 68 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:11:26,886 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-04-27 22:11:26,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:11:26,886 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-04-27 22:11:26,886 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1104, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 22:11:26,887 INFO L87 Difference]: Start difference. First operand 372 states and 539 transitions. Second operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:51,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:11:51,224 INFO L93 Difference]: Finished difference Result 570 states and 736 transitions. [2022-04-27 22:11:51,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-04-27 22:11:51,224 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:11:51,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:11:51,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:51,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 86 transitions. [2022-04-27 22:11:51,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:51,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 86 transitions. [2022-04-27 22:11:51,226 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 45 states and 86 transitions. [2022-04-27 22:11:51,807 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:11:51,818 INFO L225 Difference]: With dead ends: 570 [2022-04-27 22:11:51,818 INFO L226 Difference]: Without dead ends: 546 [2022-04-27 22:11:51,819 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 54 SyntacticMatches, 5 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1117 ImplicationChecksByTransitivity, 19.7s TimeCoverageRelationStatistics Valid=630, Invalid=5376, Unknown=0, NotChecked=0, Total=6006 [2022-04-27 22:11:51,819 INFO L413 NwaCegarLoop]: 13 mSDtfsCounter, 85 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 720 mSolverCounterSat, 140 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 85 SdHoareTripleChecker+Valid, 105 SdHoareTripleChecker+Invalid, 860 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 140 IncrementalHoareTripleChecker+Valid, 720 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:11:51,819 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [85 Valid, 105 Invalid, 860 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [140 Valid, 720 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2022-04-27 22:11:51,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2022-04-27 22:11:53,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 365. [2022-04-27 22:11:53,752 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:11:53,753 INFO L82 GeneralOperation]: Start isEquivalent. First operand 546 states. Second operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:53,753 INFO L74 IsIncluded]: Start isIncluded. First operand 546 states. Second operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:53,754 INFO L87 Difference]: Start difference. First operand 546 states. Second operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:53,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:11:53,767 INFO L93 Difference]: Finished difference Result 546 states and 712 transitions. [2022-04-27 22:11:53,767 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 712 transitions. [2022-04-27 22:11:53,768 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:11:53,768 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:11:53,769 INFO L74 IsIncluded]: Start isIncluded. First operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 546 states. [2022-04-27 22:11:53,769 INFO L87 Difference]: Start difference. First operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 546 states. [2022-04-27 22:11:53,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:11:53,783 INFO L93 Difference]: Finished difference Result 546 states and 712 transitions. [2022-04-27 22:11:53,783 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 712 transitions. [2022-04-27 22:11:53,783 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:11:53,783 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:11:53,784 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:11:53,784 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:11:53,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 365 states, 360 states have (on average 1.4638888888888888) internal successors, (527), 360 states have internal predecessors, (527), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:53,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 531 transitions. [2022-04-27 22:11:53,792 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 531 transitions. Word has length 35 [2022-04-27 22:11:53,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:11:53,793 INFO L495 AbstractCegarLoop]: Abstraction has 365 states and 531 transitions. [2022-04-27 22:11:53,793 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 1.6944444444444444) internal successors, (61), 33 states have internal predecessors, (61), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:53,793 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 531 transitions. [2022-04-27 22:11:53,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-04-27 22:11:53,793 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:11:53,793 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:11:53,799 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-04-27 22:11:53,998 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-04-27 22:11:53,998 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:11:53,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:11:53,998 INFO L85 PathProgramCache]: Analyzing trace with hash 41612862, now seen corresponding path program 12 times [2022-04-27 22:11:53,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:11:53,998 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634168204] [2022-04-27 22:11:53,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:11:53,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:11:54,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:11:54,216 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:11:54,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:11:54,220 INFO L290 TraceCheckUtils]: 0: Hoare triple {32415#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32398#true} is VALID [2022-04-27 22:11:54,220 INFO L290 TraceCheckUtils]: 1: Hoare triple {32398#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,221 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32398#true} {32398#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,221 INFO L272 TraceCheckUtils]: 0: Hoare triple {32398#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32415#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:11:54,221 INFO L290 TraceCheckUtils]: 1: Hoare triple {32415#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32398#true} is VALID [2022-04-27 22:11:54,221 INFO L290 TraceCheckUtils]: 2: Hoare triple {32398#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,221 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32398#true} {32398#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,221 INFO L272 TraceCheckUtils]: 4: Hoare triple {32398#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,222 INFO L290 TraceCheckUtils]: 5: Hoare triple {32398#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32403#(= main_~y~0 0)} is VALID [2022-04-27 22:11:54,222 INFO L290 TraceCheckUtils]: 6: Hoare triple {32403#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32404#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:54,223 INFO L290 TraceCheckUtils]: 7: Hoare triple {32404#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32405#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:11:54,224 INFO L290 TraceCheckUtils]: 8: Hoare triple {32405#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32406#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:11:54,224 INFO L290 TraceCheckUtils]: 9: Hoare triple {32406#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32407#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:11:54,225 INFO L290 TraceCheckUtils]: 10: Hoare triple {32407#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:54,226 INFO L290 TraceCheckUtils]: 11: Hoare triple {32408#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,226 INFO L290 TraceCheckUtils]: 12: Hoare triple {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,226 INFO L290 TraceCheckUtils]: 13: Hoare triple {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32410#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:11:54,227 INFO L290 TraceCheckUtils]: 14: Hoare triple {32410#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32411#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:11:54,228 INFO L290 TraceCheckUtils]: 15: Hoare triple {32411#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32412#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:11:54,228 INFO L290 TraceCheckUtils]: 16: Hoare triple {32412#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32413#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:11:54,229 INFO L290 TraceCheckUtils]: 17: Hoare triple {32413#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32414#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 18: Hoare triple {32414#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 19: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 20: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 21: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 22: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 23: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 24: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 25: Hoare triple {32399#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 26: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 27: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 28: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,230 INFO L290 TraceCheckUtils]: 29: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,231 INFO L290 TraceCheckUtils]: 30: Hoare triple {32399#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,231 INFO L272 TraceCheckUtils]: 31: Hoare triple {32399#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {32399#false} is VALID [2022-04-27 22:11:54,231 INFO L290 TraceCheckUtils]: 32: Hoare triple {32399#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32399#false} is VALID [2022-04-27 22:11:54,231 INFO L290 TraceCheckUtils]: 33: Hoare triple {32399#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,231 INFO L290 TraceCheckUtils]: 34: Hoare triple {32399#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,231 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-27 22:11:54,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:11:54,231 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634168204] [2022-04-27 22:11:54,231 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1634168204] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:11:54,231 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1453354459] [2022-04-27 22:11:54,231 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:11:54,232 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:11:54,232 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:11:54,233 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:11:54,234 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-04-27 22:11:54,309 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-27 22:11:54,309 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:11:54,310 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 34 conjunts are in the unsatisfiable core [2022-04-27 22:11:54,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:11:54,322 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:11:54,616 INFO L272 TraceCheckUtils]: 0: Hoare triple {32398#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,617 INFO L290 TraceCheckUtils]: 1: Hoare triple {32398#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32398#true} is VALID [2022-04-27 22:11:54,617 INFO L290 TraceCheckUtils]: 2: Hoare triple {32398#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,617 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32398#true} {32398#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,617 INFO L272 TraceCheckUtils]: 4: Hoare triple {32398#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:54,617 INFO L290 TraceCheckUtils]: 5: Hoare triple {32398#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32403#(= main_~y~0 0)} is VALID [2022-04-27 22:11:54,618 INFO L290 TraceCheckUtils]: 6: Hoare triple {32403#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32404#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:11:54,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {32404#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32405#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:11:54,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {32405#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32406#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:11:54,620 INFO L290 TraceCheckUtils]: 9: Hoare triple {32406#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32407#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:11:54,621 INFO L290 TraceCheckUtils]: 10: Hoare triple {32407#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32408#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:11:54,621 INFO L290 TraceCheckUtils]: 11: Hoare triple {32408#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,622 INFO L290 TraceCheckUtils]: 12: Hoare triple {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,622 INFO L290 TraceCheckUtils]: 13: Hoare triple {32409#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32458#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,623 INFO L290 TraceCheckUtils]: 14: Hoare triple {32458#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32462#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:11:54,624 INFO L290 TraceCheckUtils]: 15: Hoare triple {32462#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32466#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,624 INFO L290 TraceCheckUtils]: 16: Hoare triple {32466#(and (<= main_~y~0 6) (= (+ main_~z~0 1) (+ (- 1) main_~y~0)) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32470#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,625 INFO L290 TraceCheckUtils]: 17: Hoare triple {32470#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32474#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 18: Hoare triple {32474#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 19: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 20: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 21: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 22: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 23: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,626 INFO L290 TraceCheckUtils]: 24: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 25: Hoare triple {32399#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 26: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 27: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 28: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 29: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 30: Hoare triple {32399#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L272 TraceCheckUtils]: 31: Hoare triple {32399#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 32: Hoare triple {32399#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 33: Hoare triple {32399#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,627 INFO L290 TraceCheckUtils]: 34: Hoare triple {32399#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:54,628 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2022-04-27 22:11:54,628 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:11:55,017 INFO L290 TraceCheckUtils]: 34: Hoare triple {32399#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 33: Hoare triple {32399#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 32: Hoare triple {32399#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L272 TraceCheckUtils]: 31: Hoare triple {32399#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 30: Hoare triple {32399#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 29: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 28: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 27: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 26: Hoare triple {32399#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 25: Hoare triple {32399#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32399#false} is VALID [2022-04-27 22:11:55,018 INFO L290 TraceCheckUtils]: 24: Hoare triple {32399#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:55,020 INFO L290 TraceCheckUtils]: 23: Hoare triple {32559#(not (< 0 (mod main_~y~0 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32399#false} is VALID [2022-04-27 22:11:55,022 INFO L290 TraceCheckUtils]: 22: Hoare triple {32563#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32559#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:11:55,023 INFO L290 TraceCheckUtils]: 21: Hoare triple {32567#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32563#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:11:55,024 INFO L290 TraceCheckUtils]: 20: Hoare triple {32571#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32567#(not (< 0 (mod (+ main_~y~0 4294967294) 4294967296)))} is VALID [2022-04-27 22:11:55,024 INFO L290 TraceCheckUtils]: 19: Hoare triple {32575#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32571#(not (< 0 (mod (+ main_~y~0 4294967293) 4294967296)))} is VALID [2022-04-27 22:11:55,025 INFO L290 TraceCheckUtils]: 18: Hoare triple {32579#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32575#(not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:11:55,026 INFO L290 TraceCheckUtils]: 17: Hoare triple {32583#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32579#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:11:55,027 INFO L290 TraceCheckUtils]: 16: Hoare triple {32587#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32583#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:11:55,028 INFO L290 TraceCheckUtils]: 15: Hoare triple {32591#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32587#(or (< 0 (mod (+ main_~z~0 4294967294) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:11:55,029 INFO L290 TraceCheckUtils]: 14: Hoare triple {32595#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32591#(or (< 0 (mod (+ main_~z~0 4294967293) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 13: Hoare triple {32398#true} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32595#(or (< 0 (mod (+ 4294967292 main_~z~0) 4294967296)) (not (< 0 (mod (+ 4294967292 main_~y~0) 4294967296))))} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 12: Hoare triple {32398#true} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 11: Hoare triple {32398#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 10: Hoare triple {32398#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 9: Hoare triple {32398#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 8: Hoare triple {32398#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 7: Hoare triple {32398#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 6: Hoare triple {32398#true} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 5: Hoare triple {32398#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L272 TraceCheckUtils]: 4: Hoare triple {32398#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32398#true} {32398#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 2: Hoare triple {32398#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L290 TraceCheckUtils]: 1: Hoare triple {32398#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32398#true} is VALID [2022-04-27 22:11:55,030 INFO L272 TraceCheckUtils]: 0: Hoare triple {32398#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32398#true} is VALID [2022-04-27 22:11:55,031 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2022-04-27 22:11:55,031 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1453354459] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:11:55,031 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:11:55,031 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 12] total 30 [2022-04-27 22:11:55,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [150658833] [2022-04-27 22:11:55,031 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:11:55,031 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:11:55,032 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:11:55,032 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:11:55,066 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:11:55,066 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 22:11:55,066 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:11:55,066 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 22:11:55,067 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=738, Unknown=0, NotChecked=0, Total=870 [2022-04-27 22:11:55,067 INFO L87 Difference]: Start difference. First operand 365 states and 531 transitions. Second operand has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:01,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:12:01,891 INFO L93 Difference]: Finished difference Result 559 states and 741 transitions. [2022-04-27 22:12:01,891 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-04-27 22:12:01,891 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 35 [2022-04-27 22:12:01,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:12:01,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:01,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 128 transitions. [2022-04-27 22:12:01,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:01,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 128 transitions. [2022-04-27 22:12:01,894 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 37 states and 128 transitions. [2022-04-27 22:12:02,030 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 128 edges. 128 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:12:02,039 INFO L225 Difference]: With dead ends: 559 [2022-04-27 22:12:02,039 INFO L226 Difference]: Without dead ends: 475 [2022-04-27 22:12:02,040 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 64 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 790 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=486, Invalid=3546, Unknown=0, NotChecked=0, Total=4032 [2022-04-27 22:12:02,040 INFO L413 NwaCegarLoop]: 38 mSDtfsCounter, 67 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 1092 mSolverCounterSat, 119 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 67 SdHoareTripleChecker+Valid, 115 SdHoareTripleChecker+Invalid, 1211 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 119 IncrementalHoareTripleChecker+Valid, 1092 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:12:02,041 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [67 Valid, 115 Invalid, 1211 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [119 Valid, 1092 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-04-27 22:12:02,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 475 states. [2022-04-27 22:12:03,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 475 to 347. [2022-04-27 22:12:03,907 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:12:03,908 INFO L82 GeneralOperation]: Start isEquivalent. First operand 475 states. Second operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:03,908 INFO L74 IsIncluded]: Start isIncluded. First operand 475 states. Second operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:03,909 INFO L87 Difference]: Start difference. First operand 475 states. Second operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:03,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:12:03,919 INFO L93 Difference]: Finished difference Result 475 states and 641 transitions. [2022-04-27 22:12:03,919 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 641 transitions. [2022-04-27 22:12:03,920 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:12:03,920 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:12:03,920 INFO L74 IsIncluded]: Start isIncluded. First operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 475 states. [2022-04-27 22:12:03,920 INFO L87 Difference]: Start difference. First operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 475 states. [2022-04-27 22:12:03,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:12:03,931 INFO L93 Difference]: Finished difference Result 475 states and 641 transitions. [2022-04-27 22:12:03,931 INFO L276 IsEmpty]: Start isEmpty. Operand 475 states and 641 transitions. [2022-04-27 22:12:03,931 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:12:03,931 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:12:03,931 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:12:03,931 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:12:03,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 347 states, 342 states have (on average 1.4415204678362572) internal successors, (493), 342 states have internal predecessors, (493), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:03,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 497 transitions. [2022-04-27 22:12:03,940 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 497 transitions. Word has length 35 [2022-04-27 22:12:03,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:12:03,940 INFO L495 AbstractCegarLoop]: Abstraction has 347 states and 497 transitions. [2022-04-27 22:12:03,940 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.4666666666666666) internal successors, (44), 29 states have internal predecessors, (44), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:03,940 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 497 transitions. [2022-04-27 22:12:03,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 22:12:03,941 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:12:03,941 INFO L195 NwaCegarLoop]: trace histogram [15, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:12:03,965 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-04-27 22:12:04,159 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-27 22:12:04,159 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:12:04,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:12:04,160 INFO L85 PathProgramCache]: Analyzing trace with hash 1019189925, now seen corresponding path program 13 times [2022-04-27 22:12:04,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:12:04,160 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701691940] [2022-04-27 22:12:04,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:12:04,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:12:04,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:12:04,550 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:12:04,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:12:04,558 INFO L290 TraceCheckUtils]: 0: Hoare triple {35021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {34997#true} is VALID [2022-04-27 22:12:04,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {34997#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,559 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {34997#true} {34997#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,559 INFO L272 TraceCheckUtils]: 0: Hoare triple {34997#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {35021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:12:04,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {35021#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {34997#true} is VALID [2022-04-27 22:12:04,559 INFO L290 TraceCheckUtils]: 2: Hoare triple {34997#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,559 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34997#true} {34997#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,559 INFO L272 TraceCheckUtils]: 4: Hoare triple {34997#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,560 INFO L290 TraceCheckUtils]: 5: Hoare triple {34997#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35002#(= main_~y~0 0)} is VALID [2022-04-27 22:12:04,560 INFO L290 TraceCheckUtils]: 6: Hoare triple {35002#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35003#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:12:04,561 INFO L290 TraceCheckUtils]: 7: Hoare triple {35003#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35004#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:12:04,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {35004#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35005#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:12:04,562 INFO L290 TraceCheckUtils]: 9: Hoare triple {35005#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35006#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:12:04,562 INFO L290 TraceCheckUtils]: 10: Hoare triple {35006#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35007#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:12:04,563 INFO L290 TraceCheckUtils]: 11: Hoare triple {35007#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35008#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:12:04,563 INFO L290 TraceCheckUtils]: 12: Hoare triple {35008#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35009#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:12:04,564 INFO L290 TraceCheckUtils]: 13: Hoare triple {35009#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35010#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:12:04,564 INFO L290 TraceCheckUtils]: 14: Hoare triple {35010#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35011#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:12:04,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {35011#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35012#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:12:04,565 INFO L290 TraceCheckUtils]: 16: Hoare triple {35012#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35013#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:12:04,566 INFO L290 TraceCheckUtils]: 17: Hoare triple {35013#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35014#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:12:04,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {35014#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35015#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:12:04,567 INFO L290 TraceCheckUtils]: 19: Hoare triple {35015#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35016#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:12:04,568 INFO L290 TraceCheckUtils]: 20: Hoare triple {35016#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:12:04,568 INFO L290 TraceCheckUtils]: 21: Hoare triple {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:12:04,568 INFO L290 TraceCheckUtils]: 22: Hoare triple {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {35018#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:12:04,569 INFO L290 TraceCheckUtils]: 23: Hoare triple {35018#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35019#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:12:04,569 INFO L290 TraceCheckUtils]: 24: Hoare triple {35019#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35020#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 25: Hoare triple {35020#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 26: Hoare triple {34998#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 27: Hoare triple {34998#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 28: Hoare triple {34998#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 29: Hoare triple {34998#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 30: Hoare triple {34998#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 31: Hoare triple {34998#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L272 TraceCheckUtils]: 32: Hoare triple {34998#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 33: Hoare triple {34998#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 34: Hoare triple {34998#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,570 INFO L290 TraceCheckUtils]: 35: Hoare triple {34998#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,571 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:12:04,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:12:04,571 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701691940] [2022-04-27 22:12:04,571 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [701691940] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:12:04,571 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1183707607] [2022-04-27 22:12:04,571 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:12:04,571 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:12:04,571 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:12:04,573 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:12:04,574 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-04-27 22:12:04,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:12:04,623 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 39 conjunts are in the unsatisfiable core [2022-04-27 22:12:04,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:12:04,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:12:04,919 INFO L272 TraceCheckUtils]: 0: Hoare triple {34997#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,920 INFO L290 TraceCheckUtils]: 1: Hoare triple {34997#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {34997#true} is VALID [2022-04-27 22:12:04,920 INFO L290 TraceCheckUtils]: 2: Hoare triple {34997#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,920 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34997#true} {34997#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,920 INFO L272 TraceCheckUtils]: 4: Hoare triple {34997#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:04,920 INFO L290 TraceCheckUtils]: 5: Hoare triple {34997#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35002#(= main_~y~0 0)} is VALID [2022-04-27 22:12:04,921 INFO L290 TraceCheckUtils]: 6: Hoare triple {35002#(= main_~y~0 0)} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35003#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:12:04,921 INFO L290 TraceCheckUtils]: 7: Hoare triple {35003#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35004#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:12:04,922 INFO L290 TraceCheckUtils]: 8: Hoare triple {35004#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35005#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:12:04,922 INFO L290 TraceCheckUtils]: 9: Hoare triple {35005#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35006#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:12:04,923 INFO L290 TraceCheckUtils]: 10: Hoare triple {35006#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35007#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:12:04,923 INFO L290 TraceCheckUtils]: 11: Hoare triple {35007#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35008#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:12:04,924 INFO L290 TraceCheckUtils]: 12: Hoare triple {35008#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35009#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:12:04,924 INFO L290 TraceCheckUtils]: 13: Hoare triple {35009#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35010#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:12:04,925 INFO L290 TraceCheckUtils]: 14: Hoare triple {35010#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35011#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:12:04,925 INFO L290 TraceCheckUtils]: 15: Hoare triple {35011#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35012#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:12:04,926 INFO L290 TraceCheckUtils]: 16: Hoare triple {35012#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35013#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:12:04,927 INFO L290 TraceCheckUtils]: 17: Hoare triple {35013#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35014#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:12:04,927 INFO L290 TraceCheckUtils]: 18: Hoare triple {35014#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35015#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:12:04,928 INFO L290 TraceCheckUtils]: 19: Hoare triple {35015#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35016#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:12:04,928 INFO L290 TraceCheckUtils]: 20: Hoare triple {35016#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:12:04,929 INFO L290 TraceCheckUtils]: 21: Hoare triple {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:12:04,929 INFO L290 TraceCheckUtils]: 22: Hoare triple {35017#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {35018#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:12:04,929 INFO L290 TraceCheckUtils]: 23: Hoare triple {35018#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35019#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:12:04,930 INFO L290 TraceCheckUtils]: 24: Hoare triple {35019#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35097#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:12:04,930 INFO L290 TraceCheckUtils]: 25: Hoare triple {35097#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 26: Hoare triple {34998#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 27: Hoare triple {34998#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 28: Hoare triple {34998#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 29: Hoare triple {34998#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 30: Hoare triple {34998#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 31: Hoare triple {34998#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L272 TraceCheckUtils]: 32: Hoare triple {34998#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 33: Hoare triple {34998#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 34: Hoare triple {34998#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L290 TraceCheckUtils]: 35: Hoare triple {34998#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:04,931 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:12:04,931 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:12:05,575 INFO L290 TraceCheckUtils]: 35: Hoare triple {34998#false} [100] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:05,575 INFO L290 TraceCheckUtils]: 34: Hoare triple {34998#false} [98] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_3 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_3} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:05,575 INFO L290 TraceCheckUtils]: 33: Hoare triple {34998#false} [96] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_2 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {34998#false} is VALID [2022-04-27 22:12:05,575 INFO L272 TraceCheckUtils]: 32: Hoare triple {34998#false} [94] L35-2-->__VERIFIER_assertENTRY: Formula: (= |v___VERIFIER_assert_#in~condInParam_1| (ite (= (mod v_main_~n~0_3 4294967296) (mod v_main_~y~0_11 4294967296)) 1 0)) InVars {main_~y~0=v_main_~y~0_11, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~y~0, main_~n~0] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 31: Hoare triple {34998#false} [92] L35-1-->L35-2: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 30: Hoare triple {34998#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 29: Hoare triple {34998#false} [93] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 28: Hoare triple {34998#false} [89] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 27: Hoare triple {34998#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 26: Hoare triple {34998#false} [90] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {34998#false} is VALID [2022-04-27 22:12:05,576 INFO L290 TraceCheckUtils]: 25: Hoare triple {35161#(< 0 (mod main_~z~0 4294967296))} [86] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {34998#false} is VALID [2022-04-27 22:12:05,577 INFO L290 TraceCheckUtils]: 24: Hoare triple {35165#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35161#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:12:05,578 INFO L290 TraceCheckUtils]: 23: Hoare triple {35169#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [87] L23-2-->L23-2: Formula: (and (= v_main_~z~0_7 (+ v_main_~z~0_6 1)) (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (< 0 (mod v_main_~z~0_7 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_7} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_6, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {35165#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:12:05,578 INFO L290 TraceCheckUtils]: 22: Hoare triple {35173#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [84] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {35169#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:12:05,579 INFO L290 TraceCheckUtils]: 21: Hoare triple {35173#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [82] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {35173#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:12:05,579 INFO L290 TraceCheckUtils]: 20: Hoare triple {35180#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35173#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:12:05,580 INFO L290 TraceCheckUtils]: 19: Hoare triple {35184#(< 0 (mod main_~y~0 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35180#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:12:05,581 INFO L290 TraceCheckUtils]: 18: Hoare triple {35188#(< 0 (mod (+ main_~y~0 1) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35184#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:12:05,581 INFO L290 TraceCheckUtils]: 17: Hoare triple {35192#(< 0 (mod (+ main_~y~0 2) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35188#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:12:05,582 INFO L290 TraceCheckUtils]: 16: Hoare triple {35196#(< 0 (mod (+ main_~y~0 3) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35192#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:12:05,583 INFO L290 TraceCheckUtils]: 15: Hoare triple {35200#(< 0 (mod (+ main_~y~0 4) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35196#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:12:05,583 INFO L290 TraceCheckUtils]: 14: Hoare triple {35204#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35200#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:12:05,584 INFO L290 TraceCheckUtils]: 13: Hoare triple {35208#(< 0 (mod (+ main_~y~0 6) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35204#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:12:05,585 INFO L290 TraceCheckUtils]: 12: Hoare triple {35212#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35208#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:12:05,585 INFO L290 TraceCheckUtils]: 11: Hoare triple {35216#(< 0 (mod (+ main_~y~0 8) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35212#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:12:05,586 INFO L290 TraceCheckUtils]: 10: Hoare triple {35220#(< 0 (mod (+ main_~y~0 9) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35216#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:12:05,587 INFO L290 TraceCheckUtils]: 9: Hoare triple {35224#(< 0 (mod (+ main_~y~0 10) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35220#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:12:05,587 INFO L290 TraceCheckUtils]: 8: Hoare triple {35228#(< 0 (mod (+ main_~y~0 11) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35224#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:12:05,588 INFO L290 TraceCheckUtils]: 7: Hoare triple {35232#(< 0 (mod (+ main_~y~0 12) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35228#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:12:05,589 INFO L290 TraceCheckUtils]: 6: Hoare triple {35236#(< 0 (mod (+ main_~y~0 13) 4294967296))} [83] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {35232#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:12:05,589 INFO L290 TraceCheckUtils]: 5: Hoare triple {34997#true} [79] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {35236#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:12:05,589 INFO L272 TraceCheckUtils]: 4: Hoare triple {34997#true} [76] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:05,589 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {34997#true} {34997#true} [103] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:05,589 INFO L290 TraceCheckUtils]: 2: Hoare triple {34997#true} [80] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:05,589 INFO L290 TraceCheckUtils]: 1: Hoare triple {34997#true} [77] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {34997#true} is VALID [2022-04-27 22:12:05,590 INFO L272 TraceCheckUtils]: 0: Hoare triple {34997#true} [75] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {34997#true} is VALID [2022-04-27 22:12:05,590 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:12:05,590 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1183707607] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:12:05,590 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:12:05,590 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-27 22:12:05,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [500150609] [2022-04-27 22:12:05,590 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:12:05,591 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:12:05,591 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:12:05,591 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:05,634 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 59 edges. 59 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:12:05,634 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-27 22:12:05,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:12:05,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-27 22:12:05,635 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1373, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:12:05,635 INFO L87 Difference]: Start difference. First operand 347 states and 497 transitions. Second operand has 42 states, 42 states have (on average 1.2857142857142858) internal successors, (54), 41 states have internal predecessors, (54), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:12:23,987 WARN L232 SmtUtils]: Spent 7.25s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:02,135 WARN L232 SmtUtils]: Spent 17.27s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:13,730 WARN L232 SmtUtils]: Spent 5.15s on a formula simplification that was a NOOP. DAG size: 64 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:36,103 WARN L232 SmtUtils]: Spent 12.06s on a formula simplification that was a NOOP. DAG size: 78 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:01,269 WARN L232 SmtUtils]: Spent 14.88s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:29,123 WARN L232 SmtUtils]: Spent 12.65s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:45,271 WARN L232 SmtUtils]: Spent 10.56s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:55,732 WARN L232 SmtUtils]: Spent 6.62s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:15:10,638 WARN L232 SmtUtils]: Spent 5.41s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:15:25,484 WARN L232 SmtUtils]: Spent 5.54s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:15:41,655 WARN L232 SmtUtils]: Spent 8.37s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:16:13,258 WARN L232 SmtUtils]: Spent 17.83s on a formula simplification that was a NOOP. DAG size: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:16:23,834 WARN L232 SmtUtils]: Spent 7.73s on a formula simplification that was a NOOP. DAG size: 67 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)