/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-fb4f59a-m [2022-04-27 22:04:47,069 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-27 22:04:47,070 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-27 22:04:47,092 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-27 22:04:47,093 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-27 22:04:47,094 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-27 22:04:47,095 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-27 22:04:47,096 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-27 22:04:47,098 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-27 22:04:47,098 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-27 22:04:47,099 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-27 22:04:47,100 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-27 22:04:47,100 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-27 22:04:47,101 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-27 22:04:47,102 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-27 22:04:47,103 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-27 22:04:47,103 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-27 22:04:47,104 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-27 22:04:47,105 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-27 22:04:47,107 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-27 22:04:47,108 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-27 22:04:47,109 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-27 22:04:47,109 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-27 22:04:47,110 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-27 22:04:47,111 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-27 22:04:47,113 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-27 22:04:47,113 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-27 22:04:47,114 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-27 22:04:47,114 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-27 22:04:47,114 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-27 22:04:47,115 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-27 22:04:47,115 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-27 22:04:47,116 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-27 22:04:47,117 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-27 22:04:47,117 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-27 22:04:47,118 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-27 22:04:47,118 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-27 22:04:47,119 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-27 22:04:47,119 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-27 22:04:47,119 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-27 22:04:47,120 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-27 22:04:47,123 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-27 22:04:47,124 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/loopacceleration/qvasr/qvasr_64.epf [2022-04-27 22:04:47,150 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-27 22:04:47,151 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-27 22:04:47,153 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-04-27 22:04:47,154 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-04-27 22:04:47,154 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * Use SBE=true [2022-04-27 22:04:47,155 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-27 22:04:47,155 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-27 22:04:47,156 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-27 22:04:47,156 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-27 22:04:47,156 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-27 22:04:47,156 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-27 22:04:47,156 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-27 22:04:47,156 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-27 22:04:47,156 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:04:47,157 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-27 22:04:47,157 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-04-27 22:04:47,157 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-04-27 22:04:47,157 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-04-27 22:04:47,157 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-04-27 22:04:47,157 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-27 22:04:47,158 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-04-27 22:04:47,158 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-04-27 22:04:47,158 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-04-27 22:04:47,159 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_QVASR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-27 22:04:47,359 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-27 22:04:47,381 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-27 22:04:47,383 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-27 22:04:47,384 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-27 22:04:47,384 INFO L275 PluginConnector]: CDTParser initialized [2022-04-27 22:04:47,385 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-27 22:04:47,452 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e3a9b0386/a294b2354e9e4c018936845c33e4b0fe/FLAGdf21d9dc8 [2022-04-27 22:04:47,804 INFO L306 CDTParser]: Found 1 translation units. [2022-04-27 22:04:47,805 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c [2022-04-27 22:04:47,809 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e3a9b0386/a294b2354e9e4c018936845c33e4b0fe/FLAGdf21d9dc8 [2022-04-27 22:04:48,251 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/e3a9b0386/a294b2354e9e4c018936845c33e4b0fe [2022-04-27 22:04:48,254 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-27 22:04:48,256 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-04-27 22:04:48,272 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-27 22:04:48,272 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-27 22:04:48,275 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-27 22:04:48,276 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,277 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@458220db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48, skipping insertion in model container [2022-04-27 22:04:48,277 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,282 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-27 22:04:48,291 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-27 22:04:48,508 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-27 22:04:48,534 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:04:48,544 INFO L203 MainTranslator]: Completed pre-run [2022-04-27 22:04:48,558 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de51.c[368,381] [2022-04-27 22:04:48,563 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-27 22:04:48,573 INFO L208 MainTranslator]: Completed translation [2022-04-27 22:04:48,573 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48 WrapperNode [2022-04-27 22:04:48,574 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-27 22:04:48,575 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-27 22:04:48,575 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-27 22:04:48,575 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-27 22:04:48,583 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,583 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,588 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,588 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,595 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,600 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,601 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,603 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-27 22:04:48,604 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-27 22:04:48,604 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-27 22:04:48,604 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-27 22:04:48,605 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,611 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-27 22:04:48,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:48,632 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-27 22:04:48,644 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-27 22:04:48,668 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-27 22:04:48,668 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-27 22:04:48,668 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-27 22:04:48,668 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-04-27 22:04:48,668 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-27 22:04:48,668 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-27 22:04:48,668 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-27 22:04:48,669 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-27 22:04:48,670 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-27 22:04:48,670 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-27 22:04:48,719 INFO L234 CfgBuilder]: Building ICFG [2022-04-27 22:04:48,720 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-27 22:04:48,882 INFO L275 CfgBuilder]: Performing block encoding [2022-04-27 22:04:48,887 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-27 22:04:48,887 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-04-27 22:04:48,889 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:04:48 BoogieIcfgContainer [2022-04-27 22:04:48,889 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-27 22:04:48,890 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-04-27 22:04:48,890 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-04-27 22:04:48,891 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-04-27 22:04:48,893 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:04:48" (1/1) ... [2022-04-27 22:04:48,895 INFO L168 ansformationObserver]: Applying ICFG transformation LOOP_ACCELERATION_QVASR [2022-04-27 22:04:48,920 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:04:48 BasicIcfg [2022-04-27 22:04:48,920 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-04-27 22:04:48,922 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-27 22:04:48,922 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-27 22:04:48,925 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-27 22:04:48,925 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.04 10:04:48" (1/4) ... [2022-04-27 22:04:48,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34f9c5e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:04:48, skipping insertion in model container [2022-04-27 22:04:48,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.04 10:04:48" (2/4) ... [2022-04-27 22:04:48,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34f9c5e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 10:04:48, skipping insertion in model container [2022-04-27 22:04:48,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 10:04:48" (3/4) ... [2022-04-27 22:04:48,927 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@34f9c5e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.04 10:04:48, skipping insertion in model container [2022-04-27 22:04:48,927 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 27.04 10:04:48" (4/4) ... [2022-04-27 22:04:48,928 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de51.cqvasr [2022-04-27 22:04:48,940 INFO L201 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-04-27 22:04:48,940 INFO L160 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-27 22:04:48,981 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-27 22:04:48,987 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@5b47f528, mLbeIndependenceSettings=de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings@31cc799b [2022-04-27 22:04:48,988 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-27 22:04:48,995 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-04-27 22:04:49,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:04:49,001 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:49,002 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:49,002 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:49,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:49,007 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-04-27 22:04:49,015 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:49,015 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101497563] [2022-04-27 22:04:49,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:49,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:49,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:49,164 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:49,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:49,195 INFO L290 TraceCheckUtils]: 0: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-27 22:04:49,195 INFO L290 TraceCheckUtils]: 1: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:04:49,196 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:04:49,197 INFO L272 TraceCheckUtils]: 0: Hoare triple {27#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:49,198 INFO L290 TraceCheckUtils]: 1: Hoare triple {32#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {27#true} is VALID [2022-04-27 22:04:49,198 INFO L290 TraceCheckUtils]: 2: Hoare triple {27#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:04:49,199 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {27#true} {27#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:04:49,199 INFO L272 TraceCheckUtils]: 4: Hoare triple {27#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {27#true} is VALID [2022-04-27 22:04:49,199 INFO L290 TraceCheckUtils]: 5: Hoare triple {27#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {27#true} is VALID [2022-04-27 22:04:49,200 INFO L290 TraceCheckUtils]: 6: Hoare triple {27#true} [92] L16-2-->L16-3: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,200 INFO L290 TraceCheckUtils]: 7: Hoare triple {28#false} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28#false} is VALID [2022-04-27 22:04:49,200 INFO L290 TraceCheckUtils]: 8: Hoare triple {28#false} [96] L23-2-->L29-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,201 INFO L290 TraceCheckUtils]: 9: Hoare triple {28#false} [99] L29-1-->L35-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,201 INFO L290 TraceCheckUtils]: 10: Hoare triple {28#false} [102] L35-1-->L41-1: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,201 INFO L290 TraceCheckUtils]: 11: Hoare triple {28#false} [105] L41-1-->L41-2: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,201 INFO L272 TraceCheckUtils]: 12: Hoare triple {28#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28#false} is VALID [2022-04-27 22:04:49,202 INFO L290 TraceCheckUtils]: 13: Hoare triple {28#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28#false} is VALID [2022-04-27 22:04:49,202 INFO L290 TraceCheckUtils]: 14: Hoare triple {28#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,202 INFO L290 TraceCheckUtils]: 15: Hoare triple {28#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28#false} is VALID [2022-04-27 22:04:49,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:49,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:49,203 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101497563] [2022-04-27 22:04:49,204 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1101497563] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:04:49,204 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:04:49,204 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-27 22:04:49,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [999824242] [2022-04-27 22:04:49,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:04:49,211 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:04:49,213 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:49,216 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,251 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:49,251 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-27 22:04:49,251 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:49,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-27 22:04:49,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:04:49,274 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:49,357 INFO L93 Difference]: Finished difference Result 41 states and 60 transitions. [2022-04-27 22:04:49,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-27 22:04:49,358 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:04:49,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:49,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-27 22:04:49,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 60 transitions. [2022-04-27 22:04:49,371 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 60 transitions. [2022-04-27 22:04:49,456 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 60 edges. 60 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:49,467 INFO L225 Difference]: With dead ends: 41 [2022-04-27 22:04:49,468 INFO L226 Difference]: Without dead ends: 17 [2022-04-27 22:04:49,471 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-04-27 22:04:49,477 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:49,480 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:04:49,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-04-27 22:04:49,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-04-27 22:04:49,508 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:49,509 INFO L82 GeneralOperation]: Start isEquivalent. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,509 INFO L74 IsIncluded]: Start isIncluded. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,510 INFO L87 Difference]: Start difference. First operand 17 states. Second operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:49,516 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-27 22:04:49,516 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-27 22:04:49,516 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:49,516 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:49,517 INFO L74 IsIncluded]: Start isIncluded. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:04:49,517 INFO L87 Difference]: Start difference. First operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 17 states. [2022-04-27 22:04:49,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:49,521 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2022-04-27 22:04:49,521 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-27 22:04:49,521 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:49,522 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:49,523 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:49,523 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:49,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-04-27 22:04:49,537 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-04-27 22:04:49,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:49,537 INFO L495 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-04-27 22:04:49,538 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,538 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-04-27 22:04:49,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-04-27 22:04:49,538 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:49,539 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:49,539 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-27 22:04:49,539 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:49,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:49,540 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-04-27 22:04:49,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:49,540 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583683816] [2022-04-27 22:04:49,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:49,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:49,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:49,743 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:49,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:49,776 INFO L290 TraceCheckUtils]: 0: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-27 22:04:49,776 INFO L290 TraceCheckUtils]: 1: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:04:49,777 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:04:49,779 INFO L272 TraceCheckUtils]: 0: Hoare triple {146#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:49,780 INFO L290 TraceCheckUtils]: 1: Hoare triple {154#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {146#true} is VALID [2022-04-27 22:04:49,780 INFO L290 TraceCheckUtils]: 2: Hoare triple {146#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:04:49,780 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {146#true} {146#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:04:49,780 INFO L272 TraceCheckUtils]: 4: Hoare triple {146#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {146#true} is VALID [2022-04-27 22:04:49,781 INFO L290 TraceCheckUtils]: 5: Hoare triple {146#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,782 INFO L290 TraceCheckUtils]: 6: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,782 INFO L290 TraceCheckUtils]: 7: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,783 INFO L290 TraceCheckUtils]: 8: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,783 INFO L290 TraceCheckUtils]: 9: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,784 INFO L290 TraceCheckUtils]: 10: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,784 INFO L290 TraceCheckUtils]: 11: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:49,788 INFO L272 TraceCheckUtils]: 12: Hoare triple {151#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {152#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:04:49,789 INFO L290 TraceCheckUtils]: 13: Hoare triple {152#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {153#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:04:49,790 INFO L290 TraceCheckUtils]: 14: Hoare triple {153#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-27 22:04:49,790 INFO L290 TraceCheckUtils]: 15: Hoare triple {147#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {147#false} is VALID [2022-04-27 22:04:49,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:49,790 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:49,791 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1583683816] [2022-04-27 22:04:49,791 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1583683816] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:04:49,791 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:04:49,791 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-27 22:04:49,791 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843697980] [2022-04-27 22:04:49,791 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:04:49,793 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:04:49,793 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:49,793 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:49,809 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 16 edges. 16 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:49,810 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 22:04:49,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:49,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 22:04:49,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 22:04:49,813 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,012 INFO L93 Difference]: Finished difference Result 28 states and 36 transitions. [2022-04-27 22:04:50,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-27 22:04:50,012 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-04-27 22:04:50,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:50,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-27 22:04:50,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 36 transitions. [2022-04-27 22:04:50,022 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 36 transitions. [2022-04-27 22:04:50,058 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,060 INFO L225 Difference]: With dead ends: 28 [2022-04-27 22:04:50,060 INFO L226 Difference]: Without dead ends: 23 [2022-04-27 22:04:50,062 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-04-27 22:04:50,064 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:50,065 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 31 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:04:50,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2022-04-27 22:04:50,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2022-04-27 22:04:50,073 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:50,074 INFO L82 GeneralOperation]: Start isEquivalent. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,075 INFO L74 IsIncluded]: Start isIncluded. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,076 INFO L87 Difference]: Start difference. First operand 23 states. Second operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,079 INFO L93 Difference]: Finished difference Result 23 states and 31 transitions. [2022-04-27 22:04:50,079 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-27 22:04:50,079 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,079 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,080 INFO L74 IsIncluded]: Start isIncluded. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 22:04:50,080 INFO L87 Difference]: Start difference. First operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 23 states. [2022-04-27 22:04:50,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,083 INFO L93 Difference]: Finished difference Result 23 states and 31 transitions. [2022-04-27 22:04:50,083 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-27 22:04:50,084 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,084 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,084 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:50,084 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:50,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 18 states have (on average 1.5) internal successors, (27), 18 states have internal predecessors, (27), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 31 transitions. [2022-04-27 22:04:50,088 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 31 transitions. Word has length 16 [2022-04-27 22:04:50,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:50,088 INFO L495 AbstractCegarLoop]: Abstraction has 23 states and 31 transitions. [2022-04-27 22:04:50,090 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,090 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 31 transitions. [2022-04-27 22:04:50,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:04:50,091 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:50,091 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:50,091 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-04-27 22:04:50,091 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:50,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:50,092 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-04-27 22:04:50,092 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:50,092 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844387554] [2022-04-27 22:04:50,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:50,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:50,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,141 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:50,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {288#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {282#true} is VALID [2022-04-27 22:04:50,149 INFO L290 TraceCheckUtils]: 1: Hoare triple {282#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-27 22:04:50,149 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {282#true} {282#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-27 22:04:50,149 INFO L272 TraceCheckUtils]: 0: Hoare triple {282#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {288#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:50,150 INFO L290 TraceCheckUtils]: 1: Hoare triple {288#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {282#true} is VALID [2022-04-27 22:04:50,150 INFO L290 TraceCheckUtils]: 2: Hoare triple {282#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-27 22:04:50,150 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {282#true} {282#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-27 22:04:50,150 INFO L272 TraceCheckUtils]: 4: Hoare triple {282#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-27 22:04:50,150 INFO L290 TraceCheckUtils]: 5: Hoare triple {282#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {282#true} is VALID [2022-04-27 22:04:50,151 INFO L290 TraceCheckUtils]: 6: Hoare triple {282#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {282#true} is VALID [2022-04-27 22:04:50,151 INFO L290 TraceCheckUtils]: 7: Hoare triple {282#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {282#true} is VALID [2022-04-27 22:04:50,152 INFO L290 TraceCheckUtils]: 8: Hoare triple {282#true} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-27 22:04:50,152 INFO L290 TraceCheckUtils]: 9: Hoare triple {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-27 22:04:50,153 INFO L290 TraceCheckUtils]: 10: Hoare triple {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} is VALID [2022-04-27 22:04:50,153 INFO L290 TraceCheckUtils]: 11: Hoare triple {287#(<= main_~z~0 (* (div main_~z~0 4294967296) 4294967296))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {283#false} is VALID [2022-04-27 22:04:50,154 INFO L290 TraceCheckUtils]: 12: Hoare triple {283#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {283#false} is VALID [2022-04-27 22:04:50,154 INFO L272 TraceCheckUtils]: 13: Hoare triple {283#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {283#false} is VALID [2022-04-27 22:04:50,154 INFO L290 TraceCheckUtils]: 14: Hoare triple {283#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {283#false} is VALID [2022-04-27 22:04:50,154 INFO L290 TraceCheckUtils]: 15: Hoare triple {283#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {283#false} is VALID [2022-04-27 22:04:50,154 INFO L290 TraceCheckUtils]: 16: Hoare triple {283#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {283#false} is VALID [2022-04-27 22:04:50,155 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:50,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:50,155 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844387554] [2022-04-27 22:04:50,155 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844387554] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:04:50,155 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:04:50,155 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 22:04:50,156 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245448052] [2022-04-27 22:04:50,156 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:04:50,156 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:50,156 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:50,157 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,170 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,170 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:04:50,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:50,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:04:50,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 22:04:50,171 INFO L87 Difference]: Start difference. First operand 23 states and 31 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,261 INFO L93 Difference]: Finished difference Result 35 states and 48 transitions. [2022-04-27 22:04:50,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:04:50,262 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:50,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:50,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-27 22:04:50,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 33 transitions. [2022-04-27 22:04:50,266 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 33 transitions. [2022-04-27 22:04:50,313 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,315 INFO L225 Difference]: With dead ends: 35 [2022-04-27 22:04:50,315 INFO L226 Difference]: Without dead ends: 28 [2022-04-27 22:04:50,318 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:04:50,322 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 21 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 26 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:50,323 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 26 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:04:50,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2022-04-27 22:04:50,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2022-04-27 22:04:50,331 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:50,331 INFO L82 GeneralOperation]: Start isEquivalent. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,331 INFO L74 IsIncluded]: Start isIncluded. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,332 INFO L87 Difference]: Start difference. First operand 28 states. Second operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,340 INFO L93 Difference]: Finished difference Result 28 states and 39 transitions. [2022-04-27 22:04:50,340 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 39 transitions. [2022-04-27 22:04:50,340 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,340 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,341 INFO L74 IsIncluded]: Start isIncluded. First operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-27 22:04:50,342 INFO L87 Difference]: Start difference. First operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 28 states. [2022-04-27 22:04:50,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,344 INFO L93 Difference]: Finished difference Result 28 states and 39 transitions. [2022-04-27 22:04:50,344 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 39 transitions. [2022-04-27 22:04:50,345 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,345 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,345 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:50,345 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:50,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 23 states have (on average 1.5217391304347827) internal successors, (35), 23 states have internal predecessors, (35), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 39 transitions. [2022-04-27 22:04:50,350 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 39 transitions. Word has length 17 [2022-04-27 22:04:50,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:50,350 INFO L495 AbstractCegarLoop]: Abstraction has 28 states and 39 transitions. [2022-04-27 22:04:50,350 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,351 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 39 transitions. [2022-04-27 22:04:50,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:04:50,352 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:50,352 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:50,353 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-04-27 22:04:50,353 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:50,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:50,353 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-04-27 22:04:50,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:50,354 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445625400] [2022-04-27 22:04:50,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:50,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:50,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,397 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:50,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,403 INFO L290 TraceCheckUtils]: 0: Hoare triple {440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {434#true} is VALID [2022-04-27 22:04:50,404 INFO L290 TraceCheckUtils]: 1: Hoare triple {434#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-27 22:04:50,404 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {434#true} {434#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-27 22:04:50,405 INFO L272 TraceCheckUtils]: 0: Hoare triple {434#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:50,405 INFO L290 TraceCheckUtils]: 1: Hoare triple {440#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {434#true} is VALID [2022-04-27 22:04:50,405 INFO L290 TraceCheckUtils]: 2: Hoare triple {434#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-27 22:04:50,405 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {434#true} {434#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-27 22:04:50,405 INFO L272 TraceCheckUtils]: 4: Hoare triple {434#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {434#true} is VALID [2022-04-27 22:04:50,406 INFO L290 TraceCheckUtils]: 5: Hoare triple {434#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {434#true} is VALID [2022-04-27 22:04:50,406 INFO L290 TraceCheckUtils]: 6: Hoare triple {434#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:04:50,407 INFO L290 TraceCheckUtils]: 7: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:04:50,411 INFO L290 TraceCheckUtils]: 8: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:04:50,412 INFO L290 TraceCheckUtils]: 9: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:04:50,413 INFO L290 TraceCheckUtils]: 10: Hoare triple {439#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {435#false} is VALID [2022-04-27 22:04:50,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {435#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-27 22:04:50,413 INFO L290 TraceCheckUtils]: 12: Hoare triple {435#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-27 22:04:50,413 INFO L272 TraceCheckUtils]: 13: Hoare triple {435#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {435#false} is VALID [2022-04-27 22:04:50,413 INFO L290 TraceCheckUtils]: 14: Hoare triple {435#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {435#false} is VALID [2022-04-27 22:04:50,413 INFO L290 TraceCheckUtils]: 15: Hoare triple {435#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-27 22:04:50,414 INFO L290 TraceCheckUtils]: 16: Hoare triple {435#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {435#false} is VALID [2022-04-27 22:04:50,414 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:50,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:50,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445625400] [2022-04-27 22:04:50,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1445625400] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:04:50,414 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:04:50,415 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-04-27 22:04:50,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906304916] [2022-04-27 22:04:50,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:04:50,415 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:50,415 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:50,416 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,432 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,432 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-04-27 22:04:50,432 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:50,433 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-04-27 22:04:50,433 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-04-27 22:04:50,433 INFO L87 Difference]: Start difference. First operand 28 states and 39 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,547 INFO L93 Difference]: Finished difference Result 44 states and 63 transitions. [2022-04-27 22:04:50,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-04-27 22:04:50,547 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:50,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:50,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 38 transitions. [2022-04-27 22:04:50,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 38 transitions. [2022-04-27 22:04:50,550 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4 states and 38 transitions. [2022-04-27 22:04:50,590 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,591 INFO L225 Difference]: With dead ends: 44 [2022-04-27 22:04:50,591 INFO L226 Difference]: Without dead ends: 34 [2022-04-27 22:04:50,592 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:04:50,592 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 23 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 25 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:50,593 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 25 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:04:50,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-04-27 22:04:50,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 32. [2022-04-27 22:04:50,601 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:50,602 INFO L82 GeneralOperation]: Start isEquivalent. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,602 INFO L74 IsIncluded]: Start isIncluded. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,602 INFO L87 Difference]: Start difference. First operand 34 states. Second operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,604 INFO L93 Difference]: Finished difference Result 34 states and 47 transitions. [2022-04-27 22:04:50,604 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 47 transitions. [2022-04-27 22:04:50,604 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,604 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,605 INFO L74 IsIncluded]: Start isIncluded. First operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 22:04:50,605 INFO L87 Difference]: Start difference. First operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 34 states. [2022-04-27 22:04:50,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,606 INFO L93 Difference]: Finished difference Result 34 states and 47 transitions. [2022-04-27 22:04:50,606 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 47 transitions. [2022-04-27 22:04:50,607 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,607 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,607 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:50,607 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:50,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 27 states have (on average 1.4814814814814814) internal successors, (40), 27 states have internal predecessors, (40), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 44 transitions. [2022-04-27 22:04:50,609 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 44 transitions. Word has length 17 [2022-04-27 22:04:50,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:50,609 INFO L495 AbstractCegarLoop]: Abstraction has 32 states and 44 transitions. [2022-04-27 22:04:50,609 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,609 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 44 transitions. [2022-04-27 22:04:50,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:04:50,610 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:50,610 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:50,610 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-04-27 22:04:50,610 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:50,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:50,610 INFO L85 PathProgramCache]: Analyzing trace with hash -1833749398, now seen corresponding path program 1 times [2022-04-27 22:04:50,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:50,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060445872] [2022-04-27 22:04:50,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:50,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:50,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,649 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:50,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,656 INFO L290 TraceCheckUtils]: 0: Hoare triple {621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {614#true} is VALID [2022-04-27 22:04:50,656 INFO L290 TraceCheckUtils]: 1: Hoare triple {614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-27 22:04:50,656 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {614#true} {614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-27 22:04:50,657 INFO L272 TraceCheckUtils]: 0: Hoare triple {614#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:50,657 INFO L290 TraceCheckUtils]: 1: Hoare triple {621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {614#true} is VALID [2022-04-27 22:04:50,657 INFO L290 TraceCheckUtils]: 2: Hoare triple {614#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-27 22:04:50,657 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {614#true} {614#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-27 22:04:50,658 INFO L272 TraceCheckUtils]: 4: Hoare triple {614#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {614#true} is VALID [2022-04-27 22:04:50,658 INFO L290 TraceCheckUtils]: 5: Hoare triple {614#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {619#(= main_~y~0 0)} is VALID [2022-04-27 22:04:50,658 INFO L290 TraceCheckUtils]: 6: Hoare triple {619#(= main_~y~0 0)} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {619#(= main_~y~0 0)} is VALID [2022-04-27 22:04:50,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {619#(= main_~y~0 0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {620#(= main_~z~0 0)} is VALID [2022-04-27 22:04:50,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {620#(= main_~z~0 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {615#false} is VALID [2022-04-27 22:04:50,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {615#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-27 22:04:50,660 INFO L290 TraceCheckUtils]: 10: Hoare triple {615#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-27 22:04:50,660 INFO L290 TraceCheckUtils]: 11: Hoare triple {615#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-27 22:04:50,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {615#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-27 22:04:50,660 INFO L272 TraceCheckUtils]: 13: Hoare triple {615#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {615#false} is VALID [2022-04-27 22:04:50,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {615#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {615#false} is VALID [2022-04-27 22:04:50,661 INFO L290 TraceCheckUtils]: 15: Hoare triple {615#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-27 22:04:50,661 INFO L290 TraceCheckUtils]: 16: Hoare triple {615#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {615#false} is VALID [2022-04-27 22:04:50,661 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:50,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:50,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060445872] [2022-04-27 22:04:50,662 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060445872] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-27 22:04:50,662 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-27 22:04:50,662 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-27 22:04:50,662 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094630449] [2022-04-27 22:04:50,662 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-27 22:04:50,662 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:50,663 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:50,663 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,676 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 17 edges. 17 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,676 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-27 22:04:50,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:50,677 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-27 22:04:50,677 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-04-27 22:04:50,677 INFO L87 Difference]: Start difference. First operand 32 states and 44 transitions. Second operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,783 INFO L93 Difference]: Finished difference Result 44 states and 61 transitions. [2022-04-27 22:04:50,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-27 22:04:50,784 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:50,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:50,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2022-04-27 22:04:50,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 39 transitions. [2022-04-27 22:04:50,787 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 39 transitions. [2022-04-27 22:04:50,821 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 39 edges. 39 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:50,823 INFO L225 Difference]: With dead ends: 44 [2022-04-27 22:04:50,823 INFO L226 Difference]: Without dead ends: 26 [2022-04-27 22:04:50,824 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:04:50,825 INFO L413 NwaCegarLoop]: 18 mSDtfsCounter, 21 mSDsluCounter, 12 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:50,825 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [21 Valid, 30 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-27 22:04:50,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2022-04-27 22:04:50,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2022-04-27 22:04:50,836 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:50,837 INFO L82 GeneralOperation]: Start isEquivalent. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,837 INFO L74 IsIncluded]: Start isIncluded. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,837 INFO L87 Difference]: Start difference. First operand 26 states. Second operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,839 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2022-04-27 22:04:50,839 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-27 22:04:50,839 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,839 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,840 INFO L74 IsIncluded]: Start isIncluded. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-27 22:04:50,840 INFO L87 Difference]: Start difference. First operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 26 states. [2022-04-27 22:04:50,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:50,842 INFO L93 Difference]: Finished difference Result 26 states and 35 transitions. [2022-04-27 22:04:50,842 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-27 22:04:50,842 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:50,842 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:50,842 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:50,842 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:50,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-04-27 22:04:50,844 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 17 [2022-04-27 22:04:50,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:50,845 INFO L495 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-04-27 22:04:50,845 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.6) internal successors, (13), 4 states have internal predecessors, (13), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:50,845 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-04-27 22:04:50,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-04-27 22:04:50,846 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:50,846 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:50,846 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-04-27 22:04:50,846 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:50,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:50,846 INFO L85 PathProgramCache]: Analyzing trace with hash -2110277654, now seen corresponding path program 1 times [2022-04-27 22:04:50,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:50,847 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251179681] [2022-04-27 22:04:50,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:50,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:50,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,943 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:50,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:50,949 INFO L290 TraceCheckUtils]: 0: Hoare triple {782#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-27 22:04:50,949 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:50,949 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:50,950 INFO L272 TraceCheckUtils]: 0: Hoare triple {774#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {782#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:50,950 INFO L290 TraceCheckUtils]: 1: Hoare triple {782#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-27 22:04:50,950 INFO L290 TraceCheckUtils]: 2: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:50,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:50,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {774#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:50,951 INFO L290 TraceCheckUtils]: 5: Hoare triple {774#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {779#(= main_~y~0 0)} is VALID [2022-04-27 22:04:50,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {779#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:50,952 INFO L290 TraceCheckUtils]: 7: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:50,953 INFO L290 TraceCheckUtils]: 8: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {781#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:50,953 INFO L290 TraceCheckUtils]: 9: Hoare triple {781#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:50,953 INFO L290 TraceCheckUtils]: 10: Hoare triple {775#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:50,954 INFO L290 TraceCheckUtils]: 11: Hoare triple {775#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:50,954 INFO L290 TraceCheckUtils]: 12: Hoare triple {775#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:50,954 INFO L272 TraceCheckUtils]: 13: Hoare triple {775#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {775#false} is VALID [2022-04-27 22:04:50,954 INFO L290 TraceCheckUtils]: 14: Hoare triple {775#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {775#false} is VALID [2022-04-27 22:04:50,954 INFO L290 TraceCheckUtils]: 15: Hoare triple {775#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:50,954 INFO L290 TraceCheckUtils]: 16: Hoare triple {775#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:50,955 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:50,955 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:50,955 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251179681] [2022-04-27 22:04:50,955 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251179681] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:50,955 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [674781810] [2022-04-27 22:04:50,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:50,955 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:50,955 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:50,957 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:50,975 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-27 22:04:51,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:51,005 INFO L263 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-27 22:04:51,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:51,028 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:51,354 INFO L272 TraceCheckUtils]: 0: Hoare triple {774#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,354 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-27 22:04:51,354 INFO L290 TraceCheckUtils]: 2: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,354 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,354 INFO L272 TraceCheckUtils]: 4: Hoare triple {774#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,355 INFO L290 TraceCheckUtils]: 5: Hoare triple {774#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {779#(= main_~y~0 0)} is VALID [2022-04-27 22:04:51,355 INFO L290 TraceCheckUtils]: 6: Hoare triple {779#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:51,356 INFO L290 TraceCheckUtils]: 7: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:51,356 INFO L290 TraceCheckUtils]: 8: Hoare triple {780#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {810#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:51,358 INFO L290 TraceCheckUtils]: 9: Hoare triple {810#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,358 INFO L290 TraceCheckUtils]: 10: Hoare triple {775#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,358 INFO L290 TraceCheckUtils]: 11: Hoare triple {775#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,358 INFO L290 TraceCheckUtils]: 12: Hoare triple {775#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,358 INFO L272 TraceCheckUtils]: 13: Hoare triple {775#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {775#false} is VALID [2022-04-27 22:04:51,358 INFO L290 TraceCheckUtils]: 14: Hoare triple {775#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {775#false} is VALID [2022-04-27 22:04:51,358 INFO L290 TraceCheckUtils]: 15: Hoare triple {775#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,359 INFO L290 TraceCheckUtils]: 16: Hoare triple {775#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,359 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:51,359 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:51,464 INFO L290 TraceCheckUtils]: 16: Hoare triple {775#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,465 INFO L290 TraceCheckUtils]: 15: Hoare triple {775#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,465 INFO L290 TraceCheckUtils]: 14: Hoare triple {775#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {775#false} is VALID [2022-04-27 22:04:51,465 INFO L272 TraceCheckUtils]: 13: Hoare triple {775#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {775#false} is VALID [2022-04-27 22:04:51,465 INFO L290 TraceCheckUtils]: 12: Hoare triple {775#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,465 INFO L290 TraceCheckUtils]: 11: Hoare triple {775#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,465 INFO L290 TraceCheckUtils]: 10: Hoare triple {775#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,466 INFO L290 TraceCheckUtils]: 9: Hoare triple {856#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {775#false} is VALID [2022-04-27 22:04:51,466 INFO L290 TraceCheckUtils]: 8: Hoare triple {860#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {856#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:04:51,467 INFO L290 TraceCheckUtils]: 7: Hoare triple {860#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {860#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:51,467 INFO L290 TraceCheckUtils]: 6: Hoare triple {867#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {860#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:51,468 INFO L290 TraceCheckUtils]: 5: Hoare triple {774#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {867#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:04:51,468 INFO L272 TraceCheckUtils]: 4: Hoare triple {774#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,468 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {774#true} {774#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,468 INFO L290 TraceCheckUtils]: 2: Hoare triple {774#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,468 INFO L290 TraceCheckUtils]: 1: Hoare triple {774#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {774#true} is VALID [2022-04-27 22:04:51,469 INFO L272 TraceCheckUtils]: 0: Hoare triple {774#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {774#true} is VALID [2022-04-27 22:04:51,469 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:51,469 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [674781810] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:51,469 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:51,469 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2022-04-27 22:04:51,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104861465] [2022-04-27 22:04:51,469 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:51,470 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:51,470 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:51,470 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:51,492 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 26 edges. 26 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:51,492 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 22:04:51,492 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:51,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 22:04:51,493 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2022-04-27 22:04:51,493 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:51,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:51,952 INFO L93 Difference]: Finished difference Result 75 states and 114 transitions. [2022-04-27 22:04:51,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 22:04:51,952 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-04-27 22:04:51,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:51,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:51,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 88 transitions. [2022-04-27 22:04:51,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:51,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 88 transitions. [2022-04-27 22:04:51,963 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 88 transitions. [2022-04-27 22:04:52,069 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 88 edges. 88 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:52,070 INFO L225 Difference]: With dead ends: 75 [2022-04-27 22:04:52,070 INFO L226 Difference]: Without dead ends: 61 [2022-04-27 22:04:52,071 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2022-04-27 22:04:52,072 INFO L413 NwaCegarLoop]: 19 mSDtfsCounter, 82 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 82 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:52,072 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [82 Valid, 41 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 113 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:04:52,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2022-04-27 22:04:52,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 38. [2022-04-27 22:04:52,096 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:52,096 INFO L82 GeneralOperation]: Start isEquivalent. First operand 61 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:52,097 INFO L74 IsIncluded]: Start isIncluded. First operand 61 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:52,097 INFO L87 Difference]: Start difference. First operand 61 states. Second operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:52,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:52,099 INFO L93 Difference]: Finished difference Result 61 states and 88 transitions. [2022-04-27 22:04:52,099 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 88 transitions. [2022-04-27 22:04:52,099 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:52,100 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:52,100 INFO L74 IsIncluded]: Start isIncluded. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-27 22:04:52,100 INFO L87 Difference]: Start difference. First operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 61 states. [2022-04-27 22:04:52,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:52,102 INFO L93 Difference]: Finished difference Result 61 states and 88 transitions. [2022-04-27 22:04:52,102 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 88 transitions. [2022-04-27 22:04:52,103 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:52,103 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:52,103 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:52,103 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:52,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 33 states have (on average 1.4545454545454546) internal successors, (48), 33 states have internal predecessors, (48), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:52,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 52 transitions. [2022-04-27 22:04:52,104 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 52 transitions. Word has length 17 [2022-04-27 22:04:52,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:52,105 INFO L495 AbstractCegarLoop]: Abstraction has 38 states and 52 transitions. [2022-04-27 22:04:52,105 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.1) internal successors, (21), 9 states have internal predecessors, (21), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:52,105 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 52 transitions. [2022-04-27 22:04:52,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-04-27 22:04:52,105 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:52,105 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:52,132 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-27 22:04:52,319 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-04-27 22:04:52,320 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:52,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:52,320 INFO L85 PathProgramCache]: Analyzing trace with hash -189046619, now seen corresponding path program 1 times [2022-04-27 22:04:52,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:52,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133915191] [2022-04-27 22:04:52,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:52,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:52,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:52,430 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:52,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:52,436 INFO L290 TraceCheckUtils]: 0: Hoare triple {1192#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-27 22:04:52,436 INFO L290 TraceCheckUtils]: 1: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,437 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,437 INFO L272 TraceCheckUtils]: 0: Hoare triple {1182#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1192#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:52,437 INFO L290 TraceCheckUtils]: 1: Hoare triple {1192#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-27 22:04:52,438 INFO L290 TraceCheckUtils]: 2: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,438 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,438 INFO L272 TraceCheckUtils]: 4: Hoare triple {1182#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,438 INFO L290 TraceCheckUtils]: 5: Hoare triple {1182#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1187#(= main_~y~0 0)} is VALID [2022-04-27 22:04:52,439 INFO L290 TraceCheckUtils]: 6: Hoare triple {1187#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:52,439 INFO L290 TraceCheckUtils]: 7: Hoare triple {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:52,440 INFO L290 TraceCheckUtils]: 8: Hoare triple {1188#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1189#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:52,441 INFO L290 TraceCheckUtils]: 9: Hoare triple {1189#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:04:52,441 INFO L290 TraceCheckUtils]: 10: Hoare triple {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:04:52,442 INFO L290 TraceCheckUtils]: 11: Hoare triple {1190#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:52,442 INFO L290 TraceCheckUtils]: 12: Hoare triple {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:52,443 INFO L290 TraceCheckUtils]: 13: Hoare triple {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:52,443 INFO L290 TraceCheckUtils]: 14: Hoare triple {1191#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,444 INFO L272 TraceCheckUtils]: 15: Hoare triple {1183#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1183#false} is VALID [2022-04-27 22:04:52,444 INFO L290 TraceCheckUtils]: 16: Hoare triple {1183#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#false} is VALID [2022-04-27 22:04:52,444 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,444 INFO L290 TraceCheckUtils]: 18: Hoare triple {1183#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,444 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:52,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:52,444 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133915191] [2022-04-27 22:04:52,444 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1133915191] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:52,445 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [779405264] [2022-04-27 22:04:52,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:52,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:52,445 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:52,446 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:52,447 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-27 22:04:52,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:52,484 INFO L263 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-27 22:04:52,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:52,491 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:52,575 INFO L272 TraceCheckUtils]: 0: Hoare triple {1182#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,575 INFO L290 TraceCheckUtils]: 1: Hoare triple {1182#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-27 22:04:52,575 INFO L290 TraceCheckUtils]: 2: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,576 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,576 INFO L272 TraceCheckUtils]: 4: Hoare triple {1182#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,577 INFO L290 TraceCheckUtils]: 5: Hoare triple {1182#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1182#true} is VALID [2022-04-27 22:04:52,578 INFO L290 TraceCheckUtils]: 6: Hoare triple {1182#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:04:52,579 INFO L290 TraceCheckUtils]: 7: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:04:52,579 INFO L290 TraceCheckUtils]: 8: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:04:52,581 INFO L290 TraceCheckUtils]: 9: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,581 INFO L290 TraceCheckUtils]: 10: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,582 INFO L290 TraceCheckUtils]: 11: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,582 INFO L290 TraceCheckUtils]: 12: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,585 INFO L290 TraceCheckUtils]: 13: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,586 INFO L290 TraceCheckUtils]: 14: Hoare triple {1183#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,586 INFO L272 TraceCheckUtils]: 15: Hoare triple {1183#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1183#false} is VALID [2022-04-27 22:04:52,586 INFO L290 TraceCheckUtils]: 16: Hoare triple {1183#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#false} is VALID [2022-04-27 22:04:52,586 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,586 INFO L290 TraceCheckUtils]: 18: Hoare triple {1183#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,587 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:04:52,587 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:52,697 INFO L290 TraceCheckUtils]: 18: Hoare triple {1183#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,698 INFO L290 TraceCheckUtils]: 17: Hoare triple {1183#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,698 INFO L290 TraceCheckUtils]: 16: Hoare triple {1183#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1183#false} is VALID [2022-04-27 22:04:52,698 INFO L272 TraceCheckUtils]: 15: Hoare triple {1183#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1183#false} is VALID [2022-04-27 22:04:52,698 INFO L290 TraceCheckUtils]: 14: Hoare triple {1183#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,699 INFO L290 TraceCheckUtils]: 13: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1183#false} is VALID [2022-04-27 22:04:52,699 INFO L290 TraceCheckUtils]: 12: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,699 INFO L290 TraceCheckUtils]: 11: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,703 INFO L290 TraceCheckUtils]: 10: Hoare triple {1224#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,704 INFO L290 TraceCheckUtils]: 9: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {1224#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:04:52,704 INFO L290 TraceCheckUtils]: 8: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:04:52,705 INFO L290 TraceCheckUtils]: 7: Hoare triple {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:04:52,706 INFO L290 TraceCheckUtils]: 6: Hoare triple {1182#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1214#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:04:52,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {1182#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1182#true} is VALID [2022-04-27 22:04:52,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {1182#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,706 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1182#true} {1182#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,706 INFO L290 TraceCheckUtils]: 2: Hoare triple {1182#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,706 INFO L290 TraceCheckUtils]: 1: Hoare triple {1182#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1182#true} is VALID [2022-04-27 22:04:52,706 INFO L272 TraceCheckUtils]: 0: Hoare triple {1182#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1182#true} is VALID [2022-04-27 22:04:52,706 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:04:52,707 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [779405264] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:52,707 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:52,707 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 4, 4] total 10 [2022-04-27 22:04:52,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179627619] [2022-04-27 22:04:52,707 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:52,707 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:04:52,708 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:52,708 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:52,739 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 31 edges. 31 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:52,739 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-04-27 22:04:52,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:52,739 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-04-27 22:04:52,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2022-04-27 22:04:52,740 INFO L87 Difference]: Start difference. First operand 38 states and 52 transitions. Second operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:53,404 INFO L93 Difference]: Finished difference Result 71 states and 104 transitions. [2022-04-27 22:04:53,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 22:04:53,404 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-04-27 22:04:53,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:53,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 76 transitions. [2022-04-27 22:04:53,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 76 transitions. [2022-04-27 22:04:53,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 76 transitions. [2022-04-27 22:04:53,490 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 76 edges. 76 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:53,491 INFO L225 Difference]: With dead ends: 71 [2022-04-27 22:04:53,491 INFO L226 Difference]: Without dead ends: 60 [2022-04-27 22:04:53,492 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=266, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:04:53,492 INFO L413 NwaCegarLoop]: 15 mSDtfsCounter, 47 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 175 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 47 SdHoareTripleChecker+Valid, 52 SdHoareTripleChecker+Invalid, 221 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 175 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:53,492 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [47 Valid, 52 Invalid, 221 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 175 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:04:53,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2022-04-27 22:04:53,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 48. [2022-04-27 22:04:53,525 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:53,526 INFO L82 GeneralOperation]: Start isEquivalent. First operand 60 states. Second operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,526 INFO L74 IsIncluded]: Start isIncluded. First operand 60 states. Second operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,526 INFO L87 Difference]: Start difference. First operand 60 states. Second operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:53,529 INFO L93 Difference]: Finished difference Result 60 states and 83 transitions. [2022-04-27 22:04:53,529 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 83 transitions. [2022-04-27 22:04:53,529 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:53,529 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:53,529 INFO L74 IsIncluded]: Start isIncluded. First operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 60 states. [2022-04-27 22:04:53,529 INFO L87 Difference]: Start difference. First operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 60 states. [2022-04-27 22:04:53,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:53,531 INFO L93 Difference]: Finished difference Result 60 states and 83 transitions. [2022-04-27 22:04:53,532 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 83 transitions. [2022-04-27 22:04:53,532 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:53,532 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:53,532 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:53,532 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:53,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 43 states have (on average 1.441860465116279) internal successors, (62), 43 states have internal predecessors, (62), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 66 transitions. [2022-04-27 22:04:53,534 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 66 transitions. Word has length 19 [2022-04-27 22:04:53,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:53,534 INFO L495 AbstractCegarLoop]: Abstraction has 48 states and 66 transitions. [2022-04-27 22:04:53,534 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 2.6) internal successors, (26), 9 states have internal predecessors, (26), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:53,534 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 66 transitions. [2022-04-27 22:04:53,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-04-27 22:04:53,535 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:53,535 INFO L195 NwaCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:53,561 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-27 22:04:53,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2022-04-27 22:04:53,748 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:53,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:53,748 INFO L85 PathProgramCache]: Analyzing trace with hash 261950028, now seen corresponding path program 2 times [2022-04-27 22:04:53,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:53,748 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055250145] [2022-04-27 22:04:53,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:53,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:53,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:53,863 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:53,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:53,870 INFO L290 TraceCheckUtils]: 0: Hoare triple {1621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-27 22:04:53,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:53,870 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:53,871 INFO L272 TraceCheckUtils]: 0: Hoare triple {1610#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:53,871 INFO L290 TraceCheckUtils]: 1: Hoare triple {1621#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-27 22:04:53,872 INFO L290 TraceCheckUtils]: 2: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:53,872 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:53,872 INFO L272 TraceCheckUtils]: 4: Hoare triple {1610#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:53,872 INFO L290 TraceCheckUtils]: 5: Hoare triple {1610#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1615#(= main_~y~0 0)} is VALID [2022-04-27 22:04:53,873 INFO L290 TraceCheckUtils]: 6: Hoare triple {1615#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:53,873 INFO L290 TraceCheckUtils]: 7: Hoare triple {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:53,874 INFO L290 TraceCheckUtils]: 8: Hoare triple {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:04:53,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:53,875 INFO L290 TraceCheckUtils]: 10: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:53,876 INFO L290 TraceCheckUtils]: 11: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1620#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:04:53,876 INFO L290 TraceCheckUtils]: 12: Hoare triple {1620#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:53,876 INFO L290 TraceCheckUtils]: 13: Hoare triple {1611#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:53,876 INFO L290 TraceCheckUtils]: 14: Hoare triple {1611#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:53,876 INFO L290 TraceCheckUtils]: 15: Hoare triple {1611#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:53,877 INFO L272 TraceCheckUtils]: 16: Hoare triple {1611#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1611#false} is VALID [2022-04-27 22:04:53,877 INFO L290 TraceCheckUtils]: 17: Hoare triple {1611#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1611#false} is VALID [2022-04-27 22:04:53,877 INFO L290 TraceCheckUtils]: 18: Hoare triple {1611#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:53,877 INFO L290 TraceCheckUtils]: 19: Hoare triple {1611#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:53,878 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:53,878 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:53,878 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1055250145] [2022-04-27 22:04:53,878 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1055250145] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:53,880 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [935355653] [2022-04-27 22:04:53,880 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:04:53,880 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:53,880 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:53,884 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:53,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-27 22:04:53,931 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:04:53,931 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:04:53,932 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 22:04:53,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:53,942 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:54,186 INFO L272 TraceCheckUtils]: 0: Hoare triple {1610#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,187 INFO L290 TraceCheckUtils]: 1: Hoare triple {1610#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-27 22:04:54,187 INFO L290 TraceCheckUtils]: 2: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,187 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,187 INFO L272 TraceCheckUtils]: 4: Hoare triple {1610#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,188 INFO L290 TraceCheckUtils]: 5: Hoare triple {1610#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1615#(= main_~y~0 0)} is VALID [2022-04-27 22:04:54,188 INFO L290 TraceCheckUtils]: 6: Hoare triple {1615#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:54,189 INFO L290 TraceCheckUtils]: 7: Hoare triple {1616#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:54,190 INFO L290 TraceCheckUtils]: 8: Hoare triple {1617#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:04:54,190 INFO L290 TraceCheckUtils]: 9: Hoare triple {1618#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:54,191 INFO L290 TraceCheckUtils]: 10: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:04:54,192 INFO L290 TraceCheckUtils]: 11: Hoare triple {1619#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1658#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:04:54,193 INFO L290 TraceCheckUtils]: 12: Hoare triple {1658#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,193 INFO L290 TraceCheckUtils]: 13: Hoare triple {1611#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,196 INFO L290 TraceCheckUtils]: 14: Hoare triple {1611#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,197 INFO L290 TraceCheckUtils]: 15: Hoare triple {1611#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,202 INFO L272 TraceCheckUtils]: 16: Hoare triple {1611#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1611#false} is VALID [2022-04-27 22:04:54,203 INFO L290 TraceCheckUtils]: 17: Hoare triple {1611#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1611#false} is VALID [2022-04-27 22:04:54,203 INFO L290 TraceCheckUtils]: 18: Hoare triple {1611#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,204 INFO L290 TraceCheckUtils]: 19: Hoare triple {1611#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,204 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:54,204 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:54,376 INFO L290 TraceCheckUtils]: 19: Hoare triple {1611#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,376 INFO L290 TraceCheckUtils]: 18: Hoare triple {1611#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,376 INFO L290 TraceCheckUtils]: 17: Hoare triple {1611#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {1611#false} is VALID [2022-04-27 22:04:54,377 INFO L272 TraceCheckUtils]: 16: Hoare triple {1611#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {1611#false} is VALID [2022-04-27 22:04:54,377 INFO L290 TraceCheckUtils]: 15: Hoare triple {1611#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,377 INFO L290 TraceCheckUtils]: 14: Hoare triple {1611#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,377 INFO L290 TraceCheckUtils]: 13: Hoare triple {1611#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,378 INFO L290 TraceCheckUtils]: 12: Hoare triple {1704#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {1611#false} is VALID [2022-04-27 22:04:54,379 INFO L290 TraceCheckUtils]: 11: Hoare triple {1708#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {1704#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:04:54,379 INFO L290 TraceCheckUtils]: 10: Hoare triple {1708#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {1708#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:54,380 INFO L290 TraceCheckUtils]: 9: Hoare triple {1715#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1708#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:04:54,381 INFO L290 TraceCheckUtils]: 8: Hoare triple {1719#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1715#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:04:54,382 INFO L290 TraceCheckUtils]: 7: Hoare triple {1723#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1719#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:04:54,383 INFO L290 TraceCheckUtils]: 6: Hoare triple {1727#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {1723#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:04:54,383 INFO L290 TraceCheckUtils]: 5: Hoare triple {1610#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {1727#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:04:54,383 INFO L272 TraceCheckUtils]: 4: Hoare triple {1610#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,383 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {1610#true} {1610#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {1610#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,384 INFO L290 TraceCheckUtils]: 1: Hoare triple {1610#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {1610#true} is VALID [2022-04-27 22:04:54,384 INFO L272 TraceCheckUtils]: 0: Hoare triple {1610#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {1610#true} is VALID [2022-04-27 22:04:54,384 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:04:54,384 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [935355653] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:54,384 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:54,384 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 16 [2022-04-27 22:04:54,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750868905] [2022-04-27 22:04:54,385 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:54,385 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:04:54,387 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:54,387 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:54,412 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 32 edges. 32 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:54,413 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:04:54,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:54,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:04:54,414 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:04:54,414 INFO L87 Difference]: Start difference. First operand 48 states and 66 transitions. Second operand has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:56,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:56,664 INFO L93 Difference]: Finished difference Result 196 states and 310 transitions. [2022-04-27 22:04:56,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-04-27 22:04:56,664 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 20 [2022-04-27 22:04:56,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:56,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:56,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 176 transitions. [2022-04-27 22:04:56,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:56,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 176 transitions. [2022-04-27 22:04:56,673 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 27 states and 176 transitions. [2022-04-27 22:04:56,901 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 176 edges. 176 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:56,906 INFO L225 Difference]: With dead ends: 196 [2022-04-27 22:04:56,907 INFO L226 Difference]: Without dead ends: 178 [2022-04-27 22:04:56,908 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 359 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=416, Invalid=1144, Unknown=0, NotChecked=0, Total=1560 [2022-04-27 22:04:56,908 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 306 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 411 mSolverCounterSat, 182 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 306 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 593 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 182 IncrementalHoareTripleChecker+Valid, 411 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:56,909 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [306 Valid, 84 Invalid, 593 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [182 Valid, 411 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-04-27 22:04:56,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2022-04-27 22:04:56,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 75. [2022-04-27 22:04:56,997 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:56,997 INFO L82 GeneralOperation]: Start isEquivalent. First operand 178 states. Second operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:56,998 INFO L74 IsIncluded]: Start isIncluded. First operand 178 states. Second operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:56,998 INFO L87 Difference]: Start difference. First operand 178 states. Second operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:57,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:57,004 INFO L93 Difference]: Finished difference Result 178 states and 260 transitions. [2022-04-27 22:04:57,004 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 260 transitions. [2022-04-27 22:04:57,006 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:57,006 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:57,007 INFO L74 IsIncluded]: Start isIncluded. First operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 178 states. [2022-04-27 22:04:57,007 INFO L87 Difference]: Start difference. First operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 178 states. [2022-04-27 22:04:57,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:57,013 INFO L93 Difference]: Finished difference Result 178 states and 260 transitions. [2022-04-27 22:04:57,013 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 260 transitions. [2022-04-27 22:04:57,014 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:57,014 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:57,014 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:57,014 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:57,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 70 states have (on average 1.4285714285714286) internal successors, (100), 70 states have internal predecessors, (100), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:57,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 104 transitions. [2022-04-27 22:04:57,016 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 104 transitions. Word has length 20 [2022-04-27 22:04:57,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:57,017 INFO L495 AbstractCegarLoop]: Abstraction has 75 states and 104 transitions. [2022-04-27 22:04:57,017 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.6875) internal successors, (27), 15 states have internal predecessors, (27), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:57,017 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 104 transitions. [2022-04-27 22:04:57,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-04-27 22:04:57,017 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:57,017 INFO L195 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:57,044 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-04-27 22:04:57,231 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:57,232 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:57,232 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:57,232 INFO L85 PathProgramCache]: Analyzing trace with hash 2057649504, now seen corresponding path program 1 times [2022-04-27 22:04:57,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:57,232 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288617506] [2022-04-27 22:04:57,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:57,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:57,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:57,541 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:57,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:57,547 INFO L290 TraceCheckUtils]: 0: Hoare triple {2528#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-27 22:04:57,547 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,547 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,548 INFO L272 TraceCheckUtils]: 0: Hoare triple {2516#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2528#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:57,548 INFO L290 TraceCheckUtils]: 1: Hoare triple {2528#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-27 22:04:57,548 INFO L290 TraceCheckUtils]: 2: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,548 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,548 INFO L272 TraceCheckUtils]: 4: Hoare triple {2516#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,549 INFO L290 TraceCheckUtils]: 5: Hoare triple {2516#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,549 INFO L290 TraceCheckUtils]: 6: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:04:57,550 INFO L290 TraceCheckUtils]: 7: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-27 22:04:57,551 INFO L290 TraceCheckUtils]: 8: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-27 22:04:57,552 INFO L290 TraceCheckUtils]: 9: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:04:57,552 INFO L290 TraceCheckUtils]: 10: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:04:57,553 INFO L290 TraceCheckUtils]: 11: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:04:57,553 INFO L290 TraceCheckUtils]: 12: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:04:57,554 INFO L290 TraceCheckUtils]: 13: Hoare triple {2524#(and (<= main_~x~0 main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) 1) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-27 22:04:57,555 INFO L290 TraceCheckUtils]: 14: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} is VALID [2022-04-27 22:04:57,556 INFO L290 TraceCheckUtils]: 15: Hoare triple {2523#(and (<= (* (div (+ main_~n~0 4294967294) 4294967296) 4294967296) main_~x~0) (<= (+ main_~x~0 1) main_~n~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:57,557 INFO L290 TraceCheckUtils]: 16: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:57,559 INFO L272 TraceCheckUtils]: 17: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2526#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:04:57,559 INFO L290 TraceCheckUtils]: 18: Hoare triple {2526#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2527#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:04:57,559 INFO L290 TraceCheckUtils]: 19: Hoare triple {2527#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-27 22:04:57,560 INFO L290 TraceCheckUtils]: 20: Hoare triple {2517#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-27 22:04:57,560 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:04:57,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:57,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288617506] [2022-04-27 22:04:57,560 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1288617506] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:57,560 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2082397000] [2022-04-27 22:04:57,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:57,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:57,561 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:57,561 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:57,575 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-27 22:04:57,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:57,607 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 13 conjunts are in the unsatisfiable core [2022-04-27 22:04:57,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:57,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:57,758 INFO L272 TraceCheckUtils]: 0: Hoare triple {2516#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,758 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-27 22:04:57,761 INFO L290 TraceCheckUtils]: 2: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,761 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,761 INFO L272 TraceCheckUtils]: 4: Hoare triple {2516#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:57,761 INFO L290 TraceCheckUtils]: 5: Hoare triple {2516#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,762 INFO L290 TraceCheckUtils]: 6: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:04:57,763 INFO L290 TraceCheckUtils]: 7: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:04:57,764 INFO L290 TraceCheckUtils]: 8: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:04:57,765 INFO L290 TraceCheckUtils]: 9: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,765 INFO L290 TraceCheckUtils]: 10: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,766 INFO L290 TraceCheckUtils]: 11: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,766 INFO L290 TraceCheckUtils]: 12: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,767 INFO L290 TraceCheckUtils]: 13: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:04:57,767 INFO L290 TraceCheckUtils]: 14: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:04:57,768 INFO L290 TraceCheckUtils]: 15: Hoare triple {2522#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,768 INFO L290 TraceCheckUtils]: 16: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:04:57,769 INFO L272 TraceCheckUtils]: 17: Hoare triple {2521#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:04:57,770 INFO L290 TraceCheckUtils]: 18: Hoare triple {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2587#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:04:57,770 INFO L290 TraceCheckUtils]: 19: Hoare triple {2587#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-27 22:04:57,770 INFO L290 TraceCheckUtils]: 20: Hoare triple {2517#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-27 22:04:57,770 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:04:57,771 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:58,014 INFO L290 TraceCheckUtils]: 20: Hoare triple {2517#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-27 22:04:58,015 INFO L290 TraceCheckUtils]: 19: Hoare triple {2587#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {2517#false} is VALID [2022-04-27 22:04:58,015 INFO L290 TraceCheckUtils]: 18: Hoare triple {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {2587#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:04:58,016 INFO L272 TraceCheckUtils]: 17: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {2583#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:04:58,017 INFO L290 TraceCheckUtils]: 16: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,018 INFO L290 TraceCheckUtils]: 15: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,018 INFO L290 TraceCheckUtils]: 14: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:04:58,019 INFO L290 TraceCheckUtils]: 13: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:04:58,020 INFO L290 TraceCheckUtils]: 12: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,021 INFO L290 TraceCheckUtils]: 11: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,021 INFO L290 TraceCheckUtils]: 10: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,022 INFO L290 TraceCheckUtils]: 9: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,023 INFO L290 TraceCheckUtils]: 8: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:04:58,023 INFO L290 TraceCheckUtils]: 7: Hoare triple {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:04:58,024 INFO L290 TraceCheckUtils]: 6: Hoare triple {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {2609#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:04:58,025 INFO L290 TraceCheckUtils]: 5: Hoare triple {2516#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {2525#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:04:58,025 INFO L272 TraceCheckUtils]: 4: Hoare triple {2516#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:58,025 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2516#true} {2516#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:58,025 INFO L290 TraceCheckUtils]: 2: Hoare triple {2516#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:58,025 INFO L290 TraceCheckUtils]: 1: Hoare triple {2516#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {2516#true} is VALID [2022-04-27 22:04:58,025 INFO L272 TraceCheckUtils]: 0: Hoare triple {2516#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {2516#true} is VALID [2022-04-27 22:04:58,026 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-27 22:04:58,026 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2082397000] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:58,026 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:58,026 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6, 6] total 13 [2022-04-27 22:04:58,026 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [867086745] [2022-04-27 22:04:58,026 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:58,028 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:04:58,028 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:58,028 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,072 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 48 edges. 48 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:58,072 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:04:58,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:58,073 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:04:58,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:04:58,073 INFO L87 Difference]: Start difference. First operand 75 states and 104 transitions. Second operand has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:58,548 INFO L93 Difference]: Finished difference Result 87 states and 116 transitions. [2022-04-27 22:04:58,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-04-27 22:04:58,548 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 21 [2022-04-27 22:04:58,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:04:58,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-27 22:04:58,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 45 transitions. [2022-04-27 22:04:58,551 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 9 states and 45 transitions. [2022-04-27 22:04:58,594 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:58,595 INFO L225 Difference]: With dead ends: 87 [2022-04-27 22:04:58,595 INFO L226 Difference]: Without dead ends: 67 [2022-04-27 22:04:58,596 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 35 SyntacticMatches, 7 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=68, Invalid=274, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:04:58,596 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 26 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:04:58,597 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [26 Valid, 51 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:04:58,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-04-27 22:04:58,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-04-27 22:04:58,678 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:04:58,678 INFO L82 GeneralOperation]: Start isEquivalent. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,678 INFO L74 IsIncluded]: Start isIncluded. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,678 INFO L87 Difference]: Start difference. First operand 67 states. Second operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:58,685 INFO L93 Difference]: Finished difference Result 67 states and 94 transitions. [2022-04-27 22:04:58,685 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 94 transitions. [2022-04-27 22:04:58,685 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:58,685 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:58,686 INFO L74 IsIncluded]: Start isIncluded. First operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-27 22:04:58,686 INFO L87 Difference]: Start difference. First operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 67 states. [2022-04-27 22:04:58,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:04:58,688 INFO L93 Difference]: Finished difference Result 67 states and 94 transitions. [2022-04-27 22:04:58,688 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 94 transitions. [2022-04-27 22:04:58,688 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:04:58,688 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:04:58,688 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:04:58,688 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:04:58,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 62 states have (on average 1.4516129032258065) internal successors, (90), 62 states have internal predecessors, (90), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 94 transitions. [2022-04-27 22:04:58,691 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 94 transitions. Word has length 21 [2022-04-27 22:04:58,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:04:58,691 INFO L495 AbstractCegarLoop]: Abstraction has 67 states and 94 transitions. [2022-04-27 22:04:58,691 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 3.1538461538461537) internal successors, (41), 10 states have internal predecessors, (41), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:58,692 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 94 transitions. [2022-04-27 22:04:58,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 22:04:58,692 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:04:58,692 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:04:58,722 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-27 22:04:58,907 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:58,907 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:04:58,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:04:58,908 INFO L85 PathProgramCache]: Analyzing trace with hash -1264431284, now seen corresponding path program 1 times [2022-04-27 22:04:58,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:04:58,908 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648615876] [2022-04-27 22:04:58,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:58,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:04:58,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:58,997 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:04:58,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:59,002 INFO L290 TraceCheckUtils]: 0: Hoare triple {3037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-27 22:04:59,003 INFO L290 TraceCheckUtils]: 1: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,003 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,003 INFO L272 TraceCheckUtils]: 0: Hoare triple {3027#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:04:59,003 INFO L290 TraceCheckUtils]: 1: Hoare triple {3037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-27 22:04:59,004 INFO L290 TraceCheckUtils]: 2: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,004 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,004 INFO L272 TraceCheckUtils]: 4: Hoare triple {3027#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,004 INFO L290 TraceCheckUtils]: 5: Hoare triple {3027#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3032#(= main_~y~0 0)} is VALID [2022-04-27 22:04:59,005 INFO L290 TraceCheckUtils]: 6: Hoare triple {3032#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:59,005 INFO L290 TraceCheckUtils]: 7: Hoare triple {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:59,006 INFO L290 TraceCheckUtils]: 8: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:59,006 INFO L290 TraceCheckUtils]: 9: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3035#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:04:59,007 INFO L290 TraceCheckUtils]: 10: Hoare triple {3035#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3036#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 11: Hoare triple {3036#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 12: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 13: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 14: Hoare triple {3028#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 15: Hoare triple {3028#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 16: Hoare triple {3028#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 17: Hoare triple {3028#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L272 TraceCheckUtils]: 18: Hoare triple {3028#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3028#false} is VALID [2022-04-27 22:04:59,008 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3028#false} is VALID [2022-04-27 22:04:59,009 INFO L290 TraceCheckUtils]: 20: Hoare triple {3028#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,009 INFO L290 TraceCheckUtils]: 21: Hoare triple {3028#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,009 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:04:59,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:04:59,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648615876] [2022-04-27 22:04:59,009 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648615876] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:04:59,009 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [877224959] [2022-04-27 22:04:59,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:04:59,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:04:59,010 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:04:59,012 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:04:59,036 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-27 22:04:59,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:59,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:04:59,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:04:59,071 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:04:59,172 INFO L272 TraceCheckUtils]: 0: Hoare triple {3027#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {3027#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-27 22:04:59,172 INFO L290 TraceCheckUtils]: 2: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,172 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,172 INFO L272 TraceCheckUtils]: 4: Hoare triple {3027#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,173 INFO L290 TraceCheckUtils]: 5: Hoare triple {3027#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3032#(= main_~y~0 0)} is VALID [2022-04-27 22:04:59,173 INFO L290 TraceCheckUtils]: 6: Hoare triple {3032#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:04:59,174 INFO L290 TraceCheckUtils]: 7: Hoare triple {3033#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:59,174 INFO L290 TraceCheckUtils]: 8: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:59,175 INFO L290 TraceCheckUtils]: 9: Hoare triple {3034#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3068#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:04:59,175 INFO L290 TraceCheckUtils]: 10: Hoare triple {3068#(and (= main_~z~0 main_~y~0) (<= 2 main_~y~0) (<= main_~y~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3072#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:04:59,177 INFO L290 TraceCheckUtils]: 11: Hoare triple {3072#(and (<= 2 main_~y~0) (<= main_~y~0 2) (= main_~y~0 (+ main_~z~0 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,177 INFO L290 TraceCheckUtils]: 12: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 13: Hoare triple {3028#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 14: Hoare triple {3028#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 15: Hoare triple {3028#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 16: Hoare triple {3028#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 17: Hoare triple {3028#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L272 TraceCheckUtils]: 18: Hoare triple {3028#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 20: Hoare triple {3028#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,178 INFO L290 TraceCheckUtils]: 21: Hoare triple {3028#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,179 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:04:59,179 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:04:59,314 INFO L290 TraceCheckUtils]: 21: Hoare triple {3028#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L290 TraceCheckUtils]: 20: Hoare triple {3028#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L290 TraceCheckUtils]: 19: Hoare triple {3028#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L272 TraceCheckUtils]: 18: Hoare triple {3028#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L290 TraceCheckUtils]: 17: Hoare triple {3028#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L290 TraceCheckUtils]: 16: Hoare triple {3028#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L290 TraceCheckUtils]: 15: Hoare triple {3028#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {3028#false} is VALID [2022-04-27 22:04:59,315 INFO L290 TraceCheckUtils]: 14: Hoare triple {3028#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3028#false} is VALID [2022-04-27 22:04:59,316 INFO L290 TraceCheckUtils]: 13: Hoare triple {3130#(not (< 0 (mod main_~y~0 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3028#false} is VALID [2022-04-27 22:04:59,317 INFO L290 TraceCheckUtils]: 12: Hoare triple {3134#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3130#(not (< 0 (mod main_~y~0 4294967296)))} is VALID [2022-04-27 22:04:59,317 INFO L290 TraceCheckUtils]: 11: Hoare triple {3138#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3134#(not (< 0 (mod (+ main_~y~0 4294967295) 4294967296)))} is VALID [2022-04-27 22:04:59,318 INFO L290 TraceCheckUtils]: 10: Hoare triple {3142#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3138#(or (< 0 (mod main_~z~0 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:04:59,346 INFO L290 TraceCheckUtils]: 9: Hoare triple {3027#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3142#(or (< 0 (mod (+ main_~z~0 4294967295) 4294967296)) (not (< 0 (mod (+ main_~y~0 4294967295) 4294967296))))} is VALID [2022-04-27 22:04:59,346 INFO L290 TraceCheckUtils]: 8: Hoare triple {3027#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,346 INFO L290 TraceCheckUtils]: 7: Hoare triple {3027#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#true} is VALID [2022-04-27 22:04:59,346 INFO L290 TraceCheckUtils]: 6: Hoare triple {3027#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3027#true} is VALID [2022-04-27 22:04:59,346 INFO L290 TraceCheckUtils]: 5: Hoare triple {3027#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3027#true} is VALID [2022-04-27 22:04:59,346 INFO L272 TraceCheckUtils]: 4: Hoare triple {3027#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,346 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3027#true} {3027#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,347 INFO L290 TraceCheckUtils]: 2: Hoare triple {3027#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,347 INFO L290 TraceCheckUtils]: 1: Hoare triple {3027#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3027#true} is VALID [2022-04-27 22:04:59,347 INFO L272 TraceCheckUtils]: 0: Hoare triple {3027#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3027#true} is VALID [2022-04-27 22:04:59,347 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-04-27 22:04:59,347 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [877224959] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:04:59,347 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:04:59,347 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 6] total 14 [2022-04-27 22:04:59,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [882734619] [2022-04-27 22:04:59,348 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:04:59,348 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:04:59,349 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:04:59,349 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:04:59,378 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 34 edges. 34 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:04:59,378 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-04-27 22:04:59,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:04:59,379 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-04-27 22:04:59,379 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2022-04-27 22:04:59,379 INFO L87 Difference]: Start difference. First operand 67 states and 94 transitions. Second operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:00,231 INFO L93 Difference]: Finished difference Result 107 states and 151 transitions. [2022-04-27 22:05:00,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-04-27 22:05:00,231 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:00,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:00,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 86 transitions. [2022-04-27 22:05:00,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 86 transitions. [2022-04-27 22:05:00,235 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 16 states and 86 transitions. [2022-04-27 22:05:00,328 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 86 edges. 86 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:00,330 INFO L225 Difference]: With dead ends: 107 [2022-04-27 22:05:00,330 INFO L226 Difference]: Without dead ends: 87 [2022-04-27 22:05:00,331 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=138, Invalid=564, Unknown=0, NotChecked=0, Total=702 [2022-04-27 22:05:00,331 INFO L413 NwaCegarLoop]: 23 mSDtfsCounter, 73 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 50 SdHoareTripleChecker+Invalid, 240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:00,332 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 50 Invalid, 240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:05:00,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-04-27 22:05:00,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 63. [2022-04-27 22:05:00,421 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:00,423 INFO L82 GeneralOperation]: Start isEquivalent. First operand 87 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,423 INFO L74 IsIncluded]: Start isIncluded. First operand 87 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,423 INFO L87 Difference]: Start difference. First operand 87 states. Second operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:00,425 INFO L93 Difference]: Finished difference Result 87 states and 123 transitions. [2022-04-27 22:05:00,425 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 123 transitions. [2022-04-27 22:05:00,425 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:00,425 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:00,425 INFO L74 IsIncluded]: Start isIncluded. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 87 states. [2022-04-27 22:05:00,426 INFO L87 Difference]: Start difference. First operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 87 states. [2022-04-27 22:05:00,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:00,428 INFO L93 Difference]: Finished difference Result 87 states and 123 transitions. [2022-04-27 22:05:00,428 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 123 transitions. [2022-04-27 22:05:00,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:00,428 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:00,428 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:00,428 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:00,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 58 states have (on average 1.4310344827586208) internal successors, (83), 58 states have internal predecessors, (83), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 87 transitions. [2022-04-27 22:05:00,430 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 87 transitions. Word has length 22 [2022-04-27 22:05:00,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:00,430 INFO L495 AbstractCegarLoop]: Abstraction has 63 states and 87 transitions. [2022-04-27 22:05:00,430 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 13 states have internal predecessors, (29), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:00,430 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 87 transitions. [2022-04-27 22:05:00,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-27 22:05:00,431 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:00,431 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:00,457 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:00,654 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-27 22:05:00,655 INFO L420 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:00,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:00,655 INFO L85 PathProgramCache]: Analyzing trace with hash 212434284, now seen corresponding path program 2 times [2022-04-27 22:05:00,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:00,655 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085086733] [2022-04-27 22:05:00,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:00,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:00,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:00,785 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:00,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:00,789 INFO L290 TraceCheckUtils]: 0: Hoare triple {3635#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-27 22:05:00,789 INFO L290 TraceCheckUtils]: 1: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,789 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,790 INFO L272 TraceCheckUtils]: 0: Hoare triple {3623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3635#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:00,790 INFO L290 TraceCheckUtils]: 1: Hoare triple {3635#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-27 22:05:00,790 INFO L290 TraceCheckUtils]: 2: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,790 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,790 INFO L272 TraceCheckUtils]: 4: Hoare triple {3623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,791 INFO L290 TraceCheckUtils]: 5: Hoare triple {3623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3628#(= main_~y~0 0)} is VALID [2022-04-27 22:05:00,791 INFO L290 TraceCheckUtils]: 6: Hoare triple {3628#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:00,792 INFO L290 TraceCheckUtils]: 7: Hoare triple {3629#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:00,792 INFO L290 TraceCheckUtils]: 8: Hoare triple {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:00,793 INFO L290 TraceCheckUtils]: 9: Hoare triple {3630#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3631#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:00,793 INFO L290 TraceCheckUtils]: 10: Hoare triple {3631#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:00,794 INFO L290 TraceCheckUtils]: 11: Hoare triple {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:00,794 INFO L290 TraceCheckUtils]: 12: Hoare triple {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:00,795 INFO L290 TraceCheckUtils]: 13: Hoare triple {3633#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:00,795 INFO L290 TraceCheckUtils]: 14: Hoare triple {3632#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:00,796 INFO L290 TraceCheckUtils]: 15: Hoare triple {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:00,796 INFO L290 TraceCheckUtils]: 16: Hoare triple {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:00,797 INFO L290 TraceCheckUtils]: 17: Hoare triple {3634#(and (<= (div main_~z~0 4294967296) 0) (<= 2 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,797 INFO L272 TraceCheckUtils]: 18: Hoare triple {3624#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3624#false} is VALID [2022-04-27 22:05:00,797 INFO L290 TraceCheckUtils]: 19: Hoare triple {3624#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3624#false} is VALID [2022-04-27 22:05:00,797 INFO L290 TraceCheckUtils]: 20: Hoare triple {3624#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,797 INFO L290 TraceCheckUtils]: 21: Hoare triple {3624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,797 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:00,797 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:00,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085086733] [2022-04-27 22:05:00,798 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2085086733] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:00,798 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [279732004] [2022-04-27 22:05:00,798 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:00,798 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:00,798 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:00,799 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:00,801 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-27 22:05:00,835 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:00,835 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:00,836 INFO L263 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 12 conjunts are in the unsatisfiable core [2022-04-27 22:05:00,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:00,843 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:00,945 INFO L272 TraceCheckUtils]: 0: Hoare triple {3623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,945 INFO L290 TraceCheckUtils]: 1: Hoare triple {3623#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-27 22:05:00,945 INFO L290 TraceCheckUtils]: 2: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,945 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,946 INFO L272 TraceCheckUtils]: 4: Hoare triple {3623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:00,946 INFO L290 TraceCheckUtils]: 5: Hoare triple {3623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3623#true} is VALID [2022-04-27 22:05:00,946 INFO L290 TraceCheckUtils]: 6: Hoare triple {3623#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:00,947 INFO L290 TraceCheckUtils]: 7: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:00,948 INFO L290 TraceCheckUtils]: 8: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:00,948 INFO L290 TraceCheckUtils]: 9: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:00,949 INFO L290 TraceCheckUtils]: 10: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:00,949 INFO L290 TraceCheckUtils]: 11: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:00,950 INFO L290 TraceCheckUtils]: 12: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:00,950 INFO L290 TraceCheckUtils]: 13: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:00,950 INFO L290 TraceCheckUtils]: 14: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:00,951 INFO L290 TraceCheckUtils]: 15: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:00,951 INFO L290 TraceCheckUtils]: 16: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,951 INFO L290 TraceCheckUtils]: 17: Hoare triple {3624#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,951 INFO L272 TraceCheckUtils]: 18: Hoare triple {3624#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3624#false} is VALID [2022-04-27 22:05:00,951 INFO L290 TraceCheckUtils]: 19: Hoare triple {3624#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3624#false} is VALID [2022-04-27 22:05:00,951 INFO L290 TraceCheckUtils]: 20: Hoare triple {3624#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,952 INFO L290 TraceCheckUtils]: 21: Hoare triple {3624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:00,952 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:00,952 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:01,025 INFO L290 TraceCheckUtils]: 21: Hoare triple {3624#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:01,026 INFO L290 TraceCheckUtils]: 20: Hoare triple {3624#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:01,026 INFO L290 TraceCheckUtils]: 19: Hoare triple {3624#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {3624#false} is VALID [2022-04-27 22:05:01,026 INFO L272 TraceCheckUtils]: 18: Hoare triple {3624#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {3624#false} is VALID [2022-04-27 22:05:01,026 INFO L290 TraceCheckUtils]: 17: Hoare triple {3624#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:01,026 INFO L290 TraceCheckUtils]: 16: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {3624#false} is VALID [2022-04-27 22:05:01,027 INFO L290 TraceCheckUtils]: 15: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:01,027 INFO L290 TraceCheckUtils]: 14: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:01,027 INFO L290 TraceCheckUtils]: 13: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:01,027 INFO L290 TraceCheckUtils]: 12: Hoare triple {3674#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:01,028 INFO L290 TraceCheckUtils]: 11: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3674#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:01,029 INFO L290 TraceCheckUtils]: 10: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:01,029 INFO L290 TraceCheckUtils]: 9: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:01,030 INFO L290 TraceCheckUtils]: 8: Hoare triple {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:01,030 INFO L290 TraceCheckUtils]: 7: Hoare triple {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3661#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:01,031 INFO L290 TraceCheckUtils]: 6: Hoare triple {3623#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {3657#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:01,031 INFO L290 TraceCheckUtils]: 5: Hoare triple {3623#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {3623#true} is VALID [2022-04-27 22:05:01,031 INFO L272 TraceCheckUtils]: 4: Hoare triple {3623#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:01,032 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {3623#true} {3623#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:01,032 INFO L290 TraceCheckUtils]: 2: Hoare triple {3623#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:01,032 INFO L290 TraceCheckUtils]: 1: Hoare triple {3623#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {3623#true} is VALID [2022-04-27 22:05:01,032 INFO L272 TraceCheckUtils]: 0: Hoare triple {3623#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {3623#true} is VALID [2022-04-27 22:05:01,032 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:01,032 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [279732004] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:01,032 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:01,032 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5] total 13 [2022-04-27 22:05:01,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629847281] [2022-04-27 22:05:01,033 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:01,033 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:01,033 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:01,033 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:01,064 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 36 edges. 36 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:01,064 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-04-27 22:05:01,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:01,064 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-04-27 22:05:01,065 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2022-04-27 22:05:01,065 INFO L87 Difference]: Start difference. First operand 63 states and 87 transitions. Second operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:02,439 INFO L93 Difference]: Finished difference Result 117 states and 170 transitions. [2022-04-27 22:05:02,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-04-27 22:05:02,439 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 22 [2022-04-27 22:05:02,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:02,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 102 transitions. [2022-04-27 22:05:02,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 102 transitions. [2022-04-27 22:05:02,443 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 22 states and 102 transitions. [2022-04-27 22:05:02,556 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 102 edges. 102 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:02,557 INFO L225 Difference]: With dead ends: 117 [2022-04-27 22:05:02,557 INFO L226 Difference]: Without dead ends: 104 [2022-04-27 22:05:02,558 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=177, Invalid=815, Unknown=0, NotChecked=0, Total=992 [2022-04-27 22:05:02,558 INFO L413 NwaCegarLoop]: 21 mSDtfsCounter, 71 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 87 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 71 SdHoareTripleChecker+Valid, 73 SdHoareTripleChecker+Invalid, 426 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 87 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:02,558 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [71 Valid, 73 Invalid, 426 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [87 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 22:05:02,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2022-04-27 22:05:02,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 79. [2022-04-27 22:05:02,651 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:02,651 INFO L82 GeneralOperation]: Start isEquivalent. First operand 104 states. Second operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,652 INFO L74 IsIncluded]: Start isIncluded. First operand 104 states. Second operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,652 INFO L87 Difference]: Start difference. First operand 104 states. Second operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:02,654 INFO L93 Difference]: Finished difference Result 104 states and 142 transitions. [2022-04-27 22:05:02,654 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 142 transitions. [2022-04-27 22:05:02,654 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:02,654 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:02,655 INFO L74 IsIncluded]: Start isIncluded. First operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-27 22:05:02,655 INFO L87 Difference]: Start difference. First operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 104 states. [2022-04-27 22:05:02,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:02,657 INFO L93 Difference]: Finished difference Result 104 states and 142 transitions. [2022-04-27 22:05:02,657 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 142 transitions. [2022-04-27 22:05:02,657 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:02,657 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:02,657 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:02,657 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:02,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 74 states have (on average 1.4054054054054055) internal successors, (104), 74 states have internal predecessors, (104), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 108 transitions. [2022-04-27 22:05:02,659 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 108 transitions. Word has length 22 [2022-04-27 22:05:02,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:02,659 INFO L495 AbstractCegarLoop]: Abstraction has 79 states and 108 transitions. [2022-04-27 22:05:02,659 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 12 states have internal predecessors, (31), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:02,659 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 108 transitions. [2022-04-27 22:05:02,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-27 22:05:02,660 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:02,660 INFO L195 NwaCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:02,688 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:02,883 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:02,884 INFO L420 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:02,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:02,884 INFO L85 PathProgramCache]: Analyzing trace with hash 717938129, now seen corresponding path program 2 times [2022-04-27 22:05:02,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:02,885 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078694706] [2022-04-27 22:05:02,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:02,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:02,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:03,035 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:03,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:03,039 INFO L290 TraceCheckUtils]: 0: Hoare triple {4307#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-27 22:05:03,040 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,040 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,040 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4307#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:03,040 INFO L290 TraceCheckUtils]: 1: Hoare triple {4307#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-27 22:05:03,040 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,041 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,041 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,041 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4299#(= main_~y~0 0)} is VALID [2022-04-27 22:05:03,042 INFO L290 TraceCheckUtils]: 6: Hoare triple {4299#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:03,042 INFO L290 TraceCheckUtils]: 7: Hoare triple {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:03,043 INFO L290 TraceCheckUtils]: 8: Hoare triple {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:03,044 INFO L290 TraceCheckUtils]: 9: Hoare triple {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:03,044 INFO L290 TraceCheckUtils]: 10: Hoare triple {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:03,045 INFO L290 TraceCheckUtils]: 11: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:03,045 INFO L290 TraceCheckUtils]: 12: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:03,046 INFO L290 TraceCheckUtils]: 13: Hoare triple {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4306#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 14: Hoare triple {4306#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 15: Hoare triple {4295#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 16: Hoare triple {4295#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 17: Hoare triple {4295#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 18: Hoare triple {4295#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 19: Hoare triple {4295#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L272 TraceCheckUtils]: 20: Hoare triple {4295#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4295#false} is VALID [2022-04-27 22:05:03,047 INFO L290 TraceCheckUtils]: 21: Hoare triple {4295#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-27 22:05:03,048 INFO L290 TraceCheckUtils]: 22: Hoare triple {4295#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,048 INFO L290 TraceCheckUtils]: 23: Hoare triple {4295#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,048 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:03,048 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:03,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078694706] [2022-04-27 22:05:03,048 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078694706] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:03,048 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [127222123] [2022-04-27 22:05:03,048 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:03,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:03,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:03,049 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:03,068 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-27 22:05:03,095 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:03,095 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:03,096 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 17 conjunts are in the unsatisfiable core [2022-04-27 22:05:03,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:03,102 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:03,349 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,349 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-27 22:05:03,350 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,350 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,350 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,350 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4299#(= main_~y~0 0)} is VALID [2022-04-27 22:05:03,351 INFO L290 TraceCheckUtils]: 6: Hoare triple {4299#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:03,351 INFO L290 TraceCheckUtils]: 7: Hoare triple {4300#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:03,352 INFO L290 TraceCheckUtils]: 8: Hoare triple {4301#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:03,353 INFO L290 TraceCheckUtils]: 9: Hoare triple {4302#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:03,353 INFO L290 TraceCheckUtils]: 10: Hoare triple {4303#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:03,354 INFO L290 TraceCheckUtils]: 11: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:03,354 INFO L290 TraceCheckUtils]: 12: Hoare triple {4304#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:05:03,355 INFO L290 TraceCheckUtils]: 13: Hoare triple {4305#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4350#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:03,355 INFO L290 TraceCheckUtils]: 14: Hoare triple {4350#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,355 INFO L290 TraceCheckUtils]: 15: Hoare triple {4295#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 16: Hoare triple {4295#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 17: Hoare triple {4295#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 18: Hoare triple {4295#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 19: Hoare triple {4295#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L272 TraceCheckUtils]: 20: Hoare triple {4295#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 21: Hoare triple {4295#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 22: Hoare triple {4295#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L290 TraceCheckUtils]: 23: Hoare triple {4295#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,356 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:03,356 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:03,535 INFO L290 TraceCheckUtils]: 23: Hoare triple {4295#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 22: Hoare triple {4295#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 21: Hoare triple {4295#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L272 TraceCheckUtils]: 20: Hoare triple {4295#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 19: Hoare triple {4295#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 18: Hoare triple {4295#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 17: Hoare triple {4295#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 16: Hoare triple {4295#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 15: Hoare triple {4295#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {4295#false} is VALID [2022-04-27 22:05:03,536 INFO L290 TraceCheckUtils]: 14: Hoare triple {4408#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {4295#false} is VALID [2022-04-27 22:05:03,537 INFO L290 TraceCheckUtils]: 13: Hoare triple {4412#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {4408#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:03,538 INFO L290 TraceCheckUtils]: 12: Hoare triple {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {4412#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:03,538 INFO L290 TraceCheckUtils]: 11: Hoare triple {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:03,539 INFO L290 TraceCheckUtils]: 10: Hoare triple {4423#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4416#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:03,539 INFO L290 TraceCheckUtils]: 9: Hoare triple {4427#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4423#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:03,540 INFO L290 TraceCheckUtils]: 8: Hoare triple {4431#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4427#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:05:03,540 INFO L290 TraceCheckUtils]: 7: Hoare triple {4435#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4431#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:05:03,541 INFO L290 TraceCheckUtils]: 6: Hoare triple {4439#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {4435#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:05:03,541 INFO L290 TraceCheckUtils]: 5: Hoare triple {4294#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {4439#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:05:03,542 INFO L272 TraceCheckUtils]: 4: Hoare triple {4294#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,542 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {4294#true} {4294#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,542 INFO L290 TraceCheckUtils]: 2: Hoare triple {4294#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,542 INFO L290 TraceCheckUtils]: 1: Hoare triple {4294#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {4294#true} is VALID [2022-04-27 22:05:03,542 INFO L272 TraceCheckUtils]: 0: Hoare triple {4294#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {4294#true} is VALID [2022-04-27 22:05:03,542 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:05:03,542 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [127222123] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:03,542 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:03,542 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 20 [2022-04-27 22:05:03,542 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384525026] [2022-04-27 22:05:03,542 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:03,543 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:05:03,543 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:03,543 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:03,567 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 38 edges. 38 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:03,567 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-04-27 22:05:03,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:03,567 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-04-27 22:05:03,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2022-04-27 22:05:03,568 INFO L87 Difference]: Start difference. First operand 79 states and 108 transitions. Second operand has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:08,366 INFO L93 Difference]: Finished difference Result 273 states and 404 transitions. [2022-04-27 22:05:08,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2022-04-27 22:05:08,366 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 24 [2022-04-27 22:05:08,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:08,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 246 transitions. [2022-04-27 22:05:08,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 246 transitions. [2022-04-27 22:05:08,374 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 61 states and 246 transitions. [2022-04-27 22:05:08,736 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 246 edges. 246 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:08,742 INFO L225 Difference]: With dead ends: 273 [2022-04-27 22:05:08,743 INFO L226 Difference]: Without dead ends: 249 [2022-04-27 22:05:08,745 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 41 SyntacticMatches, 1 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2020 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1438, Invalid=4568, Unknown=0, NotChecked=0, Total=6006 [2022-04-27 22:05:08,745 INFO L413 NwaCegarLoop]: 44 mSDtfsCounter, 396 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 578 mSolverCounterSat, 356 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 396 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 934 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 356 IncrementalHoareTripleChecker+Valid, 578 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:08,746 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [396 Valid, 86 Invalid, 934 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [356 Valid, 578 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-04-27 22:05:08,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2022-04-27 22:05:08,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 98. [2022-04-27 22:05:08,896 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:08,897 INFO L82 GeneralOperation]: Start isEquivalent. First operand 249 states. Second operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,897 INFO L74 IsIncluded]: Start isIncluded. First operand 249 states. Second operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,897 INFO L87 Difference]: Start difference. First operand 249 states. Second operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:08,902 INFO L93 Difference]: Finished difference Result 249 states and 347 transitions. [2022-04-27 22:05:08,902 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 347 transitions. [2022-04-27 22:05:08,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:08,903 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:08,903 INFO L74 IsIncluded]: Start isIncluded. First operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 249 states. [2022-04-27 22:05:08,904 INFO L87 Difference]: Start difference. First operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 249 states. [2022-04-27 22:05:08,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:08,909 INFO L93 Difference]: Finished difference Result 249 states and 347 transitions. [2022-04-27 22:05:08,909 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 347 transitions. [2022-04-27 22:05:08,910 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:08,910 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:08,910 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:08,910 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:08,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 93 states have (on average 1.3978494623655915) internal successors, (130), 93 states have internal predecessors, (130), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 134 transitions. [2022-04-27 22:05:08,912 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 134 transitions. Word has length 24 [2022-04-27 22:05:08,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:08,912 INFO L495 AbstractCegarLoop]: Abstraction has 98 states and 134 transitions. [2022-04-27 22:05:08,912 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.65) internal successors, (33), 19 states have internal predecessors, (33), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:08,912 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 134 transitions. [2022-04-27 22:05:08,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 22:05:08,913 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:08,913 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:08,941 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:09,135 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:09,136 INFO L420 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:09,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:09,136 INFO L85 PathProgramCache]: Analyzing trace with hash -1576992246, now seen corresponding path program 2 times [2022-04-27 22:05:09,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:09,136 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403024661] [2022-04-27 22:05:09,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:09,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:09,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,228 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:09,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,232 INFO L290 TraceCheckUtils]: 0: Hoare triple {5579#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-27 22:05:09,233 INFO L290 TraceCheckUtils]: 1: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,233 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,233 INFO L272 TraceCheckUtils]: 0: Hoare triple {5571#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5579#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:09,233 INFO L290 TraceCheckUtils]: 1: Hoare triple {5579#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-27 22:05:09,234 INFO L290 TraceCheckUtils]: 2: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,234 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,234 INFO L272 TraceCheckUtils]: 4: Hoare triple {5571#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,234 INFO L290 TraceCheckUtils]: 5: Hoare triple {5571#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5571#true} is VALID [2022-04-27 22:05:09,234 INFO L290 TraceCheckUtils]: 6: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5571#true} is VALID [2022-04-27 22:05:09,235 INFO L290 TraceCheckUtils]: 7: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,235 INFO L290 TraceCheckUtils]: 8: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,236 INFO L290 TraceCheckUtils]: 9: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,237 INFO L290 TraceCheckUtils]: 10: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,238 INFO L290 TraceCheckUtils]: 11: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,238 INFO L290 TraceCheckUtils]: 12: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,238 INFO L290 TraceCheckUtils]: 13: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,239 INFO L290 TraceCheckUtils]: 14: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,239 INFO L290 TraceCheckUtils]: 15: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,240 INFO L290 TraceCheckUtils]: 16: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,241 INFO L290 TraceCheckUtils]: 17: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,241 INFO L290 TraceCheckUtils]: 18: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-27 22:05:09,241 INFO L290 TraceCheckUtils]: 19: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-27 22:05:09,241 INFO L290 TraceCheckUtils]: 20: Hoare triple {5572#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,242 INFO L272 TraceCheckUtils]: 21: Hoare triple {5572#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5572#false} is VALID [2022-04-27 22:05:09,242 INFO L290 TraceCheckUtils]: 22: Hoare triple {5572#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5572#false} is VALID [2022-04-27 22:05:09,242 INFO L290 TraceCheckUtils]: 23: Hoare triple {5572#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,242 INFO L290 TraceCheckUtils]: 24: Hoare triple {5572#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,242 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:09,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:09,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403024661] [2022-04-27 22:05:09,242 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1403024661] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:09,242 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [395153915] [2022-04-27 22:05:09,242 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:05:09,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:09,243 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:09,248 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:09,249 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-27 22:05:09,288 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:05:09,289 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:09,289 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 10 conjunts are in the unsatisfiable core [2022-04-27 22:05:09,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:09,297 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:09,707 INFO L272 TraceCheckUtils]: 0: Hoare triple {5571#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,707 INFO L290 TraceCheckUtils]: 1: Hoare triple {5571#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-27 22:05:09,707 INFO L290 TraceCheckUtils]: 2: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,708 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,708 INFO L272 TraceCheckUtils]: 4: Hoare triple {5571#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:09,708 INFO L290 TraceCheckUtils]: 5: Hoare triple {5571#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5571#true} is VALID [2022-04-27 22:05:09,708 INFO L290 TraceCheckUtils]: 6: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5571#true} is VALID [2022-04-27 22:05:09,720 INFO L290 TraceCheckUtils]: 7: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,721 INFO L290 TraceCheckUtils]: 8: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,721 INFO L290 TraceCheckUtils]: 9: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,722 INFO L290 TraceCheckUtils]: 10: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,723 INFO L290 TraceCheckUtils]: 11: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,723 INFO L290 TraceCheckUtils]: 12: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,723 INFO L290 TraceCheckUtils]: 13: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,724 INFO L290 TraceCheckUtils]: 14: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,724 INFO L290 TraceCheckUtils]: 15: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,725 INFO L290 TraceCheckUtils]: 16: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,726 INFO L290 TraceCheckUtils]: 17: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,726 INFO L290 TraceCheckUtils]: 18: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-27 22:05:09,726 INFO L290 TraceCheckUtils]: 19: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-27 22:05:09,726 INFO L290 TraceCheckUtils]: 20: Hoare triple {5572#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,726 INFO L272 TraceCheckUtils]: 21: Hoare triple {5572#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5572#false} is VALID [2022-04-27 22:05:09,726 INFO L290 TraceCheckUtils]: 22: Hoare triple {5572#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5572#false} is VALID [2022-04-27 22:05:09,727 INFO L290 TraceCheckUtils]: 23: Hoare triple {5572#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,727 INFO L290 TraceCheckUtils]: 24: Hoare triple {5572#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,727 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:09,727 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 24: Hoare triple {5572#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 23: Hoare triple {5572#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 22: Hoare triple {5572#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {5572#false} is VALID [2022-04-27 22:05:09,993 INFO L272 TraceCheckUtils]: 21: Hoare triple {5572#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {5572#false} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 20: Hoare triple {5572#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 19: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-27 22:05:09,993 INFO L290 TraceCheckUtils]: 18: Hoare triple {5572#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {5572#false} is VALID [2022-04-27 22:05:09,994 INFO L290 TraceCheckUtils]: 17: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {5572#false} is VALID [2022-04-27 22:05:09,995 INFO L290 TraceCheckUtils]: 16: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,995 INFO L290 TraceCheckUtils]: 15: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,995 INFO L290 TraceCheckUtils]: 14: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,996 INFO L290 TraceCheckUtils]: 13: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,997 INFO L290 TraceCheckUtils]: 12: Hoare triple {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,997 INFO L290 TraceCheckUtils]: 11: Hoare triple {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5578#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,998 INFO L290 TraceCheckUtils]: 10: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {5577#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:05:09,998 INFO L290 TraceCheckUtils]: 9: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,999 INFO L290 TraceCheckUtils]: 8: Hoare triple {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,999 INFO L290 TraceCheckUtils]: 7: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5576#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:05:09,999 INFO L290 TraceCheckUtils]: 6: Hoare triple {5571#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {5571#true} is VALID [2022-04-27 22:05:09,999 INFO L290 TraceCheckUtils]: 5: Hoare triple {5571#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {5571#true} is VALID [2022-04-27 22:05:09,999 INFO L272 TraceCheckUtils]: 4: Hoare triple {5571#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:10,000 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {5571#true} {5571#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:10,000 INFO L290 TraceCheckUtils]: 2: Hoare triple {5571#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:10,000 INFO L290 TraceCheckUtils]: 1: Hoare triple {5571#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {5571#true} is VALID [2022-04-27 22:05:10,000 INFO L272 TraceCheckUtils]: 0: Hoare triple {5571#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {5571#true} is VALID [2022-04-27 22:05:10,000 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2022-04-27 22:05:10,000 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [395153915] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:10,000 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:10,000 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-04-27 22:05:10,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835472994] [2022-04-27 22:05:10,000 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:10,001 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:10,001 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:10,001 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,026 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 25 edges. 25 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:10,026 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-27 22:05:10,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:10,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-27 22:05:10,026 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-04-27 22:05:10,026 INFO L87 Difference]: Start difference. First operand 98 states and 134 transitions. Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:10,477 INFO L93 Difference]: Finished difference Result 122 states and 166 transitions. [2022-04-27 22:05:10,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-27 22:05:10,477 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:10,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:10,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 56 transitions. [2022-04-27 22:05:10,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 56 transitions. [2022-04-27 22:05:10,479 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 56 transitions. [2022-04-27 22:05:10,545 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 56 edges. 56 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:10,546 INFO L225 Difference]: With dead ends: 122 [2022-04-27 22:05:10,546 INFO L226 Difference]: Without dead ends: 113 [2022-04-27 22:05:10,546 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 51 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-04-27 22:05:10,547 INFO L413 NwaCegarLoop]: 24 mSDtfsCounter, 34 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 41 SdHoareTripleChecker+Invalid, 96 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:10,547 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 41 Invalid, 96 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:05:10,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2022-04-27 22:05:10,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 103. [2022-04-27 22:05:10,711 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:10,712 INFO L82 GeneralOperation]: Start isEquivalent. First operand 113 states. Second operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,712 INFO L74 IsIncluded]: Start isIncluded. First operand 113 states. Second operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,712 INFO L87 Difference]: Start difference. First operand 113 states. Second operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:10,714 INFO L93 Difference]: Finished difference Result 113 states and 154 transitions. [2022-04-27 22:05:10,714 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 154 transitions. [2022-04-27 22:05:10,714 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:10,715 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:10,715 INFO L74 IsIncluded]: Start isIncluded. First operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-27 22:05:10,715 INFO L87 Difference]: Start difference. First operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 113 states. [2022-04-27 22:05:10,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:10,717 INFO L93 Difference]: Finished difference Result 113 states and 154 transitions. [2022-04-27 22:05:10,717 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 154 transitions. [2022-04-27 22:05:10,717 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:10,717 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:10,718 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:10,718 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:10,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 98 states have internal predecessors, (135), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 139 transitions. [2022-04-27 22:05:10,720 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 139 transitions. Word has length 25 [2022-04-27 22:05:10,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:10,720 INFO L495 AbstractCegarLoop]: Abstraction has 103 states and 139 transitions. [2022-04-27 22:05:10,720 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 5 states have internal predecessors, (20), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:10,720 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 139 transitions. [2022-04-27 22:05:10,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-04-27 22:05:10,721 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:10,721 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:10,751 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:10,943 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-04-27 22:05:10,943 INFO L420 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:10,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:10,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1804928507, now seen corresponding path program 3 times [2022-04-27 22:05:10,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:10,944 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155605088] [2022-04-27 22:05:10,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:10,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:10,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:11,095 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:11,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:11,116 INFO L290 TraceCheckUtils]: 0: Hoare triple {6304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-27 22:05:11,116 INFO L290 TraceCheckUtils]: 1: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,117 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,117 INFO L272 TraceCheckUtils]: 0: Hoare triple {6290#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:11,117 INFO L290 TraceCheckUtils]: 1: Hoare triple {6304#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-27 22:05:11,117 INFO L290 TraceCheckUtils]: 2: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,117 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,118 INFO L272 TraceCheckUtils]: 4: Hoare triple {6290#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,118 INFO L290 TraceCheckUtils]: 5: Hoare triple {6290#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6295#(= main_~y~0 0)} is VALID [2022-04-27 22:05:11,118 INFO L290 TraceCheckUtils]: 6: Hoare triple {6295#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:11,119 INFO L290 TraceCheckUtils]: 7: Hoare triple {6296#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:11,120 INFO L290 TraceCheckUtils]: 8: Hoare triple {6297#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:11,120 INFO L290 TraceCheckUtils]: 9: Hoare triple {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:11,121 INFO L290 TraceCheckUtils]: 10: Hoare triple {6298#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6299#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:11,121 INFO L290 TraceCheckUtils]: 11: Hoare triple {6299#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:11,122 INFO L290 TraceCheckUtils]: 12: Hoare triple {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:11,123 INFO L290 TraceCheckUtils]: 13: Hoare triple {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:11,123 INFO L290 TraceCheckUtils]: 14: Hoare triple {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:11,124 INFO L290 TraceCheckUtils]: 15: Hoare triple {6302#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:11,124 INFO L290 TraceCheckUtils]: 16: Hoare triple {6301#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:11,125 INFO L290 TraceCheckUtils]: 17: Hoare triple {6300#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:11,125 INFO L290 TraceCheckUtils]: 18: Hoare triple {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:11,126 INFO L290 TraceCheckUtils]: 19: Hoare triple {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:11,126 INFO L290 TraceCheckUtils]: 20: Hoare triple {6303#(and (<= 3 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,126 INFO L272 TraceCheckUtils]: 21: Hoare triple {6291#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6291#false} is VALID [2022-04-27 22:05:11,127 INFO L290 TraceCheckUtils]: 22: Hoare triple {6291#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6291#false} is VALID [2022-04-27 22:05:11,127 INFO L290 TraceCheckUtils]: 23: Hoare triple {6291#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,127 INFO L290 TraceCheckUtils]: 24: Hoare triple {6291#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,127 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:11,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:11,128 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155605088] [2022-04-27 22:05:11,128 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155605088] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:11,128 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [677607599] [2022-04-27 22:05:11,128 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:11,128 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:11,128 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:11,129 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:11,139 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-27 22:05:11,173 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 22:05:11,173 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:11,174 INFO L263 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 16 conjunts are in the unsatisfiable core [2022-04-27 22:05:11,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:11,181 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:11,297 INFO L272 TraceCheckUtils]: 0: Hoare triple {6290#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,297 INFO L290 TraceCheckUtils]: 1: Hoare triple {6290#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-27 22:05:11,297 INFO L290 TraceCheckUtils]: 2: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,298 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,298 INFO L272 TraceCheckUtils]: 4: Hoare triple {6290#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,298 INFO L290 TraceCheckUtils]: 5: Hoare triple {6290#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6290#true} is VALID [2022-04-27 22:05:11,298 INFO L290 TraceCheckUtils]: 6: Hoare triple {6290#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:11,299 INFO L290 TraceCheckUtils]: 7: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:11,300 INFO L290 TraceCheckUtils]: 8: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:11,300 INFO L290 TraceCheckUtils]: 9: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:11,300 INFO L290 TraceCheckUtils]: 10: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:11,301 INFO L290 TraceCheckUtils]: 11: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:11,301 INFO L290 TraceCheckUtils]: 12: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:11,308 INFO L290 TraceCheckUtils]: 13: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,308 INFO L290 TraceCheckUtils]: 14: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,308 INFO L290 TraceCheckUtils]: 15: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,309 INFO L290 TraceCheckUtils]: 16: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,309 INFO L290 TraceCheckUtils]: 17: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,312 INFO L290 TraceCheckUtils]: 18: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,312 INFO L290 TraceCheckUtils]: 19: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,313 INFO L290 TraceCheckUtils]: 20: Hoare triple {6291#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,313 INFO L272 TraceCheckUtils]: 21: Hoare triple {6291#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6291#false} is VALID [2022-04-27 22:05:11,313 INFO L290 TraceCheckUtils]: 22: Hoare triple {6291#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6291#false} is VALID [2022-04-27 22:05:11,313 INFO L290 TraceCheckUtils]: 23: Hoare triple {6291#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,313 INFO L290 TraceCheckUtils]: 24: Hoare triple {6291#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,313 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:11,313 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:11,403 INFO L290 TraceCheckUtils]: 24: Hoare triple {6291#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,403 INFO L290 TraceCheckUtils]: 23: Hoare triple {6291#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,403 INFO L290 TraceCheckUtils]: 22: Hoare triple {6291#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {6291#false} is VALID [2022-04-27 22:05:11,403 INFO L272 TraceCheckUtils]: 21: Hoare triple {6291#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {6291#false} is VALID [2022-04-27 22:05:11,403 INFO L290 TraceCheckUtils]: 20: Hoare triple {6291#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,403 INFO L290 TraceCheckUtils]: 19: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {6291#false} is VALID [2022-04-27 22:05:11,404 INFO L290 TraceCheckUtils]: 18: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,404 INFO L290 TraceCheckUtils]: 17: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,404 INFO L290 TraceCheckUtils]: 16: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,404 INFO L290 TraceCheckUtils]: 15: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,405 INFO L290 TraceCheckUtils]: 14: Hoare triple {6350#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,405 INFO L290 TraceCheckUtils]: 13: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6350#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:11,406 INFO L290 TraceCheckUtils]: 12: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:11,407 INFO L290 TraceCheckUtils]: 11: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:11,407 INFO L290 TraceCheckUtils]: 10: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:11,407 INFO L290 TraceCheckUtils]: 9: Hoare triple {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:11,408 INFO L290 TraceCheckUtils]: 8: Hoare triple {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6334#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:11,409 INFO L290 TraceCheckUtils]: 7: Hoare triple {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6330#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:11,409 INFO L290 TraceCheckUtils]: 6: Hoare triple {6290#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {6326#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:11,409 INFO L290 TraceCheckUtils]: 5: Hoare triple {6290#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {6290#true} is VALID [2022-04-27 22:05:11,409 INFO L272 TraceCheckUtils]: 4: Hoare triple {6290#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,409 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {6290#true} {6290#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,410 INFO L290 TraceCheckUtils]: 2: Hoare triple {6290#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {6290#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {6290#true} is VALID [2022-04-27 22:05:11,410 INFO L272 TraceCheckUtils]: 0: Hoare triple {6290#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {6290#true} is VALID [2022-04-27 22:05:11,410 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:05:11,410 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [677607599] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:11,410 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:11,410 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-27 22:05:11,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [908278345] [2022-04-27 22:05:11,411 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:11,411 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:11,411 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:11,411 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:11,446 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:11,446 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:05:11,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:11,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:05:11,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:05:11,447 INFO L87 Difference]: Start difference. First operand 103 states and 139 transitions. Second operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:14,731 INFO L93 Difference]: Finished difference Result 190 states and 270 transitions. [2022-04-27 22:05:14,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2022-04-27 22:05:14,732 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 25 [2022-04-27 22:05:14,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:14,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 161 transitions. [2022-04-27 22:05:14,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:14,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 161 transitions. [2022-04-27 22:05:14,736 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 46 states and 161 transitions. [2022-04-27 22:05:14,945 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 161 edges. 161 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:14,947 INFO L225 Difference]: With dead ends: 190 [2022-04-27 22:05:14,947 INFO L226 Difference]: Without dead ends: 171 [2022-04-27 22:05:14,949 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 895 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=480, Invalid=2942, Unknown=0, NotChecked=0, Total=3422 [2022-04-27 22:05:14,949 INFO L413 NwaCegarLoop]: 22 mSDtfsCounter, 140 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 645 mSolverCounterSat, 219 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 84 SdHoareTripleChecker+Invalid, 864 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 219 IncrementalHoareTripleChecker+Valid, 645 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:14,950 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [140 Valid, 84 Invalid, 864 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [219 Valid, 645 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-04-27 22:05:14,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2022-04-27 22:05:15,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 118. [2022-04-27 22:05:15,148 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:15,148 INFO L82 GeneralOperation]: Start isEquivalent. First operand 171 states. Second operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:15,148 INFO L74 IsIncluded]: Start isIncluded. First operand 171 states. Second operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:15,148 INFO L87 Difference]: Start difference. First operand 171 states. Second operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:15,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:15,150 INFO L93 Difference]: Finished difference Result 171 states and 228 transitions. [2022-04-27 22:05:15,150 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 228 transitions. [2022-04-27 22:05:15,151 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:15,151 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:15,151 INFO L74 IsIncluded]: Start isIncluded. First operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 171 states. [2022-04-27 22:05:15,151 INFO L87 Difference]: Start difference. First operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 171 states. [2022-04-27 22:05:15,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:15,154 INFO L93 Difference]: Finished difference Result 171 states and 228 transitions. [2022-04-27 22:05:15,154 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 228 transitions. [2022-04-27 22:05:15,154 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:15,154 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:15,154 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:15,155 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:15,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 113 states have (on average 1.3805309734513274) internal successors, (156), 113 states have internal predecessors, (156), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:15,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 160 transitions. [2022-04-27 22:05:15,157 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 160 transitions. Word has length 25 [2022-04-27 22:05:15,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:15,157 INFO L495 AbstractCegarLoop]: Abstraction has 118 states and 160 transitions. [2022-04-27 22:05:15,157 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:15,157 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 160 transitions. [2022-04-27 22:05:15,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-04-27 22:05:15,157 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:15,158 INFO L195 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:15,191 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:15,375 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-04-27 22:05:15,376 INFO L420 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:15,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:15,376 INFO L85 PathProgramCache]: Analyzing trace with hash -1804159924, now seen corresponding path program 3 times [2022-04-27 22:05:15,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:15,376 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1411932991] [2022-04-27 22:05:15,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:15,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:15,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:15,680 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:15,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:15,688 INFO L290 TraceCheckUtils]: 0: Hoare triple {7324#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-27 22:05:15,688 INFO L290 TraceCheckUtils]: 1: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,688 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,688 INFO L272 TraceCheckUtils]: 0: Hoare triple {7310#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7324#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:15,689 INFO L290 TraceCheckUtils]: 1: Hoare triple {7324#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-27 22:05:15,689 INFO L290 TraceCheckUtils]: 2: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,689 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,689 INFO L272 TraceCheckUtils]: 4: Hoare triple {7310#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,689 INFO L290 TraceCheckUtils]: 5: Hoare triple {7310#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,692 INFO L290 TraceCheckUtils]: 6: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7316#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-27 22:05:15,693 INFO L290 TraceCheckUtils]: 7: Hoare triple {7316#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:05:15,694 INFO L290 TraceCheckUtils]: 8: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:05:15,694 INFO L290 TraceCheckUtils]: 9: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:05:15,699 INFO L290 TraceCheckUtils]: 10: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:05:15,700 INFO L290 TraceCheckUtils]: 11: Hoare triple {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-27 22:05:15,701 INFO L290 TraceCheckUtils]: 12: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-27 22:05:15,701 INFO L290 TraceCheckUtils]: 13: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-27 22:05:15,702 INFO L290 TraceCheckUtils]: 14: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-27 22:05:15,702 INFO L290 TraceCheckUtils]: 15: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} is VALID [2022-04-27 22:05:15,703 INFO L290 TraceCheckUtils]: 16: Hoare triple {7320#(and (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 2) main_~x~0) (<= main_~x~0 main_~n~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:05:15,704 INFO L290 TraceCheckUtils]: 17: Hoare triple {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:05:15,705 INFO L290 TraceCheckUtils]: 18: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} is VALID [2022-04-27 22:05:15,705 INFO L290 TraceCheckUtils]: 19: Hoare triple {7318#(and (<= (+ main_~x~0 2) main_~n~0) (<= (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) main_~x~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} is VALID [2022-04-27 22:05:15,707 INFO L290 TraceCheckUtils]: 20: Hoare triple {7319#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~n~0 4294967293) 4294967296) 4294967296) 1) main_~x~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:15,708 INFO L290 TraceCheckUtils]: 21: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:15,709 INFO L272 TraceCheckUtils]: 22: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7322#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:05:15,709 INFO L290 TraceCheckUtils]: 23: Hoare triple {7322#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7323#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:05:15,710 INFO L290 TraceCheckUtils]: 24: Hoare triple {7323#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-27 22:05:15,710 INFO L290 TraceCheckUtils]: 25: Hoare triple {7311#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-27 22:05:15,710 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:15,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:15,710 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1411932991] [2022-04-27 22:05:15,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1411932991] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:15,710 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1822184310] [2022-04-27 22:05:15,710 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:15,710 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:15,711 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:15,712 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:15,731 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-27 22:05:15,760 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-04-27 22:05:15,760 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:15,761 INFO L263 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-27 22:05:15,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:15,777 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:15,950 INFO L272 TraceCheckUtils]: 0: Hoare triple {7310#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,951 INFO L290 TraceCheckUtils]: 1: Hoare triple {7310#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-27 22:05:15,951 INFO L290 TraceCheckUtils]: 2: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,951 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,951 INFO L272 TraceCheckUtils]: 4: Hoare triple {7310#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:15,951 INFO L290 TraceCheckUtils]: 5: Hoare triple {7310#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,952 INFO L290 TraceCheckUtils]: 6: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:05:15,953 INFO L290 TraceCheckUtils]: 7: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:05:15,953 INFO L290 TraceCheckUtils]: 8: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:05:15,953 INFO L290 TraceCheckUtils]: 9: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:05:15,954 INFO L290 TraceCheckUtils]: 10: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:05:15,954 INFO L290 TraceCheckUtils]: 11: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,955 INFO L290 TraceCheckUtils]: 12: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,955 INFO L290 TraceCheckUtils]: 13: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,955 INFO L290 TraceCheckUtils]: 14: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,956 INFO L290 TraceCheckUtils]: 15: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,957 INFO L290 TraceCheckUtils]: 16: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:05:15,957 INFO L290 TraceCheckUtils]: 17: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:05:15,958 INFO L290 TraceCheckUtils]: 18: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:05:15,958 INFO L290 TraceCheckUtils]: 19: Hoare triple {7317#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~n~0 (+ main_~x~0 2)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:05:15,959 INFO L290 TraceCheckUtils]: 20: Hoare triple {7346#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,959 INFO L290 TraceCheckUtils]: 21: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:05:15,960 INFO L272 TraceCheckUtils]: 22: Hoare triple {7315#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:15,960 INFO L290 TraceCheckUtils]: 23: Hoare triple {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7399#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:15,960 INFO L290 TraceCheckUtils]: 24: Hoare triple {7399#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-27 22:05:15,960 INFO L290 TraceCheckUtils]: 25: Hoare triple {7311#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-27 22:05:15,961 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:15,961 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:16,272 INFO L290 TraceCheckUtils]: 25: Hoare triple {7311#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-27 22:05:16,272 INFO L290 TraceCheckUtils]: 24: Hoare triple {7399#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {7311#false} is VALID [2022-04-27 22:05:16,272 INFO L290 TraceCheckUtils]: 23: Hoare triple {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {7399#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:05:16,273 INFO L272 TraceCheckUtils]: 22: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {7395#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:05:16,274 INFO L290 TraceCheckUtils]: 21: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,275 INFO L290 TraceCheckUtils]: 20: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,275 INFO L290 TraceCheckUtils]: 19: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,276 INFO L290 TraceCheckUtils]: 18: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,277 INFO L290 TraceCheckUtils]: 17: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,277 INFO L290 TraceCheckUtils]: 16: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,278 INFO L290 TraceCheckUtils]: 15: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,278 INFO L290 TraceCheckUtils]: 14: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,279 INFO L290 TraceCheckUtils]: 13: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,279 INFO L290 TraceCheckUtils]: 12: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,280 INFO L290 TraceCheckUtils]: 11: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,285 INFO L290 TraceCheckUtils]: 9: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,286 INFO L290 TraceCheckUtils]: 8: Hoare triple {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,287 INFO L290 TraceCheckUtils]: 7: Hoare triple {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7425#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,288 INFO L290 TraceCheckUtils]: 6: Hoare triple {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {7421#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:05:16,288 INFO L290 TraceCheckUtils]: 5: Hoare triple {7310#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {7321#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:05:16,288 INFO L272 TraceCheckUtils]: 4: Hoare triple {7310#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:16,288 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {7310#true} {7310#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:16,288 INFO L290 TraceCheckUtils]: 2: Hoare triple {7310#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:16,289 INFO L290 TraceCheckUtils]: 1: Hoare triple {7310#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {7310#true} is VALID [2022-04-27 22:05:16,289 INFO L272 TraceCheckUtils]: 0: Hoare triple {7310#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {7310#true} is VALID [2022-04-27 22:05:16,289 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:05:16,289 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1822184310] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:16,289 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:16,289 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 7, 7] total 17 [2022-04-27 22:05:16,289 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364508941] [2022-04-27 22:05:16,289 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:16,290 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:05:16,291 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:16,291 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:16,345 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:16,346 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-04-27 22:05:16,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:16,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-04-27 22:05:16,346 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2022-04-27 22:05:16,346 INFO L87 Difference]: Start difference. First operand 118 states and 160 transitions. Second operand has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:17,198 INFO L93 Difference]: Finished difference Result 133 states and 175 transitions. [2022-04-27 22:05:17,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-04-27 22:05:17,198 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 26 [2022-04-27 22:05:17,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:17,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-27 22:05:17,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 49 transitions. [2022-04-27 22:05:17,200 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 11 states and 49 transitions. [2022-04-27 22:05:17,246 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:17,247 INFO L225 Difference]: With dead ends: 133 [2022-04-27 22:05:17,247 INFO L226 Difference]: Without dead ends: 108 [2022-04-27 22:05:17,248 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 43 SyntacticMatches, 9 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=96, Invalid=504, Unknown=0, NotChecked=0, Total=600 [2022-04-27 22:05:17,248 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 225 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 71 SdHoareTripleChecker+Invalid, 242 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 225 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:17,249 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 71 Invalid, 242 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 225 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-27 22:05:17,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2022-04-27 22:05:17,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2022-04-27 22:05:17,415 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:17,415 INFO L82 GeneralOperation]: Start isEquivalent. First operand 108 states. Second operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,415 INFO L74 IsIncluded]: Start isIncluded. First operand 108 states. Second operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,416 INFO L87 Difference]: Start difference. First operand 108 states. Second operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:17,417 INFO L93 Difference]: Finished difference Result 108 states and 148 transitions. [2022-04-27 22:05:17,417 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-04-27 22:05:17,417 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:17,418 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:17,418 INFO L74 IsIncluded]: Start isIncluded. First operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 108 states. [2022-04-27 22:05:17,418 INFO L87 Difference]: Start difference. First operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 108 states. [2022-04-27 22:05:17,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:17,420 INFO L93 Difference]: Finished difference Result 108 states and 148 transitions. [2022-04-27 22:05:17,420 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-04-27 22:05:17,420 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:17,420 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:17,420 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:17,420 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:17,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 103 states have (on average 1.3980582524271845) internal successors, (144), 103 states have internal predecessors, (144), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 148 transitions. [2022-04-27 22:05:17,422 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 148 transitions. Word has length 26 [2022-04-27 22:05:17,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:17,422 INFO L495 AbstractCegarLoop]: Abstraction has 108 states and 148 transitions. [2022-04-27 22:05:17,422 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 3.176470588235294) internal successors, (54), 14 states have internal predecessors, (54), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:17,422 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 148 transitions. [2022-04-27 22:05:17,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-04-27 22:05:17,423 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:17,423 INFO L195 NwaCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:17,444 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:17,639 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-04-27 22:05:17,639 INFO L420 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:17,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:17,640 INFO L85 PathProgramCache]: Analyzing trace with hash -744866518, now seen corresponding path program 3 times [2022-04-27 22:05:17,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:17,640 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491157885] [2022-04-27 22:05:17,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:17,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:17,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:17,827 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:17,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:17,831 INFO L290 TraceCheckUtils]: 0: Hoare triple {8079#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-27 22:05:17,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:17,832 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:17,832 INFO L272 TraceCheckUtils]: 0: Hoare triple {8061#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8079#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:17,832 INFO L290 TraceCheckUtils]: 1: Hoare triple {8079#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-27 22:05:17,832 INFO L290 TraceCheckUtils]: 2: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:17,832 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:17,832 INFO L272 TraceCheckUtils]: 4: Hoare triple {8061#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:17,833 INFO L290 TraceCheckUtils]: 5: Hoare triple {8061#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8066#(= main_~y~0 0)} is VALID [2022-04-27 22:05:17,833 INFO L290 TraceCheckUtils]: 6: Hoare triple {8066#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:17,834 INFO L290 TraceCheckUtils]: 7: Hoare triple {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:17,834 INFO L290 TraceCheckUtils]: 8: Hoare triple {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:17,835 INFO L290 TraceCheckUtils]: 9: Hoare triple {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:17,835 INFO L290 TraceCheckUtils]: 10: Hoare triple {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:17,836 INFO L290 TraceCheckUtils]: 11: Hoare triple {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:17,836 INFO L290 TraceCheckUtils]: 12: Hoare triple {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:05:17,837 INFO L290 TraceCheckUtils]: 13: Hoare triple {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:05:17,837 INFO L290 TraceCheckUtils]: 14: Hoare triple {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:05:17,838 INFO L290 TraceCheckUtils]: 15: Hoare triple {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:05:17,838 INFO L290 TraceCheckUtils]: 16: Hoare triple {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:05:17,838 INFO L290 TraceCheckUtils]: 17: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:05:17,839 INFO L290 TraceCheckUtils]: 18: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8078#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-27 22:05:17,839 INFO L290 TraceCheckUtils]: 19: Hoare triple {8078#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:17,839 INFO L290 TraceCheckUtils]: 20: Hoare triple {8062#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:17,839 INFO L290 TraceCheckUtils]: 21: Hoare triple {8062#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:17,839 INFO L290 TraceCheckUtils]: 22: Hoare triple {8062#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:17,840 INFO L272 TraceCheckUtils]: 23: Hoare triple {8062#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8062#false} is VALID [2022-04-27 22:05:17,840 INFO L290 TraceCheckUtils]: 24: Hoare triple {8062#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8062#false} is VALID [2022-04-27 22:05:17,840 INFO L290 TraceCheckUtils]: 25: Hoare triple {8062#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:17,840 INFO L290 TraceCheckUtils]: 26: Hoare triple {8062#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:17,840 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:17,840 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:17,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491157885] [2022-04-27 22:05:17,840 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491157885] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:17,840 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [948291961] [2022-04-27 22:05:17,840 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:17,840 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:17,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:17,843 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:17,843 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-27 22:05:17,922 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-04-27 22:05:17,922 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:17,923 INFO L263 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 27 conjunts are in the unsatisfiable core [2022-04-27 22:05:17,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:17,930 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:18,200 INFO L272 TraceCheckUtils]: 0: Hoare triple {8061#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,200 INFO L290 TraceCheckUtils]: 1: Hoare triple {8061#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-27 22:05:18,200 INFO L290 TraceCheckUtils]: 2: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,200 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,200 INFO L272 TraceCheckUtils]: 4: Hoare triple {8061#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,201 INFO L290 TraceCheckUtils]: 5: Hoare triple {8061#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8066#(= main_~y~0 0)} is VALID [2022-04-27 22:05:18,201 INFO L290 TraceCheckUtils]: 6: Hoare triple {8066#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:18,202 INFO L290 TraceCheckUtils]: 7: Hoare triple {8067#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:18,202 INFO L290 TraceCheckUtils]: 8: Hoare triple {8068#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:18,203 INFO L290 TraceCheckUtils]: 9: Hoare triple {8069#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:18,204 INFO L290 TraceCheckUtils]: 10: Hoare triple {8070#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:05:18,204 INFO L290 TraceCheckUtils]: 11: Hoare triple {8071#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:05:18,205 INFO L290 TraceCheckUtils]: 12: Hoare triple {8072#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:05:18,205 INFO L290 TraceCheckUtils]: 13: Hoare triple {8073#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:05:18,206 INFO L290 TraceCheckUtils]: 14: Hoare triple {8074#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:05:18,207 INFO L290 TraceCheckUtils]: 15: Hoare triple {8075#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:05:18,207 INFO L290 TraceCheckUtils]: 16: Hoare triple {8076#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:05:18,208 INFO L290 TraceCheckUtils]: 17: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:05:18,208 INFO L290 TraceCheckUtils]: 18: Hoare triple {8077#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8137#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-27 22:05:18,209 INFO L290 TraceCheckUtils]: 19: Hoare triple {8137#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,209 INFO L290 TraceCheckUtils]: 20: Hoare triple {8062#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,209 INFO L290 TraceCheckUtils]: 21: Hoare triple {8062#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,209 INFO L290 TraceCheckUtils]: 22: Hoare triple {8062#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,209 INFO L272 TraceCheckUtils]: 23: Hoare triple {8062#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8062#false} is VALID [2022-04-27 22:05:18,209 INFO L290 TraceCheckUtils]: 24: Hoare triple {8062#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8062#false} is VALID [2022-04-27 22:05:18,209 INFO L290 TraceCheckUtils]: 25: Hoare triple {8062#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,210 INFO L290 TraceCheckUtils]: 26: Hoare triple {8062#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,210 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:18,210 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:18,600 INFO L290 TraceCheckUtils]: 26: Hoare triple {8062#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,600 INFO L290 TraceCheckUtils]: 25: Hoare triple {8062#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L290 TraceCheckUtils]: 24: Hoare triple {8062#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L272 TraceCheckUtils]: 23: Hoare triple {8062#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L290 TraceCheckUtils]: 22: Hoare triple {8062#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L290 TraceCheckUtils]: 21: Hoare triple {8062#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L290 TraceCheckUtils]: 20: Hoare triple {8062#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L290 TraceCheckUtils]: 19: Hoare triple {8183#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {8062#false} is VALID [2022-04-27 22:05:18,601 INFO L290 TraceCheckUtils]: 18: Hoare triple {8187#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {8183#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:05:18,602 INFO L290 TraceCheckUtils]: 17: Hoare triple {8187#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {8187#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:18,602 INFO L290 TraceCheckUtils]: 16: Hoare triple {8194#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8187#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:05:18,603 INFO L290 TraceCheckUtils]: 15: Hoare triple {8198#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8194#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:05:18,608 INFO L290 TraceCheckUtils]: 14: Hoare triple {8202#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8198#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:05:18,609 INFO L290 TraceCheckUtils]: 13: Hoare triple {8206#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8202#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:05:18,610 INFO L290 TraceCheckUtils]: 12: Hoare triple {8210#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8206#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:05:18,611 INFO L290 TraceCheckUtils]: 11: Hoare triple {8214#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8210#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:05:18,612 INFO L290 TraceCheckUtils]: 10: Hoare triple {8218#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8214#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:05:18,612 INFO L290 TraceCheckUtils]: 9: Hoare triple {8222#(< 0 (mod (+ main_~y~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8218#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:05:18,613 INFO L290 TraceCheckUtils]: 8: Hoare triple {8226#(< 0 (mod (+ main_~y~0 9) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8222#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:05:18,614 INFO L290 TraceCheckUtils]: 7: Hoare triple {8230#(< 0 (mod (+ main_~y~0 10) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8226#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:05:18,615 INFO L290 TraceCheckUtils]: 6: Hoare triple {8234#(< 0 (mod (+ main_~y~0 11) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {8230#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:05:18,615 INFO L290 TraceCheckUtils]: 5: Hoare triple {8061#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {8234#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:05:18,615 INFO L272 TraceCheckUtils]: 4: Hoare triple {8061#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,615 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {8061#true} {8061#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,615 INFO L290 TraceCheckUtils]: 2: Hoare triple {8061#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {8061#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {8061#true} is VALID [2022-04-27 22:05:18,616 INFO L272 TraceCheckUtils]: 0: Hoare triple {8061#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {8061#true} is VALID [2022-04-27 22:05:18,616 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:18,616 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [948291961] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:18,616 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:18,616 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15, 15] total 30 [2022-04-27 22:05:18,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [129452959] [2022-04-27 22:05:18,616 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:18,617 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:05:18,617 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:18,617 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:18,649 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:18,649 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-04-27 22:05:18,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:18,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-04-27 22:05:18,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=667, Unknown=0, NotChecked=0, Total=870 [2022-04-27 22:05:18,650 INFO L87 Difference]: Start difference. First operand 108 states and 148 transitions. Second operand has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:52,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:52,010 INFO L93 Difference]: Finished difference Result 601 states and 923 transitions. [2022-04-27 22:05:52,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2022-04-27 22:05:52,010 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 27 [2022-04-27 22:05:52,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:52,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:52,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 368 transitions. [2022-04-27 22:05:52,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:52,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 368 transitions. [2022-04-27 22:05:52,022 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 60 states and 368 transitions. [2022-04-27 22:05:52,848 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 368 edges. 368 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:52,861 INFO L225 Difference]: With dead ends: 601 [2022-04-27 22:05:52,861 INFO L226 Difference]: Without dead ends: 579 [2022-04-27 22:05:52,863 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 42 SyntacticMatches, 1 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2004 ImplicationChecksByTransitivity, 26.6s TimeCoverageRelationStatistics Valid=1927, Invalid=5555, Unknown=0, NotChecked=0, Total=7482 [2022-04-27 22:05:52,864 INFO L413 NwaCegarLoop]: 75 mSDtfsCounter, 1141 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 1664 mSolverCounterSat, 696 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1141 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 2360 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 696 IncrementalHoareTripleChecker+Valid, 1664 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:52,864 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1141 Valid, 142 Invalid, 2360 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [696 Valid, 1664 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2022-04-27 22:05:52,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2022-04-27 22:05:53,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 167. [2022-04-27 22:05:53,251 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:53,252 INFO L82 GeneralOperation]: Start isEquivalent. First operand 579 states. Second operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:53,252 INFO L74 IsIncluded]: Start isIncluded. First operand 579 states. Second operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:53,252 INFO L87 Difference]: Start difference. First operand 579 states. Second operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:53,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:53,270 INFO L93 Difference]: Finished difference Result 579 states and 811 transitions. [2022-04-27 22:05:53,270 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 811 transitions. [2022-04-27 22:05:53,271 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:53,271 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:53,272 INFO L74 IsIncluded]: Start isIncluded. First operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-27 22:05:53,272 INFO L87 Difference]: Start difference. First operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-27 22:05:53,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:53,289 INFO L93 Difference]: Finished difference Result 579 states and 811 transitions. [2022-04-27 22:05:53,289 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 811 transitions. [2022-04-27 22:05:53,291 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:53,291 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:53,291 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:53,291 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:53,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167 states, 162 states have (on average 1.3950617283950617) internal successors, (226), 162 states have internal predecessors, (226), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:53,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 230 transitions. [2022-04-27 22:05:53,294 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 230 transitions. Word has length 27 [2022-04-27 22:05:53,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:53,295 INFO L495 AbstractCegarLoop]: Abstraction has 167 states and 230 transitions. [2022-04-27 22:05:53,295 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 1.3666666666666667) internal successors, (41), 29 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:53,295 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 230 transitions. [2022-04-27 22:05:53,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:05:53,295 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:53,296 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:53,319 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:53,511 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-04-27 22:05:53,511 INFO L420 AbstractCegarLoop]: === Iteration 17 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:53,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:53,512 INFO L85 PathProgramCache]: Analyzing trace with hash -2081370324, now seen corresponding path program 3 times [2022-04-27 22:05:53,512 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:53,512 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [634857426] [2022-04-27 22:05:53,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:53,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:53,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:53,651 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:53,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:53,657 INFO L290 TraceCheckUtils]: 0: Hoare triple {10561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-27 22:05:53,657 INFO L290 TraceCheckUtils]: 1: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,657 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,658 INFO L272 TraceCheckUtils]: 0: Hoare triple {10547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:53,658 INFO L290 TraceCheckUtils]: 1: Hoare triple {10561#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-27 22:05:53,658 INFO L290 TraceCheckUtils]: 2: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,658 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,658 INFO L272 TraceCheckUtils]: 4: Hoare triple {10547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,658 INFO L290 TraceCheckUtils]: 5: Hoare triple {10547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10552#(= main_~y~0 0)} is VALID [2022-04-27 22:05:53,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {10552#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10553#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:53,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {10553#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10554#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:53,660 INFO L290 TraceCheckUtils]: 8: Hoare triple {10554#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10555#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:53,660 INFO L290 TraceCheckUtils]: 9: Hoare triple {10555#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:53,661 INFO L290 TraceCheckUtils]: 10: Hoare triple {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:53,661 INFO L290 TraceCheckUtils]: 11: Hoare triple {10556#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10557#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:53,662 INFO L290 TraceCheckUtils]: 12: Hoare triple {10557#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10558#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:53,662 INFO L290 TraceCheckUtils]: 13: Hoare triple {10558#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10559#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 14: Hoare triple {10559#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10560#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 15: Hoare triple {10560#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 16: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 17: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 18: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 19: Hoare triple {10548#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10548#false} is VALID [2022-04-27 22:05:53,663 INFO L290 TraceCheckUtils]: 20: Hoare triple {10548#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L290 TraceCheckUtils]: 21: Hoare triple {10548#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L290 TraceCheckUtils]: 22: Hoare triple {10548#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L290 TraceCheckUtils]: 23: Hoare triple {10548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L272 TraceCheckUtils]: 24: Hoare triple {10548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L290 TraceCheckUtils]: 25: Hoare triple {10548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L290 TraceCheckUtils]: 26: Hoare triple {10548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L290 TraceCheckUtils]: 27: Hoare triple {10548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,664 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-04-27 22:05:53,664 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:53,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [634857426] [2022-04-27 22:05:53,664 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [634857426] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:53,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [412941778] [2022-04-27 22:05:53,665 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-04-27 22:05:53,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:53,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:53,665 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:53,666 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-27 22:05:53,704 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-04-27 22:05:53,704 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:53,705 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:05:53,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:53,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:53,851 INFO L272 TraceCheckUtils]: 0: Hoare triple {10547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {10547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L290 TraceCheckUtils]: 2: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {10547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L290 TraceCheckUtils]: 5: Hoare triple {10547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L290 TraceCheckUtils]: 6: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-27 22:05:53,851 INFO L290 TraceCheckUtils]: 7: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-27 22:05:53,852 INFO L290 TraceCheckUtils]: 8: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:53,853 INFO L290 TraceCheckUtils]: 9: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:53,853 INFO L290 TraceCheckUtils]: 10: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:53,854 INFO L290 TraceCheckUtils]: 11: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:53,854 INFO L290 TraceCheckUtils]: 12: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:53,855 INFO L290 TraceCheckUtils]: 13: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:53,856 INFO L290 TraceCheckUtils]: 14: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,856 INFO L290 TraceCheckUtils]: 15: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,856 INFO L290 TraceCheckUtils]: 16: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,857 INFO L290 TraceCheckUtils]: 17: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,857 INFO L290 TraceCheckUtils]: 18: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,857 INFO L290 TraceCheckUtils]: 19: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,858 INFO L290 TraceCheckUtils]: 20: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,859 INFO L290 TraceCheckUtils]: 21: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:53,859 INFO L290 TraceCheckUtils]: 22: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,859 INFO L290 TraceCheckUtils]: 23: Hoare triple {10548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,859 INFO L272 TraceCheckUtils]: 24: Hoare triple {10548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10548#false} is VALID [2022-04-27 22:05:53,859 INFO L290 TraceCheckUtils]: 25: Hoare triple {10548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10548#false} is VALID [2022-04-27 22:05:53,859 INFO L290 TraceCheckUtils]: 26: Hoare triple {10548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,859 INFO L290 TraceCheckUtils]: 27: Hoare triple {10548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,860 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-04-27 22:05:53,860 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:53,950 INFO L290 TraceCheckUtils]: 27: Hoare triple {10548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,950 INFO L290 TraceCheckUtils]: 26: Hoare triple {10548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,950 INFO L290 TraceCheckUtils]: 25: Hoare triple {10548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {10548#false} is VALID [2022-04-27 22:05:53,950 INFO L272 TraceCheckUtils]: 24: Hoare triple {10548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {10548#false} is VALID [2022-04-27 22:05:53,950 INFO L290 TraceCheckUtils]: 23: Hoare triple {10548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,950 INFO L290 TraceCheckUtils]: 22: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {10548#false} is VALID [2022-04-27 22:05:53,951 INFO L290 TraceCheckUtils]: 21: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:53,952 INFO L290 TraceCheckUtils]: 20: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,952 INFO L290 TraceCheckUtils]: 19: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,955 INFO L290 TraceCheckUtils]: 18: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,956 INFO L290 TraceCheckUtils]: 17: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,956 INFO L290 TraceCheckUtils]: 16: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,957 INFO L290 TraceCheckUtils]: 15: Hoare triple {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,958 INFO L290 TraceCheckUtils]: 14: Hoare triple {10606#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10610#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:05:53,958 INFO L290 TraceCheckUtils]: 13: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10606#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:53,959 INFO L290 TraceCheckUtils]: 12: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:53,959 INFO L290 TraceCheckUtils]: 11: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:53,960 INFO L290 TraceCheckUtils]: 10: Hoare triple {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:53,960 INFO L290 TraceCheckUtils]: 9: Hoare triple {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10593#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:53,961 INFO L290 TraceCheckUtils]: 8: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10589#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:53,961 INFO L290 TraceCheckUtils]: 7: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L290 TraceCheckUtils]: 6: Hoare triple {10547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L290 TraceCheckUtils]: 5: Hoare triple {10547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L272 TraceCheckUtils]: 4: Hoare triple {10547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {10547#true} {10547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L290 TraceCheckUtils]: 2: Hoare triple {10547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L290 TraceCheckUtils]: 1: Hoare triple {10547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L272 TraceCheckUtils]: 0: Hoare triple {10547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {10547#true} is VALID [2022-04-27 22:05:53,961 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 8 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2022-04-27 22:05:53,961 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [412941778] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:53,962 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:53,962 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 6, 6] total 16 [2022-04-27 22:05:53,962 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418108772] [2022-04-27 22:05:53,962 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:53,962 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:05:53,962 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:53,962 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:53,990 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:53,990 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-04-27 22:05:53,990 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:53,991 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-04-27 22:05:53,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2022-04-27 22:05:53,991 INFO L87 Difference]: Start difference. First operand 167 states and 230 transitions. Second operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:58,361 INFO L93 Difference]: Finished difference Result 279 states and 387 transitions. [2022-04-27 22:05:58,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-04-27 22:05:58,361 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:05:58,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:05:58,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 185 transitions. [2022-04-27 22:05:58,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:58,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 185 transitions. [2022-04-27 22:05:58,379 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 45 states and 185 transitions. [2022-04-27 22:05:58,581 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 185 edges. 185 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:58,584 INFO L225 Difference]: With dead ends: 279 [2022-04-27 22:05:58,584 INFO L226 Difference]: Without dead ends: 262 [2022-04-27 22:05:58,585 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 849 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=415, Invalid=2891, Unknown=0, NotChecked=0, Total=3306 [2022-04-27 22:05:58,585 INFO L413 NwaCegarLoop]: 57 mSDtfsCounter, 155 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 1015 mSolverCounterSat, 180 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 1195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 180 IncrementalHoareTripleChecker+Valid, 1015 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:05:58,586 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [155 Valid, 119 Invalid, 1195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [180 Valid, 1015 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-04-27 22:05:58,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2022-04-27 22:05:59,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 155. [2022-04-27 22:05:59,009 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:05:59,010 INFO L82 GeneralOperation]: Start isEquivalent. First operand 262 states. Second operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,010 INFO L74 IsIncluded]: Start isIncluded. First operand 262 states. Second operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,010 INFO L87 Difference]: Start difference. First operand 262 states. Second operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:59,015 INFO L93 Difference]: Finished difference Result 262 states and 365 transitions. [2022-04-27 22:05:59,015 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 365 transitions. [2022-04-27 22:05:59,016 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:59,016 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:59,017 INFO L74 IsIncluded]: Start isIncluded. First operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 262 states. [2022-04-27 22:05:59,017 INFO L87 Difference]: Start difference. First operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 262 states. [2022-04-27 22:05:59,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:05:59,022 INFO L93 Difference]: Finished difference Result 262 states and 365 transitions. [2022-04-27 22:05:59,022 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 365 transitions. [2022-04-27 22:05:59,023 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:05:59,023 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:05:59,023 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:05:59,023 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:05:59,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 150 states have (on average 1.4066666666666667) internal successors, (211), 150 states have internal predecessors, (211), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 215 transitions. [2022-04-27 22:05:59,026 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 215 transitions. Word has length 28 [2022-04-27 22:05:59,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:05:59,026 INFO L495 AbstractCegarLoop]: Abstraction has 155 states and 215 transitions. [2022-04-27 22:05:59,027 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.25) internal successors, (36), 15 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,027 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 215 transitions. [2022-04-27 22:05:59,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-04-27 22:05:59,027 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:05:59,027 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:05:59,053 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-04-27 22:05:59,247 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-04-27 22:05:59,247 INFO L420 AbstractCegarLoop]: === Iteration 18 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:05:59,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:05:59,248 INFO L85 PathProgramCache]: Analyzing trace with hash -403341300, now seen corresponding path program 4 times [2022-04-27 22:05:59,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:05:59,248 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191952136] [2022-04-27 22:05:59,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:05:59,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:05:59,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:59,441 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:05:59,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:59,449 INFO L290 TraceCheckUtils]: 0: Hoare triple {11998#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-27 22:05:59,449 INFO L290 TraceCheckUtils]: 1: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,449 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,450 INFO L272 TraceCheckUtils]: 0: Hoare triple {11982#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11998#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:05:59,450 INFO L290 TraceCheckUtils]: 1: Hoare triple {11998#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-27 22:05:59,450 INFO L290 TraceCheckUtils]: 2: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,450 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,450 INFO L272 TraceCheckUtils]: 4: Hoare triple {11982#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,451 INFO L290 TraceCheckUtils]: 5: Hoare triple {11982#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11987#(= main_~y~0 0)} is VALID [2022-04-27 22:05:59,451 INFO L290 TraceCheckUtils]: 6: Hoare triple {11987#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11988#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:05:59,452 INFO L290 TraceCheckUtils]: 7: Hoare triple {11988#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11989#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:05:59,452 INFO L290 TraceCheckUtils]: 8: Hoare triple {11989#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11990#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:05:59,453 INFO L290 TraceCheckUtils]: 9: Hoare triple {11990#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:59,453 INFO L290 TraceCheckUtils]: 10: Hoare triple {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:05:59,453 INFO L290 TraceCheckUtils]: 11: Hoare triple {11991#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {11992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:05:59,454 INFO L290 TraceCheckUtils]: 12: Hoare triple {11992#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:59,454 INFO L290 TraceCheckUtils]: 13: Hoare triple {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:59,455 INFO L290 TraceCheckUtils]: 14: Hoare triple {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:59,455 INFO L290 TraceCheckUtils]: 15: Hoare triple {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:59,456 INFO L290 TraceCheckUtils]: 16: Hoare triple {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:05:59,456 INFO L290 TraceCheckUtils]: 17: Hoare triple {11996#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:05:59,457 INFO L290 TraceCheckUtils]: 18: Hoare triple {11995#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:05:59,457 INFO L290 TraceCheckUtils]: 19: Hoare triple {11994#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:05:59,458 INFO L290 TraceCheckUtils]: 20: Hoare triple {11993#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:59,458 INFO L290 TraceCheckUtils]: 21: Hoare triple {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:59,459 INFO L290 TraceCheckUtils]: 22: Hoare triple {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:05:59,459 INFO L290 TraceCheckUtils]: 23: Hoare triple {11997#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,459 INFO L272 TraceCheckUtils]: 24: Hoare triple {11983#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11983#false} is VALID [2022-04-27 22:05:59,459 INFO L290 TraceCheckUtils]: 25: Hoare triple {11983#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11983#false} is VALID [2022-04-27 22:05:59,459 INFO L290 TraceCheckUtils]: 26: Hoare triple {11983#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,459 INFO L290 TraceCheckUtils]: 27: Hoare triple {11983#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,459 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:05:59,460 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:05:59,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191952136] [2022-04-27 22:05:59,460 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1191952136] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:05:59,460 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1864242072] [2022-04-27 22:05:59,460 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:05:59,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:05:59,460 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:05:59,461 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:05:59,461 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-04-27 22:05:59,496 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:05:59,496 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:05:59,496 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 20 conjunts are in the unsatisfiable core [2022-04-27 22:05:59,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:05:59,504 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:05:59,658 INFO L272 TraceCheckUtils]: 0: Hoare triple {11982#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {11982#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-27 22:05:59,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {11982#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {11982#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11982#true} is VALID [2022-04-27 22:05:59,660 INFO L290 TraceCheckUtils]: 6: Hoare triple {11982#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:59,660 INFO L290 TraceCheckUtils]: 7: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:59,661 INFO L290 TraceCheckUtils]: 8: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:59,662 INFO L290 TraceCheckUtils]: 9: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:59,662 INFO L290 TraceCheckUtils]: 10: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:59,662 INFO L290 TraceCheckUtils]: 11: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:59,663 INFO L290 TraceCheckUtils]: 12: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:59,664 INFO L290 TraceCheckUtils]: 13: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:59,664 INFO L290 TraceCheckUtils]: 14: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:59,665 INFO L290 TraceCheckUtils]: 15: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,665 INFO L290 TraceCheckUtils]: 16: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,666 INFO L290 TraceCheckUtils]: 17: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,666 INFO L290 TraceCheckUtils]: 18: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,666 INFO L290 TraceCheckUtils]: 19: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,667 INFO L290 TraceCheckUtils]: 20: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,668 INFO L290 TraceCheckUtils]: 21: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,668 INFO L290 TraceCheckUtils]: 22: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,668 INFO L290 TraceCheckUtils]: 23: Hoare triple {11983#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,668 INFO L272 TraceCheckUtils]: 24: Hoare triple {11983#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11983#false} is VALID [2022-04-27 22:05:59,668 INFO L290 TraceCheckUtils]: 25: Hoare triple {11983#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11983#false} is VALID [2022-04-27 22:05:59,669 INFO L290 TraceCheckUtils]: 26: Hoare triple {11983#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,669 INFO L290 TraceCheckUtils]: 27: Hoare triple {11983#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,669 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:05:59,669 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:05:59,795 INFO L290 TraceCheckUtils]: 27: Hoare triple {11983#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,795 INFO L290 TraceCheckUtils]: 26: Hoare triple {11983#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,795 INFO L290 TraceCheckUtils]: 25: Hoare triple {11983#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {11983#false} is VALID [2022-04-27 22:05:59,797 INFO L272 TraceCheckUtils]: 24: Hoare triple {11983#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {11983#false} is VALID [2022-04-27 22:05:59,797 INFO L290 TraceCheckUtils]: 23: Hoare triple {11983#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,797 INFO L290 TraceCheckUtils]: 22: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {11983#false} is VALID [2022-04-27 22:05:59,798 INFO L290 TraceCheckUtils]: 21: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,798 INFO L290 TraceCheckUtils]: 20: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,798 INFO L290 TraceCheckUtils]: 19: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,799 INFO L290 TraceCheckUtils]: 18: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,799 INFO L290 TraceCheckUtils]: 17: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,800 INFO L290 TraceCheckUtils]: 16: Hoare triple {12051#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,800 INFO L290 TraceCheckUtils]: 15: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12051#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:05:59,801 INFO L290 TraceCheckUtils]: 14: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:59,802 INFO L290 TraceCheckUtils]: 13: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:59,803 INFO L290 TraceCheckUtils]: 12: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:59,803 INFO L290 TraceCheckUtils]: 11: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:59,804 INFO L290 TraceCheckUtils]: 10: Hoare triple {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:59,804 INFO L290 TraceCheckUtils]: 9: Hoare triple {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12032#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:05:59,806 INFO L290 TraceCheckUtils]: 8: Hoare triple {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12028#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:05:59,806 INFO L290 TraceCheckUtils]: 7: Hoare triple {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12024#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:05:59,807 INFO L290 TraceCheckUtils]: 6: Hoare triple {11982#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {12020#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:05:59,807 INFO L290 TraceCheckUtils]: 5: Hoare triple {11982#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {11982#true} is VALID [2022-04-27 22:05:59,807 INFO L272 TraceCheckUtils]: 4: Hoare triple {11982#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,807 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {11982#true} {11982#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,808 INFO L290 TraceCheckUtils]: 2: Hoare triple {11982#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,808 INFO L290 TraceCheckUtils]: 1: Hoare triple {11982#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {11982#true} is VALID [2022-04-27 22:05:59,808 INFO L272 TraceCheckUtils]: 0: Hoare triple {11982#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {11982#true} is VALID [2022-04-27 22:05:59,808 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 16 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:05:59,808 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1864242072] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:05:59,808 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:05:59,808 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7, 7] total 19 [2022-04-27 22:05:59,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437295443] [2022-04-27 22:05:59,809 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:05:59,809 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:05:59,809 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:05:59,809 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:05:59,850 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:05:59,850 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 22:05:59,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:05:59,850 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 22:05:59,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=306, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:05:59,851 INFO L87 Difference]: Start difference. First operand 155 states and 215 transitions. Second operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:06,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:06,827 INFO L93 Difference]: Finished difference Result 294 states and 418 transitions. [2022-04-27 22:06:06,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-04-27 22:06:06,827 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2022-04-27 22:06:06,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:06,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:06,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 206 transitions. [2022-04-27 22:06:06,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:06,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 206 transitions. [2022-04-27 22:06:06,833 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 69 states and 206 transitions. [2022-04-27 22:06:07,239 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 206 edges. 206 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:07,244 INFO L225 Difference]: With dead ends: 294 [2022-04-27 22:06:07,244 INFO L226 Difference]: Without dead ends: 280 [2022-04-27 22:06:07,247 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2133 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=840, Invalid=6300, Unknown=0, NotChecked=0, Total=7140 [2022-04-27 22:06:07,248 INFO L413 NwaCegarLoop]: 26 mSDtfsCounter, 179 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1157 mSolverCounterSat, 328 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 108 SdHoareTripleChecker+Invalid, 1485 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 328 IncrementalHoareTripleChecker+Valid, 1157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:07,248 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 108 Invalid, 1485 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [328 Valid, 1157 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-04-27 22:06:07,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2022-04-27 22:06:07,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 185. [2022-04-27 22:06:07,823 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:07,824 INFO L82 GeneralOperation]: Start isEquivalent. First operand 280 states. Second operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:07,824 INFO L74 IsIncluded]: Start isIncluded. First operand 280 states. Second operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:07,824 INFO L87 Difference]: Start difference. First operand 280 states. Second operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:07,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:07,829 INFO L93 Difference]: Finished difference Result 280 states and 373 transitions. [2022-04-27 22:06:07,829 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 373 transitions. [2022-04-27 22:06:07,830 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:07,830 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:07,831 INFO L74 IsIncluded]: Start isIncluded. First operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 280 states. [2022-04-27 22:06:07,831 INFO L87 Difference]: Start difference. First operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 280 states. [2022-04-27 22:06:07,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:07,836 INFO L93 Difference]: Finished difference Result 280 states and 373 transitions. [2022-04-27 22:06:07,836 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 373 transitions. [2022-04-27 22:06:07,837 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:07,837 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:07,837 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:07,837 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:07,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 180 states have (on average 1.4) internal successors, (252), 180 states have internal predecessors, (252), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:07,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 256 transitions. [2022-04-27 22:06:07,841 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 256 transitions. Word has length 28 [2022-04-27 22:06:07,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:07,841 INFO L495 AbstractCegarLoop]: Abstraction has 185 states and 256 transitions. [2022-04-27 22:06:07,841 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.1578947368421053) internal successors, (41), 18 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:07,841 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 256 transitions. [2022-04-27 22:06:07,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-04-27 22:06:07,842 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:07,842 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:07,865 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:08,065 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-04-27 22:06:08,066 INFO L420 AbstractCegarLoop]: === Iteration 19 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:08,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:08,066 INFO L85 PathProgramCache]: Analyzing trace with hash -1025963572, now seen corresponding path program 4 times [2022-04-27 22:06:08,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:08,066 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164520341] [2022-04-27 22:06:08,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:08,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:08,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:08,168 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:08,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:08,172 INFO L290 TraceCheckUtils]: 0: Hoare triple {13556#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-27 22:06:08,173 INFO L290 TraceCheckUtils]: 1: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,173 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,173 INFO L272 TraceCheckUtils]: 0: Hoare triple {13547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13556#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:08,173 INFO L290 TraceCheckUtils]: 1: Hoare triple {13556#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-27 22:06:08,173 INFO L290 TraceCheckUtils]: 2: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,174 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,174 INFO L272 TraceCheckUtils]: 4: Hoare triple {13547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,174 INFO L290 TraceCheckUtils]: 5: Hoare triple {13547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13547#true} is VALID [2022-04-27 22:06:08,174 INFO L290 TraceCheckUtils]: 6: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-27 22:06:08,174 INFO L290 TraceCheckUtils]: 7: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-27 22:06:08,175 INFO L290 TraceCheckUtils]: 8: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,175 INFO L290 TraceCheckUtils]: 9: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,176 INFO L290 TraceCheckUtils]: 10: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,177 INFO L290 TraceCheckUtils]: 11: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,178 INFO L290 TraceCheckUtils]: 12: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,178 INFO L290 TraceCheckUtils]: 13: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,179 INFO L290 TraceCheckUtils]: 14: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,179 INFO L290 TraceCheckUtils]: 15: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,180 INFO L290 TraceCheckUtils]: 16: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,180 INFO L290 TraceCheckUtils]: 17: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,181 INFO L290 TraceCheckUtils]: 18: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,182 INFO L290 TraceCheckUtils]: 19: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,183 INFO L290 TraceCheckUtils]: 20: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,184 INFO L290 TraceCheckUtils]: 21: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,184 INFO L290 TraceCheckUtils]: 22: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,184 INFO L290 TraceCheckUtils]: 23: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,184 INFO L290 TraceCheckUtils]: 24: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,184 INFO L290 TraceCheckUtils]: 25: Hoare triple {13548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,184 INFO L272 TraceCheckUtils]: 26: Hoare triple {13548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13548#false} is VALID [2022-04-27 22:06:08,185 INFO L290 TraceCheckUtils]: 27: Hoare triple {13548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13548#false} is VALID [2022-04-27 22:06:08,185 INFO L290 TraceCheckUtils]: 28: Hoare triple {13548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,185 INFO L290 TraceCheckUtils]: 29: Hoare triple {13548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,185 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:06:08,185 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:08,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164520341] [2022-04-27 22:06:08,185 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [164520341] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:08,185 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [119544690] [2022-04-27 22:06:08,185 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:06:08,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:08,186 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:08,187 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:08,204 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-04-27 22:06:08,241 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:06:08,241 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:08,242 INFO L263 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 18 conjunts are in the unsatisfiable core [2022-04-27 22:06:08,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:08,252 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:08,346 INFO L272 TraceCheckUtils]: 0: Hoare triple {13547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,346 INFO L290 TraceCheckUtils]: 1: Hoare triple {13547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-27 22:06:08,346 INFO L290 TraceCheckUtils]: 2: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,346 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,346 INFO L272 TraceCheckUtils]: 4: Hoare triple {13547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,346 INFO L290 TraceCheckUtils]: 5: Hoare triple {13547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13547#true} is VALID [2022-04-27 22:06:08,346 INFO L290 TraceCheckUtils]: 6: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-27 22:06:08,347 INFO L290 TraceCheckUtils]: 7: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-27 22:06:08,347 INFO L290 TraceCheckUtils]: 8: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,348 INFO L290 TraceCheckUtils]: 9: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,348 INFO L290 TraceCheckUtils]: 10: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,349 INFO L290 TraceCheckUtils]: 11: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,350 INFO L290 TraceCheckUtils]: 12: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,350 INFO L290 TraceCheckUtils]: 13: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,351 INFO L290 TraceCheckUtils]: 14: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,351 INFO L290 TraceCheckUtils]: 15: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,352 INFO L290 TraceCheckUtils]: 16: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,352 INFO L290 TraceCheckUtils]: 17: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,353 INFO L290 TraceCheckUtils]: 18: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,353 INFO L290 TraceCheckUtils]: 19: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,354 INFO L290 TraceCheckUtils]: 20: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 21: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 22: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 23: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 24: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 25: Hoare triple {13548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L272 TraceCheckUtils]: 26: Hoare triple {13548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 27: Hoare triple {13548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13548#false} is VALID [2022-04-27 22:06:08,355 INFO L290 TraceCheckUtils]: 28: Hoare triple {13548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,356 INFO L290 TraceCheckUtils]: 29: Hoare triple {13548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,356 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:06:08,356 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:08,594 INFO L290 TraceCheckUtils]: 29: Hoare triple {13548#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,594 INFO L290 TraceCheckUtils]: 28: Hoare triple {13548#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,595 INFO L290 TraceCheckUtils]: 27: Hoare triple {13548#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {13548#false} is VALID [2022-04-27 22:06:08,595 INFO L272 TraceCheckUtils]: 26: Hoare triple {13548#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {13548#false} is VALID [2022-04-27 22:06:08,595 INFO L290 TraceCheckUtils]: 25: Hoare triple {13548#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,595 INFO L290 TraceCheckUtils]: 24: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,595 INFO L290 TraceCheckUtils]: 23: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,595 INFO L290 TraceCheckUtils]: 22: Hoare triple {13548#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {13548#false} is VALID [2022-04-27 22:06:08,596 INFO L290 TraceCheckUtils]: 21: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {13548#false} is VALID [2022-04-27 22:06:08,596 INFO L290 TraceCheckUtils]: 20: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,598 INFO L290 TraceCheckUtils]: 19: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,598 INFO L290 TraceCheckUtils]: 18: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,598 INFO L290 TraceCheckUtils]: 17: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,599 INFO L290 TraceCheckUtils]: 16: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,599 INFO L290 TraceCheckUtils]: 15: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,599 INFO L290 TraceCheckUtils]: 14: Hoare triple {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,600 INFO L290 TraceCheckUtils]: 13: Hoare triple {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13555#(<= main_~x~0 (+ 4294967297 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,601 INFO L290 TraceCheckUtils]: 12: Hoare triple {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13554#(<= main_~x~0 (+ 4294967296 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,602 INFO L290 TraceCheckUtils]: 11: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {13553#(<= main_~x~0 (+ 4294967295 (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:06:08,602 INFO L290 TraceCheckUtils]: 10: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,602 INFO L290 TraceCheckUtils]: 9: Hoare triple {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,603 INFO L290 TraceCheckUtils]: 8: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13552#(<= main_~x~0 (+ 4294967294 (* 4294967296 (div main_~x~0 4294967296))))} is VALID [2022-04-27 22:06:08,603 INFO L290 TraceCheckUtils]: 7: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-27 22:06:08,603 INFO L290 TraceCheckUtils]: 6: Hoare triple {13547#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {13547#true} is VALID [2022-04-27 22:06:08,603 INFO L290 TraceCheckUtils]: 5: Hoare triple {13547#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {13547#true} is VALID [2022-04-27 22:06:08,603 INFO L272 TraceCheckUtils]: 4: Hoare triple {13547#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,603 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {13547#true} {13547#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,603 INFO L290 TraceCheckUtils]: 2: Hoare triple {13547#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,604 INFO L290 TraceCheckUtils]: 1: Hoare triple {13547#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {13547#true} is VALID [2022-04-27 22:06:08,604 INFO L272 TraceCheckUtils]: 0: Hoare triple {13547#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {13547#true} is VALID [2022-04-27 22:06:08,604 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:06:08,604 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [119544690] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:08,604 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:08,604 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-27 22:06:08,604 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382732582] [2022-04-27 22:06:08,604 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:08,604 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:06:08,605 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:08,605 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:08,625 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 27 edges. 27 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:08,625 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 22:06:08,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:08,626 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 22:06:08,626 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:06:08,626 INFO L87 Difference]: Start difference. First operand 185 states and 256 transitions. Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:09,617 INFO L93 Difference]: Finished difference Result 238 states and 321 transitions. [2022-04-27 22:06:09,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-04-27 22:06:09,617 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 30 [2022-04-27 22:06:09,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:09,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 66 transitions. [2022-04-27 22:06:09,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:09,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 66 transitions. [2022-04-27 22:06:09,618 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 10 states and 66 transitions. [2022-04-27 22:06:09,688 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 66 edges. 66 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:09,691 INFO L225 Difference]: With dead ends: 238 [2022-04-27 22:06:09,691 INFO L226 Difference]: Without dead ends: 228 [2022-04-27 22:06:09,691 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 62 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2022-04-27 22:06:09,692 INFO L413 NwaCegarLoop]: 29 mSDtfsCounter, 37 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 113 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 51 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 113 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:09,692 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [37 Valid, 51 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 113 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-27 22:06:09,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2022-04-27 22:06:10,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 207. [2022-04-27 22:06:10,170 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:10,171 INFO L82 GeneralOperation]: Start isEquivalent. First operand 228 states. Second operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:10,171 INFO L74 IsIncluded]: Start isIncluded. First operand 228 states. Second operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:10,171 INFO L87 Difference]: Start difference. First operand 228 states. Second operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:10,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:10,175 INFO L93 Difference]: Finished difference Result 228 states and 308 transitions. [2022-04-27 22:06:10,175 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 308 transitions. [2022-04-27 22:06:10,175 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:10,175 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:10,176 INFO L74 IsIncluded]: Start isIncluded. First operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 228 states. [2022-04-27 22:06:10,176 INFO L87 Difference]: Start difference. First operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 228 states. [2022-04-27 22:06:10,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:10,180 INFO L93 Difference]: Finished difference Result 228 states and 308 transitions. [2022-04-27 22:06:10,180 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 308 transitions. [2022-04-27 22:06:10,181 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:10,181 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:10,181 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:10,181 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:10,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 207 states, 202 states have (on average 1.3712871287128714) internal successors, (277), 202 states have internal predecessors, (277), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:10,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 281 transitions. [2022-04-27 22:06:10,185 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 281 transitions. Word has length 30 [2022-04-27 22:06:10,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:10,185 INFO L495 AbstractCegarLoop]: Abstraction has 207 states and 281 transitions. [2022-04-27 22:06:10,185 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 6 states have internal predecessors, (22), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:10,186 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 281 transitions. [2022-04-27 22:06:10,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:06:10,186 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:10,186 INFO L195 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:10,211 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:10,407 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:10,408 INFO L420 AbstractCegarLoop]: === Iteration 20 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:10,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:10,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1024958048, now seen corresponding path program 5 times [2022-04-27 22:06:10,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:10,408 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257456718] [2022-04-27 22:06:10,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:10,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:10,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:10,847 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:10,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:10,850 INFO L290 TraceCheckUtils]: 0: Hoare triple {14862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-27 22:06:10,850 INFO L290 TraceCheckUtils]: 1: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:10,851 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:10,851 INFO L272 TraceCheckUtils]: 0: Hoare triple {14846#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:10,851 INFO L290 TraceCheckUtils]: 1: Hoare triple {14862#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-27 22:06:10,851 INFO L290 TraceCheckUtils]: 2: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:10,851 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:10,851 INFO L272 TraceCheckUtils]: 4: Hoare triple {14846#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:10,852 INFO L290 TraceCheckUtils]: 5: Hoare triple {14846#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:10,854 INFO L290 TraceCheckUtils]: 6: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14852#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-27 22:06:10,858 INFO L290 TraceCheckUtils]: 7: Hoare triple {14852#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14853#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} is VALID [2022-04-27 22:06:10,859 INFO L290 TraceCheckUtils]: 8: Hoare triple {14853#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:10,860 INFO L290 TraceCheckUtils]: 9: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:10,861 INFO L290 TraceCheckUtils]: 10: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:10,862 INFO L290 TraceCheckUtils]: 11: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:06:10,865 INFO L290 TraceCheckUtils]: 12: Hoare triple {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:06:10,867 INFO L290 TraceCheckUtils]: 13: Hoare triple {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:06:10,867 INFO L290 TraceCheckUtils]: 14: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:06:10,868 INFO L290 TraceCheckUtils]: 15: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:06:10,869 INFO L290 TraceCheckUtils]: 16: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:06:10,869 INFO L290 TraceCheckUtils]: 17: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:06:10,870 INFO L290 TraceCheckUtils]: 18: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} is VALID [2022-04-27 22:06:10,872 INFO L290 TraceCheckUtils]: 19: Hoare triple {14858#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:06:10,875 INFO L290 TraceCheckUtils]: 20: Hoare triple {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:06:10,877 INFO L290 TraceCheckUtils]: 21: Hoare triple {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:10,877 INFO L290 TraceCheckUtils]: 22: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:10,879 INFO L290 TraceCheckUtils]: 23: Hoare triple {14855#(and (<= (+ main_~x~0 3) main_~n~0) (<= (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) main_~x~0) (<= main_~n~0 (+ main_~x~0 3)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:06:10,881 INFO L290 TraceCheckUtils]: 24: Hoare triple {14856#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 1) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:06:10,882 INFO L290 TraceCheckUtils]: 25: Hoare triple {14857#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= (+ main_~x~0 1) main_~n~0) (<= main_~n~0 (+ main_~x~0 1)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:10,883 INFO L290 TraceCheckUtils]: 26: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:10,884 INFO L272 TraceCheckUtils]: 27: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {14860#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:06:10,885 INFO L290 TraceCheckUtils]: 28: Hoare triple {14860#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14861#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:06:10,885 INFO L290 TraceCheckUtils]: 29: Hoare triple {14861#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-27 22:06:10,885 INFO L290 TraceCheckUtils]: 30: Hoare triple {14847#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-27 22:06:10,885 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:06:10,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:10,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257456718] [2022-04-27 22:06:10,886 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [257456718] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:10,886 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [644760863] [2022-04-27 22:06:10,886 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:06:10,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:10,886 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:10,888 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:10,917 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-04-27 22:06:10,973 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2022-04-27 22:06:10,973 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:10,974 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 29 conjunts are in the unsatisfiable core [2022-04-27 22:06:10,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:10,983 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:11,247 INFO L272 TraceCheckUtils]: 0: Hoare triple {14846#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,247 INFO L290 TraceCheckUtils]: 1: Hoare triple {14846#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-27 22:06:11,247 INFO L290 TraceCheckUtils]: 2: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,247 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,247 INFO L272 TraceCheckUtils]: 4: Hoare triple {14846#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,248 INFO L290 TraceCheckUtils]: 5: Hoare triple {14846#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,248 INFO L290 TraceCheckUtils]: 6: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:06:11,249 INFO L290 TraceCheckUtils]: 7: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 22:06:11,249 INFO L290 TraceCheckUtils]: 8: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:11,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:11,250 INFO L290 TraceCheckUtils]: 10: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:11,251 INFO L290 TraceCheckUtils]: 11: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 22:06:11,251 INFO L290 TraceCheckUtils]: 12: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:06:11,252 INFO L290 TraceCheckUtils]: 13: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,252 INFO L290 TraceCheckUtils]: 14: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,252 INFO L290 TraceCheckUtils]: 15: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,253 INFO L290 TraceCheckUtils]: 16: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,253 INFO L290 TraceCheckUtils]: 17: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,253 INFO L290 TraceCheckUtils]: 18: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,254 INFO L290 TraceCheckUtils]: 19: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:06:11,254 INFO L290 TraceCheckUtils]: 20: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 22:06:11,255 INFO L290 TraceCheckUtils]: 21: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:11,255 INFO L290 TraceCheckUtils]: 22: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:06:11,256 INFO L290 TraceCheckUtils]: 23: Hoare triple {14854#(and (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} is VALID [2022-04-27 22:06:11,256 INFO L290 TraceCheckUtils]: 24: Hoare triple {14888#(= (+ main_~x~0 1) (+ (- 1) main_~n~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} is VALID [2022-04-27 22:06:11,257 INFO L290 TraceCheckUtils]: 25: Hoare triple {14884#(= (+ main_~x~0 (* (- 1) main_~n~0) 1) 0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,257 INFO L290 TraceCheckUtils]: 26: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:06:11,258 INFO L272 TraceCheckUtils]: 27: Hoare triple {14851#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:06:11,258 INFO L290 TraceCheckUtils]: 28: Hoare triple {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14953#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:06:11,259 INFO L290 TraceCheckUtils]: 29: Hoare triple {14953#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-27 22:06:11,259 INFO L290 TraceCheckUtils]: 30: Hoare triple {14847#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-27 22:06:11,259 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:06:11,259 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:11,651 INFO L290 TraceCheckUtils]: 30: Hoare triple {14847#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-27 22:06:11,651 INFO L290 TraceCheckUtils]: 29: Hoare triple {14953#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {14847#false} is VALID [2022-04-27 22:06:11,651 INFO L290 TraceCheckUtils]: 28: Hoare triple {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {14953#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:06:11,652 INFO L272 TraceCheckUtils]: 27: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {14949#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:06:11,653 INFO L290 TraceCheckUtils]: 26: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,654 INFO L290 TraceCheckUtils]: 25: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,654 INFO L290 TraceCheckUtils]: 24: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,655 INFO L290 TraceCheckUtils]: 23: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,656 INFO L290 TraceCheckUtils]: 22: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:06:11,657 INFO L290 TraceCheckUtils]: 21: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:06:11,658 INFO L290 TraceCheckUtils]: 20: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,659 INFO L290 TraceCheckUtils]: 19: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,659 INFO L290 TraceCheckUtils]: 18: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,660 INFO L290 TraceCheckUtils]: 17: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,660 INFO L290 TraceCheckUtils]: 16: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,660 INFO L290 TraceCheckUtils]: 15: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,661 INFO L290 TraceCheckUtils]: 14: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,662 INFO L290 TraceCheckUtils]: 13: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,663 INFO L290 TraceCheckUtils]: 12: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,663 INFO L290 TraceCheckUtils]: 11: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,664 INFO L290 TraceCheckUtils]: 10: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:06:11,664 INFO L290 TraceCheckUtils]: 9: Hoare triple {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:06:11,665 INFO L290 TraceCheckUtils]: 8: Hoare triple {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14983#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:06:11,666 INFO L290 TraceCheckUtils]: 7: Hoare triple {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14979#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,667 INFO L290 TraceCheckUtils]: 6: Hoare triple {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {14975#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:06:11,667 INFO L290 TraceCheckUtils]: 5: Hoare triple {14846#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {14859#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:06:11,668 INFO L272 TraceCheckUtils]: 4: Hoare triple {14846#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,668 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {14846#true} {14846#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,668 INFO L290 TraceCheckUtils]: 2: Hoare triple {14846#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,668 INFO L290 TraceCheckUtils]: 1: Hoare triple {14846#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {14846#true} is VALID [2022-04-27 22:06:11,668 INFO L272 TraceCheckUtils]: 0: Hoare triple {14846#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {14846#true} is VALID [2022-04-27 22:06:11,668 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:06:11,668 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [644760863] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:11,668 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:11,668 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 8, 8] total 21 [2022-04-27 22:06:11,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273263190] [2022-04-27 22:06:11,669 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:11,669 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:11,669 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:11,669 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:11,745 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 73 edges. 73 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:11,745 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-04-27 22:06:11,746 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:11,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-04-27 22:06:11,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=361, Unknown=0, NotChecked=0, Total=420 [2022-04-27 22:06:11,746 INFO L87 Difference]: Start difference. First operand 207 states and 281 transitions. Second operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:13,306 INFO L93 Difference]: Finished difference Result 217 states and 291 transitions. [2022-04-27 22:06:13,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-04-27 22:06:13,306 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:13,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:13,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 46 transitions. [2022-04-27 22:06:13,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:13,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 46 transitions. [2022-04-27 22:06:13,308 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 12 states and 46 transitions. [2022-04-27 22:06:13,486 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:13,489 INFO L225 Difference]: With dead ends: 217 [2022-04-27 22:06:13,489 INFO L226 Difference]: Without dead ends: 208 [2022-04-27 22:06:13,489 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 50 SyntacticMatches, 12 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=118, Invalid=752, Unknown=0, NotChecked=0, Total=870 [2022-04-27 22:06:13,491 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 307 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:13,491 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 76 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 307 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-04-27 22:06:13,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2022-04-27 22:06:14,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2022-04-27 22:06:14,065 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:14,066 INFO L82 GeneralOperation]: Start isEquivalent. First operand 208 states. Second operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,066 INFO L74 IsIncluded]: Start isIncluded. First operand 208 states. Second operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,066 INFO L87 Difference]: Start difference. First operand 208 states. Second operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:14,069 INFO L93 Difference]: Finished difference Result 208 states and 282 transitions. [2022-04-27 22:06:14,069 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 282 transitions. [2022-04-27 22:06:14,069 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:14,069 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:14,069 INFO L74 IsIncluded]: Start isIncluded. First operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 208 states. [2022-04-27 22:06:14,070 INFO L87 Difference]: Start difference. First operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 208 states. [2022-04-27 22:06:14,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:14,073 INFO L93 Difference]: Finished difference Result 208 states and 282 transitions. [2022-04-27 22:06:14,073 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 282 transitions. [2022-04-27 22:06:14,074 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:14,074 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:14,074 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:14,074 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:14,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 203 states have (on average 1.3694581280788178) internal successors, (278), 203 states have internal predecessors, (278), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 282 transitions. [2022-04-27 22:06:14,078 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 282 transitions. Word has length 31 [2022-04-27 22:06:14,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:14,078 INFO L495 AbstractCegarLoop]: Abstraction has 208 states and 282 transitions. [2022-04-27 22:06:14,078 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.142857142857143) internal successors, (66), 18 states have internal predecessors, (66), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,079 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 282 transitions. [2022-04-27 22:06:14,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:06:14,079 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:14,079 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:14,103 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:14,303 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:14,303 INFO L420 AbstractCegarLoop]: === Iteration 21 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:14,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:14,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1970498543, now seen corresponding path program 4 times [2022-04-27 22:06:14,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:14,304 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31054573] [2022-04-27 22:06:14,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:14,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:14,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:14,504 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:14,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:14,508 INFO L290 TraceCheckUtils]: 0: Hoare triple {16120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-27 22:06:14,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,508 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,508 INFO L272 TraceCheckUtils]: 0: Hoare triple {16104#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:14,509 INFO L290 TraceCheckUtils]: 1: Hoare triple {16120#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-27 22:06:14,509 INFO L290 TraceCheckUtils]: 2: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,509 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,509 INFO L272 TraceCheckUtils]: 4: Hoare triple {16104#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,509 INFO L290 TraceCheckUtils]: 5: Hoare triple {16104#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16109#(= main_~y~0 0)} is VALID [2022-04-27 22:06:14,510 INFO L290 TraceCheckUtils]: 6: Hoare triple {16109#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16110#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:14,510 INFO L290 TraceCheckUtils]: 7: Hoare triple {16110#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16111#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:14,511 INFO L290 TraceCheckUtils]: 8: Hoare triple {16111#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16112#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:14,512 INFO L290 TraceCheckUtils]: 9: Hoare triple {16112#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16113#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:14,512 INFO L290 TraceCheckUtils]: 10: Hoare triple {16113#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:14,513 INFO L290 TraceCheckUtils]: 11: Hoare triple {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:14,513 INFO L290 TraceCheckUtils]: 12: Hoare triple {16114#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16115#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:14,514 INFO L290 TraceCheckUtils]: 13: Hoare triple {16115#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16116#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:06:14,515 INFO L290 TraceCheckUtils]: 14: Hoare triple {16116#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16117#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:06:14,515 INFO L290 TraceCheckUtils]: 15: Hoare triple {16117#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16118#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:06:14,516 INFO L290 TraceCheckUtils]: 16: Hoare triple {16118#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16119#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} is VALID [2022-04-27 22:06:14,516 INFO L290 TraceCheckUtils]: 17: Hoare triple {16119#(and (<= (div main_~z~0 4294967296) 0) (<= 1 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,516 INFO L290 TraceCheckUtils]: 18: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 19: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 20: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 21: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 22: Hoare triple {16105#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 23: Hoare triple {16105#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 24: Hoare triple {16105#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 25: Hoare triple {16105#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 26: Hoare triple {16105#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L272 TraceCheckUtils]: 27: Hoare triple {16105#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 28: Hoare triple {16105#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16105#false} is VALID [2022-04-27 22:06:14,517 INFO L290 TraceCheckUtils]: 29: Hoare triple {16105#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,518 INFO L290 TraceCheckUtils]: 30: Hoare triple {16105#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,518 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2022-04-27 22:06:14,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:14,518 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31054573] [2022-04-27 22:06:14,518 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [31054573] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:14,518 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1959425173] [2022-04-27 22:06:14,518 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-04-27 22:06:14,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:14,518 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:14,519 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:14,521 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-04-27 22:06:14,570 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-04-27 22:06:14,571 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:14,572 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-27 22:06:14,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:14,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:14,771 INFO L272 TraceCheckUtils]: 0: Hoare triple {16104#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,771 INFO L290 TraceCheckUtils]: 1: Hoare triple {16104#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-27 22:06:14,772 INFO L290 TraceCheckUtils]: 2: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,772 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,772 INFO L272 TraceCheckUtils]: 4: Hoare triple {16104#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,772 INFO L290 TraceCheckUtils]: 5: Hoare triple {16104#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16104#true} is VALID [2022-04-27 22:06:14,772 INFO L290 TraceCheckUtils]: 6: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-27 22:06:14,772 INFO L290 TraceCheckUtils]: 7: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-27 22:06:14,773 INFO L290 TraceCheckUtils]: 8: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:14,774 INFO L290 TraceCheckUtils]: 9: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:14,775 INFO L290 TraceCheckUtils]: 10: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:14,775 INFO L290 TraceCheckUtils]: 11: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:14,775 INFO L290 TraceCheckUtils]: 12: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:14,776 INFO L290 TraceCheckUtils]: 13: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:14,777 INFO L290 TraceCheckUtils]: 14: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:14,778 INFO L290 TraceCheckUtils]: 15: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:14,779 INFO L290 TraceCheckUtils]: 16: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,779 INFO L290 TraceCheckUtils]: 17: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,779 INFO L290 TraceCheckUtils]: 18: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,780 INFO L290 TraceCheckUtils]: 19: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,780 INFO L290 TraceCheckUtils]: 20: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,781 INFO L290 TraceCheckUtils]: 21: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,781 INFO L290 TraceCheckUtils]: 22: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,782 INFO L290 TraceCheckUtils]: 23: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,783 INFO L290 TraceCheckUtils]: 24: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:14,784 INFO L290 TraceCheckUtils]: 25: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,784 INFO L290 TraceCheckUtils]: 26: Hoare triple {16105#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,784 INFO L272 TraceCheckUtils]: 27: Hoare triple {16105#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16105#false} is VALID [2022-04-27 22:06:14,784 INFO L290 TraceCheckUtils]: 28: Hoare triple {16105#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16105#false} is VALID [2022-04-27 22:06:14,784 INFO L290 TraceCheckUtils]: 29: Hoare triple {16105#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,784 INFO L290 TraceCheckUtils]: 30: Hoare triple {16105#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,785 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:06:14,785 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:14,913 INFO L290 TraceCheckUtils]: 30: Hoare triple {16105#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,913 INFO L290 TraceCheckUtils]: 29: Hoare triple {16105#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,913 INFO L290 TraceCheckUtils]: 28: Hoare triple {16105#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {16105#false} is VALID [2022-04-27 22:06:14,913 INFO L272 TraceCheckUtils]: 27: Hoare triple {16105#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {16105#false} is VALID [2022-04-27 22:06:14,913 INFO L290 TraceCheckUtils]: 26: Hoare triple {16105#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,913 INFO L290 TraceCheckUtils]: 25: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {16105#false} is VALID [2022-04-27 22:06:14,915 INFO L290 TraceCheckUtils]: 24: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:14,915 INFO L290 TraceCheckUtils]: 23: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,916 INFO L290 TraceCheckUtils]: 22: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,916 INFO L290 TraceCheckUtils]: 21: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,917 INFO L290 TraceCheckUtils]: 20: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,917 INFO L290 TraceCheckUtils]: 19: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,917 INFO L290 TraceCheckUtils]: 18: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,918 INFO L290 TraceCheckUtils]: 17: Hoare triple {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,919 INFO L290 TraceCheckUtils]: 16: Hoare triple {16172#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16176#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:14,920 INFO L290 TraceCheckUtils]: 15: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16172#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:14,920 INFO L290 TraceCheckUtils]: 14: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:14,921 INFO L290 TraceCheckUtils]: 13: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:14,922 INFO L290 TraceCheckUtils]: 12: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:14,922 INFO L290 TraceCheckUtils]: 11: Hoare triple {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:14,923 INFO L290 TraceCheckUtils]: 10: Hoare triple {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16156#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:14,924 INFO L290 TraceCheckUtils]: 9: Hoare triple {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16152#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:14,924 INFO L290 TraceCheckUtils]: 8: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16148#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:14,925 INFO L290 TraceCheckUtils]: 7: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L290 TraceCheckUtils]: 6: Hoare triple {16104#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L290 TraceCheckUtils]: 5: Hoare triple {16104#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L272 TraceCheckUtils]: 4: Hoare triple {16104#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {16104#true} {16104#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L290 TraceCheckUtils]: 2: Hoare triple {16104#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {16104#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {16104#true} is VALID [2022-04-27 22:06:14,925 INFO L272 TraceCheckUtils]: 0: Hoare triple {16104#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {16104#true} is VALID [2022-04-27 22:06:14,926 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:06:14,926 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1959425173] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:14,926 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:14,926 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7, 7] total 19 [2022-04-27 22:06:14,926 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568842246] [2022-04-27 22:06:14,926 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:14,926 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:14,927 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:14,927 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:14,967 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 45 edges. 45 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:14,967 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-04-27 22:06:14,967 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:14,968 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-04-27 22:06:14,968 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2022-04-27 22:06:14,968 INFO L87 Difference]: Start difference. First operand 208 states and 282 transitions. Second operand has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:23,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:23,217 INFO L93 Difference]: Finished difference Result 376 states and 513 transitions. [2022-04-27 22:06:23,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2022-04-27 22:06:23,217 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:23,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:23,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:23,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 247 transitions. [2022-04-27 22:06:23,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:23,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 247 transitions. [2022-04-27 22:06:23,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 66 states and 247 transitions. [2022-04-27 22:06:23,613 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 247 edges. 247 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:23,621 INFO L225 Difference]: With dead ends: 376 [2022-04-27 22:06:23,621 INFO L226 Difference]: Without dead ends: 357 [2022-04-27 22:06:23,623 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1959 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=743, Invalid=5899, Unknown=0, NotChecked=0, Total=6642 [2022-04-27 22:06:23,623 INFO L413 NwaCegarLoop]: 62 mSDtfsCounter, 203 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 1599 mSolverCounterSat, 248 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 203 SdHoareTripleChecker+Valid, 144 SdHoareTripleChecker+Invalid, 1847 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 248 IncrementalHoareTripleChecker+Valid, 1599 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:23,623 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [203 Valid, 144 Invalid, 1847 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [248 Valid, 1599 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time] [2022-04-27 22:06:23,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2022-04-27 22:06:24,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 194. [2022-04-27 22:06:24,130 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:24,130 INFO L82 GeneralOperation]: Start isEquivalent. First operand 357 states. Second operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:24,130 INFO L74 IsIncluded]: Start isIncluded. First operand 357 states. Second operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:24,131 INFO L87 Difference]: Start difference. First operand 357 states. Second operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:24,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:24,137 INFO L93 Difference]: Finished difference Result 357 states and 489 transitions. [2022-04-27 22:06:24,137 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 489 transitions. [2022-04-27 22:06:24,138 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:24,138 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:24,139 INFO L74 IsIncluded]: Start isIncluded. First operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 357 states. [2022-04-27 22:06:24,139 INFO L87 Difference]: Start difference. First operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 357 states. [2022-04-27 22:06:24,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:24,146 INFO L93 Difference]: Finished difference Result 357 states and 489 transitions. [2022-04-27 22:06:24,146 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 489 transitions. [2022-04-27 22:06:24,147 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:24,147 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:24,147 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:24,147 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:24,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 194 states, 189 states have (on average 1.380952380952381) internal successors, (261), 189 states have internal predecessors, (261), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:24,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 265 transitions. [2022-04-27 22:06:24,151 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 265 transitions. Word has length 31 [2022-04-27 22:06:24,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:24,151 INFO L495 AbstractCegarLoop]: Abstraction has 194 states and 265 transitions. [2022-04-27 22:06:24,151 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 2.1052631578947367) internal successors, (40), 18 states have internal predecessors, (40), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:24,151 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 265 transitions. [2022-04-27 22:06:24,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:06:24,152 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:24,152 INFO L195 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:24,175 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:24,367 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:24,367 INFO L420 AbstractCegarLoop]: === Iteration 22 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:24,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:24,368 INFO L85 PathProgramCache]: Analyzing trace with hash 831347557, now seen corresponding path program 5 times [2022-04-27 22:06:24,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:24,368 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96721741] [2022-04-27 22:06:24,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:24,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:24,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:24,612 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:24,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:24,617 INFO L290 TraceCheckUtils]: 0: Hoare triple {17977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-27 22:06:24,617 INFO L290 TraceCheckUtils]: 1: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,617 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,618 INFO L272 TraceCheckUtils]: 0: Hoare triple {17959#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:24,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {17977#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-27 22:06:24,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {17959#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,618 INFO L290 TraceCheckUtils]: 5: Hoare triple {17959#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17964#(= main_~y~0 0)} is VALID [2022-04-27 22:06:24,619 INFO L290 TraceCheckUtils]: 6: Hoare triple {17964#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17965#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:24,620 INFO L290 TraceCheckUtils]: 7: Hoare triple {17965#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17966#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:24,620 INFO L290 TraceCheckUtils]: 8: Hoare triple {17966#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17967#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:24,621 INFO L290 TraceCheckUtils]: 9: Hoare triple {17967#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17968#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:24,622 INFO L290 TraceCheckUtils]: 10: Hoare triple {17968#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:24,622 INFO L290 TraceCheckUtils]: 11: Hoare triple {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:24,622 INFO L290 TraceCheckUtils]: 12: Hoare triple {17969#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {17970#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:06:24,623 INFO L290 TraceCheckUtils]: 13: Hoare triple {17970#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:06:24,624 INFO L290 TraceCheckUtils]: 14: Hoare triple {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:06:24,624 INFO L290 TraceCheckUtils]: 15: Hoare triple {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:06:24,625 INFO L290 TraceCheckUtils]: 16: Hoare triple {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:06:24,626 INFO L290 TraceCheckUtils]: 17: Hoare triple {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:06:24,626 INFO L290 TraceCheckUtils]: 18: Hoare triple {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:06:24,627 INFO L290 TraceCheckUtils]: 19: Hoare triple {17975#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:06:24,627 INFO L290 TraceCheckUtils]: 20: Hoare triple {17974#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:06:24,628 INFO L290 TraceCheckUtils]: 21: Hoare triple {17973#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:06:24,629 INFO L290 TraceCheckUtils]: 22: Hoare triple {17972#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:06:24,630 INFO L290 TraceCheckUtils]: 23: Hoare triple {17971#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:24,630 INFO L290 TraceCheckUtils]: 24: Hoare triple {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:24,630 INFO L290 TraceCheckUtils]: 25: Hoare triple {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:06:24,631 INFO L290 TraceCheckUtils]: 26: Hoare triple {17976#(and (<= 5 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,631 INFO L272 TraceCheckUtils]: 27: Hoare triple {17960#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17960#false} is VALID [2022-04-27 22:06:24,631 INFO L290 TraceCheckUtils]: 28: Hoare triple {17960#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17960#false} is VALID [2022-04-27 22:06:24,631 INFO L290 TraceCheckUtils]: 29: Hoare triple {17960#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,631 INFO L290 TraceCheckUtils]: 30: Hoare triple {17960#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,632 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-27 22:06:24,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:24,632 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96721741] [2022-04-27 22:06:24,632 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96721741] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:24,632 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [243252253] [2022-04-27 22:06:24,632 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:06:24,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:24,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:24,636 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:24,638 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-04-27 22:06:24,701 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-04-27 22:06:24,701 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:24,702 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 24 conjunts are in the unsatisfiable core [2022-04-27 22:06:24,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:24,711 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:24,923 INFO L272 TraceCheckUtils]: 0: Hoare triple {17959#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,923 INFO L290 TraceCheckUtils]: 1: Hoare triple {17959#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-27 22:06:24,923 INFO L290 TraceCheckUtils]: 2: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,923 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,923 INFO L272 TraceCheckUtils]: 4: Hoare triple {17959#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:24,923 INFO L290 TraceCheckUtils]: 5: Hoare triple {17959#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17959#true} is VALID [2022-04-27 22:06:24,924 INFO L290 TraceCheckUtils]: 6: Hoare triple {17959#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:24,925 INFO L290 TraceCheckUtils]: 7: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:24,926 INFO L290 TraceCheckUtils]: 8: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:24,927 INFO L290 TraceCheckUtils]: 9: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:24,928 INFO L290 TraceCheckUtils]: 10: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:24,928 INFO L290 TraceCheckUtils]: 11: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:24,928 INFO L290 TraceCheckUtils]: 12: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:24,929 INFO L290 TraceCheckUtils]: 13: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:24,930 INFO L290 TraceCheckUtils]: 14: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:24,931 INFO L290 TraceCheckUtils]: 15: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:24,932 INFO L290 TraceCheckUtils]: 16: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:24,932 INFO L290 TraceCheckUtils]: 17: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,933 INFO L290 TraceCheckUtils]: 18: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,933 INFO L290 TraceCheckUtils]: 19: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,933 INFO L290 TraceCheckUtils]: 20: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,934 INFO L290 TraceCheckUtils]: 21: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,934 INFO L290 TraceCheckUtils]: 22: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,934 INFO L290 TraceCheckUtils]: 23: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,935 INFO L290 TraceCheckUtils]: 24: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:24,935 INFO L290 TraceCheckUtils]: 25: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,935 INFO L290 TraceCheckUtils]: 26: Hoare triple {17960#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,935 INFO L272 TraceCheckUtils]: 27: Hoare triple {17960#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17960#false} is VALID [2022-04-27 22:06:24,935 INFO L290 TraceCheckUtils]: 28: Hoare triple {17960#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17960#false} is VALID [2022-04-27 22:06:24,935 INFO L290 TraceCheckUtils]: 29: Hoare triple {17960#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,936 INFO L290 TraceCheckUtils]: 30: Hoare triple {17960#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:24,936 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:06:24,936 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:25,044 INFO L290 TraceCheckUtils]: 30: Hoare triple {17960#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:25,044 INFO L290 TraceCheckUtils]: 29: Hoare triple {17960#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:25,044 INFO L290 TraceCheckUtils]: 28: Hoare triple {17960#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {17960#false} is VALID [2022-04-27 22:06:25,044 INFO L272 TraceCheckUtils]: 27: Hoare triple {17960#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {17960#false} is VALID [2022-04-27 22:06:25,044 INFO L290 TraceCheckUtils]: 26: Hoare triple {17960#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:25,044 INFO L290 TraceCheckUtils]: 25: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {17960#false} is VALID [2022-04-27 22:06:25,044 INFO L290 TraceCheckUtils]: 24: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,045 INFO L290 TraceCheckUtils]: 23: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,045 INFO L290 TraceCheckUtils]: 22: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,045 INFO L290 TraceCheckUtils]: 21: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,046 INFO L290 TraceCheckUtils]: 20: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,046 INFO L290 TraceCheckUtils]: 19: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,046 INFO L290 TraceCheckUtils]: 18: Hoare triple {18037#(< 0 (mod main_~x~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,047 INFO L290 TraceCheckUtils]: 17: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18037#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:06:25,047 INFO L290 TraceCheckUtils]: 16: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:25,048 INFO L290 TraceCheckUtils]: 15: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:25,049 INFO L290 TraceCheckUtils]: 14: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:25,049 INFO L290 TraceCheckUtils]: 13: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:25,050 INFO L290 TraceCheckUtils]: 12: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:25,050 INFO L290 TraceCheckUtils]: 11: Hoare triple {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:25,050 INFO L290 TraceCheckUtils]: 10: Hoare triple {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18015#(< 0 (mod (+ 5 main_~x~0) 4294967296))} is VALID [2022-04-27 22:06:25,056 INFO L290 TraceCheckUtils]: 9: Hoare triple {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18011#(< 0 (mod (+ main_~x~0 4) 4294967296))} is VALID [2022-04-27 22:06:25,058 INFO L290 TraceCheckUtils]: 8: Hoare triple {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18007#(< 0 (mod (+ main_~x~0 3) 4294967296))} is VALID [2022-04-27 22:06:25,058 INFO L290 TraceCheckUtils]: 7: Hoare triple {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {18003#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:06:25,059 INFO L290 TraceCheckUtils]: 6: Hoare triple {17959#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {17999#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:06:25,059 INFO L290 TraceCheckUtils]: 5: Hoare triple {17959#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {17959#true} is VALID [2022-04-27 22:06:25,059 INFO L272 TraceCheckUtils]: 4: Hoare triple {17959#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:25,059 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {17959#true} {17959#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:25,059 INFO L290 TraceCheckUtils]: 2: Hoare triple {17959#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:25,060 INFO L290 TraceCheckUtils]: 1: Hoare triple {17959#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {17959#true} is VALID [2022-04-27 22:06:25,060 INFO L272 TraceCheckUtils]: 0: Hoare triple {17959#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {17959#true} is VALID [2022-04-27 22:06:25,060 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2022-04-27 22:06:25,060 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [243252253] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:25,060 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:25,060 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8] total 22 [2022-04-27 22:06:25,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443334482] [2022-04-27 22:06:25,060 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:25,068 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:25,068 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:25,068 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:25,105 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:25,105 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-04-27 22:06:25,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:25,105 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-04-27 22:06:25,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=420, Unknown=0, NotChecked=0, Total=462 [2022-04-27 22:06:25,106 INFO L87 Difference]: Start difference. First operand 194 states and 265 transitions. Second operand has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:42,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:42,074 INFO L93 Difference]: Finished difference Result 380 states and 532 transitions. [2022-04-27 22:06:42,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 116 states. [2022-04-27 22:06:42,075 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:42,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:06:42,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:42,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 293 transitions. [2022-04-27 22:06:42,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:42,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 293 transitions. [2022-04-27 22:06:42,090 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 116 states and 293 transitions. [2022-04-27 22:06:42,808 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 293 edges. 293 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:42,814 INFO L225 Difference]: With dead ends: 380 [2022-04-27 22:06:42,814 INFO L226 Difference]: Without dead ends: 365 [2022-04-27 22:06:42,818 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 133 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6314 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=1697, Invalid=16393, Unknown=0, NotChecked=0, Total=18090 [2022-04-27 22:06:42,818 INFO L413 NwaCegarLoop]: 27 mSDtfsCounter, 267 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1856 mSolverCounterSat, 491 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 267 SdHoareTripleChecker+Valid, 119 SdHoareTripleChecker+Invalid, 2347 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 491 IncrementalHoareTripleChecker+Valid, 1856 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.7s IncrementalHoareTripleChecker+Time [2022-04-27 22:06:42,818 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [267 Valid, 119 Invalid, 2347 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [491 Valid, 1856 Invalid, 0 Unknown, 0 Unchecked, 4.7s Time] [2022-04-27 22:06:42,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-04-27 22:06:43,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 226. [2022-04-27 22:06:43,361 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:06:43,361 INFO L82 GeneralOperation]: Start isEquivalent. First operand 365 states. Second operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:43,362 INFO L74 IsIncluded]: Start isIncluded. First operand 365 states. Second operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:43,362 INFO L87 Difference]: Start difference. First operand 365 states. Second operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:43,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:43,369 INFO L93 Difference]: Finished difference Result 365 states and 475 transitions. [2022-04-27 22:06:43,369 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 475 transitions. [2022-04-27 22:06:43,369 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:43,370 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:43,370 INFO L74 IsIncluded]: Start isIncluded. First operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-27 22:06:43,370 INFO L87 Difference]: Start difference. First operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-27 22:06:43,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:06:43,377 INFO L93 Difference]: Finished difference Result 365 states and 475 transitions. [2022-04-27 22:06:43,377 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 475 transitions. [2022-04-27 22:06:43,378 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:06:43,378 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:06:43,378 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:06:43,378 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:06:43,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 226 states, 221 states have (on average 1.3710407239819005) internal successors, (303), 221 states have internal predecessors, (303), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:43,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 307 transitions. [2022-04-27 22:06:43,382 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 307 transitions. Word has length 31 [2022-04-27 22:06:43,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:06:43,383 INFO L495 AbstractCegarLoop]: Abstraction has 226 states and 307 transitions. [2022-04-27 22:06:43,383 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 2.090909090909091) internal successors, (46), 21 states have internal predecessors, (46), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:43,383 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 307 transitions. [2022-04-27 22:06:43,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-04-27 22:06:43,383 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:06:43,383 INFO L195 NwaCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:06:43,407 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-04-27 22:06:43,607 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:43,607 INFO L420 AbstractCegarLoop]: === Iteration 23 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:06:43,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:06:43,607 INFO L85 PathProgramCache]: Analyzing trace with hash 1964470703, now seen corresponding path program 5 times [2022-04-27 22:06:43,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:06:43,608 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996125910] [2022-04-27 22:06:43,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:06:43,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:06:43,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:43,849 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:06:43,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:43,862 INFO L290 TraceCheckUtils]: 0: Hoare triple {19978#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-27 22:06:43,862 INFO L290 TraceCheckUtils]: 1: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:43,862 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:43,863 INFO L272 TraceCheckUtils]: 0: Hoare triple {19958#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19978#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:06:43,863 INFO L290 TraceCheckUtils]: 1: Hoare triple {19978#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-27 22:06:43,863 INFO L290 TraceCheckUtils]: 2: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:43,863 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:43,863 INFO L272 TraceCheckUtils]: 4: Hoare triple {19958#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:43,863 INFO L290 TraceCheckUtils]: 5: Hoare triple {19958#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19963#(= main_~y~0 0)} is VALID [2022-04-27 22:06:43,864 INFO L290 TraceCheckUtils]: 6: Hoare triple {19963#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:43,864 INFO L290 TraceCheckUtils]: 7: Hoare triple {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:43,865 INFO L290 TraceCheckUtils]: 8: Hoare triple {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:43,866 INFO L290 TraceCheckUtils]: 9: Hoare triple {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:43,866 INFO L290 TraceCheckUtils]: 10: Hoare triple {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:43,867 INFO L290 TraceCheckUtils]: 11: Hoare triple {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:43,868 INFO L290 TraceCheckUtils]: 12: Hoare triple {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:43,868 INFO L290 TraceCheckUtils]: 13: Hoare triple {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:43,869 INFO L290 TraceCheckUtils]: 14: Hoare triple {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:43,870 INFO L290 TraceCheckUtils]: 15: Hoare triple {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:06:43,870 INFO L290 TraceCheckUtils]: 16: Hoare triple {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:06:43,871 INFO L290 TraceCheckUtils]: 17: Hoare triple {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:43,871 INFO L290 TraceCheckUtils]: 18: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:43,872 INFO L290 TraceCheckUtils]: 19: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-27 22:06:43,872 INFO L290 TraceCheckUtils]: 20: Hoare triple {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {19977#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} is VALID [2022-04-27 22:06:43,873 INFO L290 TraceCheckUtils]: 21: Hoare triple {19977#(and (<= (div main_~z~0 4294967296) 0) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:43,873 INFO L290 TraceCheckUtils]: 22: Hoare triple {19959#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19959#false} is VALID [2022-04-27 22:06:43,873 INFO L290 TraceCheckUtils]: 23: Hoare triple {19959#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:43,873 INFO L290 TraceCheckUtils]: 24: Hoare triple {19959#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19959#false} is VALID [2022-04-27 22:06:43,873 INFO L290 TraceCheckUtils]: 25: Hoare triple {19959#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:43,873 INFO L290 TraceCheckUtils]: 26: Hoare triple {19959#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:43,874 INFO L272 TraceCheckUtils]: 27: Hoare triple {19959#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {19959#false} is VALID [2022-04-27 22:06:43,874 INFO L290 TraceCheckUtils]: 28: Hoare triple {19959#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19959#false} is VALID [2022-04-27 22:06:43,874 INFO L290 TraceCheckUtils]: 29: Hoare triple {19959#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:43,874 INFO L290 TraceCheckUtils]: 30: Hoare triple {19959#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:43,874 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:06:43,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:06:43,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996125910] [2022-04-27 22:06:43,874 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1996125910] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:06:43,874 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1998035706] [2022-04-27 22:06:43,874 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-04-27 22:06:43,875 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:06:43,875 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:06:43,876 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:06:43,900 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-04-27 22:06:44,137 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-04-27 22:06:44,137 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:06:44,138 INFO L263 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 31 conjunts are in the unsatisfiable core [2022-04-27 22:06:44,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:06:44,146 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:06:44,393 INFO L272 TraceCheckUtils]: 0: Hoare triple {19958#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,393 INFO L290 TraceCheckUtils]: 1: Hoare triple {19958#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-27 22:06:44,393 INFO L290 TraceCheckUtils]: 2: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,393 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,393 INFO L272 TraceCheckUtils]: 4: Hoare triple {19958#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,394 INFO L290 TraceCheckUtils]: 5: Hoare triple {19958#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {19963#(= main_~y~0 0)} is VALID [2022-04-27 22:06:44,394 INFO L290 TraceCheckUtils]: 6: Hoare triple {19963#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:06:44,394 INFO L290 TraceCheckUtils]: 7: Hoare triple {19964#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:06:44,395 INFO L290 TraceCheckUtils]: 8: Hoare triple {19965#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:06:44,396 INFO L290 TraceCheckUtils]: 9: Hoare triple {19966#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:06:44,396 INFO L290 TraceCheckUtils]: 10: Hoare triple {19967#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:06:44,397 INFO L290 TraceCheckUtils]: 11: Hoare triple {19968#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:06:44,397 INFO L290 TraceCheckUtils]: 12: Hoare triple {19969#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:06:44,398 INFO L290 TraceCheckUtils]: 13: Hoare triple {19970#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:06:44,398 INFO L290 TraceCheckUtils]: 14: Hoare triple {19971#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:06:44,399 INFO L290 TraceCheckUtils]: 15: Hoare triple {19972#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:06:44,399 INFO L290 TraceCheckUtils]: 16: Hoare triple {19973#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:06:44,400 INFO L290 TraceCheckUtils]: 17: Hoare triple {19974#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:44,400 INFO L290 TraceCheckUtils]: 18: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:06:44,400 INFO L290 TraceCheckUtils]: 19: Hoare triple {19975#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} is VALID [2022-04-27 22:06:44,401 INFO L290 TraceCheckUtils]: 20: Hoare triple {19976#(and (<= main_~z~0 12) (<= 12 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20042#(and (<= main_~z~0 11) (<= 11 main_~z~0))} is VALID [2022-04-27 22:06:44,401 INFO L290 TraceCheckUtils]: 21: Hoare triple {20042#(and (<= main_~z~0 11) (<= 11 main_~z~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,407 INFO L290 TraceCheckUtils]: 22: Hoare triple {19959#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19959#false} is VALID [2022-04-27 22:06:44,407 INFO L290 TraceCheckUtils]: 23: Hoare triple {19959#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,407 INFO L290 TraceCheckUtils]: 24: Hoare triple {19959#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19959#false} is VALID [2022-04-27 22:06:44,407 INFO L290 TraceCheckUtils]: 25: Hoare triple {19959#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,408 INFO L290 TraceCheckUtils]: 26: Hoare triple {19959#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,408 INFO L272 TraceCheckUtils]: 27: Hoare triple {19959#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {19959#false} is VALID [2022-04-27 22:06:44,408 INFO L290 TraceCheckUtils]: 28: Hoare triple {19959#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19959#false} is VALID [2022-04-27 22:06:44,408 INFO L290 TraceCheckUtils]: 29: Hoare triple {19959#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,408 INFO L290 TraceCheckUtils]: 30: Hoare triple {19959#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,408 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:06:44,408 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:06:44,816 INFO L290 TraceCheckUtils]: 30: Hoare triple {19959#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,816 INFO L290 TraceCheckUtils]: 29: Hoare triple {19959#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,816 INFO L290 TraceCheckUtils]: 28: Hoare triple {19959#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {19959#false} is VALID [2022-04-27 22:06:44,816 INFO L272 TraceCheckUtils]: 27: Hoare triple {19959#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {19959#false} is VALID [2022-04-27 22:06:44,816 INFO L290 TraceCheckUtils]: 26: Hoare triple {19959#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,816 INFO L290 TraceCheckUtils]: 25: Hoare triple {19959#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,816 INFO L290 TraceCheckUtils]: 24: Hoare triple {19959#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {19959#false} is VALID [2022-04-27 22:06:44,817 INFO L290 TraceCheckUtils]: 23: Hoare triple {19959#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,817 INFO L290 TraceCheckUtils]: 22: Hoare triple {19959#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {19959#false} is VALID [2022-04-27 22:06:44,817 INFO L290 TraceCheckUtils]: 21: Hoare triple {20100#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {19959#false} is VALID [2022-04-27 22:06:44,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {20104#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {20100#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:06:44,818 INFO L290 TraceCheckUtils]: 19: Hoare triple {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {20104#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:44,819 INFO L290 TraceCheckUtils]: 18: Hoare triple {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:44,820 INFO L290 TraceCheckUtils]: 17: Hoare triple {20115#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20108#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:06:44,820 INFO L290 TraceCheckUtils]: 16: Hoare triple {20119#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20115#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:06:44,821 INFO L290 TraceCheckUtils]: 15: Hoare triple {20123#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20119#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:06:44,821 INFO L290 TraceCheckUtils]: 14: Hoare triple {20127#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20123#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:06:44,822 INFO L290 TraceCheckUtils]: 13: Hoare triple {20131#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20127#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:06:44,823 INFO L290 TraceCheckUtils]: 12: Hoare triple {20135#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20131#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:06:44,823 INFO L290 TraceCheckUtils]: 11: Hoare triple {20139#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20135#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:44,824 INFO L290 TraceCheckUtils]: 10: Hoare triple {20143#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20139#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:06:44,825 INFO L290 TraceCheckUtils]: 9: Hoare triple {20147#(< 0 (mod (+ main_~y~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20143#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:06:44,826 INFO L290 TraceCheckUtils]: 8: Hoare triple {20151#(< 0 (mod (+ main_~y~0 9) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20147#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:06:44,827 INFO L290 TraceCheckUtils]: 7: Hoare triple {20155#(< 0 (mod (+ main_~y~0 10) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20151#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:06:44,828 INFO L290 TraceCheckUtils]: 6: Hoare triple {20159#(< 0 (mod (+ main_~y~0 11) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {20155#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:06:44,828 INFO L290 TraceCheckUtils]: 5: Hoare triple {19958#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {20159#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:06:44,828 INFO L272 TraceCheckUtils]: 4: Hoare triple {19958#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,828 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19958#true} {19958#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,828 INFO L290 TraceCheckUtils]: 2: Hoare triple {19958#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,828 INFO L290 TraceCheckUtils]: 1: Hoare triple {19958#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {19958#true} is VALID [2022-04-27 22:06:44,828 INFO L272 TraceCheckUtils]: 0: Hoare triple {19958#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {19958#true} is VALID [2022-04-27 22:06:44,829 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-04-27 22:06:44,829 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1998035706] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:06:44,829 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:06:44,829 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 34 [2022-04-27 22:06:44,829 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349332332] [2022-04-27 22:06:44,829 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:06:44,830 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:06:44,830 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:06:44,830 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:44,872 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:06:44,872 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-04-27 22:06:44,873 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:06:44,873 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-04-27 22:06:44,873 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=240, Invalid=882, Unknown=0, NotChecked=0, Total=1122 [2022-04-27 22:06:44,873 INFO L87 Difference]: Start difference. First operand 226 states and 307 transitions. Second operand has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:06:53,919 WARN L232 SmtUtils]: Spent 5.22s on a formula simplification that was a NOOP. DAG size: 60 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:08:42,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:42,858 INFO L93 Difference]: Finished difference Result 920 states and 1372 transitions. [2022-04-27 22:08:42,858 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 129 states. [2022-04-27 22:08:42,858 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 31 [2022-04-27 22:08:42,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:42,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:42,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 492 transitions. [2022-04-27 22:08:42,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:42,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 492 transitions. [2022-04-27 22:08:42,868 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 129 states and 492 transitions. [2022-04-27 22:08:48,623 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 492 edges. 491 inductive. 0 not inductive. 1 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:48,647 INFO L225 Difference]: With dead ends: 920 [2022-04-27 22:08:48,647 INFO L226 Difference]: Without dead ends: 879 [2022-04-27 22:08:48,650 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 48 SyntacticMatches, 1 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9847 ImplicationChecksByTransitivity, 95.8s TimeCoverageRelationStatistics Valid=6087, Invalid=19353, Unknown=0, NotChecked=0, Total=25440 [2022-04-27 22:08:48,650 INFO L413 NwaCegarLoop]: 84 mSDtfsCounter, 1411 mSDsluCounter, 82 mSDsCounter, 0 mSdLazyCounter, 2174 mSolverCounterSat, 1251 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 9.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1411 SdHoareTripleChecker+Valid, 166 SdHoareTripleChecker+Invalid, 3425 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1251 IncrementalHoareTripleChecker+Valid, 2174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 10.0s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:48,650 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [1411 Valid, 166 Invalid, 3425 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1251 Valid, 2174 Invalid, 0 Unknown, 0 Unchecked, 10.0s Time] [2022-04-27 22:08:48,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 879 states. [2022-04-27 22:08:49,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 879 to 257. [2022-04-27 22:08:49,325 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:49,326 INFO L82 GeneralOperation]: Start isEquivalent. First operand 879 states. Second operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:49,326 INFO L74 IsIncluded]: Start isIncluded. First operand 879 states. Second operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:49,326 INFO L87 Difference]: Start difference. First operand 879 states. Second operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:49,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:49,353 INFO L93 Difference]: Finished difference Result 879 states and 1219 transitions. [2022-04-27 22:08:49,353 INFO L276 IsEmpty]: Start isEmpty. Operand 879 states and 1219 transitions. [2022-04-27 22:08:49,354 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:49,354 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:49,355 INFO L74 IsIncluded]: Start isIncluded. First operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 879 states. [2022-04-27 22:08:49,355 INFO L87 Difference]: Start difference. First operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 879 states. [2022-04-27 22:08:49,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:49,388 INFO L93 Difference]: Finished difference Result 879 states and 1219 transitions. [2022-04-27 22:08:49,388 INFO L276 IsEmpty]: Start isEmpty. Operand 879 states and 1219 transitions. [2022-04-27 22:08:49,389 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:49,389 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:49,389 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:49,389 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:49,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 257 states, 252 states have (on average 1.380952380952381) internal successors, (348), 252 states have internal predecessors, (348), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:49,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 352 transitions. [2022-04-27 22:08:49,395 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 352 transitions. Word has length 31 [2022-04-27 22:08:49,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:49,395 INFO L495 AbstractCegarLoop]: Abstraction has 257 states and 352 transitions. [2022-04-27 22:08:49,395 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 33 states have internal predecessors, (47), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:49,395 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 352 transitions. [2022-04-27 22:08:49,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:08:49,396 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:49,396 INFO L195 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:49,405 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-04-27 22:08:49,600 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:49,601 INFO L420 AbstractCegarLoop]: === Iteration 24 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:49,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:49,601 INFO L85 PathProgramCache]: Analyzing trace with hash 179018828, now seen corresponding path program 6 times [2022-04-27 22:08:49,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:49,601 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118452330] [2022-04-27 22:08:49,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:49,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:49,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:49,713 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:49,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:49,717 INFO L290 TraceCheckUtils]: 0: Hoare triple {23719#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-27 22:08:49,717 INFO L290 TraceCheckUtils]: 1: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:49,717 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:49,718 INFO L272 TraceCheckUtils]: 0: Hoare triple {23710#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23719#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:49,718 INFO L290 TraceCheckUtils]: 1: Hoare triple {23719#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-27 22:08:49,718 INFO L290 TraceCheckUtils]: 2: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:49,718 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:49,719 INFO L272 TraceCheckUtils]: 4: Hoare triple {23710#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:49,719 INFO L290 TraceCheckUtils]: 5: Hoare triple {23710#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23710#true} is VALID [2022-04-27 22:08:49,719 INFO L290 TraceCheckUtils]: 6: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:49,719 INFO L290 TraceCheckUtils]: 7: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:49,719 INFO L290 TraceCheckUtils]: 8: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:49,720 INFO L290 TraceCheckUtils]: 9: Hoare triple {23710#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:49,720 INFO L290 TraceCheckUtils]: 10: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:49,721 INFO L290 TraceCheckUtils]: 11: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:49,722 INFO L290 TraceCheckUtils]: 12: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,723 INFO L290 TraceCheckUtils]: 13: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,723 INFO L290 TraceCheckUtils]: 14: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,724 INFO L290 TraceCheckUtils]: 15: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,724 INFO L290 TraceCheckUtils]: 16: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,725 INFO L290 TraceCheckUtils]: 17: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,725 INFO L290 TraceCheckUtils]: 18: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,727 INFO L290 TraceCheckUtils]: 19: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:49,728 INFO L290 TraceCheckUtils]: 20: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:49,729 INFO L290 TraceCheckUtils]: 21: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:49,729 INFO L290 TraceCheckUtils]: 22: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23711#false} is VALID [2022-04-27 22:08:49,729 INFO L290 TraceCheckUtils]: 23: Hoare triple {23711#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 24: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 25: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 26: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 27: Hoare triple {23711#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L272 TraceCheckUtils]: 28: Hoare triple {23711#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 29: Hoare triple {23711#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 30: Hoare triple {23711#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L290 TraceCheckUtils]: 31: Hoare triple {23711#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:49,730 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:08:49,731 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:49,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118452330] [2022-04-27 22:08:49,731 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [118452330] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:49,731 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1751053307] [2022-04-27 22:08:49,731 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:08:49,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:49,731 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:49,732 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:49,753 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-04-27 22:08:49,796 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-04-27 22:08:49,796 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:49,797 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 14 conjunts are in the unsatisfiable core [2022-04-27 22:08:49,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:49,806 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:50,050 INFO L272 TraceCheckUtils]: 0: Hoare triple {23710#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L290 TraceCheckUtils]: 1: Hoare triple {23710#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L290 TraceCheckUtils]: 2: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L272 TraceCheckUtils]: 4: Hoare triple {23710#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L290 TraceCheckUtils]: 5: Hoare triple {23710#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L290 TraceCheckUtils]: 6: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L290 TraceCheckUtils]: 7: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:50,051 INFO L290 TraceCheckUtils]: 8: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:50,052 INFO L290 TraceCheckUtils]: 9: Hoare triple {23710#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:50,052 INFO L290 TraceCheckUtils]: 10: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:50,053 INFO L290 TraceCheckUtils]: 11: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:50,054 INFO L290 TraceCheckUtils]: 12: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,055 INFO L290 TraceCheckUtils]: 13: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,056 INFO L290 TraceCheckUtils]: 14: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,056 INFO L290 TraceCheckUtils]: 15: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,057 INFO L290 TraceCheckUtils]: 16: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,057 INFO L290 TraceCheckUtils]: 17: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,058 INFO L290 TraceCheckUtils]: 18: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,059 INFO L290 TraceCheckUtils]: 19: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,060 INFO L290 TraceCheckUtils]: 20: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:50,061 INFO L290 TraceCheckUtils]: 21: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 22: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 23: Hoare triple {23711#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 24: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 25: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 26: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 27: Hoare triple {23711#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L272 TraceCheckUtils]: 28: Hoare triple {23711#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 29: Hoare triple {23711#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23711#false} is VALID [2022-04-27 22:08:50,062 INFO L290 TraceCheckUtils]: 30: Hoare triple {23711#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,063 INFO L290 TraceCheckUtils]: 31: Hoare triple {23711#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,063 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:08:50,063 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:50,331 INFO L290 TraceCheckUtils]: 31: Hoare triple {23711#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,331 INFO L290 TraceCheckUtils]: 30: Hoare triple {23711#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L290 TraceCheckUtils]: 29: Hoare triple {23711#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L272 TraceCheckUtils]: 28: Hoare triple {23711#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L290 TraceCheckUtils]: 27: Hoare triple {23711#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L290 TraceCheckUtils]: 26: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L290 TraceCheckUtils]: 25: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L290 TraceCheckUtils]: 24: Hoare triple {23711#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {23711#false} is VALID [2022-04-27 22:08:50,332 INFO L290 TraceCheckUtils]: 23: Hoare triple {23711#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {23711#false} is VALID [2022-04-27 22:08:50,333 INFO L290 TraceCheckUtils]: 22: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23711#false} is VALID [2022-04-27 22:08:50,334 INFO L290 TraceCheckUtils]: 21: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:50,335 INFO L290 TraceCheckUtils]: 20: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:50,336 INFO L290 TraceCheckUtils]: 19: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,336 INFO L290 TraceCheckUtils]: 18: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,337 INFO L290 TraceCheckUtils]: 17: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,337 INFO L290 TraceCheckUtils]: 16: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,338 INFO L290 TraceCheckUtils]: 15: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,338 INFO L290 TraceCheckUtils]: 14: Hoare triple {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,339 INFO L290 TraceCheckUtils]: 13: Hoare triple {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23718#(<= main_~x~0 (+ 3 (* (div (+ main_~x~0 (- 3)) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,340 INFO L290 TraceCheckUtils]: 12: Hoare triple {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23717#(<= main_~x~0 (+ 2 (* (div (+ (- 2) main_~x~0) 4294967296) 4294967296)))} is VALID [2022-04-27 22:08:50,341 INFO L290 TraceCheckUtils]: 11: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {23716#(<= main_~x~0 (+ (* (div (+ (- 1) main_~x~0) 4294967296) 4294967296) 1))} is VALID [2022-04-27 22:08:50,341 INFO L290 TraceCheckUtils]: 10: Hoare triple {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 9: Hoare triple {23710#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {23715#(<= main_~x~0 (* 4294967296 (div main_~x~0 4294967296)))} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 8: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 7: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 6: Hoare triple {23710#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 5: Hoare triple {23710#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L272 TraceCheckUtils]: 4: Hoare triple {23710#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {23710#true} {23710#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 2: Hoare triple {23710#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L290 TraceCheckUtils]: 1: Hoare triple {23710#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {23710#true} is VALID [2022-04-27 22:08:50,342 INFO L272 TraceCheckUtils]: 0: Hoare triple {23710#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {23710#true} is VALID [2022-04-27 22:08:50,343 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2022-04-27 22:08:50,343 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1751053307] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:50,343 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:50,343 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-04-27 22:08:50,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [292281390] [2022-04-27 22:08:50,343 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:50,344 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:08:50,344 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:50,344 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:50,370 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 28 edges. 28 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:50,370 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-04-27 22:08:50,370 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:50,371 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-04-27 22:08:50,371 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2022-04-27 22:08:50,371 INFO L87 Difference]: Start difference. First operand 257 states and 352 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:51,514 INFO L93 Difference]: Finished difference Result 305 states and 411 transitions. [2022-04-27 22:08:51,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-04-27 22:08:51,515 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:08:51,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:08:51,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 62 transitions. [2022-04-27 22:08:51,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:51,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 62 transitions. [2022-04-27 22:08:51,516 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 7 states and 62 transitions. [2022-04-27 22:08:51,569 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 62 edges. 62 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:51,572 INFO L225 Difference]: With dead ends: 305 [2022-04-27 22:08:51,572 INFO L226 Difference]: Without dead ends: 278 [2022-04-27 22:08:51,573 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 67 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2022-04-27 22:08:51,573 INFO L413 NwaCegarLoop]: 33 mSDtfsCounter, 33 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 147 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 166 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 147 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-27 22:08:51,573 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 55 Invalid, 166 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 147 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-27 22:08:51,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2022-04-27 22:08:52,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 261. [2022-04-27 22:08:52,237 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:08:52,238 INFO L82 GeneralOperation]: Start isEquivalent. First operand 278 states. Second operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:52,238 INFO L74 IsIncluded]: Start isIncluded. First operand 278 states. Second operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:52,238 INFO L87 Difference]: Start difference. First operand 278 states. Second operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:52,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:52,241 INFO L93 Difference]: Finished difference Result 278 states and 377 transitions. [2022-04-27 22:08:52,241 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 377 transitions. [2022-04-27 22:08:52,241 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:52,242 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:52,242 INFO L74 IsIncluded]: Start isIncluded. First operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 278 states. [2022-04-27 22:08:52,242 INFO L87 Difference]: Start difference. First operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 278 states. [2022-04-27 22:08:52,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:08:52,245 INFO L93 Difference]: Finished difference Result 278 states and 377 transitions. [2022-04-27 22:08:52,245 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 377 transitions. [2022-04-27 22:08:52,245 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:08:52,245 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:08:52,245 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:08:52,245 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:08:52,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 261 states, 256 states have (on average 1.375) internal successors, (352), 256 states have internal predecessors, (352), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:52,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 356 transitions. [2022-04-27 22:08:52,249 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 356 transitions. Word has length 32 [2022-04-27 22:08:52,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:08:52,249 INFO L495 AbstractCegarLoop]: Abstraction has 261 states and 356 transitions. [2022-04-27 22:08:52,249 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:52,249 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 356 transitions. [2022-04-27 22:08:52,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-04-27 22:08:52,249 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:08:52,249 INFO L195 NwaCegarLoop]: trace histogram [6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:08:52,265 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-04-27 22:08:52,450 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:52,450 INFO L420 AbstractCegarLoop]: === Iteration 25 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:08:52,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:08:52,450 INFO L85 PathProgramCache]: Analyzing trace with hash -1026125076, now seen corresponding path program 6 times [2022-04-27 22:08:52,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:08:52,450 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668288205] [2022-04-27 22:08:52,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:08:52,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:08:52,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:52,648 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:08:52,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:52,651 INFO L290 TraceCheckUtils]: 0: Hoare triple {25294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-27 22:08:52,651 INFO L290 TraceCheckUtils]: 1: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:52,652 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:52,652 INFO L272 TraceCheckUtils]: 0: Hoare triple {25279#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:08:52,652 INFO L290 TraceCheckUtils]: 1: Hoare triple {25294#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-27 22:08:52,652 INFO L290 TraceCheckUtils]: 2: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:52,652 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:52,652 INFO L272 TraceCheckUtils]: 4: Hoare triple {25279#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:52,653 INFO L290 TraceCheckUtils]: 5: Hoare triple {25279#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25284#(= main_~y~0 0)} is VALID [2022-04-27 22:08:52,653 INFO L290 TraceCheckUtils]: 6: Hoare triple {25284#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:52,654 INFO L290 TraceCheckUtils]: 7: Hoare triple {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:52,655 INFO L290 TraceCheckUtils]: 8: Hoare triple {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:52,655 INFO L290 TraceCheckUtils]: 9: Hoare triple {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:52,656 INFO L290 TraceCheckUtils]: 10: Hoare triple {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:52,657 INFO L290 TraceCheckUtils]: 11: Hoare triple {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:52,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:52,657 INFO L290 TraceCheckUtils]: 13: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:52,658 INFO L290 TraceCheckUtils]: 14: Hoare triple {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:52,659 INFO L290 TraceCheckUtils]: 15: Hoare triple {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25293#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:08:52,659 INFO L290 TraceCheckUtils]: 16: Hoare triple {25293#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:52,659 INFO L290 TraceCheckUtils]: 17: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:52,659 INFO L290 TraceCheckUtils]: 18: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 19: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 20: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 22: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 23: Hoare triple {25280#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 24: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 25: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 26: Hoare triple {25280#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 27: Hoare triple {25280#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L272 TraceCheckUtils]: 28: Hoare triple {25280#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 29: Hoare triple {25280#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 30: Hoare triple {25280#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:52,660 INFO L290 TraceCheckUtils]: 31: Hoare triple {25280#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:52,661 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 22:08:52,661 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:08:52,661 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668288205] [2022-04-27 22:08:52,661 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1668288205] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:08:52,661 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1159183229] [2022-04-27 22:08:52,661 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:08:52,661 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:08:52,661 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:08:52,662 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:08:52,664 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-04-27 22:08:52,798 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-04-27 22:08:52,799 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:08:52,800 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 21 conjunts are in the unsatisfiable core [2022-04-27 22:08:52,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:08:52,810 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:08:53,055 INFO L272 TraceCheckUtils]: 0: Hoare triple {25279#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,055 INFO L290 TraceCheckUtils]: 1: Hoare triple {25279#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-27 22:08:53,055 INFO L290 TraceCheckUtils]: 2: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,055 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,055 INFO L272 TraceCheckUtils]: 4: Hoare triple {25279#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,063 INFO L290 TraceCheckUtils]: 5: Hoare triple {25279#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25284#(= main_~y~0 0)} is VALID [2022-04-27 22:08:53,064 INFO L290 TraceCheckUtils]: 6: Hoare triple {25284#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:08:53,065 INFO L290 TraceCheckUtils]: 7: Hoare triple {25285#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:08:53,065 INFO L290 TraceCheckUtils]: 8: Hoare triple {25286#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:08:53,066 INFO L290 TraceCheckUtils]: 9: Hoare triple {25287#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:08:53,067 INFO L290 TraceCheckUtils]: 10: Hoare triple {25288#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:08:53,067 INFO L290 TraceCheckUtils]: 11: Hoare triple {25289#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:53,068 INFO L290 TraceCheckUtils]: 12: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:08:53,068 INFO L290 TraceCheckUtils]: 13: Hoare triple {25290#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:08:53,069 INFO L290 TraceCheckUtils]: 14: Hoare triple {25291#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:08:53,070 INFO L290 TraceCheckUtils]: 15: Hoare triple {25292#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25343#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:08:53,070 INFO L290 TraceCheckUtils]: 16: Hoare triple {25343#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,070 INFO L290 TraceCheckUtils]: 17: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,070 INFO L290 TraceCheckUtils]: 18: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,070 INFO L290 TraceCheckUtils]: 19: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 20: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 21: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 22: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 23: Hoare triple {25280#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 24: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 25: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 26: Hoare triple {25280#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 27: Hoare triple {25280#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L272 TraceCheckUtils]: 28: Hoare triple {25280#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 29: Hoare triple {25280#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25280#false} is VALID [2022-04-27 22:08:53,071 INFO L290 TraceCheckUtils]: 30: Hoare triple {25280#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,072 INFO L290 TraceCheckUtils]: 31: Hoare triple {25280#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,072 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 22:08:53,072 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:08:53,313 INFO L290 TraceCheckUtils]: 31: Hoare triple {25280#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 30: Hoare triple {25280#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 29: Hoare triple {25280#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L272 TraceCheckUtils]: 28: Hoare triple {25280#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 27: Hoare triple {25280#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 26: Hoare triple {25280#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 25: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 24: Hoare triple {25280#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 23: Hoare triple {25280#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 22: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 21: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 20: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 19: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,314 INFO L290 TraceCheckUtils]: 18: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,315 INFO L290 TraceCheckUtils]: 17: Hoare triple {25280#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {25280#false} is VALID [2022-04-27 22:08:53,315 INFO L290 TraceCheckUtils]: 16: Hoare triple {25437#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {25280#false} is VALID [2022-04-27 22:08:53,316 INFO L290 TraceCheckUtils]: 15: Hoare triple {25441#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25437#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:08:53,317 INFO L290 TraceCheckUtils]: 14: Hoare triple {25445#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {25441#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:53,317 INFO L290 TraceCheckUtils]: 13: Hoare triple {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {25445#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:53,317 INFO L290 TraceCheckUtils]: 12: Hoare triple {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:53,318 INFO L290 TraceCheckUtils]: 11: Hoare triple {25456#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25449#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:08:53,319 INFO L290 TraceCheckUtils]: 10: Hoare triple {25460#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25456#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:08:53,320 INFO L290 TraceCheckUtils]: 9: Hoare triple {25464#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25460#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:08:53,320 INFO L290 TraceCheckUtils]: 8: Hoare triple {25468#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25464#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:08:53,321 INFO L290 TraceCheckUtils]: 7: Hoare triple {25472#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25468#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:08:53,322 INFO L290 TraceCheckUtils]: 6: Hoare triple {25476#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {25472#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:08:53,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {25279#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {25476#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:08:53,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {25279#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {25279#true} {25279#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {25279#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {25279#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {25279#true} is VALID [2022-04-27 22:08:53,322 INFO L272 TraceCheckUtils]: 0: Hoare triple {25279#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {25279#true} is VALID [2022-04-27 22:08:53,323 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2022-04-27 22:08:53,323 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1159183229] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:08:53,323 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:08:53,323 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2022-04-27 22:08:53,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288576305] [2022-04-27 22:08:53,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:08:53,323 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:08:53,324 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:08:53,324 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:08:53,353 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 42 edges. 42 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:08:53,353 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-04-27 22:08:53,353 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:08:53,354 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-04-27 22:08:53,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=446, Unknown=0, NotChecked=0, Total=552 [2022-04-27 22:08:53,354 INFO L87 Difference]: Start difference. First operand 261 states and 356 transitions. Second operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:07,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:07,570 INFO L93 Difference]: Finished difference Result 627 states and 849 transitions. [2022-04-27 22:09:07,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2022-04-27 22:09:07,570 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 32 [2022-04-27 22:09:07,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:09:07,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:07,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 336 transitions. [2022-04-27 22:09:07,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:07,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 336 transitions. [2022-04-27 22:09:07,578 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 105 states and 336 transitions. [2022-04-27 22:09:08,315 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 336 edges. 336 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:08,326 INFO L225 Difference]: With dead ends: 627 [2022-04-27 22:09:08,326 INFO L226 Difference]: Without dead ends: 579 [2022-04-27 22:09:08,328 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 55 SyntacticMatches, 1 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5763 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=3248, Invalid=12502, Unknown=0, NotChecked=0, Total=15750 [2022-04-27 22:09:08,328 INFO L413 NwaCegarLoop]: 49 mSDtfsCounter, 481 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 1072 mSolverCounterSat, 556 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 481 SdHoareTripleChecker+Valid, 111 SdHoareTripleChecker+Invalid, 1628 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 556 IncrementalHoareTripleChecker+Valid, 1072 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-04-27 22:09:08,329 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [481 Valid, 111 Invalid, 1628 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [556 Valid, 1072 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-04-27 22:09:08,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2022-04-27 22:09:09,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 278. [2022-04-27 22:09:09,186 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:09:09,187 INFO L82 GeneralOperation]: Start isEquivalent. First operand 579 states. Second operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:09,187 INFO L74 IsIncluded]: Start isIncluded. First operand 579 states. Second operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:09,187 INFO L87 Difference]: Start difference. First operand 579 states. Second operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:09,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:09,202 INFO L93 Difference]: Finished difference Result 579 states and 778 transitions. [2022-04-27 22:09:09,202 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 778 transitions. [2022-04-27 22:09:09,203 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:09,203 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:09,203 INFO L74 IsIncluded]: Start isIncluded. First operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-27 22:09:09,204 INFO L87 Difference]: Start difference. First operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 579 states. [2022-04-27 22:09:09,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:09,219 INFO L93 Difference]: Finished difference Result 579 states and 778 transitions. [2022-04-27 22:09:09,219 INFO L276 IsEmpty]: Start isEmpty. Operand 579 states and 778 transitions. [2022-04-27 22:09:09,219 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:09,220 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:09,220 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:09:09,220 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:09:09,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 278 states, 273 states have (on average 1.36996336996337) internal successors, (374), 273 states have internal predecessors, (374), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:09,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 378 transitions. [2022-04-27 22:09:09,225 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 378 transitions. Word has length 32 [2022-04-27 22:09:09,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:09:09,225 INFO L495 AbstractCegarLoop]: Abstraction has 278 states and 378 transitions. [2022-04-27 22:09:09,226 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 1.5416666666666667) internal successors, (37), 23 states have internal predecessors, (37), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:09,226 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 378 transitions. [2022-04-27 22:09:09,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-04-27 22:09:09,226 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:09:09,226 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:09:09,233 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2022-04-27 22:09:09,430 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-04-27 22:09:09,431 INFO L420 AbstractCegarLoop]: === Iteration 26 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:09:09,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:09:09,431 INFO L85 PathProgramCache]: Analyzing trace with hash -1824944628, now seen corresponding path program 7 times [2022-04-27 22:09:09,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:09:09,431 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607575170] [2022-04-27 22:09:09,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:09:09,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:09:09,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:09,574 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:09:09,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:09,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {28037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-27 22:09:09,578 INFO L290 TraceCheckUtils]: 1: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,578 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L272 TraceCheckUtils]: 0: Hoare triple {28025#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 1: Hoare triple {28037#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 2: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L272 TraceCheckUtils]: 4: Hoare triple {28025#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 5: Hoare triple {28025#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 6: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 7: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 8: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,579 INFO L290 TraceCheckUtils]: 9: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,580 INFO L290 TraceCheckUtils]: 10: Hoare triple {28025#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:09:09,581 INFO L290 TraceCheckUtils]: 11: Hoare triple {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} is VALID [2022-04-27 22:09:09,582 INFO L290 TraceCheckUtils]: 12: Hoare triple {28030#(<= (* (div (+ main_~x~0 4294967295) 4294967296) 4294967296) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28031#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} is VALID [2022-04-27 22:09:09,583 INFO L290 TraceCheckUtils]: 13: Hoare triple {28031#(<= (+ (* (div (+ main_~x~0 4294967294) 4294967296) 4294967296) 1) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28032#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:09:09,583 INFO L290 TraceCheckUtils]: 14: Hoare triple {28032#(<= (+ 2 (* (div (+ main_~x~0 4294967293) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28033#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} is VALID [2022-04-27 22:09:09,584 INFO L290 TraceCheckUtils]: 15: Hoare triple {28033#(<= (+ 3 (* (div (+ 4294967292 main_~x~0) 4294967296) 4294967296)) main_~x~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,585 INFO L290 TraceCheckUtils]: 16: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,585 INFO L290 TraceCheckUtils]: 17: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,586 INFO L290 TraceCheckUtils]: 18: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,586 INFO L290 TraceCheckUtils]: 19: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,587 INFO L290 TraceCheckUtils]: 20: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,587 INFO L290 TraceCheckUtils]: 21: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} is VALID [2022-04-27 22:09:09,588 INFO L290 TraceCheckUtils]: 22: Hoare triple {28034#(<= (+ (* (div (+ 4294967291 main_~x~0) 4294967296) 4294967296) 4) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28035#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:09:09,589 INFO L290 TraceCheckUtils]: 23: Hoare triple {28035#(<= (+ 3 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28036#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 24: Hoare triple {28036#(<= (+ 2 (* 4294967296 (div main_~x~0 4294967296))) main_~x~0)} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 25: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 26: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 27: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 28: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 29: Hoare triple {28026#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L272 TraceCheckUtils]: 30: Hoare triple {28026#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 31: Hoare triple {28026#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 32: Hoare triple {28026#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,590 INFO L290 TraceCheckUtils]: 33: Hoare triple {28026#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,591 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-04-27 22:09:09,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:09:09,591 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607575170] [2022-04-27 22:09:09,591 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1607575170] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:09:09,591 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1449586983] [2022-04-27 22:09:09,591 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:09:09,591 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:09:09,591 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:09:09,592 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:09:09,593 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-04-27 22:09:09,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:09,644 INFO L263 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 22 conjunts are in the unsatisfiable core [2022-04-27 22:09:09,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:09,654 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:09:09,837 INFO L272 TraceCheckUtils]: 0: Hoare triple {28025#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,837 INFO L290 TraceCheckUtils]: 1: Hoare triple {28025#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-27 22:09:09,837 INFO L290 TraceCheckUtils]: 2: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,837 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,837 INFO L272 TraceCheckUtils]: 4: Hoare triple {28025#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,837 INFO L290 TraceCheckUtils]: 5: Hoare triple {28025#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28025#true} is VALID [2022-04-27 22:09:09,838 INFO L290 TraceCheckUtils]: 6: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,838 INFO L290 TraceCheckUtils]: 7: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,839 INFO L290 TraceCheckUtils]: 8: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:09:09,839 INFO L290 TraceCheckUtils]: 9: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:09:09,840 INFO L290 TraceCheckUtils]: 10: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:09:09,840 INFO L290 TraceCheckUtils]: 11: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:09:09,841 INFO L290 TraceCheckUtils]: 12: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:09:09,842 INFO L290 TraceCheckUtils]: 13: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:09:09,843 INFO L290 TraceCheckUtils]: 14: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:09,844 INFO L290 TraceCheckUtils]: 15: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,844 INFO L290 TraceCheckUtils]: 16: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,845 INFO L290 TraceCheckUtils]: 17: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,845 INFO L290 TraceCheckUtils]: 18: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,845 INFO L290 TraceCheckUtils]: 19: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,846 INFO L290 TraceCheckUtils]: 20: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,846 INFO L290 TraceCheckUtils]: 21: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,847 INFO L290 TraceCheckUtils]: 22: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:09,848 INFO L290 TraceCheckUtils]: 23: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 24: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 25: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 26: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 27: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 28: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 29: Hoare triple {28026#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L272 TraceCheckUtils]: 30: Hoare triple {28026#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 31: Hoare triple {28026#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 32: Hoare triple {28026#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,849 INFO L290 TraceCheckUtils]: 33: Hoare triple {28026#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,850 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-27 22:09:09,850 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 33: Hoare triple {28026#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 32: Hoare triple {28026#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 31: Hoare triple {28026#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L272 TraceCheckUtils]: 30: Hoare triple {28026#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 29: Hoare triple {28026#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 28: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 27: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 26: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,976 INFO L290 TraceCheckUtils]: 25: Hoare triple {28026#false} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {28026#false} is VALID [2022-04-27 22:09:09,977 INFO L290 TraceCheckUtils]: 24: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {28026#false} is VALID [2022-04-27 22:09:09,978 INFO L290 TraceCheckUtils]: 23: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:09:09,979 INFO L290 TraceCheckUtils]: 22: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:09,979 INFO L290 TraceCheckUtils]: 21: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,979 INFO L290 TraceCheckUtils]: 20: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,980 INFO L290 TraceCheckUtils]: 19: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,980 INFO L290 TraceCheckUtils]: 18: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,981 INFO L290 TraceCheckUtils]: 17: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,981 INFO L290 TraceCheckUtils]: 16: Hoare triple {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,982 INFO L290 TraceCheckUtils]: 15: Hoare triple {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28090#(< 0 (mod (+ main_~x~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:09,983 INFO L290 TraceCheckUtils]: 14: Hoare triple {28082#(< 0 (mod main_~x~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28086#(< 0 (mod (+ main_~x~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:09,984 INFO L290 TraceCheckUtils]: 13: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28082#(< 0 (mod main_~x~0 4294967296))} is VALID [2022-04-27 22:09:09,985 INFO L290 TraceCheckUtils]: 12: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:09:09,985 INFO L290 TraceCheckUtils]: 11: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:09:09,986 INFO L290 TraceCheckUtils]: 10: Hoare triple {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:09:09,987 INFO L290 TraceCheckUtils]: 9: Hoare triple {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28069#(< 0 (mod (+ main_~x~0 2) 4294967296))} is VALID [2022-04-27 22:09:09,987 INFO L290 TraceCheckUtils]: 8: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28065#(< 0 (mod (+ main_~x~0 1) 4294967296))} is VALID [2022-04-27 22:09:09,987 INFO L290 TraceCheckUtils]: 7: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L290 TraceCheckUtils]: 6: Hoare triple {28025#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L290 TraceCheckUtils]: 5: Hoare triple {28025#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L272 TraceCheckUtils]: 4: Hoare triple {28025#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {28025#true} {28025#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L290 TraceCheckUtils]: 2: Hoare triple {28025#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L290 TraceCheckUtils]: 1: Hoare triple {28025#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L272 TraceCheckUtils]: 0: Hoare triple {28025#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {28025#true} is VALID [2022-04-27 22:09:09,988 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2022-04-27 22:09:09,988 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1449586983] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:09:09,988 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:09:09,988 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7] total 15 [2022-04-27 22:09:09,989 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588580114] [2022-04-27 22:09:09,989 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:09:09,989 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 22:09:09,989 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:09:09,989 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:10,028 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 41 edges. 41 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:10,028 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-04-27 22:09:10,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:09:10,028 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-04-27 22:09:10,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2022-04-27 22:09:10,029 INFO L87 Difference]: Start difference. First operand 278 states and 378 transitions. Second operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:12,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:12,463 INFO L93 Difference]: Finished difference Result 493 states and 712 transitions. [2022-04-27 22:09:12,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-04-27 22:09:12,463 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 34 [2022-04-27 22:09:12,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:09:12,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:12,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 130 transitions. [2022-04-27 22:09:12,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:12,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 130 transitions. [2022-04-27 22:09:12,465 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 19 states and 130 transitions. [2022-04-27 22:09:12,648 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 130 edges. 130 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:12,660 INFO L225 Difference]: With dead ends: 493 [2022-04-27 22:09:12,661 INFO L226 Difference]: Without dead ends: 474 [2022-04-27 22:09:12,661 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=245, Invalid=685, Unknown=0, NotChecked=0, Total=930 [2022-04-27 22:09:12,661 INFO L413 NwaCegarLoop]: 36 mSDtfsCounter, 141 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 263 mSolverCounterSat, 133 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 141 SdHoareTripleChecker+Valid, 68 SdHoareTripleChecker+Invalid, 396 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 133 IncrementalHoareTripleChecker+Valid, 263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:09:12,662 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [141 Valid, 68 Invalid, 396 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [133 Valid, 263 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-04-27 22:09:12,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2022-04-27 22:09:13,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 381. [2022-04-27 22:09:13,714 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:09:13,714 INFO L82 GeneralOperation]: Start isEquivalent. First operand 474 states. Second operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:13,715 INFO L74 IsIncluded]: Start isIncluded. First operand 474 states. Second operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:13,715 INFO L87 Difference]: Start difference. First operand 474 states. Second operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:13,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:13,722 INFO L93 Difference]: Finished difference Result 474 states and 658 transitions. [2022-04-27 22:09:13,722 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 658 transitions. [2022-04-27 22:09:13,723 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:13,723 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:13,723 INFO L74 IsIncluded]: Start isIncluded. First operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 474 states. [2022-04-27 22:09:13,724 INFO L87 Difference]: Start difference. First operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 474 states. [2022-04-27 22:09:13,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:13,734 INFO L93 Difference]: Finished difference Result 474 states and 658 transitions. [2022-04-27 22:09:13,734 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 658 transitions. [2022-04-27 22:09:13,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:13,735 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:13,735 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:09:13,735 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:09:13,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 376 states have (on average 1.428191489361702) internal successors, (537), 376 states have internal predecessors, (537), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:13,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 541 transitions. [2022-04-27 22:09:13,744 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 541 transitions. Word has length 34 [2022-04-27 22:09:13,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:09:13,745 INFO L495 AbstractCegarLoop]: Abstraction has 381 states and 541 transitions. [2022-04-27 22:09:13,745 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.4) internal successors, (36), 14 states have internal predecessors, (36), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:13,745 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 541 transitions. [2022-04-27 22:09:13,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 22:09:13,745 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:09:13,746 INFO L195 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:09:13,771 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-04-27 22:09:13,971 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-04-27 22:09:13,972 INFO L420 AbstractCegarLoop]: === Iteration 27 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:09:13,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:09:13,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1440953804, now seen corresponding path program 8 times [2022-04-27 22:09:13,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:09:13,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664105637] [2022-04-27 22:09:13,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:09:13,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:09:14,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:14,479 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:09:14,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:14,491 INFO L290 TraceCheckUtils]: 0: Hoare triple {30462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-27 22:09:14,491 INFO L290 TraceCheckUtils]: 1: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,491 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,491 INFO L272 TraceCheckUtils]: 0: Hoare triple {30444#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:09:14,492 INFO L290 TraceCheckUtils]: 1: Hoare triple {30462#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-27 22:09:14,492 INFO L290 TraceCheckUtils]: 2: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,492 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,492 INFO L272 TraceCheckUtils]: 4: Hoare triple {30444#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,492 INFO L290 TraceCheckUtils]: 5: Hoare triple {30444#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,495 INFO L290 TraceCheckUtils]: 6: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30450#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} is VALID [2022-04-27 22:09:14,496 INFO L290 TraceCheckUtils]: 7: Hoare triple {30450#(and (<= (+ main_~x~0 1) main_~n~0) (<= main_~x~0 (+ (* (div (+ main_~x~0 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0) 1) 4294967296) 4294967296) 4294967294)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30451#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} is VALID [2022-04-27 22:09:14,498 INFO L290 TraceCheckUtils]: 8: Hoare triple {30451#(and (<= (+ main_~x~0 2) main_~n~0) (<= main_~x~0 (+ (* 4294967296 (div (+ main_~x~0 2 (* 4294967296 (div main_~x~0 4294967296)) (* (- 1) main_~n~0)) 4294967296)) 4294967293)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30452#(and (< (div main_~n~0 4294967296) (+ (div main_~x~0 4294967296) 1)) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:09:14,498 INFO L290 TraceCheckUtils]: 9: Hoare triple {30452#(and (< (div main_~n~0 4294967296) (+ (div main_~x~0 4294967296) 1)) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:09:14,499 INFO L290 TraceCheckUtils]: 10: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-27 22:09:14,500 INFO L290 TraceCheckUtils]: 11: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-27 22:09:14,501 INFO L290 TraceCheckUtils]: 12: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:09:14,502 INFO L290 TraceCheckUtils]: 13: Hoare triple {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:09:14,504 INFO L290 TraceCheckUtils]: 14: Hoare triple {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:09:14,506 INFO L290 TraceCheckUtils]: 15: Hoare triple {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,506 INFO L290 TraceCheckUtils]: 16: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,507 INFO L290 TraceCheckUtils]: 17: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,507 INFO L290 TraceCheckUtils]: 18: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,508 INFO L290 TraceCheckUtils]: 19: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,508 INFO L290 TraceCheckUtils]: 20: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,508 INFO L290 TraceCheckUtils]: 21: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} is VALID [2022-04-27 22:09:14,510 INFO L290 TraceCheckUtils]: 22: Hoare triple {30458#(and (<= main_~x~0 main_~n~0) (<= main_~n~0 main_~x~0) (<= (+ (* (div (+ main_~x~0 4294967295 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 4) main_~x~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:09:14,511 INFO L290 TraceCheckUtils]: 23: Hoare triple {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:09:14,514 INFO L290 TraceCheckUtils]: 24: Hoare triple {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:09:14,516 INFO L290 TraceCheckUtils]: 25: Hoare triple {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-27 22:09:14,516 INFO L290 TraceCheckUtils]: 26: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} is VALID [2022-04-27 22:09:14,517 INFO L290 TraceCheckUtils]: 27: Hoare triple {30454#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0) (<= (* 4294967296 (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967299 (* (- 1) main_~n~0)) 4294967296)) main_~x~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} is VALID [2022-04-27 22:09:14,518 INFO L290 TraceCheckUtils]: 28: Hoare triple {30455#(and (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0) 4294967298) 4294967296) 4294967296) 1) main_~x~0) (<= (+ main_~x~0 3) main_~n~0) (<= main_~n~0 (+ main_~x~0 3)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} is VALID [2022-04-27 22:09:14,520 INFO L290 TraceCheckUtils]: 29: Hoare triple {30456#(and (<= (+ main_~x~0 2) main_~n~0) (<= (+ (* (div (+ main_~x~0 4294967297 (* (div main_~n~0 4294967296) 4294967296) (* (- 1) main_~n~0)) 4294967296) 4294967296) 2) main_~x~0) (<= main_~n~0 (+ main_~x~0 2)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} is VALID [2022-04-27 22:09:14,521 INFO L290 TraceCheckUtils]: 30: Hoare triple {30457#(and (<= (+ main_~x~0 1) main_~n~0) (<= (+ (* (div (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4294967296 (* (- 1) main_~n~0)) 4294967296) 4294967296) 3) main_~x~0) (<= main_~n~0 (+ main_~x~0 1)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:14,521 INFO L290 TraceCheckUtils]: 31: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:14,522 INFO L272 TraceCheckUtils]: 32: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {30460#(not (= |__VERIFIER_assert_#in~cond| 0))} is VALID [2022-04-27 22:09:14,522 INFO L290 TraceCheckUtils]: 33: Hoare triple {30460#(not (= |__VERIFIER_assert_#in~cond| 0))} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30461#(not (= __VERIFIER_assert_~cond 0))} is VALID [2022-04-27 22:09:14,523 INFO L290 TraceCheckUtils]: 34: Hoare triple {30461#(not (= __VERIFIER_assert_~cond 0))} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-27 22:09:14,523 INFO L290 TraceCheckUtils]: 35: Hoare triple {30445#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-27 22:09:14,523 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:09:14,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:09:14,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664105637] [2022-04-27 22:09:14,523 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664105637] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:09:14,523 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [827088769] [2022-04-27 22:09:14,523 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:09:14,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:09:14,524 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:09:14,524 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:09:14,526 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-04-27 22:09:14,568 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:09:14,568 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:09:14,569 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 37 conjunts are in the unsatisfiable core [2022-04-27 22:09:14,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:14,588 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:09:14,870 INFO L272 TraceCheckUtils]: 0: Hoare triple {30444#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,870 INFO L290 TraceCheckUtils]: 1: Hoare triple {30444#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-27 22:09:14,870 INFO L290 TraceCheckUtils]: 2: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,870 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,870 INFO L272 TraceCheckUtils]: 4: Hoare triple {30444#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:14,870 INFO L290 TraceCheckUtils]: 5: Hoare triple {30444#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,871 INFO L290 TraceCheckUtils]: 6: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:09:14,872 INFO L290 TraceCheckUtils]: 7: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:09:14,872 INFO L290 TraceCheckUtils]: 8: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-27 22:09:14,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:09:14,878 INFO L290 TraceCheckUtils]: 10: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:09:14,878 INFO L290 TraceCheckUtils]: 11: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:09:14,879 INFO L290 TraceCheckUtils]: 12: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-27 22:09:14,879 INFO L290 TraceCheckUtils]: 13: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:09:14,880 INFO L290 TraceCheckUtils]: 14: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:09:14,880 INFO L290 TraceCheckUtils]: 15: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,881 INFO L290 TraceCheckUtils]: 16: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,881 INFO L290 TraceCheckUtils]: 17: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,881 INFO L290 TraceCheckUtils]: 18: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,882 INFO L290 TraceCheckUtils]: 19: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,882 INFO L290 TraceCheckUtils]: 20: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,882 INFO L290 TraceCheckUtils]: 21: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,883 INFO L290 TraceCheckUtils]: 22: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:09:14,884 INFO L290 TraceCheckUtils]: 23: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:09:14,884 INFO L290 TraceCheckUtils]: 24: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-27 22:09:14,885 INFO L290 TraceCheckUtils]: 25: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:09:14,885 INFO L290 TraceCheckUtils]: 26: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} is VALID [2022-04-27 22:09:14,886 INFO L290 TraceCheckUtils]: 27: Hoare triple {30453#(and (<= main_~n~0 (+ main_~x~0 4)) (<= (+ main_~x~0 4) main_~n~0))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30492#(= (+ main_~x~0 3) main_~n~0)} is VALID [2022-04-27 22:09:14,886 INFO L290 TraceCheckUtils]: 28: Hoare triple {30492#(= (+ main_~x~0 3) main_~n~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30488#(= main_~n~0 (+ main_~x~0 2))} is VALID [2022-04-27 22:09:14,886 INFO L290 TraceCheckUtils]: 29: Hoare triple {30488#(= main_~n~0 (+ main_~x~0 2))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30484#(= (+ main_~x~0 1) main_~n~0)} is VALID [2022-04-27 22:09:14,887 INFO L290 TraceCheckUtils]: 30: Hoare triple {30484#(= (+ main_~x~0 1) main_~n~0)} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,887 INFO L290 TraceCheckUtils]: 31: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} is VALID [2022-04-27 22:09:14,888 INFO L272 TraceCheckUtils]: 32: Hoare triple {30449#(= 0 (+ main_~x~0 (* (- 1) main_~n~0)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:09:14,888 INFO L290 TraceCheckUtils]: 33: Hoare triple {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30569#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:09:14,889 INFO L290 TraceCheckUtils]: 34: Hoare triple {30569#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-27 22:09:14,889 INFO L290 TraceCheckUtils]: 35: Hoare triple {30445#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-27 22:09:14,889 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:09:14,889 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:09:15,359 INFO L290 TraceCheckUtils]: 35: Hoare triple {30445#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-27 22:09:15,359 INFO L290 TraceCheckUtils]: 34: Hoare triple {30569#(<= 1 __VERIFIER_assert_~cond)} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {30445#false} is VALID [2022-04-27 22:09:15,360 INFO L290 TraceCheckUtils]: 33: Hoare triple {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {30569#(<= 1 __VERIFIER_assert_~cond)} is VALID [2022-04-27 22:09:15,361 INFO L272 TraceCheckUtils]: 32: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {30565#(<= 1 |__VERIFIER_assert_#in~cond|)} is VALID [2022-04-27 22:09:15,361 INFO L290 TraceCheckUtils]: 31: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,362 INFO L290 TraceCheckUtils]: 30: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,363 INFO L290 TraceCheckUtils]: 29: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,364 INFO L290 TraceCheckUtils]: 28: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,365 INFO L290 TraceCheckUtils]: 27: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [107] L41-1-->L41-1: Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~x~0_10 (+ v_main_~x~0_11 1))) InVars {main_~x~0=v_main_~x~0_11, main_~z~0=v_main_~z~0_10} OutVars{main_~x~0=v_main_~x~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post13, main_#t~post14] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:09:15,365 INFO L290 TraceCheckUtils]: 26: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:09:15,366 INFO L290 TraceCheckUtils]: 25: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:09:15,367 INFO L290 TraceCheckUtils]: 24: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:09:15,368 INFO L290 TraceCheckUtils]: 23: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,369 INFO L290 TraceCheckUtils]: 22: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,369 INFO L290 TraceCheckUtils]: 21: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,370 INFO L290 TraceCheckUtils]: 20: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,370 INFO L290 TraceCheckUtils]: 19: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,371 INFO L290 TraceCheckUtils]: 18: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,371 INFO L290 TraceCheckUtils]: 17: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,371 INFO L290 TraceCheckUtils]: 16: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,372 INFO L290 TraceCheckUtils]: 15: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,373 INFO L290 TraceCheckUtils]: 14: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,374 INFO L290 TraceCheckUtils]: 13: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,375 INFO L290 TraceCheckUtils]: 12: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:09:15,375 INFO L290 TraceCheckUtils]: 11: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:09:15,376 INFO L290 TraceCheckUtils]: 10: Hoare triple {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:09:15,377 INFO L290 TraceCheckUtils]: 9: Hoare triple {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30603#(and (< (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0) (+ 5 main_~x~0 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4) (+ (* (div (+ main_~x~0 4) 4294967296) 4294967296) main_~n~0)))} is VALID [2022-04-27 22:09:15,377 INFO L290 TraceCheckUtils]: 8: Hoare triple {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30599#(and (< (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 4)) (<= (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296)) (+ (* 4294967296 (div (+ main_~x~0 3) 4294967296)) main_~n~0)))} is VALID [2022-04-27 22:09:15,378 INFO L290 TraceCheckUtils]: 7: Hoare triple {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30595#(and (<= (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296))) (< (+ main_~n~0 (* (div (+ main_~x~0 2) 4294967296) 4294967296)) (+ main_~x~0 3 (* (div main_~n~0 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,379 INFO L290 TraceCheckUtils]: 6: Hoare triple {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {30591#(and (< (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296)) (+ main_~x~0 2 (* (div main_~n~0 4294967296) 4294967296))) (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1) (+ main_~n~0 (* (div (+ main_~x~0 1) 4294967296) 4294967296))))} is VALID [2022-04-27 22:09:15,379 INFO L290 TraceCheckUtils]: 5: Hoare triple {30444#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {30459#(and (<= (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296)) (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296)))) (< (+ main_~n~0 (* 4294967296 (div main_~x~0 4294967296))) (+ main_~x~0 (* (div main_~n~0 4294967296) 4294967296) 1)))} is VALID [2022-04-27 22:09:15,380 INFO L272 TraceCheckUtils]: 4: Hoare triple {30444#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:15,380 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {30444#true} {30444#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:15,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {30444#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:15,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {30444#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {30444#true} is VALID [2022-04-27 22:09:15,380 INFO L272 TraceCheckUtils]: 0: Hoare triple {30444#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {30444#true} is VALID [2022-04-27 22:09:15,380 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-04-27 22:09:15,380 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [827088769] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:09:15,380 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:09:15,380 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 9, 9] total 25 [2022-04-27 22:09:15,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [681214742] [2022-04-27 22:09:15,381 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:09:15,381 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:09:15,381 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:09:15,382 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:15,503 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 85 edges. 85 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:15,503 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-04-27 22:09:15,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:09:15,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-04-27 22:09:15,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=527, Unknown=0, NotChecked=0, Total=600 [2022-04-27 22:09:15,504 INFO L87 Difference]: Start difference. First operand 381 states and 541 transitions. Second operand has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:17,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:17,953 INFO L93 Difference]: Finished difference Result 391 states and 550 transitions. [2022-04-27 22:09:17,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-04-27 22:09:17,953 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:09:17,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:09:17,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:17,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 49 transitions. [2022-04-27 22:09:17,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:17,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 49 transitions. [2022-04-27 22:09:17,954 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 14 states and 49 transitions. [2022-04-27 22:09:18,065 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:18,070 INFO L225 Difference]: With dead ends: 391 [2022-04-27 22:09:18,070 INFO L226 Difference]: Without dead ends: 365 [2022-04-27 22:09:18,070 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 62 SyntacticMatches, 10 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=146, Invalid=1114, Unknown=0, NotChecked=0, Total=1260 [2022-04-27 22:09:18,071 INFO L413 NwaCegarLoop]: 14 mSDtfsCounter, 25 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 370 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 81 SdHoareTripleChecker+Invalid, 398 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 370 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-04-27 22:09:18,071 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [25 Valid, 81 Invalid, 398 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 370 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-04-27 22:09:18,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2022-04-27 22:09:19,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 365. [2022-04-27 22:09:19,069 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:09:19,070 INFO L82 GeneralOperation]: Start isEquivalent. First operand 365 states. Second operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:19,070 INFO L74 IsIncluded]: Start isIncluded. First operand 365 states. Second operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:19,070 INFO L87 Difference]: Start difference. First operand 365 states. Second operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:19,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:19,075 INFO L93 Difference]: Finished difference Result 365 states and 524 transitions. [2022-04-27 22:09:19,075 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 524 transitions. [2022-04-27 22:09:19,075 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:19,075 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:19,075 INFO L74 IsIncluded]: Start isIncluded. First operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-27 22:09:19,075 INFO L87 Difference]: Start difference. First operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 365 states. [2022-04-27 22:09:19,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:19,082 INFO L93 Difference]: Finished difference Result 365 states and 524 transitions. [2022-04-27 22:09:19,082 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 524 transitions. [2022-04-27 22:09:19,083 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:19,083 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:19,083 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:09:19,083 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:09:19,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 365 states, 360 states have (on average 1.4444444444444444) internal successors, (520), 360 states have internal predecessors, (520), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:19,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 524 transitions. [2022-04-27 22:09:19,090 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 524 transitions. Word has length 36 [2022-04-27 22:09:19,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:09:19,090 INFO L495 AbstractCegarLoop]: Abstraction has 365 states and 524 transitions. [2022-04-27 22:09:19,091 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.12) internal successors, (78), 22 states have internal predecessors, (78), 3 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:19,091 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 524 transitions. [2022-04-27 22:09:19,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 22:09:19,091 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:09:19,091 INFO L195 NwaCegarLoop]: trace histogram [8, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:09:19,108 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2022-04-27 22:09:19,291 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-04-27 22:09:19,292 INFO L420 AbstractCegarLoop]: === Iteration 28 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:09:19,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:09:19,292 INFO L85 PathProgramCache]: Analyzing trace with hash -696091028, now seen corresponding path program 6 times [2022-04-27 22:09:19,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:09:19,292 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955191537] [2022-04-27 22:09:19,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:09:19,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:09:19,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:19,540 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:09:19,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:19,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {32541#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-27 22:09:19,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:19,544 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:19,544 INFO L272 TraceCheckUtils]: 0: Hoare triple {32522#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32541#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:09:19,544 INFO L290 TraceCheckUtils]: 1: Hoare triple {32541#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-27 22:09:19,544 INFO L290 TraceCheckUtils]: 2: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:19,544 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:19,544 INFO L272 TraceCheckUtils]: 4: Hoare triple {32522#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:19,545 INFO L290 TraceCheckUtils]: 5: Hoare triple {32522#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32527#(= main_~y~0 0)} is VALID [2022-04-27 22:09:19,545 INFO L290 TraceCheckUtils]: 6: Hoare triple {32527#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:09:19,546 INFO L290 TraceCheckUtils]: 7: Hoare triple {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:09:19,547 INFO L290 TraceCheckUtils]: 8: Hoare triple {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:09:19,547 INFO L290 TraceCheckUtils]: 9: Hoare triple {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:09:19,548 INFO L290 TraceCheckUtils]: 10: Hoare triple {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:09:19,549 INFO L290 TraceCheckUtils]: 11: Hoare triple {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:19,549 INFO L290 TraceCheckUtils]: 12: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:19,550 INFO L290 TraceCheckUtils]: 13: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32534#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:09:19,550 INFO L290 TraceCheckUtils]: 14: Hoare triple {32534#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32535#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:09:19,551 INFO L290 TraceCheckUtils]: 15: Hoare triple {32535#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32536#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:09:19,552 INFO L290 TraceCheckUtils]: 16: Hoare triple {32536#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32537#(and (<= main_~z~0 3) (<= 3 main_~z~0))} is VALID [2022-04-27 22:09:19,552 INFO L290 TraceCheckUtils]: 17: Hoare triple {32537#(and (<= main_~z~0 3) (<= 3 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32538#(and (<= main_~z~0 2) (<= 2 main_~z~0))} is VALID [2022-04-27 22:09:19,553 INFO L290 TraceCheckUtils]: 18: Hoare triple {32538#(and (<= main_~z~0 2) (<= 2 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32539#(and (<= main_~z~0 1) (<= 1 main_~z~0))} is VALID [2022-04-27 22:09:19,554 INFO L290 TraceCheckUtils]: 19: Hoare triple {32539#(and (<= main_~z~0 1) (<= 1 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32540#(and (<= main_~z~0 0) (<= 0 main_~z~0))} is VALID [2022-04-27 22:09:19,554 INFO L290 TraceCheckUtils]: 20: Hoare triple {32540#(and (<= main_~z~0 0) (<= 0 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-27 22:09:19,554 INFO L290 TraceCheckUtils]: 21: Hoare triple {32523#false} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 22: Hoare triple {32523#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 23: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 24: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 25: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 26: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 27: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 28: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 29: Hoare triple {32523#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 30: Hoare triple {32523#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:19,555 INFO L290 TraceCheckUtils]: 31: Hoare triple {32523#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:19,556 INFO L272 TraceCheckUtils]: 32: Hoare triple {32523#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {32523#false} is VALID [2022-04-27 22:09:19,556 INFO L290 TraceCheckUtils]: 33: Hoare triple {32523#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32523#false} is VALID [2022-04-27 22:09:19,556 INFO L290 TraceCheckUtils]: 34: Hoare triple {32523#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:19,556 INFO L290 TraceCheckUtils]: 35: Hoare triple {32523#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:19,556 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-27 22:09:19,556 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:09:19,556 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [955191537] [2022-04-27 22:09:19,556 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [955191537] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:09:19,557 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [804205389] [2022-04-27 22:09:19,557 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-04-27 22:09:19,557 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:09:19,557 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:09:19,558 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:09:19,559 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-04-27 22:09:19,699 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-04-27 22:09:19,700 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:09:19,701 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 42 conjunts are in the unsatisfiable core [2022-04-27 22:09:19,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:19,716 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:09:20,005 INFO L272 TraceCheckUtils]: 0: Hoare triple {32522#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {32522#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-27 22:09:20,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,005 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,005 INFO L272 TraceCheckUtils]: 4: Hoare triple {32522#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,009 INFO L290 TraceCheckUtils]: 5: Hoare triple {32522#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32527#(= main_~y~0 0)} is VALID [2022-04-27 22:09:20,010 INFO L290 TraceCheckUtils]: 6: Hoare triple {32527#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:09:20,011 INFO L290 TraceCheckUtils]: 7: Hoare triple {32528#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:09:20,011 INFO L290 TraceCheckUtils]: 8: Hoare triple {32529#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:09:20,012 INFO L290 TraceCheckUtils]: 9: Hoare triple {32530#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:09:20,012 INFO L290 TraceCheckUtils]: 10: Hoare triple {32531#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:09:20,013 INFO L290 TraceCheckUtils]: 11: Hoare triple {32532#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,013 INFO L290 TraceCheckUtils]: 12: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,013 INFO L290 TraceCheckUtils]: 13: Hoare triple {32533#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32584#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,014 INFO L290 TraceCheckUtils]: 14: Hoare triple {32584#(and (<= main_~y~0 6) (= main_~z~0 main_~y~0) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32588#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} is VALID [2022-04-27 22:09:20,014 INFO L290 TraceCheckUtils]: 15: Hoare triple {32588#(and (<= main_~y~0 6) (<= 6 main_~y~0) (= main_~y~0 (+ main_~z~0 1)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32592#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,015 INFO L290 TraceCheckUtils]: 16: Hoare triple {32592#(and (<= main_~y~0 6) (= main_~y~0 (+ main_~z~0 2)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32596#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,016 INFO L290 TraceCheckUtils]: 17: Hoare triple {32596#(and (= (+ (- 2) main_~y~0) (+ main_~z~0 1)) (<= main_~y~0 6) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32600#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,016 INFO L290 TraceCheckUtils]: 18: Hoare triple {32600#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 1)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32604#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,017 INFO L290 TraceCheckUtils]: 19: Hoare triple {32604#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 2)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32608#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 3)) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:20,017 INFO L290 TraceCheckUtils]: 20: Hoare triple {32608#(and (<= main_~y~0 6) (= (+ main_~y~0 (- 3)) (+ main_~z~0 3)) (<= 6 main_~y~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-27 22:09:20,017 INFO L290 TraceCheckUtils]: 21: Hoare triple {32523#false} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32523#false} is VALID [2022-04-27 22:09:20,017 INFO L290 TraceCheckUtils]: 22: Hoare triple {32523#false} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 23: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 24: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 25: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 26: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 27: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 28: Hoare triple {32523#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 29: Hoare triple {32523#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 30: Hoare triple {32523#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 31: Hoare triple {32523#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L272 TraceCheckUtils]: 32: Hoare triple {32523#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 33: Hoare triple {32523#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 34: Hoare triple {32523#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L290 TraceCheckUtils]: 35: Hoare triple {32523#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,018 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-27 22:09:20,019 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:09:20,474 INFO L290 TraceCheckUtils]: 35: Hoare triple {32523#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,474 INFO L290 TraceCheckUtils]: 34: Hoare triple {32523#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,475 INFO L290 TraceCheckUtils]: 33: Hoare triple {32523#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {32523#false} is VALID [2022-04-27 22:09:20,475 INFO L272 TraceCheckUtils]: 32: Hoare triple {32523#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {32523#false} is VALID [2022-04-27 22:09:20,475 INFO L290 TraceCheckUtils]: 31: Hoare triple {32523#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,475 INFO L290 TraceCheckUtils]: 30: Hoare triple {32523#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,475 INFO L290 TraceCheckUtils]: 29: Hoare triple {32675#(< 0 (mod main_~y~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {32523#false} is VALID [2022-04-27 22:09:20,476 INFO L290 TraceCheckUtils]: 28: Hoare triple {32679#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32675#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:09:20,477 INFO L290 TraceCheckUtils]: 27: Hoare triple {32683#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32679#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:20,478 INFO L290 TraceCheckUtils]: 26: Hoare triple {32687#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32683#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:20,478 INFO L290 TraceCheckUtils]: 25: Hoare triple {32691#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32687#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:09:20,479 INFO L290 TraceCheckUtils]: 24: Hoare triple {32695#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32691#(< 0 (mod (+ 4294967292 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:20,480 INFO L290 TraceCheckUtils]: 23: Hoare triple {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {32695#(< 0 (mod (+ 4294967291 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:20,480 INFO L290 TraceCheckUtils]: 22: Hoare triple {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:20,480 INFO L290 TraceCheckUtils]: 21: Hoare triple {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:20,481 INFO L290 TraceCheckUtils]: 20: Hoare triple {32709#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32699#(< 0 (mod (+ 4294967290 main_~y~0) 4294967296))} is VALID [2022-04-27 22:09:20,482 INFO L290 TraceCheckUtils]: 19: Hoare triple {32713#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32709#(or (not (< 0 (mod main_~z~0 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:09:20,482 INFO L290 TraceCheckUtils]: 18: Hoare triple {32717#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32713#(or (not (< 0 (mod (+ main_~z~0 4294967295) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:09:20,488 INFO L290 TraceCheckUtils]: 17: Hoare triple {32721#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32717#(or (not (< 0 (mod (+ main_~z~0 4294967294) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:09:20,489 INFO L290 TraceCheckUtils]: 16: Hoare triple {32725#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32721#(or (not (< 0 (mod (+ main_~z~0 4294967293) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:09:20,490 INFO L290 TraceCheckUtils]: 15: Hoare triple {32729#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32725#(or (not (< 0 (mod (+ 4294967292 main_~z~0) 4294967296))) (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)))} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 14: Hoare triple {32733#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {32729#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967291 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 13: Hoare triple {32522#true} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {32733#(or (< 0 (mod (+ 4294967290 main_~y~0) 4294967296)) (not (< 0 (mod (+ 4294967290 main_~z~0) 4294967296))))} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 12: Hoare triple {32522#true} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 11: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 10: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 9: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-27 22:09:20,491 INFO L290 TraceCheckUtils]: 8: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-27 22:09:20,492 INFO L290 TraceCheckUtils]: 7: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-27 22:09:20,492 INFO L290 TraceCheckUtils]: 6: Hoare triple {32522#true} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {32522#true} is VALID [2022-04-27 22:09:20,492 INFO L290 TraceCheckUtils]: 5: Hoare triple {32522#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {32522#true} is VALID [2022-04-27 22:09:20,495 INFO L272 TraceCheckUtils]: 4: Hoare triple {32522#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,496 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {32522#true} {32522#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,496 INFO L290 TraceCheckUtils]: 2: Hoare triple {32522#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,496 INFO L290 TraceCheckUtils]: 1: Hoare triple {32522#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {32522#true} is VALID [2022-04-27 22:09:20,496 INFO L272 TraceCheckUtils]: 0: Hoare triple {32522#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {32522#true} is VALID [2022-04-27 22:09:20,496 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 14 proven. 42 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2022-04-27 22:09:20,496 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [804205389] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:09:20,496 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:09:20,497 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 38 [2022-04-27 22:09:20,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280089284] [2022-04-27 22:09:20,497 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:09:20,497 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:09:20,497 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:09:20,497 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:20,545 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 61 edges. 61 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:20,545 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 38 states [2022-04-27 22:09:20,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:09:20,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2022-04-27 22:09:20,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=1172, Unknown=0, NotChecked=0, Total=1406 [2022-04-27 22:09:20,546 INFO L87 Difference]: Start difference. First operand 365 states and 524 transitions. Second operand has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:41,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:41,346 INFO L93 Difference]: Finished difference Result 947 states and 1296 transitions. [2022-04-27 22:09:41,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 138 states. [2022-04-27 22:09:41,346 INFO L78 Accepts]: Start accepts. Automaton has has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:09:41,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:09:41,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:41,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 419 transitions. [2022-04-27 22:09:41,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:41,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 419 transitions. [2022-04-27 22:09:41,354 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 138 states and 419 transitions. [2022-04-27 22:09:42,112 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 419 edges. 419 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:42,137 INFO L225 Difference]: With dead ends: 947 [2022-04-27 22:09:42,137 INFO L226 Difference]: Without dead ends: 897 [2022-04-27 22:09:42,139 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 59 SyntacticMatches, 1 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10587 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=4463, Invalid=25293, Unknown=0, NotChecked=0, Total=29756 [2022-04-27 22:09:42,139 INFO L413 NwaCegarLoop]: 37 mSDtfsCounter, 349 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 1818 mSolverCounterSat, 556 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 349 SdHoareTripleChecker+Valid, 129 SdHoareTripleChecker+Invalid, 2374 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 556 IncrementalHoareTripleChecker+Valid, 1818 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.3s IncrementalHoareTripleChecker+Time [2022-04-27 22:09:42,139 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [349 Valid, 129 Invalid, 2374 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [556 Valid, 1818 Invalid, 0 Unknown, 0 Unchecked, 5.3s Time] [2022-04-27 22:09:42,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 897 states. [2022-04-27 22:09:43,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 897 to 429. [2022-04-27 22:09:43,251 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:09:43,251 INFO L82 GeneralOperation]: Start isEquivalent. First operand 897 states. Second operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:43,252 INFO L74 IsIncluded]: Start isIncluded. First operand 897 states. Second operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:43,252 INFO L87 Difference]: Start difference. First operand 897 states. Second operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:43,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:43,278 INFO L93 Difference]: Finished difference Result 897 states and 1145 transitions. [2022-04-27 22:09:43,278 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 1145 transitions. [2022-04-27 22:09:43,279 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:43,279 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:43,279 INFO L74 IsIncluded]: Start isIncluded. First operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 897 states. [2022-04-27 22:09:43,279 INFO L87 Difference]: Start difference. First operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 897 states. [2022-04-27 22:09:43,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:09:43,304 INFO L93 Difference]: Finished difference Result 897 states and 1145 transitions. [2022-04-27 22:09:43,304 INFO L276 IsEmpty]: Start isEmpty. Operand 897 states and 1145 transitions. [2022-04-27 22:09:43,305 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:09:43,305 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:09:43,305 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:09:43,305 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:09:43,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 424 states have (on average 1.4504716981132075) internal successors, (615), 424 states have internal predecessors, (615), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:43,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 619 transitions. [2022-04-27 22:09:43,313 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 619 transitions. Word has length 36 [2022-04-27 22:09:43,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:09:43,313 INFO L495 AbstractCegarLoop]: Abstraction has 429 states and 619 transitions. [2022-04-27 22:09:43,313 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 38 states, 38 states have (on average 1.4736842105263157) internal successors, (56), 37 states have internal predecessors, (56), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:43,313 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 619 transitions. [2022-04-27 22:09:43,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-04-27 22:09:43,313 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:09:43,313 INFO L195 NwaCegarLoop]: trace histogram [7, 7, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:09:43,323 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2022-04-27 22:09:43,514 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:09:43,514 INFO L420 AbstractCegarLoop]: === Iteration 29 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:09:43,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:09:43,514 INFO L85 PathProgramCache]: Analyzing trace with hash -444944079, now seen corresponding path program 7 times [2022-04-27 22:09:43,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:09:43,514 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810523720] [2022-04-27 22:09:43,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:09:43,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:09:43,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:43,736 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:09:43,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:43,739 INFO L290 TraceCheckUtils]: 0: Hoare triple {36578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-27 22:09:43,739 INFO L290 TraceCheckUtils]: 1: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:43,740 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:43,740 INFO L272 TraceCheckUtils]: 0: Hoare triple {36561#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:09:43,740 INFO L290 TraceCheckUtils]: 1: Hoare triple {36578#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-27 22:09:43,740 INFO L290 TraceCheckUtils]: 2: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:43,740 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:43,740 INFO L272 TraceCheckUtils]: 4: Hoare triple {36561#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:43,741 INFO L290 TraceCheckUtils]: 5: Hoare triple {36561#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {36566#(= main_~y~0 0)} is VALID [2022-04-27 22:09:43,741 INFO L290 TraceCheckUtils]: 6: Hoare triple {36566#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:09:43,742 INFO L290 TraceCheckUtils]: 7: Hoare triple {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:09:43,742 INFO L290 TraceCheckUtils]: 8: Hoare triple {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:09:43,743 INFO L290 TraceCheckUtils]: 9: Hoare triple {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:09:43,743 INFO L290 TraceCheckUtils]: 10: Hoare triple {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:09:43,744 INFO L290 TraceCheckUtils]: 11: Hoare triple {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:43,745 INFO L290 TraceCheckUtils]: 12: Hoare triple {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:43,745 INFO L290 TraceCheckUtils]: 13: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:43,745 INFO L290 TraceCheckUtils]: 14: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:09:43,746 INFO L290 TraceCheckUtils]: 15: Hoare triple {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:09:43,746 INFO L290 TraceCheckUtils]: 16: Hoare triple {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:09:43,747 INFO L290 TraceCheckUtils]: 17: Hoare triple {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36577#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 18: Hoare triple {36577#(and (<= 4 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 19: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 20: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 21: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 22: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 23: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 24: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 25: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 26: Hoare triple {36562#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 27: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 28: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 29: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 30: Hoare triple {36562#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 31: Hoare triple {36562#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L272 TraceCheckUtils]: 32: Hoare triple {36562#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {36562#false} is VALID [2022-04-27 22:09:43,748 INFO L290 TraceCheckUtils]: 33: Hoare triple {36562#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {36562#false} is VALID [2022-04-27 22:09:43,749 INFO L290 TraceCheckUtils]: 34: Hoare triple {36562#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:43,749 INFO L290 TraceCheckUtils]: 35: Hoare triple {36562#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:43,749 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-27 22:09:43,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:09:43,749 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810523720] [2022-04-27 22:09:43,749 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1810523720] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:09:43,749 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [252623201] [2022-04-27 22:09:43,749 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-04-27 22:09:43,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:09:43,749 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:09:43,750 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:09:43,755 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-04-27 22:09:43,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:43,805 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 25 conjunts are in the unsatisfiable core [2022-04-27 22:09:43,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:09:43,814 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:09:44,092 INFO L272 TraceCheckUtils]: 0: Hoare triple {36561#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,093 INFO L290 TraceCheckUtils]: 1: Hoare triple {36561#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-27 22:09:44,093 INFO L290 TraceCheckUtils]: 2: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,093 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,093 INFO L272 TraceCheckUtils]: 4: Hoare triple {36561#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,093 INFO L290 TraceCheckUtils]: 5: Hoare triple {36561#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {36566#(= main_~y~0 0)} is VALID [2022-04-27 22:09:44,093 INFO L290 TraceCheckUtils]: 6: Hoare triple {36566#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:09:44,094 INFO L290 TraceCheckUtils]: 7: Hoare triple {36567#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:09:44,094 INFO L290 TraceCheckUtils]: 8: Hoare triple {36568#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:09:44,095 INFO L290 TraceCheckUtils]: 9: Hoare triple {36569#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:09:44,099 INFO L290 TraceCheckUtils]: 10: Hoare triple {36570#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:09:44,100 INFO L290 TraceCheckUtils]: 11: Hoare triple {36571#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:09:44,101 INFO L290 TraceCheckUtils]: 12: Hoare triple {36572#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:44,101 INFO L290 TraceCheckUtils]: 13: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:09:44,101 INFO L290 TraceCheckUtils]: 14: Hoare triple {36573#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} is VALID [2022-04-27 22:09:44,102 INFO L290 TraceCheckUtils]: 15: Hoare triple {36574#(and (<= main_~z~0 7) (<= 7 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} is VALID [2022-04-27 22:09:44,102 INFO L290 TraceCheckUtils]: 16: Hoare triple {36575#(and (<= main_~z~0 6) (<= 6 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} is VALID [2022-04-27 22:09:44,103 INFO L290 TraceCheckUtils]: 17: Hoare triple {36576#(and (<= main_~z~0 5) (<= 5 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36633#(and (<= 4 main_~z~0) (<= main_~z~0 4))} is VALID [2022-04-27 22:09:44,103 INFO L290 TraceCheckUtils]: 18: Hoare triple {36633#(and (<= 4 main_~z~0) (<= main_~z~0 4))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,103 INFO L290 TraceCheckUtils]: 19: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,103 INFO L290 TraceCheckUtils]: 20: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 21: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 22: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 23: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 24: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 25: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 26: Hoare triple {36562#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 27: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 28: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 29: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 30: Hoare triple {36562#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,104 INFO L290 TraceCheckUtils]: 31: Hoare triple {36562#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,105 INFO L272 TraceCheckUtils]: 32: Hoare triple {36562#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {36562#false} is VALID [2022-04-27 22:09:44,105 INFO L290 TraceCheckUtils]: 33: Hoare triple {36562#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {36562#false} is VALID [2022-04-27 22:09:44,105 INFO L290 TraceCheckUtils]: 34: Hoare triple {36562#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,105 INFO L290 TraceCheckUtils]: 35: Hoare triple {36562#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,105 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-27 22:09:44,105 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:09:44,419 INFO L290 TraceCheckUtils]: 35: Hoare triple {36562#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,419 INFO L290 TraceCheckUtils]: 34: Hoare triple {36562#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 33: Hoare triple {36562#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L272 TraceCheckUtils]: 32: Hoare triple {36562#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 31: Hoare triple {36562#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 30: Hoare triple {36562#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 29: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 28: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 27: Hoare triple {36562#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 26: Hoare triple {36562#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 25: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 24: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 23: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,420 INFO L290 TraceCheckUtils]: 22: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,421 INFO L290 TraceCheckUtils]: 21: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,421 INFO L290 TraceCheckUtils]: 20: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,421 INFO L290 TraceCheckUtils]: 19: Hoare triple {36562#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {36562#false} is VALID [2022-04-27 22:09:44,421 INFO L290 TraceCheckUtils]: 18: Hoare triple {36739#(< 0 (mod main_~z~0 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {36562#false} is VALID [2022-04-27 22:09:44,424 INFO L290 TraceCheckUtils]: 17: Hoare triple {36743#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36739#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:09:44,425 INFO L290 TraceCheckUtils]: 16: Hoare triple {36747#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36743#(< 0 (mod (+ main_~z~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:44,425 INFO L290 TraceCheckUtils]: 15: Hoare triple {36751#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {36747#(< 0 (mod (+ main_~z~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:44,426 INFO L290 TraceCheckUtils]: 14: Hoare triple {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {36751#(< 0 (mod (+ main_~z~0 4294967293) 4294967296))} is VALID [2022-04-27 22:09:44,426 INFO L290 TraceCheckUtils]: 13: Hoare triple {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:09:44,427 INFO L290 TraceCheckUtils]: 12: Hoare triple {36762#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36755#(< 0 (mod (+ main_~y~0 4294967293) 4294967296))} is VALID [2022-04-27 22:09:44,428 INFO L290 TraceCheckUtils]: 11: Hoare triple {36766#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36762#(< 0 (mod (+ main_~y~0 4294967294) 4294967296))} is VALID [2022-04-27 22:09:44,429 INFO L290 TraceCheckUtils]: 10: Hoare triple {36770#(< 0 (mod main_~y~0 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36766#(< 0 (mod (+ main_~y~0 4294967295) 4294967296))} is VALID [2022-04-27 22:09:44,430 INFO L290 TraceCheckUtils]: 9: Hoare triple {36774#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36770#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:09:44,431 INFO L290 TraceCheckUtils]: 8: Hoare triple {36778#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36774#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:09:44,431 INFO L290 TraceCheckUtils]: 7: Hoare triple {36782#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36778#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:09:44,432 INFO L290 TraceCheckUtils]: 6: Hoare triple {36786#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {36782#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:09:44,433 INFO L290 TraceCheckUtils]: 5: Hoare triple {36561#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {36786#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:09:44,433 INFO L272 TraceCheckUtils]: 4: Hoare triple {36561#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,433 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {36561#true} {36561#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,433 INFO L290 TraceCheckUtils]: 2: Hoare triple {36561#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,433 INFO L290 TraceCheckUtils]: 1: Hoare triple {36561#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {36561#true} is VALID [2022-04-27 22:09:44,433 INFO L272 TraceCheckUtils]: 0: Hoare triple {36561#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {36561#true} is VALID [2022-04-27 22:09:44,433 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-04-27 22:09:44,434 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [252623201] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:09:44,434 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:09:44,434 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 28 [2022-04-27 22:09:44,434 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840643859] [2022-04-27 22:09:44,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:09:44,434 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:09:44,434 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:09:44,435 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:09:44,475 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 46 edges. 46 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:09:44,475 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-04-27 22:09:44,476 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:09:44,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-04-27 22:09:44,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=619, Unknown=0, NotChecked=0, Total=756 [2022-04-27 22:09:44,476 INFO L87 Difference]: Start difference. First operand 429 states and 619 transitions. Second operand has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:23,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:23,940 INFO L93 Difference]: Finished difference Result 986 states and 1379 transitions. [2022-04-27 22:10:23,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 165 states. [2022-04-27 22:10:23,940 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 36 [2022-04-27 22:10:23,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-27 22:10:23,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:23,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 477 transitions. [2022-04-27 22:10:23,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:23,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 477 transitions. [2022-04-27 22:10:23,948 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 165 states and 477 transitions. [2022-04-27 22:10:25,176 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 477 edges. 477 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:10:25,202 INFO L225 Difference]: With dead ends: 986 [2022-04-27 22:10:25,202 INFO L226 Difference]: Without dead ends: 921 [2022-04-27 22:10:25,204 INFO L412 NwaCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 61 SyntacticMatches, 1 SemanticMatches, 188 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14071 ImplicationChecksByTransitivity, 25.1s TimeCoverageRelationStatistics Valid=6269, Invalid=29641, Unknown=0, NotChecked=0, Total=35910 [2022-04-27 22:10:25,205 INFO L413 NwaCegarLoop]: 60 mSDtfsCounter, 542 mSDsluCounter, 67 mSDsCounter, 0 mSdLazyCounter, 1710 mSolverCounterSat, 784 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 542 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 2494 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 784 IncrementalHoareTripleChecker+Valid, 1710 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.4s IncrementalHoareTripleChecker+Time [2022-04-27 22:10:25,205 INFO L414 NwaCegarLoop]: SdHoareTripleChecker [542 Valid, 127 Invalid, 2494 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [784 Valid, 1710 Invalid, 0 Unknown, 0 Unchecked, 5.4s Time] [2022-04-27 22:10:25,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 921 states. [2022-04-27 22:10:26,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 921 to 482. [2022-04-27 22:10:26,560 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-27 22:10:26,560 INFO L82 GeneralOperation]: Start isEquivalent. First operand 921 states. Second operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:26,560 INFO L74 IsIncluded]: Start isIncluded. First operand 921 states. Second operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:26,561 INFO L87 Difference]: Start difference. First operand 921 states. Second operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:26,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:26,585 INFO L93 Difference]: Finished difference Result 921 states and 1266 transitions. [2022-04-27 22:10:26,585 INFO L276 IsEmpty]: Start isEmpty. Operand 921 states and 1266 transitions. [2022-04-27 22:10:26,585 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:10:26,586 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:10:26,586 INFO L74 IsIncluded]: Start isIncluded. First operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 921 states. [2022-04-27 22:10:26,586 INFO L87 Difference]: Start difference. First operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Second operand 921 states. [2022-04-27 22:10:26,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-27 22:10:26,608 INFO L93 Difference]: Finished difference Result 921 states and 1266 transitions. [2022-04-27 22:10:26,608 INFO L276 IsEmpty]: Start isEmpty. Operand 921 states and 1266 transitions. [2022-04-27 22:10:26,609 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-27 22:10:26,609 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-27 22:10:26,609 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-27 22:10:26,609 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-27 22:10:26,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 477 states have (on average 1.4360587002096437) internal successors, (685), 477 states have internal predecessors, (685), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:26,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 689 transitions. [2022-04-27 22:10:26,622 INFO L78 Accepts]: Start accepts. Automaton has 482 states and 689 transitions. Word has length 36 [2022-04-27 22:10:26,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-27 22:10:26,622 INFO L495 AbstractCegarLoop]: Abstraction has 482 states and 689 transitions. [2022-04-27 22:10:26,622 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 1.4642857142857142) internal successors, (41), 27 states have internal predecessors, (41), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:26,622 INFO L276 IsEmpty]: Start isEmpty. Operand 482 states and 689 transitions. [2022-04-27 22:10:26,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-04-27 22:10:26,623 INFO L187 NwaCegarLoop]: Found error trace [2022-04-27 22:10:26,623 INFO L195 NwaCegarLoop]: trace histogram [15, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-27 22:10:26,642 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-04-27 22:10:26,833 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-04-27 22:10:26,834 INFO L420 AbstractCegarLoop]: === Iteration 30 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-27 22:10:26,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-27 22:10:26,834 INFO L85 PathProgramCache]: Analyzing trace with hash 1913433546, now seen corresponding path program 8 times [2022-04-27 22:10:26,834 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-27 22:10:26,834 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357047375] [2022-04-27 22:10:26,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-27 22:10:26,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-27 22:10:26,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:27,139 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-27 22:10:27,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:27,148 INFO L290 TraceCheckUtils]: 0: Hoare triple {40839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-27 22:10:27,148 INFO L290 TraceCheckUtils]: 1: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,148 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,148 INFO L272 TraceCheckUtils]: 0: Hoare triple {40815#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-27 22:10:27,149 INFO L290 TraceCheckUtils]: 1: Hoare triple {40839#(and (= |#NULL.offset| |old(#NULL.offset)|) (= |old(#NULL.base)| |#NULL.base|))} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-27 22:10:27,149 INFO L290 TraceCheckUtils]: 2: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,149 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,149 INFO L272 TraceCheckUtils]: 4: Hoare triple {40815#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,149 INFO L290 TraceCheckUtils]: 5: Hoare triple {40815#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40820#(= main_~y~0 0)} is VALID [2022-04-27 22:10:27,152 INFO L290 TraceCheckUtils]: 6: Hoare triple {40820#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:10:27,152 INFO L290 TraceCheckUtils]: 7: Hoare triple {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:10:27,153 INFO L290 TraceCheckUtils]: 8: Hoare triple {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:10:27,153 INFO L290 TraceCheckUtils]: 9: Hoare triple {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:10:27,154 INFO L290 TraceCheckUtils]: 10: Hoare triple {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:27,155 INFO L290 TraceCheckUtils]: 11: Hoare triple {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:10:27,155 INFO L290 TraceCheckUtils]: 12: Hoare triple {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:10:27,157 INFO L290 TraceCheckUtils]: 13: Hoare triple {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:10:27,158 INFO L290 TraceCheckUtils]: 14: Hoare triple {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:10:27,158 INFO L290 TraceCheckUtils]: 15: Hoare triple {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:10:27,159 INFO L290 TraceCheckUtils]: 16: Hoare triple {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:10:27,159 INFO L290 TraceCheckUtils]: 17: Hoare triple {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:10:27,160 INFO L290 TraceCheckUtils]: 18: Hoare triple {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:10:27,161 INFO L290 TraceCheckUtils]: 19: Hoare triple {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:10:27,161 INFO L290 TraceCheckUtils]: 20: Hoare triple {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:10:27,162 INFO L290 TraceCheckUtils]: 21: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:10:27,162 INFO L290 TraceCheckUtils]: 22: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,163 INFO L290 TraceCheckUtils]: 23: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:10:27,163 INFO L290 TraceCheckUtils]: 24: Hoare triple {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40838#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 25: Hoare triple {40838#(and (<= 13 main_~z~0) (<= (div main_~z~0 4294967296) 0))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 26: Hoare triple {40816#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 27: Hoare triple {40816#false} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 28: Hoare triple {40816#false} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 29: Hoare triple {40816#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 30: Hoare triple {40816#false} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 31: Hoare triple {40816#false} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,164 INFO L290 TraceCheckUtils]: 32: Hoare triple {40816#false} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,165 INFO L272 TraceCheckUtils]: 33: Hoare triple {40816#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {40816#false} is VALID [2022-04-27 22:10:27,165 INFO L290 TraceCheckUtils]: 34: Hoare triple {40816#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40816#false} is VALID [2022-04-27 22:10:27,165 INFO L290 TraceCheckUtils]: 35: Hoare triple {40816#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,165 INFO L290 TraceCheckUtils]: 36: Hoare triple {40816#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,165 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-04-27 22:10:27,165 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-27 22:10:27,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357047375] [2022-04-27 22:10:27,165 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1357047375] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-27 22:10:27,165 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [545845788] [2022-04-27 22:10:27,166 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-27 22:10:27,166 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-27 22:10:27,166 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-27 22:10:27,172 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-27 22:10:27,173 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-04-27 22:10:27,216 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-04-27 22:10:27,216 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-27 22:10:27,217 INFO L263 TraceCheckSpWp]: Trace formula consists of 166 conjuncts, 43 conjunts are in the unsatisfiable core [2022-04-27 22:10:27,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-27 22:10:27,226 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-27 22:10:27,559 INFO L272 TraceCheckUtils]: 0: Hoare triple {40815#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,559 INFO L290 TraceCheckUtils]: 1: Hoare triple {40815#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-27 22:10:27,559 INFO L290 TraceCheckUtils]: 2: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,560 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,560 INFO L272 TraceCheckUtils]: 4: Hoare triple {40815#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:27,560 INFO L290 TraceCheckUtils]: 5: Hoare triple {40815#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {40820#(= main_~y~0 0)} is VALID [2022-04-27 22:10:27,560 INFO L290 TraceCheckUtils]: 6: Hoare triple {40820#(= main_~y~0 0)} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} is VALID [2022-04-27 22:10:27,561 INFO L290 TraceCheckUtils]: 7: Hoare triple {40821#(and (<= 1 main_~y~0) (<= main_~y~0 1))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} is VALID [2022-04-27 22:10:27,561 INFO L290 TraceCheckUtils]: 8: Hoare triple {40822#(and (<= 2 main_~y~0) (<= main_~y~0 2))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} is VALID [2022-04-27 22:10:27,562 INFO L290 TraceCheckUtils]: 9: Hoare triple {40823#(and (<= main_~y~0 3) (<= 3 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} is VALID [2022-04-27 22:10:27,562 INFO L290 TraceCheckUtils]: 10: Hoare triple {40824#(and (<= main_~y~0 4) (<= 4 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} is VALID [2022-04-27 22:10:27,563 INFO L290 TraceCheckUtils]: 11: Hoare triple {40825#(and (<= 5 main_~y~0) (<= main_~y~0 5))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} is VALID [2022-04-27 22:10:27,563 INFO L290 TraceCheckUtils]: 12: Hoare triple {40826#(and (<= main_~y~0 6) (<= 6 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} is VALID [2022-04-27 22:10:27,564 INFO L290 TraceCheckUtils]: 13: Hoare triple {40827#(and (<= 7 main_~y~0) (<= main_~y~0 7))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} is VALID [2022-04-27 22:10:27,564 INFO L290 TraceCheckUtils]: 14: Hoare triple {40828#(and (<= main_~y~0 8) (<= 8 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} is VALID [2022-04-27 22:10:27,565 INFO L290 TraceCheckUtils]: 15: Hoare triple {40829#(and (<= 9 main_~y~0) (<= main_~y~0 9))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} is VALID [2022-04-27 22:10:27,565 INFO L290 TraceCheckUtils]: 16: Hoare triple {40830#(and (<= main_~y~0 10) (<= 10 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} is VALID [2022-04-27 22:10:27,566 INFO L290 TraceCheckUtils]: 17: Hoare triple {40831#(and (<= main_~y~0 11) (<= 11 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} is VALID [2022-04-27 22:10:27,566 INFO L290 TraceCheckUtils]: 18: Hoare triple {40832#(and (<= 12 main_~y~0) (<= main_~y~0 12))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} is VALID [2022-04-27 22:10:27,567 INFO L290 TraceCheckUtils]: 19: Hoare triple {40833#(and (<= main_~y~0 13) (<= 13 main_~y~0))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} is VALID [2022-04-27 22:10:27,567 INFO L290 TraceCheckUtils]: 20: Hoare triple {40834#(and (<= 14 main_~y~0) (<= main_~y~0 14))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:10:27,568 INFO L290 TraceCheckUtils]: 21: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} is VALID [2022-04-27 22:10:27,568 INFO L290 TraceCheckUtils]: 22: Hoare triple {40835#(and (<= main_~y~0 15) (<= 15 main_~y~0))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,569 INFO L290 TraceCheckUtils]: 23: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:10:27,569 INFO L290 TraceCheckUtils]: 24: Hoare triple {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:10:27,569 INFO L290 TraceCheckUtils]: 25: Hoare triple {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} is VALID [2022-04-27 22:10:27,570 INFO L290 TraceCheckUtils]: 26: Hoare triple {40915#(and (<= 13 main_~z~0) (<= main_~z~0 13))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} is VALID [2022-04-27 22:10:27,570 INFO L290 TraceCheckUtils]: 27: Hoare triple {40837#(and (<= 14 main_~z~0) (<= main_~z~0 14))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,571 INFO L290 TraceCheckUtils]: 28: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,571 INFO L290 TraceCheckUtils]: 29: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,571 INFO L290 TraceCheckUtils]: 30: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,572 INFO L290 TraceCheckUtils]: 31: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} is VALID [2022-04-27 22:10:27,572 INFO L290 TraceCheckUtils]: 32: Hoare triple {40836#(and (<= main_~z~0 15) (<= 15 main_~z~0))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,572 INFO L272 TraceCheckUtils]: 33: Hoare triple {40816#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {40816#false} is VALID [2022-04-27 22:10:27,572 INFO L290 TraceCheckUtils]: 34: Hoare triple {40816#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40816#false} is VALID [2022-04-27 22:10:27,572 INFO L290 TraceCheckUtils]: 35: Hoare triple {40816#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,573 INFO L290 TraceCheckUtils]: 36: Hoare triple {40816#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:27,573 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:10:27,573 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-04-27 22:10:28,177 INFO L290 TraceCheckUtils]: 36: Hoare triple {40816#false} [114] L7-->__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:28,177 INFO L290 TraceCheckUtils]: 35: Hoare triple {40816#false} [112] L6-->L7: Formula: (= v___VERIFIER_assert_~cond_2 0) InVars {__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} OutVars{__VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_2} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:28,177 INFO L290 TraceCheckUtils]: 34: Hoare triple {40816#false} [110] __VERIFIER_assertENTRY-->L6: Formula: (= v___VERIFIER_assert_~cond_1 |v___VERIFIER_assert_#in~cond_1|) InVars {__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~cond_1|, __VERIFIER_assert_~cond=v___VERIFIER_assert_~cond_1} AuxVars[] AssignedVars[__VERIFIER_assert_~cond] {40816#false} is VALID [2022-04-27 22:10:28,177 INFO L272 TraceCheckUtils]: 33: Hoare triple {40816#false} [108] L41-2-->__VERIFIER_assertENTRY: Formula: (= (ite (= (mod v_main_~x~0_13 4294967296) (mod v_main_~n~0_3 4294967296)) 1 0) |v___VERIFIER_assert_#in~condInParam_1|) InVars {main_~x~0=v_main_~x~0_13, main_~n~0=v_main_~n~0_3} OutVars{__VERIFIER_assert_#in~cond=|v___VERIFIER_assert_#in~condInParam_1|} AuxVars[] AssignedVars[__VERIFIER_assert_#in~cond, main_~x~0, main_~n~0] {40816#false} is VALID [2022-04-27 22:10:28,177 INFO L290 TraceCheckUtils]: 32: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [106] L41-1-->L41-2: Formula: (not (< 0 (mod v_main_~z~0_6 4294967296))) InVars {main_~z~0=v_main_~z~0_6} OutVars{main_~z~0=v_main_~z~0_6} AuxVars[] AssignedVars[] {40816#false} is VALID [2022-04-27 22:10:28,178 INFO L290 TraceCheckUtils]: 31: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [103] L35-1-->L41-1: Formula: (not (< 0 (mod v_main_~x~0_5 4294967296))) InVars {main_~x~0=v_main_~x~0_5} OutVars{main_~x~0=v_main_~x~0_5} AuxVars[] AssignedVars[] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:10:28,178 INFO L290 TraceCheckUtils]: 30: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:10:28,178 INFO L290 TraceCheckUtils]: 29: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [104] L35-1-->L35-1: Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:10:28,178 INFO L290 TraceCheckUtils]: 28: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [100] L29-1-->L35-1: Formula: (not (< 0 (mod v_main_~y~0_1 4294967296))) InVars {main_~y~0=v_main_~y~0_1} OutVars{main_~y~0=v_main_~y~0_1} AuxVars[] AssignedVars[] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:10:28,179 INFO L290 TraceCheckUtils]: 27: Hoare triple {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:10:28,180 INFO L290 TraceCheckUtils]: 26: Hoare triple {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} [101] L29-1-->L29-1: Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~y~0=v_main_~y~0_4, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-27 22:10:28,180 INFO L290 TraceCheckUtils]: 25: Hoare triple {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} [97] L23-2-->L29-1: Formula: (not (< 0 (mod v_main_~z~0_5 4294967296))) InVars {main_~z~0=v_main_~z~0_5} OutVars{main_~z~0=v_main_~z~0_5} AuxVars[] AssignedVars[] {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} is VALID [2022-04-27 22:10:28,180 INFO L290 TraceCheckUtils]: 24: Hoare triple {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40984#(< 0 (mod (+ main_~z~0 2) 4294967296))} is VALID [2022-04-27 22:10:28,181 INFO L290 TraceCheckUtils]: 23: Hoare triple {40964#(< 0 (mod main_~z~0 4294967296))} [98] L23-2-->L23-2: Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] {40980#(< 0 (mod (+ main_~z~0 1) 4294967296))} is VALID [2022-04-27 22:10:28,181 INFO L290 TraceCheckUtils]: 22: Hoare triple {40997#(< 0 (mod main_~y~0 4294967296))} [95] L16-3-->L23-2: Formula: (= v_main_~y~0_9 v_main_~z~0_4) InVars {main_~y~0=v_main_~y~0_9} OutVars{main_~y~0=v_main_~y~0_9, main_~z~0=v_main_~z~0_4} AuxVars[] AssignedVars[main_~z~0] {40964#(< 0 (mod main_~z~0 4294967296))} is VALID [2022-04-27 22:10:28,182 INFO L290 TraceCheckUtils]: 21: Hoare triple {40997#(< 0 (mod main_~y~0 4294967296))} [93] L16-2-->L16-3: Formula: (not (< 0 (mod v_main_~x~0_2 4294967296))) InVars {main_~x~0=v_main_~x~0_2} OutVars{main_~x~0=v_main_~x~0_2} AuxVars[] AssignedVars[] {40997#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:10:28,182 INFO L290 TraceCheckUtils]: 20: Hoare triple {41004#(< 0 (mod (+ main_~y~0 1) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {40997#(< 0 (mod main_~y~0 4294967296))} is VALID [2022-04-27 22:10:28,183 INFO L290 TraceCheckUtils]: 19: Hoare triple {41008#(< 0 (mod (+ main_~y~0 2) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41004#(< 0 (mod (+ main_~y~0 1) 4294967296))} is VALID [2022-04-27 22:10:28,183 INFO L290 TraceCheckUtils]: 18: Hoare triple {41012#(< 0 (mod (+ main_~y~0 3) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41008#(< 0 (mod (+ main_~y~0 2) 4294967296))} is VALID [2022-04-27 22:10:28,187 INFO L290 TraceCheckUtils]: 17: Hoare triple {41016#(< 0 (mod (+ main_~y~0 4) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41012#(< 0 (mod (+ main_~y~0 3) 4294967296))} is VALID [2022-04-27 22:10:28,188 INFO L290 TraceCheckUtils]: 16: Hoare triple {41020#(< 0 (mod (+ 5 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41016#(< 0 (mod (+ main_~y~0 4) 4294967296))} is VALID [2022-04-27 22:10:28,189 INFO L290 TraceCheckUtils]: 15: Hoare triple {41024#(< 0 (mod (+ main_~y~0 6) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41020#(< 0 (mod (+ 5 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:28,200 INFO L290 TraceCheckUtils]: 14: Hoare triple {41028#(< 0 (mod (+ 7 main_~y~0) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41024#(< 0 (mod (+ main_~y~0 6) 4294967296))} is VALID [2022-04-27 22:10:28,201 INFO L290 TraceCheckUtils]: 13: Hoare triple {41032#(< 0 (mod (+ main_~y~0 8) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41028#(< 0 (mod (+ 7 main_~y~0) 4294967296))} is VALID [2022-04-27 22:10:28,202 INFO L290 TraceCheckUtils]: 12: Hoare triple {41036#(< 0 (mod (+ main_~y~0 9) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41032#(< 0 (mod (+ main_~y~0 8) 4294967296))} is VALID [2022-04-27 22:10:28,202 INFO L290 TraceCheckUtils]: 11: Hoare triple {41040#(< 0 (mod (+ main_~y~0 10) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41036#(< 0 (mod (+ main_~y~0 9) 4294967296))} is VALID [2022-04-27 22:10:28,203 INFO L290 TraceCheckUtils]: 10: Hoare triple {41044#(< 0 (mod (+ main_~y~0 11) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41040#(< 0 (mod (+ main_~y~0 10) 4294967296))} is VALID [2022-04-27 22:10:28,204 INFO L290 TraceCheckUtils]: 9: Hoare triple {41048#(< 0 (mod (+ main_~y~0 12) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41044#(< 0 (mod (+ main_~y~0 11) 4294967296))} is VALID [2022-04-27 22:10:28,205 INFO L290 TraceCheckUtils]: 8: Hoare triple {41052#(< 0 (mod (+ main_~y~0 13) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41048#(< 0 (mod (+ main_~y~0 12) 4294967296))} is VALID [2022-04-27 22:10:28,206 INFO L290 TraceCheckUtils]: 7: Hoare triple {41056#(< 0 (mod (+ main_~y~0 14) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41052#(< 0 (mod (+ main_~y~0 13) 4294967296))} is VALID [2022-04-27 22:10:28,207 INFO L290 TraceCheckUtils]: 6: Hoare triple {41060#(< 0 (mod (+ main_~y~0 15) 4294967296))} [94] L16-2-->L16-2: Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] {41056#(< 0 (mod (+ main_~y~0 14) 4294967296))} is VALID [2022-04-27 22:10:28,207 INFO L290 TraceCheckUtils]: 5: Hoare triple {40815#true} [90] mainENTRY-->L16-2: Formula: (and (= v_main_~n~0_1 v_main_~x~0_1) (= v_main_~n~0_1 |v_main_#t~nondet4_2|) (= v_main_~y~0_2 0)) InVars {main_#t~nondet4=|v_main_#t~nondet4_2|} OutVars{main_~y~0=v_main_~y~0_2, main_~n~0=v_main_~n~0_1, main_~x~0=v_main_~x~0_1, main_~z~0=v_main_~z~0_1} AuxVars[] AssignedVars[main_#t~nondet4, main_~x~0, main_~z~0, main_~y~0, main_~n~0] {41060#(< 0 (mod (+ main_~y~0 15) 4294967296))} is VALID [2022-04-27 22:10:28,207 INFO L272 TraceCheckUtils]: 4: Hoare triple {40815#true} [87] L-1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:28,207 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {40815#true} {40815#true} [117] ULTIMATE.initEXIT-->L-1: AOR: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] LVA: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:28,207 INFO L290 TraceCheckUtils]: 2: Hoare triple {40815#true} [91] ULTIMATE.initFINAL-->ULTIMATE.initEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:28,208 INFO L290 TraceCheckUtils]: 1: Hoare triple {40815#true} [88] ULTIMATE.initENTRY-->ULTIMATE.initFINAL: Formula: (let ((.cse0 (select |v_#memory_int_1| 1))) (and (= 48 (select .cse0 0)) (= (select |v_#valid_1| 2) 1) (= (select |v_#valid_1| 0) 0) (< 0 |v_#StackHeapBarrier_1|) (= |v_#NULL.base_1| 0) (= 1 (select |v_#valid_1| 3)) (= (select |v_#length_1| 3) 12) (= (select |v_#length_1| 2) 10) (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1)) (= (select .cse0 1) 0) (= |v_#NULL.offset_1| 0))) InVars {#memory_int=|v_#memory_int_1|, #StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #NULL.offset=|v_#NULL.offset_1|, #length=|v_#length_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] {40815#true} is VALID [2022-04-27 22:10:28,208 INFO L272 TraceCheckUtils]: 0: Hoare triple {40815#true} [86] ULTIMATE.startENTRY-->ULTIMATE.initENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] {40815#true} is VALID [2022-04-27 22:10:28,208 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-04-27 22:10:28,208 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [545845788] provided 0 perfect and 2 imperfect interpolant sequences [2022-04-27 22:10:28,208 INFO L184 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-04-27 22:10:28,208 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21, 21] total 42 [2022-04-27 22:10:28,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [252173910] [2022-04-27 22:10:28,208 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-04-27 22:10:28,210 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 41 states have internal predecessors, (67), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 37 [2022-04-27 22:10:28,210 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-27 22:10:28,210 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 41 states have internal predecessors, (67), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:28,273 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 72 edges. 72 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-27 22:10:28,273 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2022-04-27 22:10:28,273 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-04-27 22:10:28,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2022-04-27 22:10:28,274 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=349, Invalid=1373, Unknown=0, NotChecked=0, Total=1722 [2022-04-27 22:10:28,274 INFO L87 Difference]: Start difference. First operand 482 states and 689 transitions. Second operand has 42 states, 42 states have (on average 1.5952380952380953) internal successors, (67), 41 states have internal predecessors, (67), 2 states have call successors, (4), 3 states have call predecessors, (4), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-04-27 22:10:56,037 WARN L232 SmtUtils]: Spent 9.61s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:11:16,508 WARN L232 SmtUtils]: Spent 13.22s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:11:41,369 WARN L232 SmtUtils]: Spent 19.06s on a formula simplification that was a NOOP. DAG size: 81 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:12:05,854 WARN L232 SmtUtils]: Spent 8.43s on a formula simplification that was a NOOP. DAG size: 79 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:12:08,022 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~y~0 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~z~0 1) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 14 c_main_~y~0) 4294967296)) (< 0 (mod (+ 2 c_main_~z~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-27 22:12:19,961 WARN L232 SmtUtils]: Spent 9.15s on a formula simplification that was a NOOP. DAG size: 60 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:12:33,220 WARN L232 SmtUtils]: Spent 8.26s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:12:50,019 WARN L232 SmtUtils]: Spent 8.22s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:00,191 WARN L232 SmtUtils]: Spent 6.98s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:22,955 WARN L232 SmtUtils]: Spent 10.97s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:13:41,656 WARN L833 $PredicateComparison]: unable to prove that (and (< 0 (mod (+ 2 c_main_~y~0) 4294967296)) (= |c_#NULL.base| |c_old(#NULL.base)|) (< 0 (mod (+ 11 c_main_~y~0) 4294967296)) (< 0 (mod (+ 13 c_main_~y~0) 4294967296)) (< 0 (mod (+ 3 c_main_~y~0) 4294967296)) (< 0 (mod (+ c_main_~y~0 1) 4294967296)) (< 0 (mod (+ 15 c_main_~y~0) 4294967296)) (< 0 (mod (+ 8 c_main_~y~0) 4294967296)) (< 0 (mod c_main_~z~0 4294967296)) (< 0 (mod (+ 6 c_main_~y~0) 4294967296)) (< 0 (mod (+ 5 c_main_~y~0) 4294967296)) (< 0 (mod (+ 4 c_main_~y~0) 4294967296)) (< 0 (mod (+ 9 c_main_~y~0) 4294967296)) (< 0 (mod (+ 14 c_main_~y~0) 4294967296)) (< 0 (mod (+ 10 c_main_~y~0) 4294967296)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (< 0 (mod (+ 7 c_main_~y~0) 4294967296)) (< 0 (mod (+ 12 c_main_~y~0) 4294967296))) is different from false [2022-04-27 22:14:07,555 WARN L232 SmtUtils]: Spent 8.93s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:27,011 WARN L232 SmtUtils]: Spent 6.29s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:14:48,283 WARN L232 SmtUtils]: Spent 5.31s on a formula simplification that was a NOOP. DAG size: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:15:27,441 WARN L232 SmtUtils]: Spent 7.25s on a formula simplification that was a NOOP. DAG size: 66 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:15:46,947 WARN L232 SmtUtils]: Spent 5.26s on a formula simplification that was a NOOP. DAG size: 68 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:16:50,133 WARN L232 SmtUtils]: Spent 10.11s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:17:05,982 WARN L232 SmtUtils]: Spent 6.88s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:17:27,392 WARN L232 SmtUtils]: Spent 10.37s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:17:33,446 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.07s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2022-04-27 22:17:54,477 WARN L232 SmtUtils]: Spent 9.74s on a formula simplification that was a NOOP. DAG size: 75 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:18:08,173 WARN L232 SmtUtils]: Spent 5.23s on a formula simplification that was a NOOP. DAG size: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-04-27 22:18:29,421 WARN L232 SmtUtils]: Spent 9.06s on a formula simplification that was a NOOP. DAG size: 70 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)